Merge tag 'nativebhi' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
[sfrench/cifs-2.6.git] / arch / x86 / kvm / reverse_cpuid.h
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef ARCH_X86_KVM_REVERSE_CPUID_H
3 #define ARCH_X86_KVM_REVERSE_CPUID_H
4
5 #include <uapi/asm/kvm.h>
6 #include <asm/cpufeature.h>
7 #include <asm/cpufeatures.h>
8
9 /*
10  * Hardware-defined CPUID leafs that are either scattered by the kernel or are
11  * unknown to the kernel, but need to be directly used by KVM.  Note, these
12  * word values conflict with the kernel's "bug" caps, but KVM doesn't use those.
13  */
14 enum kvm_only_cpuid_leafs {
15         CPUID_12_EAX     = NCAPINTS,
16         CPUID_7_1_EDX,
17         CPUID_8000_0007_EDX,
18         CPUID_8000_0022_EAX,
19         CPUID_7_2_EDX,
20         NR_KVM_CPU_CAPS,
21
22         NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS,
23 };
24
25 /*
26  * Define a KVM-only feature flag.
27  *
28  * For features that are scattered by cpufeatures.h, __feature_translate() also
29  * needs to be updated to translate the kernel-defined feature into the
30  * KVM-defined feature.
31  *
32  * For features that are 100% KVM-only, i.e. not defined by cpufeatures.h,
33  * forego the intermediate KVM_X86_FEATURE and directly define X86_FEATURE_* so
34  * that X86_FEATURE_* can be used in KVM.  No __feature_translate() handling is
35  * needed in this case.
36  */
37 #define KVM_X86_FEATURE(w, f)           ((w)*32 + (f))
38
39 /* Intel-defined SGX sub-features, CPUID level 0x12 (EAX). */
40 #define KVM_X86_FEATURE_SGX1            KVM_X86_FEATURE(CPUID_12_EAX, 0)
41 #define KVM_X86_FEATURE_SGX2            KVM_X86_FEATURE(CPUID_12_EAX, 1)
42 #define KVM_X86_FEATURE_SGX_EDECCSSA    KVM_X86_FEATURE(CPUID_12_EAX, 11)
43
44 /* Intel-defined sub-features, CPUID level 0x00000007:1 (EDX) */
45 #define X86_FEATURE_AVX_VNNI_INT8       KVM_X86_FEATURE(CPUID_7_1_EDX, 4)
46 #define X86_FEATURE_AVX_NE_CONVERT      KVM_X86_FEATURE(CPUID_7_1_EDX, 5)
47 #define X86_FEATURE_AMX_COMPLEX         KVM_X86_FEATURE(CPUID_7_1_EDX, 8)
48 #define X86_FEATURE_PREFETCHITI         KVM_X86_FEATURE(CPUID_7_1_EDX, 14)
49
50 /* Intel-defined sub-features, CPUID level 0x00000007:2 (EDX) */
51 #define X86_FEATURE_INTEL_PSFD          KVM_X86_FEATURE(CPUID_7_2_EDX, 0)
52 #define X86_FEATURE_IPRED_CTRL          KVM_X86_FEATURE(CPUID_7_2_EDX, 1)
53 #define KVM_X86_FEATURE_RRSBA_CTRL      KVM_X86_FEATURE(CPUID_7_2_EDX, 2)
54 #define X86_FEATURE_DDPD_U              KVM_X86_FEATURE(CPUID_7_2_EDX, 3)
55 #define KVM_X86_FEATURE_BHI_CTRL        KVM_X86_FEATURE(CPUID_7_2_EDX, 4)
56 #define X86_FEATURE_MCDT_NO             KVM_X86_FEATURE(CPUID_7_2_EDX, 5)
57
58 /* CPUID level 0x80000007 (EDX). */
59 #define KVM_X86_FEATURE_CONSTANT_TSC    KVM_X86_FEATURE(CPUID_8000_0007_EDX, 8)
60
61 /* CPUID level 0x80000022 (EAX) */
62 #define KVM_X86_FEATURE_PERFMON_V2      KVM_X86_FEATURE(CPUID_8000_0022_EAX, 0)
63
64 struct cpuid_reg {
65         u32 function;
66         u32 index;
67         int reg;
68 };
69
70 static const struct cpuid_reg reverse_cpuid[] = {
71         [CPUID_1_EDX]         = {         1, 0, CPUID_EDX},
72         [CPUID_8000_0001_EDX] = {0x80000001, 0, CPUID_EDX},
73         [CPUID_8086_0001_EDX] = {0x80860001, 0, CPUID_EDX},
74         [CPUID_1_ECX]         = {         1, 0, CPUID_ECX},
75         [CPUID_C000_0001_EDX] = {0xc0000001, 0, CPUID_EDX},
76         [CPUID_8000_0001_ECX] = {0x80000001, 0, CPUID_ECX},
77         [CPUID_7_0_EBX]       = {         7, 0, CPUID_EBX},
78         [CPUID_D_1_EAX]       = {       0xd, 1, CPUID_EAX},
79         [CPUID_8000_0008_EBX] = {0x80000008, 0, CPUID_EBX},
80         [CPUID_6_EAX]         = {         6, 0, CPUID_EAX},
81         [CPUID_8000_000A_EDX] = {0x8000000a, 0, CPUID_EDX},
82         [CPUID_7_ECX]         = {         7, 0, CPUID_ECX},
83         [CPUID_8000_0007_EBX] = {0x80000007, 0, CPUID_EBX},
84         [CPUID_7_EDX]         = {         7, 0, CPUID_EDX},
85         [CPUID_7_1_EAX]       = {         7, 1, CPUID_EAX},
86         [CPUID_12_EAX]        = {0x00000012, 0, CPUID_EAX},
87         [CPUID_8000_001F_EAX] = {0x8000001f, 0, CPUID_EAX},
88         [CPUID_7_1_EDX]       = {         7, 1, CPUID_EDX},
89         [CPUID_8000_0007_EDX] = {0x80000007, 0, CPUID_EDX},
90         [CPUID_8000_0021_EAX] = {0x80000021, 0, CPUID_EAX},
91         [CPUID_8000_0022_EAX] = {0x80000022, 0, CPUID_EAX},
92         [CPUID_7_2_EDX]       = {         7, 2, CPUID_EDX},
93 };
94
95 /*
96  * Reverse CPUID and its derivatives can only be used for hardware-defined
97  * feature words, i.e. words whose bits directly correspond to a CPUID leaf.
98  * Retrieving a feature bit or masking guest CPUID from a Linux-defined word
99  * is nonsensical as the bit number/mask is an arbitrary software-defined value
100  * and can't be used by KVM to query/control guest capabilities.  And obviously
101  * the leaf being queried must have an entry in the lookup table.
102  */
103 static __always_inline void reverse_cpuid_check(unsigned int x86_leaf)
104 {
105         BUILD_BUG_ON(NR_CPUID_WORDS != NCAPINTS);
106         BUILD_BUG_ON(x86_leaf == CPUID_LNX_1);
107         BUILD_BUG_ON(x86_leaf == CPUID_LNX_2);
108         BUILD_BUG_ON(x86_leaf == CPUID_LNX_3);
109         BUILD_BUG_ON(x86_leaf == CPUID_LNX_4);
110         BUILD_BUG_ON(x86_leaf == CPUID_LNX_5);
111         BUILD_BUG_ON(x86_leaf >= ARRAY_SIZE(reverse_cpuid));
112         BUILD_BUG_ON(reverse_cpuid[x86_leaf].function == 0);
113 }
114
115 /*
116  * Translate feature bits that are scattered in the kernel's cpufeatures word
117  * into KVM feature words that align with hardware's definitions.
118  */
119 static __always_inline u32 __feature_translate(int x86_feature)
120 {
121 #define KVM_X86_TRANSLATE_FEATURE(f)    \
122         case X86_FEATURE_##f: return KVM_X86_FEATURE_##f
123
124         switch (x86_feature) {
125         KVM_X86_TRANSLATE_FEATURE(SGX1);
126         KVM_X86_TRANSLATE_FEATURE(SGX2);
127         KVM_X86_TRANSLATE_FEATURE(SGX_EDECCSSA);
128         KVM_X86_TRANSLATE_FEATURE(CONSTANT_TSC);
129         KVM_X86_TRANSLATE_FEATURE(PERFMON_V2);
130         KVM_X86_TRANSLATE_FEATURE(RRSBA_CTRL);
131         KVM_X86_TRANSLATE_FEATURE(BHI_CTRL);
132         default:
133                 return x86_feature;
134         }
135 }
136
137 static __always_inline u32 __feature_leaf(int x86_feature)
138 {
139         return __feature_translate(x86_feature) / 32;
140 }
141
142 /*
143  * Retrieve the bit mask from an X86_FEATURE_* definition.  Features contain
144  * the hardware defined bit number (stored in bits 4:0) and a software defined
145  * "word" (stored in bits 31:5).  The word is used to index into arrays of
146  * bit masks that hold the per-cpu feature capabilities, e.g. this_cpu_has().
147  */
148 static __always_inline u32 __feature_bit(int x86_feature)
149 {
150         x86_feature = __feature_translate(x86_feature);
151
152         reverse_cpuid_check(x86_feature / 32);
153         return 1 << (x86_feature & 31);
154 }
155
156 #define feature_bit(name)  __feature_bit(X86_FEATURE_##name)
157
158 static __always_inline struct cpuid_reg x86_feature_cpuid(unsigned int x86_feature)
159 {
160         unsigned int x86_leaf = __feature_leaf(x86_feature);
161
162         reverse_cpuid_check(x86_leaf);
163         return reverse_cpuid[x86_leaf];
164 }
165
166 static __always_inline u32 *__cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry,
167                                                   u32 reg)
168 {
169         switch (reg) {
170         case CPUID_EAX:
171                 return &entry->eax;
172         case CPUID_EBX:
173                 return &entry->ebx;
174         case CPUID_ECX:
175                 return &entry->ecx;
176         case CPUID_EDX:
177                 return &entry->edx;
178         default:
179                 BUILD_BUG();
180                 return NULL;
181         }
182 }
183
184 static __always_inline u32 *cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry,
185                                                 unsigned int x86_feature)
186 {
187         const struct cpuid_reg cpuid = x86_feature_cpuid(x86_feature);
188
189         return __cpuid_entry_get_reg(entry, cpuid.reg);
190 }
191
192 static __always_inline u32 cpuid_entry_get(struct kvm_cpuid_entry2 *entry,
193                                            unsigned int x86_feature)
194 {
195         u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
196
197         return *reg & __feature_bit(x86_feature);
198 }
199
200 static __always_inline bool cpuid_entry_has(struct kvm_cpuid_entry2 *entry,
201                                             unsigned int x86_feature)
202 {
203         return cpuid_entry_get(entry, x86_feature);
204 }
205
206 static __always_inline void cpuid_entry_clear(struct kvm_cpuid_entry2 *entry,
207                                               unsigned int x86_feature)
208 {
209         u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
210
211         *reg &= ~__feature_bit(x86_feature);
212 }
213
214 static __always_inline void cpuid_entry_set(struct kvm_cpuid_entry2 *entry,
215                                             unsigned int x86_feature)
216 {
217         u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
218
219         *reg |= __feature_bit(x86_feature);
220 }
221
222 static __always_inline void cpuid_entry_change(struct kvm_cpuid_entry2 *entry,
223                                                unsigned int x86_feature,
224                                                bool set)
225 {
226         u32 *reg = cpuid_entry_get_reg(entry, x86_feature);
227
228         /*
229          * Open coded instead of using cpuid_entry_{clear,set}() to coerce the
230          * compiler into using CMOV instead of Jcc when possible.
231          */
232         if (set)
233                 *reg |= __feature_bit(x86_feature);
234         else
235                 *reg &= ~__feature_bit(x86_feature);
236 }
237
238 #endif /* ARCH_X86_KVM_REVERSE_CPUID_H */