2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
9 * Erich Boleyn : MP v1.4 and additional changes.
10 * Alan Cox : Added EBDA scanning
11 * Ingo Molnar : various cleanups and rewrites
12 * Maciej W. Rozycki: Bits for default MP configurations
13 * Paul Diefenbaugh: Added full ACPI support
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/bootmem.h>
20 #include <linux/kernel_stat.h>
21 #include <linux/mc146818rtc.h>
22 #include <linux/acpi.h>
23 #include <linux/module.h>
27 #include <asm/mpspec.h>
28 #include <asm/pgalloc.h>
29 #include <asm/io_apic.h>
30 #include <asm/proto.h>
32 #include <asm/bios_ebda.h>
34 #include <mach_apic.h>
36 /* Have we found an MP table */
40 * Various Linux-internal data structures created from the
43 DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
44 int mp_bus_id_to_pci_bus[MAX_MP_BUSSES] = {[0 ... MAX_MP_BUSSES - 1] = -1 };
46 static int mp_current_pci_id = 0;
47 /* I/O APIC entries */
48 struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS];
50 /* # of MP IRQ source entries */
51 struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
53 /* MP IRQ source entries */
59 u16 x86_bios_cpu_apicid_init[NR_CPUS] __initdata
60 = {[0 ... NR_CPUS - 1] = BAD_APICID };
61 void *x86_bios_cpu_apicid_early_ptr;
64 /* Make it easy to share the UP and SMP code: */
65 #ifndef CONFIG_X86_SMP
66 unsigned int num_processors;
67 unsigned disabled_cpus __cpuinitdata;
68 #ifndef CONFIG_X86_LOCAL_APIC
69 unsigned int boot_cpu_physical_apicid = -1U;
74 * Intel MP BIOS table parsing routines:
78 * Checksum an MP configuration block.
81 static int __init mpf_checksum(unsigned char *mp, int len)
91 static void __cpuinit MP_processor_info(struct mpc_config_processor *m)
93 char *bootup_cpu = "";
95 if (!(m->mpc_cpuflag & CPU_ENABLED)) {
99 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
100 bootup_cpu = " (Bootup-CPU)";
101 boot_cpu_physical_apicid = m->mpc_apicid;
104 printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu);
105 generic_processor_info(m->mpc_apicid, 0);
108 static void __init MP_bus_info(struct mpc_config_bus *m)
112 memcpy(str, m->mpc_bustype, 6);
114 Dprintk("Bus #%d is %s\n", m->mpc_busid, str);
116 if (strncmp(str, "ISA", 3) == 0) {
117 set_bit(m->mpc_busid, mp_bus_not_pci);
118 } else if (strncmp(str, "PCI", 3) == 0) {
119 clear_bit(m->mpc_busid, mp_bus_not_pci);
120 mp_bus_id_to_pci_bus[m->mpc_busid] = mp_current_pci_id;
123 printk(KERN_ERR "Unknown bustype %s\n", str);
127 static int bad_ioapic(unsigned long address)
129 if (nr_ioapics >= MAX_IO_APICS) {
130 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
131 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
132 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
135 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
136 " found in table, skipping!\n");
142 static void __init MP_ioapic_info(struct mpc_config_ioapic *m)
144 if (!(m->mpc_flags & MPC_APIC_USABLE))
147 printk(KERN_INFO "I/O APIC #%d at 0x%X.\n", m->mpc_apicid,
150 if (bad_ioapic(m->mpc_apicaddr))
153 mp_ioapics[nr_ioapics] = *m;
157 static void __init MP_intsrc_info(struct mpc_config_intsrc *m)
159 mp_irqs[mp_irq_entries] = *m;
160 Dprintk("Int: type %d, pol %d, trig %d, bus %d,"
161 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
162 m->mpc_irqtype, m->mpc_irqflag & 3,
163 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
164 m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
165 if (++mp_irq_entries >= MAX_IRQ_SOURCES)
166 panic("Max # of irq sources exceeded!!\n");
169 static void __init MP_lintsrc_info(struct mpc_config_lintsrc *m)
171 Dprintk("Lint: type %d, pol %d, trig %d, bus %d,"
172 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
173 m->mpc_irqtype, m->mpc_irqflag & 3,
174 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbusid,
175 m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint);
181 static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early)
184 int count = sizeof(*mpc);
185 unsigned char *mpt = ((unsigned char *)mpc) + count;
187 if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) {
188 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
189 mpc->mpc_signature[0],
190 mpc->mpc_signature[1],
191 mpc->mpc_signature[2], mpc->mpc_signature[3]);
194 if (mpf_checksum((unsigned char *)mpc, mpc->mpc_length)) {
195 printk(KERN_ERR "MPTABLE: checksum error!\n");
198 if (mpc->mpc_spec != 0x01 && mpc->mpc_spec != 0x04) {
199 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
203 if (!mpc->mpc_lapic) {
204 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
207 memcpy(str, mpc->mpc_oem, 8);
209 printk(KERN_INFO "MPTABLE: OEM ID: %s ", str);
211 memcpy(str, mpc->mpc_productid, 12);
213 printk(KERN_INFO "MPTABLE: Product ID: %s ", str);
215 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic);
217 /* save the local APIC address, it might be non-default */
219 mp_lapic_addr = mpc->mpc_lapic;
225 * Now process the configuration blocks.
227 while (count < mpc->mpc_length) {
231 struct mpc_config_processor *m =
232 (struct mpc_config_processor *)mpt;
234 MP_processor_info(m);
241 struct mpc_config_bus *m =
242 (struct mpc_config_bus *)mpt;
250 struct mpc_config_ioapic *m =
251 (struct mpc_config_ioapic *)mpt;
259 struct mpc_config_intsrc *m =
260 (struct mpc_config_intsrc *)mpt;
269 struct mpc_config_lintsrc *m =
270 (struct mpc_config_lintsrc *)mpt;
278 setup_apic_routing();
280 printk(KERN_ERR "MPTABLE: no processors registered!\n");
281 return num_processors;
284 static int __init ELCR_trigger(unsigned int irq)
288 port = 0x4d0 + (irq >> 3);
289 return (inb(port) >> (irq & 7)) & 1;
292 static void __init construct_default_ioirq_mptable(int mpc_default_type)
294 struct mpc_config_intsrc intsrc;
296 int ELCR_fallback = 0;
298 intsrc.mpc_type = MP_INTSRC;
299 intsrc.mpc_irqflag = 0; /* conforming */
300 intsrc.mpc_srcbus = 0;
301 intsrc.mpc_dstapic = mp_ioapics[0].mpc_apicid;
303 intsrc.mpc_irqtype = mp_INT;
306 * If true, we have an ISA/PCI system with no IRQ entries
307 * in the MP table. To prevent the PCI interrupts from being set up
308 * incorrectly, we try to use the ELCR. The sanity check to see if
309 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
310 * never be level sensitive, so we simply see if the ELCR agrees.
311 * If it does, we assume it's valid.
313 if (mpc_default_type == 5) {
314 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
315 "falling back to ELCR\n");
317 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
319 printk(KERN_ERR "ELCR contains invalid data... "
323 "Using ELCR to identify PCI interrupts\n");
328 for (i = 0; i < 16; i++) {
329 switch (mpc_default_type) {
331 if (i == 0 || i == 13)
332 continue; /* IRQ0 & IRQ13 not connected */
336 continue; /* IRQ2 is never connected */
341 * If the ELCR indicates a level-sensitive interrupt, we
342 * copy that information over to the MP table in the
343 * irqflag field (level sensitive, active high polarity).
346 intsrc.mpc_irqflag = 13;
348 intsrc.mpc_irqflag = 0;
351 intsrc.mpc_srcbusirq = i;
352 intsrc.mpc_dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
353 MP_intsrc_info(&intsrc);
356 intsrc.mpc_irqtype = mp_ExtINT;
357 intsrc.mpc_srcbusirq = 0;
358 intsrc.mpc_dstirq = 0; /* 8259A to INTIN0 */
359 MP_intsrc_info(&intsrc);
362 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
364 struct mpc_config_processor processor;
365 struct mpc_config_bus bus;
366 struct mpc_config_ioapic ioapic;
367 struct mpc_config_lintsrc lintsrc;
368 int linttypes[2] = { mp_ExtINT, mp_NMI };
372 * local APIC has default address
374 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
377 * 2 CPUs, numbered 0 & 1.
379 processor.mpc_type = MP_PROCESSOR;
380 processor.mpc_apicver = 0;
381 processor.mpc_cpuflag = CPU_ENABLED;
382 processor.mpc_cpufeature = 0;
383 processor.mpc_featureflag = 0;
384 processor.mpc_reserved[0] = 0;
385 processor.mpc_reserved[1] = 0;
386 for (i = 0; i < 2; i++) {
387 processor.mpc_apicid = i;
388 MP_processor_info(&processor);
391 bus.mpc_type = MP_BUS;
393 switch (mpc_default_type) {
395 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
400 memcpy(bus.mpc_bustype, "ISA ", 6);
404 if (mpc_default_type > 4) {
406 memcpy(bus.mpc_bustype, "PCI ", 6);
410 ioapic.mpc_type = MP_IOAPIC;
411 ioapic.mpc_apicid = 2;
412 ioapic.mpc_apicver = 0;
413 ioapic.mpc_flags = MPC_APIC_USABLE;
414 ioapic.mpc_apicaddr = 0xFEC00000;
415 MP_ioapic_info(&ioapic);
418 * We set up most of the low 16 IO-APIC pins according to MPS rules.
420 construct_default_ioirq_mptable(mpc_default_type);
422 lintsrc.mpc_type = MP_LINTSRC;
423 lintsrc.mpc_irqflag = 0; /* conforming */
424 lintsrc.mpc_srcbusid = 0;
425 lintsrc.mpc_srcbusirq = 0;
426 lintsrc.mpc_destapic = MP_APIC_ALL;
427 for (i = 0; i < 2; i++) {
428 lintsrc.mpc_irqtype = linttypes[i];
429 lintsrc.mpc_destapiclint = i;
430 MP_lintsrc_info(&lintsrc);
434 static struct intel_mp_floating *mpf_found;
437 * Scan the memory blocks for an SMP configuration block.
439 static void __init __get_smp_config(unsigned early)
441 struct intel_mp_floating *mpf = mpf_found;
443 if (acpi_lapic && early)
446 * ACPI supports both logical (e.g. Hyper-Threading) and physical
447 * processors, where MPS only supports physical.
449 if (acpi_lapic && acpi_ioapic) {
450 printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
453 } else if (acpi_lapic)
454 printk(KERN_INFO "Using ACPI for processor (LAPIC) "
455 "configuration information\n");
457 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
458 mpf->mpf_specification);
461 * Now see if we need to read further.
463 if (mpf->mpf_feature1 != 0) {
466 * local APIC has default address
468 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
472 printk(KERN_INFO "Default MP configuration #%d\n",
474 construct_default_ISA_mptable(mpf->mpf_feature1);
476 } else if (mpf->mpf_physptr) {
479 * Read the physical hardware table. Anything here will
480 * override the defaults.
482 if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
483 smp_found_config = 0;
485 "BIOS bug, MP table errors detected!...\n");
486 printk(KERN_ERR "... disabling SMP support. "
487 "(tell your hw vendor)\n");
494 * If there are no explicit MP IRQ entries, then we are
495 * broken. We set up most of the low 16 IO-APIC pins to
496 * ISA defaults and hope it will work.
498 if (!mp_irq_entries) {
499 struct mpc_config_bus bus;
501 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
502 "using default mptable. "
503 "(tell your hw vendor)\n");
505 bus.mpc_type = MP_BUS;
507 memcpy(bus.mpc_bustype, "ISA ", 6);
510 construct_default_ioirq_mptable(0);
517 printk(KERN_INFO "Processors: %d\n", num_processors);
519 * Only use the first configuration found.
523 void __init early_get_smp_config(void)
528 void __init get_smp_config(void)
533 static int __init smp_scan_config(unsigned long base, unsigned long length,
536 extern void __bad_mpf_size(void);
537 unsigned int *bp = phys_to_virt(base);
538 struct intel_mp_floating *mpf;
540 Dprintk("Scan SMP from %p for %ld bytes.\n", bp, length);
541 if (sizeof(*mpf) != 16)
545 mpf = (struct intel_mp_floating *)bp;
546 if ((*bp == SMP_MAGIC_IDENT) &&
547 (mpf->mpf_length == 1) &&
548 !mpf_checksum((unsigned char *)bp, 16) &&
549 ((mpf->mpf_specification == 1)
550 || (mpf->mpf_specification == 4))) {
552 smp_found_config = 1;
558 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE);
559 if (mpf->mpf_physptr)
560 reserve_bootmem_generic(mpf->mpf_physptr,
570 static void __init __find_smp_config(unsigned reserve)
572 unsigned int address;
575 * FIXME: Linux assumes you have 640K of base ram..
576 * this continues the error...
578 * 1) Scan the bottom 1K for a signature
579 * 2) Scan the top 1K of base RAM
580 * 3) Scan the 64K of bios
582 if (smp_scan_config(0x0, 0x400, reserve) ||
583 smp_scan_config(639 * 0x400, 0x400, reserve) ||
584 smp_scan_config(0xF0000, 0x10000, reserve))
587 * If it is an SMP machine we should know now.
589 * there is a real-mode segmented pointer pointing to the
590 * 4K EBDA area at 0x40E, calculate and scan it here.
592 * NOTE! There are Linux loaders that will corrupt the EBDA
593 * area, and as such this kind of SMP config may be less
594 * trustworthy, simply because the SMP table may have been
595 * stomped on during early boot. These loaders are buggy and
598 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
601 address = get_bios_ebda();
603 smp_scan_config(address, 0x400, reserve);
606 void __init early_find_smp_config(void)
608 __find_smp_config(0);
611 void __init find_smp_config(void)
613 __find_smp_config(1);
616 /* --------------------------------------------------------------------------
617 ACPI-based MP Configuration
618 -------------------------------------------------------------------------- */
622 void __init mp_register_lapic_address(u64 address)
624 mp_lapic_addr = (unsigned long)address;
625 set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
626 if (boot_cpu_physical_apicid == -1U)
627 boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id());
629 void __cpuinit mp_register_lapic(int id, u8 enabled)
636 generic_processor_info(id, 0);
641 #define MP_MAX_IOAPIC_PIN 127
643 static struct mp_ioapic_routing {
647 u32 pin_programmed[4];
648 } mp_ioapic_routing[MAX_IO_APICS];
650 static int mp_find_ioapic(int gsi)
654 /* Find the IOAPIC that manages this GSI. */
655 for (i = 0; i < nr_ioapics; i++) {
656 if ((gsi >= mp_ioapic_routing[i].gsi_base)
657 && (gsi <= mp_ioapic_routing[i].gsi_end))
661 printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi);
665 static u8 uniq_ioapic_id(u8 id)
668 DECLARE_BITMAP(used, 256);
669 bitmap_zero(used, 256);
670 for (i = 0; i < nr_ioapics; i++) {
671 struct mpc_config_ioapic *ia = &mp_ioapics[i];
672 __set_bit(ia->mpc_apicid, used);
674 if (!test_bit(id, used))
676 return find_first_zero_bit(used, 256);
679 void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
683 if (bad_ioapic(address))
688 mp_ioapics[idx].mpc_type = MP_IOAPIC;
689 mp_ioapics[idx].mpc_flags = MPC_APIC_USABLE;
690 mp_ioapics[idx].mpc_apicaddr = address;
692 set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
693 mp_ioapics[idx].mpc_apicid = uniq_ioapic_id(id);
694 mp_ioapics[idx].mpc_apicver = 0;
697 * Build basic IRQ lookup table to facilitate gsi->io_apic lookups
698 * and to prevent reprogramming of IOAPIC pins (PCI IRQs).
700 mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mpc_apicid;
701 mp_ioapic_routing[idx].gsi_base = gsi_base;
702 mp_ioapic_routing[idx].gsi_end = gsi_base +
703 io_apic_get_redir_entries(idx);
705 printk(KERN_INFO "IOAPIC[%d]: apic_id %d, address 0x%x, "
706 "GSI %d-%d\n", idx, mp_ioapics[idx].mpc_apicid,
707 mp_ioapics[idx].mpc_apicaddr,
708 mp_ioapic_routing[idx].gsi_base,
709 mp_ioapic_routing[idx].gsi_end);
714 void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
716 struct mpc_config_intsrc intsrc;
721 * Convert 'gsi' to 'ioapic.pin'.
723 ioapic = mp_find_ioapic(gsi);
726 pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
729 * TBD: This check is for faulty timer entries, where the override
730 * erroneously sets the trigger to level, resulting in a HUGE
731 * increase of timer interrupts!
733 if ((bus_irq == 0) && (trigger == 3))
736 intsrc.mpc_type = MP_INTSRC;
737 intsrc.mpc_irqtype = mp_INT;
738 intsrc.mpc_irqflag = (trigger << 2) | polarity;
739 intsrc.mpc_srcbus = MP_ISA_BUS;
740 intsrc.mpc_srcbusirq = bus_irq; /* IRQ */
741 intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid; /* APIC ID */
742 intsrc.mpc_dstirq = pin; /* INTIN# */
744 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, %d-%d\n",
745 intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
746 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
747 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic, intsrc.mpc_dstirq);
749 mp_irqs[mp_irq_entries] = intsrc;
750 if (++mp_irq_entries == MAX_IRQ_SOURCES)
751 panic("Max # of irq sources exceeded!\n");
754 void __init mp_config_acpi_legacy_irqs(void)
756 struct mpc_config_intsrc intsrc;
761 * Fabricate the legacy ISA bus (bus #31).
763 set_bit(MP_ISA_BUS, mp_bus_not_pci);
766 * Locate the IOAPIC that manages the ISA IRQs (0-15).
768 ioapic = mp_find_ioapic(0);
772 intsrc.mpc_type = MP_INTSRC;
773 intsrc.mpc_irqflag = 0; /* Conforming */
774 intsrc.mpc_srcbus = MP_ISA_BUS;
775 intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid;
778 * Use the default configuration for the IRQs 0-15. Unless
779 * overridden by (MADT) interrupt source override entries.
781 for (i = 0; i < 16; i++) {
784 for (idx = 0; idx < mp_irq_entries; idx++) {
785 struct mpc_config_intsrc *irq = mp_irqs + idx;
787 /* Do we already have a mapping for this ISA IRQ? */
788 if (irq->mpc_srcbus == MP_ISA_BUS
789 && irq->mpc_srcbusirq == i)
792 /* Do we already have a mapping for this IOAPIC pin */
793 if ((irq->mpc_dstapic == intsrc.mpc_dstapic) &&
794 (irq->mpc_dstirq == i))
798 if (idx != mp_irq_entries) {
799 printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i);
800 continue; /* IRQ already used */
803 intsrc.mpc_irqtype = mp_INT;
804 intsrc.mpc_srcbusirq = i; /* Identity mapped */
805 intsrc.mpc_dstirq = i;
807 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, "
808 "%d-%d\n", intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
809 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
810 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic,
813 mp_irqs[mp_irq_entries] = intsrc;
814 if (++mp_irq_entries == MAX_IRQ_SOURCES)
815 panic("Max # of irq sources exceeded!\n");
819 int mp_register_gsi(u32 gsi, int triggering, int polarity)
825 if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
828 /* Don't set up the ACPI SCI because it's already set up */
829 if (acpi_gbl_FADT.sci_interrupt == gsi)
832 ioapic = mp_find_ioapic(gsi);
834 printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi);
838 ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
841 * Avoid pin reprogramming. PRTs typically include entries
842 * with redundant pin->gsi mappings (but unique PCI devices);
843 * we only program the IOAPIC on the first.
845 bit = ioapic_pin % 32;
846 idx = (ioapic_pin < 32) ? 0 : (ioapic_pin / 32);
848 printk(KERN_ERR "Invalid reference to IOAPIC pin "
849 "%d-%d\n", mp_ioapic_routing[ioapic].apic_id,
853 if ((1 << bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
854 Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
855 mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
859 mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1 << bit);
861 io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
862 triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
863 polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
866 #endif /* CONFIG_ACPI */