2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
9 * Erich Boleyn : MP v1.4 and additional changes.
10 * Alan Cox : Added EBDA scanning
11 * Ingo Molnar : various cleanups and rewrites
12 * Maciej W. Rozycki: Bits for default MP configurations
13 * Paul Diefenbaugh: Added full ACPI support
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/bootmem.h>
20 #include <linux/kernel_stat.h>
21 #include <linux/mc146818rtc.h>
22 #include <linux/acpi.h>
23 #include <linux/module.h>
27 #include <asm/mpspec.h>
28 #include <asm/pgalloc.h>
29 #include <asm/io_apic.h>
30 #include <asm/proto.h>
32 #include <asm/bios_ebda.h>
34 #include <mach_apic.h>
36 /* Have we found an MP table */
40 * Various Linux-internal data structures created from the
43 DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
44 int mp_bus_id_to_pci_bus[MAX_MP_BUSSES] = {[0 ... MAX_MP_BUSSES - 1] = -1 };
46 static int mp_current_pci_id = 0;
47 /* I/O APIC entries */
48 struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS];
50 /* # of MP IRQ source entries */
51 struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
53 /* MP IRQ source entries */
59 u16 x86_bios_cpu_apicid_init[NR_CPUS] __initdata
60 = {[0 ... NR_CPUS - 1] = BAD_APICID };
61 void *x86_bios_cpu_apicid_early_ptr;
64 /* Make it easy to share the UP and SMP code: */
65 #ifndef CONFIG_X86_SMP
66 unsigned int num_processors;
67 unsigned disabled_cpus __cpuinitdata;
68 #ifndef CONFIG_X86_LOCAL_APIC
69 unsigned int boot_cpu_physical_apicid = -1U;
73 /* Make it easy to share the UP and SMP code: */
74 #ifndef CONFIG_X86_SMP
75 physid_mask_t phys_cpu_present_map;
79 * Intel MP BIOS table parsing routines:
83 * Checksum an MP configuration block.
86 static int __init mpf_checksum(unsigned char *mp, int len)
96 static void __cpuinit MP_processor_info(struct mpc_config_processor *m)
98 char *bootup_cpu = "";
100 if (!(m->mpc_cpuflag & CPU_ENABLED)) {
104 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
105 bootup_cpu = " (Bootup-CPU)";
106 boot_cpu_physical_apicid = m->mpc_apicid;
109 printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu);
110 generic_processor_info(m->mpc_apicid, 0);
113 static void __init MP_bus_info(struct mpc_config_bus *m)
117 memcpy(str, m->mpc_bustype, 6);
119 Dprintk("Bus #%d is %s\n", m->mpc_busid, str);
121 if (strncmp(str, "ISA", 3) == 0) {
122 set_bit(m->mpc_busid, mp_bus_not_pci);
123 } else if (strncmp(str, "PCI", 3) == 0) {
124 clear_bit(m->mpc_busid, mp_bus_not_pci);
125 mp_bus_id_to_pci_bus[m->mpc_busid] = mp_current_pci_id;
128 printk(KERN_ERR "Unknown bustype %s\n", str);
132 static int bad_ioapic(unsigned long address)
134 if (nr_ioapics >= MAX_IO_APICS) {
135 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
136 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
137 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
140 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
141 " found in table, skipping!\n");
147 static void __init MP_ioapic_info(struct mpc_config_ioapic *m)
149 if (!(m->mpc_flags & MPC_APIC_USABLE))
152 printk(KERN_INFO "I/O APIC #%d at 0x%X.\n", m->mpc_apicid,
155 if (bad_ioapic(m->mpc_apicaddr))
158 mp_ioapics[nr_ioapics] = *m;
162 static void __init MP_intsrc_info(struct mpc_config_intsrc *m)
164 mp_irqs[mp_irq_entries] = *m;
165 Dprintk("Int: type %d, pol %d, trig %d, bus %d,"
166 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
167 m->mpc_irqtype, m->mpc_irqflag & 3,
168 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
169 m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
170 if (++mp_irq_entries >= MAX_IRQ_SOURCES)
171 panic("Max # of irq sources exceeded!!\n");
174 static void __init MP_lintsrc_info(struct mpc_config_lintsrc *m)
176 Dprintk("Lint: type %d, pol %d, trig %d, bus %d,"
177 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
178 m->mpc_irqtype, m->mpc_irqflag & 3,
179 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbusid,
180 m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint);
186 static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early)
189 int count = sizeof(*mpc);
190 unsigned char *mpt = ((unsigned char *)mpc) + count;
192 if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) {
193 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
194 mpc->mpc_signature[0],
195 mpc->mpc_signature[1],
196 mpc->mpc_signature[2], mpc->mpc_signature[3]);
199 if (mpf_checksum((unsigned char *)mpc, mpc->mpc_length)) {
200 printk(KERN_ERR "MPTABLE: checksum error!\n");
203 if (mpc->mpc_spec != 0x01 && mpc->mpc_spec != 0x04) {
204 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
208 if (!mpc->mpc_lapic) {
209 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
212 memcpy(str, mpc->mpc_oem, 8);
214 printk(KERN_INFO "MPTABLE: OEM ID: %s ", str);
216 memcpy(str, mpc->mpc_productid, 12);
218 printk(KERN_INFO "MPTABLE: Product ID: %s ", str);
220 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic);
222 /* save the local APIC address, it might be non-default */
224 mp_lapic_addr = mpc->mpc_lapic;
230 * Now process the configuration blocks.
232 while (count < mpc->mpc_length) {
236 struct mpc_config_processor *m =
237 (struct mpc_config_processor *)mpt;
239 MP_processor_info(m);
246 struct mpc_config_bus *m =
247 (struct mpc_config_bus *)mpt;
255 struct mpc_config_ioapic *m =
256 (struct mpc_config_ioapic *)mpt;
264 struct mpc_config_intsrc *m =
265 (struct mpc_config_intsrc *)mpt;
274 struct mpc_config_lintsrc *m =
275 (struct mpc_config_lintsrc *)mpt;
283 setup_apic_routing();
285 printk(KERN_ERR "MPTABLE: no processors registered!\n");
286 return num_processors;
289 static int __init ELCR_trigger(unsigned int irq)
293 port = 0x4d0 + (irq >> 3);
294 return (inb(port) >> (irq & 7)) & 1;
297 static void __init construct_default_ioirq_mptable(int mpc_default_type)
299 struct mpc_config_intsrc intsrc;
301 int ELCR_fallback = 0;
303 intsrc.mpc_type = MP_INTSRC;
304 intsrc.mpc_irqflag = 0; /* conforming */
305 intsrc.mpc_srcbus = 0;
306 intsrc.mpc_dstapic = mp_ioapics[0].mpc_apicid;
308 intsrc.mpc_irqtype = mp_INT;
311 * If true, we have an ISA/PCI system with no IRQ entries
312 * in the MP table. To prevent the PCI interrupts from being set up
313 * incorrectly, we try to use the ELCR. The sanity check to see if
314 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
315 * never be level sensitive, so we simply see if the ELCR agrees.
316 * If it does, we assume it's valid.
318 if (mpc_default_type == 5) {
319 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
320 "falling back to ELCR\n");
322 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
324 printk(KERN_ERR "ELCR contains invalid data... "
328 "Using ELCR to identify PCI interrupts\n");
333 for (i = 0; i < 16; i++) {
334 switch (mpc_default_type) {
336 if (i == 0 || i == 13)
337 continue; /* IRQ0 & IRQ13 not connected */
341 continue; /* IRQ2 is never connected */
346 * If the ELCR indicates a level-sensitive interrupt, we
347 * copy that information over to the MP table in the
348 * irqflag field (level sensitive, active high polarity).
351 intsrc.mpc_irqflag = 13;
353 intsrc.mpc_irqflag = 0;
356 intsrc.mpc_srcbusirq = i;
357 intsrc.mpc_dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
358 MP_intsrc_info(&intsrc);
361 intsrc.mpc_irqtype = mp_ExtINT;
362 intsrc.mpc_srcbusirq = 0;
363 intsrc.mpc_dstirq = 0; /* 8259A to INTIN0 */
364 MP_intsrc_info(&intsrc);
367 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
369 struct mpc_config_processor processor;
370 struct mpc_config_bus bus;
371 struct mpc_config_ioapic ioapic;
372 struct mpc_config_lintsrc lintsrc;
373 int linttypes[2] = { mp_ExtINT, mp_NMI };
377 * local APIC has default address
379 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
382 * 2 CPUs, numbered 0 & 1.
384 processor.mpc_type = MP_PROCESSOR;
385 processor.mpc_apicver = 0;
386 processor.mpc_cpuflag = CPU_ENABLED;
387 processor.mpc_cpufeature = 0;
388 processor.mpc_featureflag = 0;
389 processor.mpc_reserved[0] = 0;
390 processor.mpc_reserved[1] = 0;
391 for (i = 0; i < 2; i++) {
392 processor.mpc_apicid = i;
393 MP_processor_info(&processor);
396 bus.mpc_type = MP_BUS;
398 switch (mpc_default_type) {
400 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
405 memcpy(bus.mpc_bustype, "ISA ", 6);
409 if (mpc_default_type > 4) {
411 memcpy(bus.mpc_bustype, "PCI ", 6);
415 ioapic.mpc_type = MP_IOAPIC;
416 ioapic.mpc_apicid = 2;
417 ioapic.mpc_apicver = 0;
418 ioapic.mpc_flags = MPC_APIC_USABLE;
419 ioapic.mpc_apicaddr = 0xFEC00000;
420 MP_ioapic_info(&ioapic);
423 * We set up most of the low 16 IO-APIC pins according to MPS rules.
425 construct_default_ioirq_mptable(mpc_default_type);
427 lintsrc.mpc_type = MP_LINTSRC;
428 lintsrc.mpc_irqflag = 0; /* conforming */
429 lintsrc.mpc_srcbusid = 0;
430 lintsrc.mpc_srcbusirq = 0;
431 lintsrc.mpc_destapic = MP_APIC_ALL;
432 for (i = 0; i < 2; i++) {
433 lintsrc.mpc_irqtype = linttypes[i];
434 lintsrc.mpc_destapiclint = i;
435 MP_lintsrc_info(&lintsrc);
439 static struct intel_mp_floating *mpf_found;
442 * Scan the memory blocks for an SMP configuration block.
444 static void __init __get_smp_config(unsigned early)
446 struct intel_mp_floating *mpf = mpf_found;
448 if (acpi_lapic && early)
451 * ACPI supports both logical (e.g. Hyper-Threading) and physical
452 * processors, where MPS only supports physical.
454 if (acpi_lapic && acpi_ioapic) {
455 printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
458 } else if (acpi_lapic)
459 printk(KERN_INFO "Using ACPI for processor (LAPIC) "
460 "configuration information\n");
462 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
463 mpf->mpf_specification);
466 * Now see if we need to read further.
468 if (mpf->mpf_feature1 != 0) {
471 * local APIC has default address
473 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
477 printk(KERN_INFO "Default MP configuration #%d\n",
479 construct_default_ISA_mptable(mpf->mpf_feature1);
481 } else if (mpf->mpf_physptr) {
484 * Read the physical hardware table. Anything here will
485 * override the defaults.
487 if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
488 smp_found_config = 0;
490 "BIOS bug, MP table errors detected!...\n");
491 printk(KERN_ERR "... disabling SMP support. "
492 "(tell your hw vendor)\n");
499 * If there are no explicit MP IRQ entries, then we are
500 * broken. We set up most of the low 16 IO-APIC pins to
501 * ISA defaults and hope it will work.
503 if (!mp_irq_entries) {
504 struct mpc_config_bus bus;
506 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
507 "using default mptable. "
508 "(tell your hw vendor)\n");
510 bus.mpc_type = MP_BUS;
512 memcpy(bus.mpc_bustype, "ISA ", 6);
515 construct_default_ioirq_mptable(0);
522 printk(KERN_INFO "Processors: %d\n", num_processors);
524 * Only use the first configuration found.
528 void __init early_get_smp_config(void)
533 void __init get_smp_config(void)
538 static int __init smp_scan_config(unsigned long base, unsigned long length,
541 extern void __bad_mpf_size(void);
542 unsigned int *bp = phys_to_virt(base);
543 struct intel_mp_floating *mpf;
545 Dprintk("Scan SMP from %p for %ld bytes.\n", bp, length);
546 if (sizeof(*mpf) != 16)
550 mpf = (struct intel_mp_floating *)bp;
551 if ((*bp == SMP_MAGIC_IDENT) &&
552 (mpf->mpf_length == 1) &&
553 !mpf_checksum((unsigned char *)bp, 16) &&
554 ((mpf->mpf_specification == 1)
555 || (mpf->mpf_specification == 4))) {
557 smp_found_config = 1;
563 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE);
564 if (mpf->mpf_physptr)
565 reserve_bootmem_generic(mpf->mpf_physptr,
575 static void __init __find_smp_config(unsigned reserve)
577 unsigned int address;
580 * FIXME: Linux assumes you have 640K of base ram..
581 * this continues the error...
583 * 1) Scan the bottom 1K for a signature
584 * 2) Scan the top 1K of base RAM
585 * 3) Scan the 64K of bios
587 if (smp_scan_config(0x0, 0x400, reserve) ||
588 smp_scan_config(639 * 0x400, 0x400, reserve) ||
589 smp_scan_config(0xF0000, 0x10000, reserve))
592 * If it is an SMP machine we should know now.
594 * there is a real-mode segmented pointer pointing to the
595 * 4K EBDA area at 0x40E, calculate and scan it here.
597 * NOTE! There are Linux loaders that will corrupt the EBDA
598 * area, and as such this kind of SMP config may be less
599 * trustworthy, simply because the SMP table may have been
600 * stomped on during early boot. These loaders are buggy and
603 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
606 address = get_bios_ebda();
608 smp_scan_config(address, 0x400, reserve);
611 void __init early_find_smp_config(void)
613 __find_smp_config(0);
616 void __init find_smp_config(void)
618 __find_smp_config(1);
621 /* --------------------------------------------------------------------------
622 ACPI-based MP Configuration
623 -------------------------------------------------------------------------- */
627 void __init mp_register_lapic_address(u64 address)
629 mp_lapic_addr = (unsigned long)address;
630 set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
631 if (boot_cpu_physical_apicid == -1U)
632 boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id());
634 void __cpuinit mp_register_lapic(int id, u8 enabled)
641 generic_processor_info(id, 0);
646 #define MP_MAX_IOAPIC_PIN 127
648 static struct mp_ioapic_routing {
652 u32 pin_programmed[4];
653 } mp_ioapic_routing[MAX_IO_APICS];
655 static int mp_find_ioapic(int gsi)
659 /* Find the IOAPIC that manages this GSI. */
660 for (i = 0; i < nr_ioapics; i++) {
661 if ((gsi >= mp_ioapic_routing[i].gsi_base)
662 && (gsi <= mp_ioapic_routing[i].gsi_end))
666 printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi);
670 static u8 uniq_ioapic_id(u8 id)
673 DECLARE_BITMAP(used, 256);
674 bitmap_zero(used, 256);
675 for (i = 0; i < nr_ioapics; i++) {
676 struct mpc_config_ioapic *ia = &mp_ioapics[i];
677 __set_bit(ia->mpc_apicid, used);
679 if (!test_bit(id, used))
681 return find_first_zero_bit(used, 256);
684 void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
688 if (bad_ioapic(address))
693 mp_ioapics[idx].mpc_type = MP_IOAPIC;
694 mp_ioapics[idx].mpc_flags = MPC_APIC_USABLE;
695 mp_ioapics[idx].mpc_apicaddr = address;
697 set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
698 mp_ioapics[idx].mpc_apicid = uniq_ioapic_id(id);
699 mp_ioapics[idx].mpc_apicver = 0;
702 * Build basic IRQ lookup table to facilitate gsi->io_apic lookups
703 * and to prevent reprogramming of IOAPIC pins (PCI IRQs).
705 mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mpc_apicid;
706 mp_ioapic_routing[idx].gsi_base = gsi_base;
707 mp_ioapic_routing[idx].gsi_end = gsi_base +
708 io_apic_get_redir_entries(idx);
710 printk(KERN_INFO "IOAPIC[%d]: apic_id %d, address 0x%x, "
711 "GSI %d-%d\n", idx, mp_ioapics[idx].mpc_apicid,
712 mp_ioapics[idx].mpc_apicaddr,
713 mp_ioapic_routing[idx].gsi_base,
714 mp_ioapic_routing[idx].gsi_end);
719 void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi)
721 struct mpc_config_intsrc intsrc;
726 * Convert 'gsi' to 'ioapic.pin'.
728 ioapic = mp_find_ioapic(gsi);
731 pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
734 * TBD: This check is for faulty timer entries, where the override
735 * erroneously sets the trigger to level, resulting in a HUGE
736 * increase of timer interrupts!
738 if ((bus_irq == 0) && (trigger == 3))
741 intsrc.mpc_type = MP_INTSRC;
742 intsrc.mpc_irqtype = mp_INT;
743 intsrc.mpc_irqflag = (trigger << 2) | polarity;
744 intsrc.mpc_srcbus = MP_ISA_BUS;
745 intsrc.mpc_srcbusirq = bus_irq; /* IRQ */
746 intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid; /* APIC ID */
747 intsrc.mpc_dstirq = pin; /* INTIN# */
749 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, %d-%d\n",
750 intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
751 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
752 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic, intsrc.mpc_dstirq);
754 mp_irqs[mp_irq_entries] = intsrc;
755 if (++mp_irq_entries == MAX_IRQ_SOURCES)
756 panic("Max # of irq sources exceeded!\n");
759 void __init mp_config_acpi_legacy_irqs(void)
761 struct mpc_config_intsrc intsrc;
766 * Fabricate the legacy ISA bus (bus #31).
768 set_bit(MP_ISA_BUS, mp_bus_not_pci);
771 * Locate the IOAPIC that manages the ISA IRQs (0-15).
773 ioapic = mp_find_ioapic(0);
777 intsrc.mpc_type = MP_INTSRC;
778 intsrc.mpc_irqflag = 0; /* Conforming */
779 intsrc.mpc_srcbus = MP_ISA_BUS;
780 intsrc.mpc_dstapic = mp_ioapics[ioapic].mpc_apicid;
783 * Use the default configuration for the IRQs 0-15. Unless
784 * overridden by (MADT) interrupt source override entries.
786 for (i = 0; i < 16; i++) {
789 for (idx = 0; idx < mp_irq_entries; idx++) {
790 struct mpc_config_intsrc *irq = mp_irqs + idx;
792 /* Do we already have a mapping for this ISA IRQ? */
793 if (irq->mpc_srcbus == MP_ISA_BUS
794 && irq->mpc_srcbusirq == i)
797 /* Do we already have a mapping for this IOAPIC pin */
798 if ((irq->mpc_dstapic == intsrc.mpc_dstapic) &&
799 (irq->mpc_dstirq == i))
803 if (idx != mp_irq_entries) {
804 printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i);
805 continue; /* IRQ already used */
808 intsrc.mpc_irqtype = mp_INT;
809 intsrc.mpc_srcbusirq = i; /* Identity mapped */
810 intsrc.mpc_dstirq = i;
812 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, "
813 "%d-%d\n", intsrc.mpc_irqtype, intsrc.mpc_irqflag & 3,
814 (intsrc.mpc_irqflag >> 2) & 3, intsrc.mpc_srcbus,
815 intsrc.mpc_srcbusirq, intsrc.mpc_dstapic,
818 mp_irqs[mp_irq_entries] = intsrc;
819 if (++mp_irq_entries == MAX_IRQ_SOURCES)
820 panic("Max # of irq sources exceeded!\n");
824 int mp_register_gsi(u32 gsi, int triggering, int polarity)
830 if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
833 /* Don't set up the ACPI SCI because it's already set up */
834 if (acpi_gbl_FADT.sci_interrupt == gsi)
837 ioapic = mp_find_ioapic(gsi);
839 printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi);
843 ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base;
846 * Avoid pin reprogramming. PRTs typically include entries
847 * with redundant pin->gsi mappings (but unique PCI devices);
848 * we only program the IOAPIC on the first.
850 bit = ioapic_pin % 32;
851 idx = (ioapic_pin < 32) ? 0 : (ioapic_pin / 32);
853 printk(KERN_ERR "Invalid reference to IOAPIC pin "
854 "%d-%d\n", mp_ioapic_routing[ioapic].apic_id,
858 if ((1 << bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
859 Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
860 mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
864 mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1 << bit);
866 io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
867 triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
868 polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
871 #endif /* CONFIG_ACPI */