1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Kernel-based Virtual Machine driver for Linux
5 * This header defines architecture specific interfaces, x86 version
8 #ifndef _ASM_X86_KVM_HOST_H
9 #define _ASM_X86_KVM_HOST_H
11 #include <linux/types.h>
13 #include <linux/mmu_notifier.h>
14 #include <linux/tracepoint.h>
15 #include <linux/cpumask.h>
16 #include <linux/irq_work.h>
17 #include <linux/irq.h>
18 #include <linux/workqueue.h>
20 #include <linux/kvm.h>
21 #include <linux/kvm_para.h>
22 #include <linux/kvm_types.h>
23 #include <linux/perf_event.h>
24 #include <linux/pvclock_gtod.h>
25 #include <linux/clocksource.h>
26 #include <linux/irqbypass.h>
27 #include <linux/hyperv.h>
30 #include <asm/pvclock-abi.h>
33 #include <asm/msr-index.h>
35 #include <asm/kvm_page_track.h>
36 #include <asm/kvm_vcpu_regs.h>
37 #include <asm/hyperv-tlfs.h>
39 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS
41 #define KVM_MAX_VCPUS 1024
44 * In x86, the VCPU ID corresponds to the APIC ID, and APIC IDs
45 * might be larger than the actual number of VCPUs because the
46 * APIC ID encodes CPU topology information.
48 * In the worst case, we'll need less than one extra bit for the
49 * Core ID, and less than one extra bit for the Package (Die) ID,
50 * so ratio of 4 should be enough.
52 #define KVM_VCPU_ID_RATIO 4
53 #define KVM_MAX_VCPU_IDS (KVM_MAX_VCPUS * KVM_VCPU_ID_RATIO)
55 /* memory slots that are not exposed to userspace */
56 #define KVM_PRIVATE_MEM_SLOTS 3
58 #define KVM_HALT_POLL_NS_DEFAULT 200000
60 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
62 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \
63 KVM_DIRTY_LOG_INITIALLY_SET)
65 #define KVM_BUS_LOCK_DETECTION_VALID_MODE (KVM_BUS_LOCK_DETECTION_OFF | \
66 KVM_BUS_LOCK_DETECTION_EXIT)
68 /* x86-specific vcpu->requests bit members */
69 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0)
70 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1)
71 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2)
72 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3)
73 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4)
74 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5)
75 #define KVM_REQ_EVENT KVM_ARCH_REQ(6)
76 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7)
77 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8)
78 #define KVM_REQ_NMI KVM_ARCH_REQ(9)
79 #define KVM_REQ_PMU KVM_ARCH_REQ(10)
80 #define KVM_REQ_PMI KVM_ARCH_REQ(11)
81 #define KVM_REQ_SMI KVM_ARCH_REQ(12)
82 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13)
83 #define KVM_REQ_MCLOCK_INPROGRESS \
84 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
85 #define KVM_REQ_SCAN_IOAPIC \
86 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
87 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16)
88 #define KVM_REQ_APIC_PAGE_RELOAD \
89 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
90 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18)
91 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19)
92 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20)
93 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21)
94 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22)
95 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23)
96 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24)
97 #define KVM_REQ_APICV_UPDATE \
98 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
99 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26)
100 #define KVM_REQ_TLB_FLUSH_GUEST \
101 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
102 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28)
103 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29)
104 #define KVM_REQ_UPDATE_CPU_DIRTY_LOGGING \
105 KVM_ARCH_REQ_FLAGS(30, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
106 #define KVM_REQ_MMU_FREE_OBSOLETE_ROOTS \
107 KVM_ARCH_REQ_FLAGS(31, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
109 #define CR0_RESERVED_BITS \
110 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
111 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
112 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
114 #define CR4_RESERVED_BITS \
115 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
116 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
117 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
118 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
119 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \
120 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP))
122 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
126 #define INVALID_PAGE (~(hpa_t)0)
127 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
129 #define UNMAPPED_GVA (~(gpa_t)0)
130 #define INVALID_GPA (~(gpa_t)0)
132 /* KVM Hugepage definitions for x86 */
133 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G
134 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1)
135 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
136 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
137 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
138 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
139 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
141 #define KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO 50
142 #define KVM_MIN_ALLOC_MMU_PAGES 64UL
143 #define KVM_MMU_HASH_SHIFT 12
144 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
145 #define KVM_MIN_FREE_MMU_PAGES 5
146 #define KVM_REFILL_PAGES 25
147 #define KVM_MAX_CPUID_ENTRIES 256
148 #define KVM_NR_FIXED_MTRR_REGION 88
149 #define KVM_NR_VAR_MTRR 8
151 #define ASYNC_PF_PER_VCPU 64
154 VCPU_REGS_RAX = __VCPU_REGS_RAX,
155 VCPU_REGS_RCX = __VCPU_REGS_RCX,
156 VCPU_REGS_RDX = __VCPU_REGS_RDX,
157 VCPU_REGS_RBX = __VCPU_REGS_RBX,
158 VCPU_REGS_RSP = __VCPU_REGS_RSP,
159 VCPU_REGS_RBP = __VCPU_REGS_RBP,
160 VCPU_REGS_RSI = __VCPU_REGS_RSI,
161 VCPU_REGS_RDI = __VCPU_REGS_RDI,
163 VCPU_REGS_R8 = __VCPU_REGS_R8,
164 VCPU_REGS_R9 = __VCPU_REGS_R9,
165 VCPU_REGS_R10 = __VCPU_REGS_R10,
166 VCPU_REGS_R11 = __VCPU_REGS_R11,
167 VCPU_REGS_R12 = __VCPU_REGS_R12,
168 VCPU_REGS_R13 = __VCPU_REGS_R13,
169 VCPU_REGS_R14 = __VCPU_REGS_R14,
170 VCPU_REGS_R15 = __VCPU_REGS_R15,
175 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
181 VCPU_EXREG_EXIT_INFO_1,
182 VCPU_EXREG_EXIT_INFO_2,
196 enum exit_fastpath_completion {
198 EXIT_FASTPATH_REENTER_GUEST,
199 EXIT_FASTPATH_EXIT_HANDLED,
201 typedef enum exit_fastpath_completion fastpath_t;
203 struct x86_emulate_ctxt;
204 struct x86_exception;
206 enum x86_intercept_stage;
208 #define KVM_NR_DB_REGS 4
210 #define DR6_BUS_LOCK (1 << 11)
211 #define DR6_BD (1 << 13)
212 #define DR6_BS (1 << 14)
213 #define DR6_BT (1 << 15)
214 #define DR6_RTM (1 << 16)
216 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits.
217 * We can regard all the bits in DR6_FIXED_1 as active_low bits;
218 * they will never be 0 for now, but when they are defined
219 * in the future it will require no code change.
221 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6.
223 #define DR6_ACTIVE_LOW 0xffff0ff0
224 #define DR6_VOLATILE 0x0001e80f
225 #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE)
227 #define DR7_BP_EN_MASK 0x000000ff
228 #define DR7_GE (1 << 9)
229 #define DR7_GD (1 << 13)
230 #define DR7_FIXED_1 0x00000400
231 #define DR7_VOLATILE 0xffff2bff
233 #define KVM_GUESTDBG_VALID_MASK \
234 (KVM_GUESTDBG_ENABLE | \
235 KVM_GUESTDBG_SINGLESTEP | \
236 KVM_GUESTDBG_USE_HW_BP | \
237 KVM_GUESTDBG_USE_SW_BP | \
238 KVM_GUESTDBG_INJECT_BP | \
239 KVM_GUESTDBG_INJECT_DB | \
240 KVM_GUESTDBG_BLOCKIRQ)
243 #define PFERR_PRESENT_BIT 0
244 #define PFERR_WRITE_BIT 1
245 #define PFERR_USER_BIT 2
246 #define PFERR_RSVD_BIT 3
247 #define PFERR_FETCH_BIT 4
248 #define PFERR_PK_BIT 5
249 #define PFERR_SGX_BIT 15
250 #define PFERR_GUEST_FINAL_BIT 32
251 #define PFERR_GUEST_PAGE_BIT 33
252 #define PFERR_IMPLICIT_ACCESS_BIT 48
254 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
255 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
256 #define PFERR_USER_MASK (1U << PFERR_USER_BIT)
257 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
258 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
259 #define PFERR_PK_MASK (1U << PFERR_PK_BIT)
260 #define PFERR_SGX_MASK (1U << PFERR_SGX_BIT)
261 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT)
262 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT)
263 #define PFERR_IMPLICIT_ACCESS (1ULL << PFERR_IMPLICIT_ACCESS_BIT)
265 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \
269 /* apic attention bits */
270 #define KVM_APIC_CHECK_VAPIC 0
272 * The following bit is set with PV-EOI, unset on EOI.
273 * We detect PV-EOI changes by guest by comparing
274 * this bit with PV-EOI in guest memory.
275 * See the implementation in apic_update_pv_eoi.
277 #define KVM_APIC_PV_EOI_PENDING 1
279 struct kvm_kernel_irq_routing_entry;
282 * kvm_mmu_page_role tracks the properties of a shadow page (where shadow page
283 * also includes TDP pages) to determine whether or not a page can be used in
284 * the given MMU context. This is a subset of the overall kvm_mmu_role to
285 * minimize the size of kvm_memory_slot.arch.gfn_track, i.e. allows allocating
286 * 2 bytes per gfn instead of 4 bytes per gfn.
288 * Indirect upper-level shadow pages are tracked for write-protection via
289 * gfn_track. As above, gfn_track is a 16 bit counter, so KVM must not create
290 * more than 2^16-1 upper-level shadow pages at a single gfn, otherwise
291 * gfn_track will overflow and explosions will ensure.
293 * A unique shadow page (SP) for a gfn is created if and only if an existing SP
294 * cannot be reused. The ability to reuse a SP is tracked by its role, which
295 * incorporates various mode bits and properties of the SP. Roughly speaking,
296 * the number of unique SPs that can theoretically be created is 2^n, where n
297 * is the number of bits that are used to compute the role.
299 * But, even though there are 19 bits in the mask below, not all combinations
300 * of modes and flags are possible:
302 * - invalid shadow pages are not accounted, so the bits are effectively 18
304 * - quadrant will only be used if has_4_byte_gpte=1 (non-PAE paging);
305 * execonly and ad_disabled are only used for nested EPT which has
306 * has_4_byte_gpte=0. Therefore, 2 bits are always unused.
308 * - the 4 bits of level are effectively limited to the values 2/3/4/5,
309 * as 4k SPs are not tracked (allowed to go unsync). In addition non-PAE
310 * paging has exactly one upper level, making level completely redundant
311 * when has_4_byte_gpte=1.
313 * - on top of this, smep_andnot_wp and smap_andnot_wp are only set if
314 * cr0_wp=0, therefore these three bits only give rise to 5 possibilities.
316 * Therefore, the maximum number of possible upper-level shadow pages for a
317 * single gfn is a bit less than 2^13.
319 union kvm_mmu_page_role {
323 unsigned has_4_byte_gpte:1;
330 unsigned smep_andnot_wp:1;
331 unsigned smap_andnot_wp:1;
332 unsigned ad_disabled:1;
333 unsigned guest_mode:1;
337 * This is left at the top of the word so that
338 * kvm_memslots_for_spte_role can extract it with a
339 * simple shift. While there is room, give it a whole
340 * byte so it is also faster to load it from memory.
347 * kvm_mmu_extended_role complements kvm_mmu_page_role, tracking properties
348 * relevant to the current MMU configuration. When loading CR0, CR4, or EFER,
349 * including on nested transitions, if nothing in the full role changes then
350 * MMU re-configuration can be skipped. @valid bit is set on first usage so we
351 * don't treat all-zero structure as valid data.
353 * The properties that are tracked in the extended role but not the page role
354 * are for things that either (a) do not affect the validity of the shadow page
355 * or (b) are indirectly reflected in the shadow page's role. For example,
356 * CR4.PKE only affects permission checks for software walks of the guest page
357 * tables (because KVM doesn't support Protection Keys with shadow paging), and
358 * CR0.PG, CR4.PAE, and CR4.PSE are indirectly reflected in role.level.
360 * Note, SMEP and SMAP are not redundant with sm*p_andnot_wp in the page role.
361 * If CR0.WP=1, KVM can reuse shadow pages for the guest regardless of SMEP and
362 * SMAP, but the MMU's permission checks for software walks need to be SMEP and
363 * SMAP aware regardless of CR0.WP.
365 union kvm_mmu_extended_role {
368 unsigned int valid:1;
369 unsigned int execonly:1;
370 unsigned int cr0_pg:1;
371 unsigned int cr4_pae:1;
372 unsigned int cr4_pse:1;
373 unsigned int cr4_pke:1;
374 unsigned int cr4_smap:1;
375 unsigned int cr4_smep:1;
376 unsigned int cr4_la57:1;
377 unsigned int efer_lma:1;
384 union kvm_mmu_page_role base;
385 union kvm_mmu_extended_role ext;
389 struct kvm_rmap_head {
393 struct kvm_pio_request {
394 unsigned long linear_rip;
401 #define PT64_ROOT_MAX_LEVEL 5
403 struct rsvd_bits_validate {
404 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL];
408 struct kvm_mmu_root_info {
413 #define KVM_MMU_ROOT_INFO_INVALID \
414 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE })
416 #define KVM_MMU_NUM_PREV_ROOTS 3
418 #define KVM_HAVE_MMU_RWLOCK
421 struct kvm_page_fault;
424 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit,
425 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the
429 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu);
430 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
431 int (*page_fault)(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault);
432 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
433 struct x86_exception *fault);
434 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
435 gpa_t gva_or_gpa, u64 access,
436 struct x86_exception *exception);
437 int (*sync_page)(struct kvm_vcpu *vcpu,
438 struct kvm_mmu_page *sp);
439 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa);
440 struct kvm_mmu_root_info root;
441 union kvm_mmu_role mmu_role;
443 u8 shadow_root_level;
446 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS];
449 * Bitmap; bit set = permission fault
450 * Byte index: page fault error code [4:1]
451 * Bit index: pte permissions in ACC_* format
456 * The pkru_mask indicates if protection key checks are needed. It
457 * consists of 16 domains indexed by page fault error code bits [4:1],
458 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables.
459 * Each domain has 2 bits which are ANDed with AD and WD from PKRU.
468 * check zero bits on shadow page table entries, these
469 * bits include not only hardware reserved bits but also
470 * the bits spte never used.
472 struct rsvd_bits_validate shadow_zero_check;
474 struct rsvd_bits_validate guest_rsvd_check;
476 u64 pdptrs[4]; /* pae */
479 struct kvm_tlb_range {
494 struct perf_event *perf_event;
495 struct kvm_vcpu *vcpu;
497 * eventsel value for general purpose counters,
498 * ctrl value for fixed counters.
505 #define KVM_PMC_MAX_FIXED 3
507 unsigned nr_arch_gp_counters;
508 unsigned nr_arch_fixed_counters;
509 unsigned available_event_types;
513 u64 counter_bitmask[2];
514 u64 global_ctrl_mask;
515 u64 global_ovf_ctrl_mask;
519 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
520 struct kvm_pmc fixed_counters[KVM_PMC_MAX_FIXED];
521 struct irq_work irq_work;
522 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX);
523 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX);
524 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX);
527 * The gate to release perf_events not marked in
528 * pmc_in_use only once in a vcpu time slice.
533 * The total number of programmed perf_events and it helps to avoid
534 * redundant check before cleanup if guest don't use vPMU at all.
542 KVM_DEBUGREG_BP_ENABLED = 1,
543 KVM_DEBUGREG_WONT_EXIT = 2,
546 struct kvm_mtrr_range {
549 struct list_head node;
553 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
554 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
557 struct list_head head;
560 /* Hyper-V SynIC timer */
561 struct kvm_vcpu_hv_stimer {
562 struct hrtimer timer;
564 union hv_stimer_config config;
567 struct hv_message msg;
571 /* Hyper-V synthetic interrupt controller (SynIC)*/
572 struct kvm_vcpu_hv_synic {
577 atomic64_t sint[HV_SYNIC_SINT_COUNT];
578 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT];
579 DECLARE_BITMAP(auto_eoi_bitmap, 256);
580 DECLARE_BITMAP(vec_bitmap, 256);
582 bool dont_zero_synic_pages;
585 /* Hyper-V per vcpu emulation context */
587 struct kvm_vcpu *vcpu;
591 struct kvm_vcpu_hv_synic synic;
592 struct kvm_hyperv_exit exit;
593 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT];
594 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
597 u32 features_eax; /* HYPERV_CPUID_FEATURES.EAX */
598 u32 features_ebx; /* HYPERV_CPUID_FEATURES.EBX */
599 u32 features_edx; /* HYPERV_CPUID_FEATURES.EDX */
600 u32 enlightenments_eax; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EAX */
601 u32 enlightenments_ebx; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EBX */
602 u32 syndbg_cap_eax; /* HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES.EAX */
606 /* Xen HVM per vcpu emulation context */
607 struct kvm_vcpu_xen {
609 u32 current_runstate;
611 bool vcpu_time_info_set;
613 struct gfn_to_hva_cache vcpu_info_cache;
614 struct gfn_to_hva_cache vcpu_time_info_cache;
615 struct gfn_to_hva_cache runstate_cache;
617 u64 runstate_entry_time;
618 u64 runstate_times[4];
619 unsigned long evtchn_pending_sel;
622 struct kvm_vcpu_arch {
624 * rip and regs accesses must go through
625 * kvm_{register,rip}_{read,write} functions.
627 unsigned long regs[NR_VCPU_REGS];
632 unsigned long cr0_guest_owned_bits;
636 unsigned long cr4_guest_owned_bits;
637 unsigned long cr4_guest_rsvd_bits;
644 struct kvm_lapic *apic; /* kernel irqchip context */
646 bool load_eoi_exitmap_pending;
647 DECLARE_BITMAP(ioapic_handled_vectors, 256);
648 unsigned long apic_attention;
649 int32_t apic_arb_prio;
651 u64 ia32_misc_enable_msr;
654 bool tpr_access_reporting;
656 bool xfd_no_write_intercept;
658 u64 microcode_version;
659 u64 arch_capabilities;
660 u64 perf_capabilities;
663 * Paging state of the vcpu
665 * If the vcpu runs in guest mode with two level paging this still saves
666 * the paging mode of the l1 guest. This context is always used to
671 /* Non-nested MMU for L1 */
672 struct kvm_mmu root_mmu;
674 /* L1 MMU when running nested */
675 struct kvm_mmu guest_mmu;
678 * Paging state of an L2 guest (used for nested npt)
680 * This context will save all necessary information to walk page tables
681 * of an L2 guest. This context is only initialized for page table
682 * walking and not for faulting since we never handle l2 page faults on
685 struct kvm_mmu nested_mmu;
688 * Pointer to the mmu context currently used for
689 * gva_to_gpa translations.
691 struct kvm_mmu *walk_mmu;
693 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
694 struct kvm_mmu_memory_cache mmu_shadow_page_cache;
695 struct kvm_mmu_memory_cache mmu_gfn_array_cache;
696 struct kvm_mmu_memory_cache mmu_page_header_cache;
699 * QEMU userspace and the guest each have their own FPU state.
700 * In vcpu_run, we switch between the user and guest FPU contexts.
701 * While running a VCPU, the VCPU thread will have the guest FPU
704 * Note that while the PKRU state lives inside the fpu registers,
705 * it is switched out separately at VMENTER and VMEXIT time. The
706 * "guest_fpstate" state here contains the guest FPU context, with the
709 struct fpu_guest guest_fpu;
713 struct kvm_pio_request pio;
716 unsigned sev_pio_count;
718 u8 event_exit_inst_len;
720 struct kvm_queued_exception {
726 unsigned long payload;
731 struct kvm_queued_interrupt {
737 int halt_request; /* real mode on Intel only */
740 struct kvm_cpuid_entry2 *cpuid_entries;
743 u64 reserved_gpa_bits;
746 /* emulate context */
748 struct x86_emulate_ctxt *emulate_ctxt;
749 bool emulate_regs_need_sync_to_vcpu;
750 bool emulate_regs_need_sync_from_vcpu;
751 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
754 struct pvclock_vcpu_time_info hv_clock;
755 unsigned int hw_tsc_khz;
756 struct gfn_to_hva_cache pv_time;
757 bool pv_time_enabled;
758 /* set guest stopped flag in pvclock flags field */
759 bool pvclock_set_guest_stopped_request;
765 struct gfn_to_hva_cache cache;
769 u64 tsc_offset; /* current tsc offset */
772 u64 tsc_offset_adjustment;
775 u64 this_tsc_generation;
777 bool tsc_always_catchup;
778 s8 virtual_tsc_shift;
779 u32 virtual_tsc_mult;
781 s64 ia32_tsc_adjust_msr;
782 u64 msr_ia32_power_ctl;
783 u64 l1_tsc_scaling_ratio;
784 u64 tsc_scaling_ratio; /* current scaling ratio */
786 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
787 unsigned nmi_pending; /* NMI queued after currently running handler */
788 bool nmi_injected; /* Trying to inject an NMI this entry */
789 bool smi_pending; /* SMI queued after currently running handler */
790 u8 handling_intr_from_guest;
792 struct kvm_mtrr mtrr_state;
795 unsigned switch_db_regs;
796 unsigned long db[KVM_NR_DB_REGS];
799 unsigned long eff_db[KVM_NR_DB_REGS];
800 unsigned long guest_debug_dr7;
801 u64 msr_platform_info;
802 u64 msr_misc_features_enables;
810 /* Cache MMIO info */
812 unsigned mmio_access;
818 /* used for guest single stepping over the given code position */
819 unsigned long singlestep_rip;
822 struct kvm_vcpu_hv *hyperv;
823 struct kvm_vcpu_xen xen;
825 cpumask_var_t wbinvd_dirty_mask;
827 unsigned long last_retry_eip;
828 unsigned long last_retry_addr;
832 gfn_t gfns[ASYNC_PF_PER_VCPU];
833 struct gfn_to_hva_cache data;
834 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */
835 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */
840 unsigned long nested_apf_token;
841 bool delivery_as_pf_vmexit;
842 bool pageready_pending;
845 /* OSVW MSRs (AMD only) */
853 struct gfn_to_hva_cache data;
856 u64 msr_kvm_poll_control;
859 * Indicates the guest is trying to write a gfn that contains one or
860 * more of the PTEs used to translate the write itself, i.e. the access
861 * is changing its own translation in the guest page tables. KVM exits
862 * to userspace if emulation of the faulting instruction fails and this
863 * flag is set, as KVM cannot make forward progress.
865 * If emulation fails for a write to guest page tables, KVM unprotects
866 * (zaps) the shadow page for the target gfn and resumes the guest to
867 * retry the non-emulatable instruction (on hardware). Unprotecting the
868 * gfn doesn't allow forward progress for a self-changing access because
869 * doing so also zaps the translation for the gfn, i.e. retrying the
870 * instruction will hit a !PRESENT fault, which results in a new shadow
871 * page and sends KVM back to square one.
873 bool write_fault_to_shadow_pgtable;
875 /* set at EPT violation at this point */
876 unsigned long exit_qualification;
878 /* pv related host specific info */
883 int pending_ioapic_eoi;
884 int pending_external_vector;
886 /* be preempted when it's in kernel-mode(cpl=0) */
887 bool preempted_in_kernel;
889 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */
892 /* Host CPU on which VM-entry was most recently attempted */
893 int last_vmentry_cpu;
895 /* AMD MSRC001_0015 Hardware Configuration */
898 /* pv related cpuid info */
901 * value of the eax register in the KVM_CPUID_FEATURES CPUID
907 * indicates whether pv emulation should be disabled if features
908 * are not present in the guest's cpuid
913 /* Protected Guests */
914 bool guest_state_protected;
917 * Set when PDPTS were loaded directly by the userspace without
918 * reading the guest memory
920 bool pdptrs_from_userspace;
922 #if IS_ENABLED(CONFIG_HYPERV)
927 struct kvm_lpage_info {
931 struct kvm_arch_memory_slot {
932 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES];
933 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
934 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX];
938 * We use as the mode the number of bits allocated in the LDR for the
939 * logical processor ID. It happens that these are all powers of two.
940 * This makes it is very easy to detect cases where the APICs are
941 * configured for multiple modes; in that case, we cannot use the map and
942 * hence cannot use kvm_irq_delivery_to_apic_fast either.
944 #define KVM_APIC_MODE_XAPIC_CLUSTER 4
945 #define KVM_APIC_MODE_XAPIC_FLAT 8
946 #define KVM_APIC_MODE_X2APIC 16
948 struct kvm_apic_map {
953 struct kvm_lapic *xapic_flat_map[8];
954 struct kvm_lapic *xapic_cluster_map[16][4];
956 struct kvm_lapic *phys_map[];
959 /* Hyper-V synthetic debugger (SynDbg)*/
960 struct kvm_hv_syndbg {
971 /* Current state of Hyper-V TSC page clocksource */
972 enum hv_tsc_page_status {
973 /* TSC page was not set up or disabled */
974 HV_TSC_PAGE_UNSET = 0,
975 /* TSC page MSR was written by the guest, update pending */
976 HV_TSC_PAGE_GUEST_CHANGED,
977 /* TSC page MSR was written by KVM userspace, update pending */
978 HV_TSC_PAGE_HOST_CHANGED,
979 /* TSC page was properly set up and is currently active */
981 /* TSC page is currently being updated and therefore is inactive */
982 HV_TSC_PAGE_UPDATING,
983 /* TSC page was set up with an inaccessible GPA */
987 /* Hyper-V emulation context */
989 struct mutex hv_lock;
993 enum hv_tsc_page_status hv_tsc_page_status;
995 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */
996 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
999 struct ms_hyperv_tsc_page tsc_ref;
1001 struct idr conn_to_evt;
1003 u64 hv_reenlightenment_control;
1004 u64 hv_tsc_emulation_control;
1005 u64 hv_tsc_emulation_status;
1007 /* How many vCPUs have VP index != vCPU index */
1008 atomic_t num_mismatched_vp_indexes;
1011 * How many SynICs use 'AutoEOI' feature
1012 * (protected by arch.apicv_update_lock)
1014 unsigned int synic_auto_eoi_used;
1016 struct hv_partition_assist_pg *hv_pa_pg;
1017 struct kvm_hv_syndbg hv_syndbg;
1020 struct msr_bitmap_range {
1024 unsigned long *bitmap;
1027 /* Xen emulation context */
1031 struct gfn_to_pfn_cache shinfo_cache;
1034 enum kvm_irqchip_mode {
1036 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */
1037 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */
1040 struct kvm_x86_msr_filter {
1042 bool default_allow:1;
1043 struct msr_bitmap_range ranges[16];
1046 enum kvm_apicv_inhibit {
1047 APICV_INHIBIT_REASON_DISABLE,
1048 APICV_INHIBIT_REASON_HYPERV,
1049 APICV_INHIBIT_REASON_NESTED,
1050 APICV_INHIBIT_REASON_IRQWIN,
1051 APICV_INHIBIT_REASON_PIT_REINJ,
1052 APICV_INHIBIT_REASON_X2APIC,
1053 APICV_INHIBIT_REASON_BLOCKIRQ,
1054 APICV_INHIBIT_REASON_ABSENT,
1058 unsigned long n_used_mmu_pages;
1059 unsigned long n_requested_mmu_pages;
1060 unsigned long n_max_mmu_pages;
1061 unsigned int indirect_shadow_pages;
1063 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
1064 struct list_head active_mmu_pages;
1065 struct list_head zapped_obsolete_pages;
1066 struct list_head lpage_disallowed_mmu_pages;
1067 struct kvm_page_track_notifier_node mmu_sp_tracker;
1068 struct kvm_page_track_notifier_head track_notifier_head;
1070 * Protects marking pages unsync during page faults, as TDP MMU page
1071 * faults only take mmu_lock for read. For simplicity, the unsync
1072 * pages lock is always taken when marking pages unsync regardless of
1073 * whether mmu_lock is held for read or write.
1075 spinlock_t mmu_unsync_pages_lock;
1077 struct list_head assigned_dev_head;
1078 struct iommu_domain *iommu_domain;
1079 bool iommu_noncoherent;
1080 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
1081 atomic_t noncoherent_dma_count;
1082 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
1083 atomic_t assigned_device_count;
1084 struct kvm_pic *vpic;
1085 struct kvm_ioapic *vioapic;
1086 struct kvm_pit *vpit;
1087 atomic_t vapics_in_nmi_mode;
1088 struct mutex apic_map_lock;
1089 struct kvm_apic_map __rcu *apic_map;
1090 atomic_t apic_map_dirty;
1092 /* Protects apic_access_memslot_enabled and apicv_inhibit_reasons */
1093 struct rw_semaphore apicv_update_lock;
1095 bool apic_access_memslot_enabled;
1096 unsigned long apicv_inhibit_reasons;
1100 bool mwait_in_guest;
1102 bool pause_in_guest;
1103 bool cstate_in_guest;
1105 unsigned long irq_sources_bitmap;
1106 s64 kvmclock_offset;
1109 * This also protects nr_vcpus_matched_tsc which is read from a
1110 * preemption-disabled region, so it must be a raw spinlock.
1112 raw_spinlock_t tsc_write_lock;
1116 u64 last_tsc_offset;
1120 u64 cur_tsc_generation;
1121 int nr_vcpus_matched_tsc;
1123 seqcount_raw_spinlock_t pvclock_sc;
1124 bool use_master_clock;
1125 u64 master_kernel_ns;
1126 u64 master_cycle_now;
1127 struct delayed_work kvmclock_update_work;
1128 struct delayed_work kvmclock_sync_work;
1130 struct kvm_xen_hvm_config xen_hvm_config;
1132 /* reads protected by irq_srcu, writes by irq_lock */
1133 struct hlist_head mask_notifier_list;
1135 struct kvm_hv hyperv;
1138 bool backwards_tsc_observed;
1139 bool boot_vcpu_runs_old_kvmclock;
1142 u64 disabled_quirks;
1143 int cpu_dirty_logging_count;
1145 enum kvm_irqchip_mode irqchip_mode;
1146 u8 nr_reserved_ioapic_pins;
1148 bool disabled_lapic_found;
1151 bool x2apic_broadcast_quirk_disabled;
1153 bool guest_can_read_msr_platform_info;
1154 bool exception_payload_enabled;
1156 bool bus_lock_detection_enabled;
1159 * If exit_on_emulation_error is set, and the in-kernel instruction
1160 * emulator fails to emulate an instruction, allow userspace
1161 * the opportunity to look at it.
1163 bool exit_on_emulation_error;
1165 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */
1166 u32 user_space_msr_mask;
1167 struct kvm_x86_msr_filter __rcu *msr_filter;
1169 u32 hypercall_exit_enabled;
1171 /* Guest can access the SGX PROVISIONKEY. */
1172 bool sgx_provisioning_allowed;
1174 struct kvm_pmu_event_filter __rcu *pmu_event_filter;
1175 struct task_struct *nx_lpage_recovery_thread;
1177 #ifdef CONFIG_X86_64
1179 * Whether the TDP MMU is enabled for this VM. This contains a
1180 * snapshot of the TDP MMU module parameter from when the VM was
1181 * created and remains unchanged for the life of the VM. If this is
1182 * true, TDP MMU handler functions will run for various MMU
1185 bool tdp_mmu_enabled;
1188 * List of struct kvm_mmu_pages being used as roots.
1189 * All struct kvm_mmu_pages in the list should have
1192 * For reads, this list is protected by:
1193 * the MMU lock in read mode + RCU or
1194 * the MMU lock in write mode
1196 * For writes, this list is protected by:
1197 * the MMU lock in read mode + the tdp_mmu_pages_lock or
1198 * the MMU lock in write mode
1200 * Roots will remain in the list until their tdp_mmu_root_count
1201 * drops to zero, at which point the thread that decremented the
1202 * count to zero should removed the root from the list and clean
1203 * it up, freeing the root after an RCU grace period.
1205 struct list_head tdp_mmu_roots;
1208 * List of struct kvmp_mmu_pages not being used as roots.
1209 * All struct kvm_mmu_pages in the list should have
1210 * tdp_mmu_page set and a tdp_mmu_root_count of 0.
1212 struct list_head tdp_mmu_pages;
1215 * Protects accesses to the following fields when the MMU lock
1216 * is held in read mode:
1217 * - tdp_mmu_roots (above)
1218 * - tdp_mmu_pages (above)
1219 * - the link field of struct kvm_mmu_pages used by the TDP MMU
1220 * - lpage_disallowed_mmu_pages
1221 * - the lpage_disallowed_link field of struct kvm_mmu_pages used
1223 * It is acceptable, but not necessary, to acquire this lock when
1224 * the thread holds the MMU lock in write mode.
1226 spinlock_t tdp_mmu_pages_lock;
1227 struct workqueue_struct *tdp_mmu_zap_wq;
1228 #endif /* CONFIG_X86_64 */
1231 * If set, at least one shadow root has been allocated. This flag
1232 * is used as one input when determining whether certain memslot
1233 * related allocations are necessary.
1235 bool shadow_root_allocated;
1237 #if IS_ENABLED(CONFIG_HYPERV)
1239 spinlock_t hv_root_tdp_lock;
1243 struct kvm_vm_stat {
1244 struct kvm_vm_stat_generic generic;
1245 u64 mmu_shadow_zapped;
1254 atomic64_t pages_4k;
1255 atomic64_t pages_2m;
1256 atomic64_t pages_1g;
1258 atomic64_t pages[KVM_NR_PAGE_SIZES];
1260 u64 nx_lpage_splits;
1261 u64 max_mmu_page_hash_collisions;
1262 u64 max_mmu_rmap_size;
1265 struct kvm_vcpu_stat {
1266 struct kvm_vcpu_stat_generic generic;
1276 u64 irq_window_exits;
1277 u64 nmi_window_exits;
1280 u64 request_irq_exits;
1282 u64 host_state_reload;
1285 u64 insn_emulation_fail;
1291 u64 directed_yield_attempted;
1292 u64 directed_yield_successful;
1296 struct x86_instruction_info;
1299 bool host_initiated;
1304 struct kvm_lapic_irq {
1312 bool msi_redir_hint;
1315 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical)
1317 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL;
1320 struct kvm_x86_ops {
1323 int (*hardware_enable)(void);
1324 void (*hardware_disable)(void);
1325 void (*hardware_unsetup)(void);
1326 bool (*has_emulated_msr)(struct kvm *kvm, u32 index);
1327 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu);
1329 unsigned int vm_size;
1330 int (*vm_init)(struct kvm *kvm);
1331 void (*vm_destroy)(struct kvm *kvm);
1333 /* Create, but do not attach this VCPU */
1334 int (*vcpu_create)(struct kvm_vcpu *vcpu);
1335 void (*vcpu_free)(struct kvm_vcpu *vcpu);
1336 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
1338 void (*prepare_switch_to_guest)(struct kvm_vcpu *vcpu);
1339 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
1340 void (*vcpu_put)(struct kvm_vcpu *vcpu);
1342 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu);
1343 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1344 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
1345 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
1346 void (*get_segment)(struct kvm_vcpu *vcpu,
1347 struct kvm_segment *var, int seg);
1348 int (*get_cpl)(struct kvm_vcpu *vcpu);
1349 void (*set_segment)(struct kvm_vcpu *vcpu,
1350 struct kvm_segment *var, int seg);
1351 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
1352 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1353 void (*post_set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
1354 bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr0);
1355 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
1356 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
1357 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1358 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1359 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1360 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
1361 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
1362 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
1363 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
1364 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
1365 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
1366 bool (*get_if_flag)(struct kvm_vcpu *vcpu);
1368 void (*flush_tlb_all)(struct kvm_vcpu *vcpu);
1369 void (*flush_tlb_current)(struct kvm_vcpu *vcpu);
1370 int (*tlb_remote_flush)(struct kvm *kvm);
1371 int (*tlb_remote_flush_with_range)(struct kvm *kvm,
1372 struct kvm_tlb_range *range);
1375 * Flush any TLB entries associated with the given GVA.
1376 * Does not need to flush GPA->HPA mappings.
1377 * Can potentially get non-canonical addresses through INVLPGs, which
1378 * the implementation may choose to ignore if appropriate.
1380 void (*flush_tlb_gva)(struct kvm_vcpu *vcpu, gva_t addr);
1383 * Flush any TLB entries created by the guest. Like tlb_flush_gva(),
1384 * does not need to flush GPA->HPA mappings.
1386 void (*flush_tlb_guest)(struct kvm_vcpu *vcpu);
1388 int (*vcpu_pre_run)(struct kvm_vcpu *vcpu);
1389 enum exit_fastpath_completion (*vcpu_run)(struct kvm_vcpu *vcpu);
1390 int (*handle_exit)(struct kvm_vcpu *vcpu,
1391 enum exit_fastpath_completion exit_fastpath);
1392 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
1393 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu);
1394 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
1395 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
1396 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
1397 unsigned char *hypercall_addr);
1398 void (*inject_irq)(struct kvm_vcpu *vcpu);
1399 void (*inject_nmi)(struct kvm_vcpu *vcpu);
1400 void (*queue_exception)(struct kvm_vcpu *vcpu);
1401 void (*cancel_injection)(struct kvm_vcpu *vcpu);
1402 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1403 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1404 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
1405 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
1406 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
1407 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
1408 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
1409 bool (*check_apicv_inhibit_reasons)(enum kvm_apicv_inhibit reason);
1410 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
1411 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
1412 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);
1413 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu);
1414 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
1415 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
1416 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu);
1417 void (*deliver_interrupt)(struct kvm_lapic *apic, int delivery_mode,
1418 int trig_mode, int vector);
1419 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
1420 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
1421 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr);
1422 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
1424 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, hpa_t root_hpa,
1427 bool (*has_wbinvd_exit)(void);
1429 u64 (*get_l2_tsc_offset)(struct kvm_vcpu *vcpu);
1430 u64 (*get_l2_tsc_multiplier)(struct kvm_vcpu *vcpu);
1431 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
1432 void (*write_tsc_multiplier)(struct kvm_vcpu *vcpu, u64 multiplier);
1435 * Retrieve somewhat arbitrary exit information. Intended to
1436 * be used only from within tracepoints or error paths.
1438 void (*get_exit_info)(struct kvm_vcpu *vcpu, u32 *reason,
1439 u64 *info1, u64 *info2,
1440 u32 *exit_int_info, u32 *exit_int_info_err_code);
1442 int (*check_intercept)(struct kvm_vcpu *vcpu,
1443 struct x86_instruction_info *info,
1444 enum x86_intercept_stage stage,
1445 struct x86_exception *exception);
1446 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu);
1448 void (*request_immediate_exit)(struct kvm_vcpu *vcpu);
1450 void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
1453 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer. A zero
1454 * value indicates CPU dirty logging is unsupported or disabled.
1456 int cpu_dirty_log_size;
1457 void (*update_cpu_dirty_logging)(struct kvm_vcpu *vcpu);
1459 /* pmu operations of sub-arch */
1460 const struct kvm_pmu_ops *pmu_ops;
1461 const struct kvm_x86_nested_ops *nested_ops;
1463 void (*vcpu_blocking)(struct kvm_vcpu *vcpu);
1464 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu);
1466 int (*pi_update_irte)(struct kvm *kvm, unsigned int host_irq,
1467 uint32_t guest_irq, bool set);
1468 void (*pi_start_assignment)(struct kvm *kvm);
1469 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
1470 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu);
1472 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc,
1474 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu);
1476 void (*setup_mce)(struct kvm_vcpu *vcpu);
1478 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection);
1479 int (*enter_smm)(struct kvm_vcpu *vcpu, char *smstate);
1480 int (*leave_smm)(struct kvm_vcpu *vcpu, const char *smstate);
1481 void (*enable_smi_window)(struct kvm_vcpu *vcpu);
1483 int (*mem_enc_ioctl)(struct kvm *kvm, void __user *argp);
1484 int (*mem_enc_register_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1485 int (*mem_enc_unregister_region)(struct kvm *kvm, struct kvm_enc_region *argp);
1486 int (*vm_copy_enc_context_from)(struct kvm *kvm, unsigned int source_fd);
1487 int (*vm_move_enc_context_from)(struct kvm *kvm, unsigned int source_fd);
1489 int (*get_msr_feature)(struct kvm_msr_entry *entry);
1491 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, int emul_type,
1492 void *insn, int insn_len);
1494 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu);
1495 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu);
1497 void (*migrate_timers)(struct kvm_vcpu *vcpu);
1498 void (*msr_filter_changed)(struct kvm_vcpu *vcpu);
1499 int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err);
1501 void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector);
1504 struct kvm_x86_nested_ops {
1505 void (*leave_nested)(struct kvm_vcpu *vcpu);
1506 int (*check_events)(struct kvm_vcpu *vcpu);
1507 bool (*hv_timer_pending)(struct kvm_vcpu *vcpu);
1508 void (*triple_fault)(struct kvm_vcpu *vcpu);
1509 int (*get_state)(struct kvm_vcpu *vcpu,
1510 struct kvm_nested_state __user *user_kvm_nested_state,
1511 unsigned user_data_size);
1512 int (*set_state)(struct kvm_vcpu *vcpu,
1513 struct kvm_nested_state __user *user_kvm_nested_state,
1514 struct kvm_nested_state *kvm_state);
1515 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu);
1516 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa);
1518 int (*enable_evmcs)(struct kvm_vcpu *vcpu,
1519 uint16_t *vmcs_version);
1520 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu);
1523 struct kvm_x86_init_ops {
1524 int (*cpu_has_kvm_support)(void);
1525 int (*disabled_by_bios)(void);
1526 int (*check_processor_compatibility)(void);
1527 int (*hardware_setup)(void);
1528 unsigned int (*handle_intel_pt_intr)(void);
1530 struct kvm_x86_ops *runtime_ops;
1533 struct kvm_arch_async_pf {
1540 extern u32 __read_mostly kvm_nr_uret_msrs;
1541 extern u64 __read_mostly host_efer;
1542 extern bool __read_mostly allow_smaller_maxphyaddr;
1543 extern bool __read_mostly enable_apicv;
1544 extern struct kvm_x86_ops kvm_x86_ops;
1546 #define KVM_X86_OP(func) \
1547 DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func));
1548 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
1549 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
1550 #include <asm/kvm-x86-ops.h>
1552 static inline void kvm_ops_static_call_update(void)
1554 #define __KVM_X86_OP(func) \
1555 static_call_update(kvm_x86_##func, kvm_x86_ops.func);
1556 #define KVM_X86_OP(func) \
1557 WARN_ON(!kvm_x86_ops.func); __KVM_X86_OP(func)
1558 #define KVM_X86_OP_OPTIONAL __KVM_X86_OP
1559 #define KVM_X86_OP_OPTIONAL_RET0(func) \
1560 static_call_update(kvm_x86_##func, (void *)kvm_x86_ops.func ? : \
1561 (void *)__static_call_return0);
1562 #include <asm/kvm-x86-ops.h>
1566 #define __KVM_HAVE_ARCH_VM_ALLOC
1567 static inline struct kvm *kvm_arch_alloc_vm(void)
1569 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO);
1572 #define __KVM_HAVE_ARCH_VM_FREE
1573 void kvm_arch_free_vm(struct kvm *kvm);
1575 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB
1576 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm)
1578 if (kvm_x86_ops.tlb_remote_flush &&
1579 !static_call(kvm_x86_tlb_remote_flush)(kvm))
1585 #define kvm_arch_pmi_in_guest(vcpu) \
1586 ((vcpu) && (vcpu)->arch.handling_intr_from_guest)
1588 int kvm_mmu_module_init(void);
1589 void kvm_mmu_module_exit(void);
1591 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
1592 int kvm_mmu_create(struct kvm_vcpu *vcpu);
1593 int kvm_mmu_init_vm(struct kvm *kvm);
1594 void kvm_mmu_uninit_vm(struct kvm *kvm);
1596 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu);
1597 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
1598 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
1599 const struct kvm_memory_slot *memslot,
1601 void kvm_mmu_slot_try_split_huge_pages(struct kvm *kvm,
1602 const struct kvm_memory_slot *memslot,
1604 void kvm_mmu_try_split_huge_pages(struct kvm *kvm,
1605 const struct kvm_memory_slot *memslot,
1608 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
1609 const struct kvm_memory_slot *memslot);
1610 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
1611 const struct kvm_memory_slot *memslot);
1612 void kvm_mmu_zap_all(struct kvm *kvm);
1613 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen);
1614 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages);
1616 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
1618 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1619 const void *val, int bytes);
1621 struct kvm_irq_mask_notifier {
1622 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
1624 struct hlist_node link;
1627 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
1628 struct kvm_irq_mask_notifier *kimn);
1629 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
1630 struct kvm_irq_mask_notifier *kimn);
1631 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
1634 extern bool tdp_enabled;
1636 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
1638 /* control of guest tsc rate supported? */
1639 extern bool kvm_has_tsc_control;
1640 /* maximum supported tsc_khz for guests */
1641 extern u32 kvm_max_guest_tsc_khz;
1642 /* number of bits of the fractional part of the TSC scaling ratio */
1643 extern u8 kvm_tsc_scaling_ratio_frac_bits;
1644 /* maximum allowed value of TSC scaling ratio */
1645 extern u64 kvm_max_tsc_scaling_ratio;
1646 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */
1647 extern u64 kvm_default_tsc_scaling_ratio;
1648 /* bus lock detection supported? */
1649 extern bool kvm_has_bus_lock_exit;
1651 extern u64 kvm_mce_cap_supported;
1654 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing
1655 * userspace I/O) to indicate that the emulation context
1656 * should be reused as is, i.e. skip initialization of
1657 * emulation context, instruction fetch and decode.
1659 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware.
1660 * Indicates that only select instructions (tagged with
1661 * EmulateOnUD) should be emulated (to minimize the emulator
1662 * attack surface). See also EMULTYPE_TRAP_UD_FORCED.
1664 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to
1665 * decode the instruction length. For use *only* by
1666 * kvm_x86_ops.skip_emulated_instruction() implementations if
1667 * EMULTYPE_COMPLETE_USER_EXIT is not set.
1669 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to
1670 * retry native execution under certain conditions,
1671 * Can only be set in conjunction with EMULTYPE_PF.
1673 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was
1674 * triggered by KVM's magic "force emulation" prefix,
1675 * which is opt in via module param (off by default).
1676 * Bypasses EmulateOnUD restriction despite emulating
1677 * due to an intercepted #UD (see EMULTYPE_TRAP_UD).
1678 * Used to test the full emulator from userspace.
1680 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware
1681 * backdoor emulation, which is opt in via module param.
1682 * VMware backdoor emulation handles select instructions
1683 * and reinjects the #GP for all other cases.
1685 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which
1686 * case the CR2/GPA value pass on the stack is valid.
1688 * EMULTYPE_COMPLETE_USER_EXIT - Set when the emulator should update interruptibility
1689 * state and inject single-step #DBs after skipping
1690 * an instruction (after completing userspace I/O).
1692 #define EMULTYPE_NO_DECODE (1 << 0)
1693 #define EMULTYPE_TRAP_UD (1 << 1)
1694 #define EMULTYPE_SKIP (1 << 2)
1695 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3)
1696 #define EMULTYPE_TRAP_UD_FORCED (1 << 4)
1697 #define EMULTYPE_VMWARE_GP (1 << 5)
1698 #define EMULTYPE_PF (1 << 6)
1699 #define EMULTYPE_COMPLETE_USER_EXIT (1 << 7)
1701 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type);
1702 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
1703 void *insn, int insn_len);
1704 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu,
1705 u64 *data, u8 ndata);
1706 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu);
1708 void kvm_enable_efer_bits(u64);
1709 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
1710 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated);
1711 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data);
1712 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data);
1713 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu);
1714 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu);
1715 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu);
1716 int kvm_emulate_invd(struct kvm_vcpu *vcpu);
1717 int kvm_emulate_mwait(struct kvm_vcpu *vcpu);
1718 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu);
1719 int kvm_emulate_monitor(struct kvm_vcpu *vcpu);
1721 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in);
1722 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
1723 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
1724 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu);
1725 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu);
1726 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
1728 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1729 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
1730 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
1732 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
1733 int reason, bool has_error_code, u32 error_code);
1735 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0);
1736 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4);
1737 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
1738 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
1739 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
1740 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
1741 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
1742 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
1743 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
1744 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
1745 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu);
1747 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1748 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1750 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
1751 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
1752 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu);
1754 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1755 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1756 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload);
1757 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1758 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1759 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
1760 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
1761 struct x86_exception *fault);
1762 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
1763 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
1765 static inline int __kvm_irq_line_state(unsigned long *irq_state,
1766 int irq_source_id, int level)
1768 /* Logical OR for level trig interrupt */
1770 __set_bit(irq_source_id, irq_state);
1772 __clear_bit(irq_source_id, irq_state);
1774 return !!(*irq_state);
1777 #define KVM_MMU_ROOT_CURRENT BIT(0)
1778 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i)
1779 #define KVM_MMU_ROOTS_ALL (~0UL)
1781 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
1782 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
1784 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
1786 void kvm_update_dr7(struct kvm_vcpu *vcpu);
1788 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
1789 void kvm_mmu_free_roots(struct kvm *kvm, struct kvm_mmu *mmu,
1790 ulong roots_to_free);
1791 void kvm_mmu_free_guest_mode_roots(struct kvm *kvm, struct kvm_mmu *mmu);
1792 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
1793 struct x86_exception *exception);
1794 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
1795 struct x86_exception *exception);
1796 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
1797 struct x86_exception *exception);
1798 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
1799 struct x86_exception *exception);
1801 bool kvm_apicv_activated(struct kvm *kvm);
1802 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu);
1803 void __kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
1804 enum kvm_apicv_inhibit reason, bool set);
1805 void kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
1806 enum kvm_apicv_inhibit reason, bool set);
1808 static inline void kvm_set_apicv_inhibit(struct kvm *kvm,
1809 enum kvm_apicv_inhibit reason)
1811 kvm_set_or_clear_apicv_inhibit(kvm, reason, true);
1814 static inline void kvm_clear_apicv_inhibit(struct kvm *kvm,
1815 enum kvm_apicv_inhibit reason)
1817 kvm_set_or_clear_apicv_inhibit(kvm, reason, false);
1820 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
1822 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code,
1823 void *insn, int insn_len);
1824 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
1825 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1826 gva_t gva, hpa_t root_hpa);
1827 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid);
1828 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd);
1830 void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level,
1831 int tdp_max_root_level, int tdp_huge_page_level);
1833 static inline u16 kvm_read_ldt(void)
1836 asm("sldt %0" : "=g"(ldt));
1840 static inline void kvm_load_ldt(u16 sel)
1842 asm("lldt %0" : : "rm"(sel));
1845 #ifdef CONFIG_X86_64
1846 static inline unsigned long read_msr(unsigned long msr)
1855 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
1857 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
1860 #define TSS_IOPB_BASE_OFFSET 0x66
1861 #define TSS_BASE_SIZE 0x68
1862 #define TSS_IOPB_SIZE (65536 / 8)
1863 #define TSS_REDIRECTION_SIZE (256 / 8)
1864 #define RMODE_TSS_SIZE \
1865 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
1868 TASK_SWITCH_CALL = 0,
1869 TASK_SWITCH_IRET = 1,
1870 TASK_SWITCH_JMP = 2,
1871 TASK_SWITCH_GATE = 3,
1874 #define HF_GIF_MASK (1 << 0)
1875 #define HF_NMI_MASK (1 << 3)
1876 #define HF_IRET_MASK (1 << 4)
1877 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
1878 #define HF_SMM_MASK (1 << 6)
1879 #define HF_SMM_INSIDE_NMI_MASK (1 << 7)
1881 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
1882 #define KVM_ADDRESS_SPACE_NUM 2
1884 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
1885 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
1887 #define KVM_ARCH_WANT_MMU_NOTIFIER
1889 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1890 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1891 int kvm_cpu_has_extint(struct kvm_vcpu *v);
1892 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1893 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1894 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
1896 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
1897 unsigned long ipi_bitmap_high, u32 min,
1898 unsigned long icr, int op_64_bit);
1900 int kvm_add_user_return_msr(u32 msr);
1901 int kvm_find_user_return_msr(u32 msr);
1902 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask);
1904 static inline bool kvm_is_supported_user_return_msr(u32 msr)
1906 return kvm_find_user_return_msr(msr) >= 0;
1909 u64 kvm_scale_tsc(u64 tsc, u64 ratio);
1910 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc);
1911 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier);
1912 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier);
1914 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
1915 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1917 void kvm_make_scan_ioapic_request(struct kvm *kvm);
1918 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
1919 unsigned long *vcpu_bitmap);
1921 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1922 struct kvm_async_pf *work);
1923 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1924 struct kvm_async_pf *work);
1925 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1926 struct kvm_async_pf *work);
1927 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu);
1928 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu);
1929 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1931 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
1932 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1933 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu);
1935 void __user *__x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
1937 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
1938 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
1940 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
1941 struct kvm_vcpu **dest_vcpu);
1943 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
1944 struct kvm_lapic_irq *irq);
1946 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq)
1948 /* We can only post Fixed and LowPrio IRQs */
1949 return (irq->delivery_mode == APIC_DM_FIXED ||
1950 irq->delivery_mode == APIC_DM_LOWEST);
1953 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
1955 static_call_cond(kvm_x86_vcpu_blocking)(vcpu);
1958 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
1960 static_call_cond(kvm_x86_vcpu_unblocking)(vcpu);
1963 static inline int kvm_cpu_get_apicid(int mps_cpu)
1965 #ifdef CONFIG_X86_LOCAL_APIC
1966 return default_cpu_present_to_apicid(mps_cpu);
1973 #define put_smstate(type, buf, offset, val) \
1974 *(type *)((buf) + (offset) - 0x7e00) = val
1976 #define GET_SMSTATE(type, buf, offset) \
1977 (*(type *)((buf) + (offset) - 0x7e00))
1979 int kvm_cpu_dirty_log_size(void);
1981 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages);
1983 #define KVM_CLOCK_VALID_FLAGS \
1984 (KVM_CLOCK_TSC_STABLE | KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC)
1986 #define KVM_X86_VALID_QUIRKS \
1987 (KVM_X86_QUIRK_LINT0_REENABLED | \
1988 KVM_X86_QUIRK_CD_NW_CLEARED | \
1989 KVM_X86_QUIRK_LAPIC_MMIO_HOLE | \
1990 KVM_X86_QUIRK_OUT_7E_INC_RIP | \
1991 KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT)
1993 #endif /* _ASM_X86_KVM_HOST_H */