1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Derived from include/asm-powerpc/iommu.h
5 * Copyright IBM Corporation, 2006-2007
7 * Author: Jon Mason <jdmason@us.ibm.com>
8 * Author: Muli Ben-Yehuda <muli@il.ibm.com>
11 #ifndef _ASM_X86_CALGARY_H
12 #define _ASM_X86_CALGARY_H
14 #include <linux/spinlock.h>
15 #include <linux/device.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/timer.h>
18 #include <asm/types.h>
21 const struct cal_chipset_ops *chip_ops; /* chipset specific funcs */
22 unsigned long it_base; /* mapped address of tce table */
23 unsigned long it_hint; /* Hint for next alloc */
24 unsigned long *it_map; /* A simple allocation bitmap for now */
25 void __iomem *bbar; /* Bridge BAR */
26 u64 tar_val; /* Table Address Register */
27 struct timer_list watchdog_timer;
28 spinlock_t it_lock; /* Protects it_map */
29 unsigned int it_size; /* Size of iommu table in entries */
30 unsigned char it_busno; /* Bus number this table belongs to */
33 struct cal_chipset_ops {
34 void (*handle_quirks)(struct iommu_table *tbl, struct pci_dev *dev);
35 void (*tce_cache_blast)(struct iommu_table *tbl);
36 void (*dump_error_regs)(struct iommu_table *tbl);
39 #define TCE_TABLE_SIZE_UNSPECIFIED ~0
40 #define TCE_TABLE_SIZE_64K 0
41 #define TCE_TABLE_SIZE_128K 1
42 #define TCE_TABLE_SIZE_256K 2
43 #define TCE_TABLE_SIZE_512K 3
44 #define TCE_TABLE_SIZE_1M 4
45 #define TCE_TABLE_SIZE_2M 5
46 #define TCE_TABLE_SIZE_4M 6
47 #define TCE_TABLE_SIZE_8M 7
49 extern int use_calgary;
51 #ifdef CONFIG_CALGARY_IOMMU
52 extern int detect_calgary(void);
54 static inline int detect_calgary(void) { return -ENODEV; }
57 #endif /* _ASM_X86_CALGARY_H */