arch/sparc/include/asm/asm.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _SPARC_ASM_H
   3 #define _SPARC_ASM_H
   4
   5 /* Macros to assist the sharing of assembler code between 32-bit and
   6  * 64-bit sparc.
   7  */
   8
   9 #ifdef CONFIG_SPARC64
  10 #define BRANCH32(TYPE, PREDICT, DEST) \
  11         TYPE,PREDICT    %icc, DEST
  12 #define BRANCH32_ANNUL(TYPE, PREDICT, DEST) \
  13         TYPE,a,PREDICT  %icc, DEST
  14 #define BRANCH_REG_ZERO(PREDICT, REG, DEST) \
  15         brz,PREDICT     REG, DEST
  16 #define BRANCH_REG_ZERO_ANNUL(PREDICT, REG, DEST) \
  17         brz,a,PREDICT   REG, DEST
  18 #define BRANCH_REG_NOT_ZERO(PREDICT, REG, DEST) \
  19         brnz,PREDICT    REG, DEST
  20 #define BRANCH_REG_NOT_ZERO_ANNUL(PREDICT, REG, DEST) \
  21         brnz,a,PREDICT  REG, DEST
  22 #else
  23 #define BRANCH32(TYPE, PREDICT, DEST) \
  24         TYPE            DEST
  25 #define BRANCH32_ANNUL(TYPE, PREDICT, DEST) \
  26         TYPE,a          DEST
  27 #define BRANCH_REG_ZERO(PREDICT, REG, DEST) \
  28         cmp             REG, 0; \
  29         be              DEST
  30 #define BRANCH_REG_ZERO_ANNUL(PREDICT, REG, DEST) \
  31         cmp             REG, 0; \
  32         be,a            DEST
  33 #define BRANCH_REG_NOT_ZERO(PREDICT, REG, DEST) \
  34         cmp             REG, 0; \
  35         bne             DEST
  36 #define BRANCH_REG_NOT_ZERO_ANNUL(PREDICT, REG, DEST) \
  37         cmp             REG, 0; \
  38         bne,a           DEST
  39 #endif
  40
  41 #endif /* _SPARC_ASM_H */