arch/mips/boot/dts/img/boston.dts

   1 /dts-v1/;
   2
   3 #include <dt-bindings/clock/boston-clock.h>
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/interrupt-controller/irq.h>
   6 #include <dt-bindings/interrupt-controller/mips-gic.h>
   7
   8 / {
   9         #address-cells = <1>;
  10         #size-cells = <1>;
  11         compatible = "img,boston";
  12
  13         chosen {
  14                 stdout-path = "uart0:115200";
  15         };
  16
  17         aliases {
  18                 uart0 = &uart0;
  19         };
  20
  21         cpus {
  22                 #address-cells = <1>;
  23                 #size-cells = <0>;
  24
  25                 cpu@0 {
  26                         device_type = "cpu";
  27                         compatible = "img,mips";
  28                         reg = <0>;
  29                         clocks = <&clk_boston BOSTON_CLK_CPU>;
  30                 };
  31         };
  32
  33         memory@0 {
  34                 device_type = "memory";
  35                 reg = <0x00000000 0x10000000>;
  36         };
  37
  38         pci0: pci@10000000 {
  39                 compatible = "xlnx,axi-pcie-host-1.00.a";
  40                 device_type = "pci";
  41                 reg = <0x10000000 0x2000000>;
  42
  43                 #address-cells = <3>;
  44                 #size-cells = <2>;
  45                 #interrupt-cells = <1>;
  46
  47                 interrupt-parent = <&gic>;
  48                 interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>;
  49
  50                 ranges = <0x02000000 0 0x40000000
  51                           0x40000000 0 0x40000000>;
  52
  53                 interrupt-map-mask = <0 0 0 7>;
  54                 interrupt-map = <0 0 0 1 &pci0_intc 1>,
  55                                 <0 0 0 2 &pci0_intc 2>,
  56                                 <0 0 0 3 &pci0_intc 3>,
  57                                 <0 0 0 4 &pci0_intc 4>;
  58
  59                 pci0_intc: interrupt-controller {
  60                         interrupt-controller;
  61                         #address-cells = <0>;
  62                         #interrupt-cells = <1>;
  63                 };
  64         };
  65
  66         pci1: pci@12000000 {
  67                 compatible = "xlnx,axi-pcie-host-1.00.a";
  68                 device_type = "pci";
  69                 reg = <0x12000000 0x2000000>;
  70
  71                 #address-cells = <3>;
  72                 #size-cells = <2>;
  73                 #interrupt-cells = <1>;
  74
  75                 interrupt-parent = <&gic>;
  76                 interrupts = <GIC_SHARED 1 IRQ_TYPE_LEVEL_HIGH>;
  77
  78                 ranges = <0x02000000 0 0x20000000
  79                           0x20000000 0 0x20000000>;
  80
  81                 interrupt-map-mask = <0 0 0 7>;
  82                 interrupt-map = <0 0 0 1 &pci1_intc 1>,
  83                                 <0 0 0 2 &pci1_intc 2>,
  84                                 <0 0 0 3 &pci1_intc 3>,
  85                                 <0 0 0 4 &pci1_intc 4>;
  86
  87                 pci1_intc: interrupt-controller {
  88                         interrupt-controller;
  89                         #address-cells = <0>;
  90                         #interrupt-cells = <1>;
  91                 };
  92         };
  93
  94         pci2: pci@14000000 {
  95                 compatible = "xlnx,axi-pcie-host-1.00.a";
  96                 device_type = "pci";
  97                 reg = <0x14000000 0x2000000>;
  98
  99                 #address-cells = <3>;
 100                 #size-cells = <2>;
 101                 #interrupt-cells = <1>;
 102
 103                 interrupt-parent = <&gic>;
 104                 interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>;
 105
 106                 ranges = <0x02000000 0 0x16000000
 107                           0x16000000 0 0x100000>;
 108
 109                 interrupt-map-mask = <0 0 0 7>;
 110                 interrupt-map = <0 0 0 1 &pci2_intc 1>,
 111                                 <0 0 0 2 &pci2_intc 2>,
 112                                 <0 0 0 3 &pci2_intc 3>,
 113                                 <0 0 0 4 &pci2_intc 4>;
 114
 115                 pci2_intc: interrupt-controller {
 116                         interrupt-controller;
 117                         #address-cells = <0>;
 118                         #interrupt-cells = <1>;
 119                 };
 120
 121                 pci2_root@0,0,0 {
 122                         compatible = "pci10ee,7021";
 123                         reg = <0x00000000 0 0 0 0>;
 124
 125                         #address-cells = <3>;
 126                         #size-cells = <2>;
 127                         #interrupt-cells = <1>;
 128
 129                         eg20t_bridge@1,0,0 {
 130                                 compatible = "pci8086,8800";
 131                                 reg = <0x00010000 0 0 0 0>;
 132
 133                                 #address-cells = <3>;
 134                                 #size-cells = <2>;
 135                                 #interrupt-cells = <1>;
 136
 137                                 eg20t_mac@2,0,1 {
 138                                         compatible = "pci8086,8802";
 139                                         reg = <0x00020100 0 0 0 0>;
 140                                         phy-reset-gpios = <&eg20t_gpio 6
 141                                                            GPIO_ACTIVE_LOW>;
 142                                 };
 143
 144                                 eg20t_gpio: eg20t_gpio@2,0,2 {
 145                                         compatible = "pci8086,8803";
 146                                         reg = <0x00020200 0 0 0 0>;
 147
 148                                         gpio-controller;
 149                                         #gpio-cells = <2>;
 150                                 };
 151
 152                                 eg20t_i2c@2,12,2 {
 153                                         compatible = "pci8086,8817";
 154                                         reg = <0x00026200 0 0 0 0>;
 155
 156                                         #address-cells = <1>;
 157                                         #size-cells = <0>;
 158
 159                                         rtc@0x68 {
 160                                                 compatible = "st,m41t81s";
 161                                                 reg = <0x68>;
 162                                         };
 163                                 };
 164                         };
 165                 };
 166         };
 167
 168         gic: interrupt-controller@16120000 {
 169                 compatible = "mti,gic";
 170                 reg = <0x16120000 0x20000>;
 171
 172                 interrupt-controller;
 173                 #interrupt-cells = <3>;
 174
 175                 timer {
 176                         compatible = "mti,gic-timer";
 177                         interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
 178                         clocks = <&clk_boston BOSTON_CLK_CPU>;
 179                 };
 180         };
 181
 182         cdmm@16140000 {
 183                 compatible = "mti,mips-cdmm";
 184                 reg = <0x16140000 0x8000>;
 185         };
 186
 187         cpc@16200000 {
 188                 compatible = "mti,mips-cpc";
 189                 reg = <0x16200000 0x8000>;
 190         };
 191
 192         plat_regs: system-controller@17ffd000 {
 193                 compatible = "img,boston-platform-regs", "syscon";
 194                 reg = <0x17ffd000 0x1000>;
 195
 196                 clk_boston: clock {
 197                         compatible = "img,boston-clock";
 198                         #clock-cells = <1>;
 199                 };
 200         };
 201
 202         reboot: syscon-reboot {
 203                 compatible = "syscon-reboot";
 204                 regmap = <&plat_regs>;
 205                 offset = <0x10>;
 206                 mask = <0x10>;
 207         };
 208
 209         uart0: uart@17ffe000 {
 210                 compatible = "ns16550a";
 211                 reg = <0x17ffe000 0x1000>;
 212                 reg-shift = <2>;
 213
 214                 interrupt-parent = <&gic>;
 215                 interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
 216
 217                 clocks = <&clk_boston BOSTON_CLK_SYS>;
 218         };
 219
 220         lcd: lcd@17fff000 {
 221                 compatible = "img,boston-lcd";
 222                 reg = <0x17fff000 0x8>;
 223         };
 224 };