c45d7b40e37479b59543a21d157c9fdfdd26e725
[sfrench/cifs-2.6.git] / arch / arm64 / boot / dts / freescale / fsl-ls1028a-kontron-sl28-var3-ads2.dts
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Device Tree file for the Kontron SMARC-sAL28 board on a SMARC Eval 2.0
4  * carrier (ADS2).
5  *
6  * Copyright (C) 2019 Michael Walle <michael@walle.cc>
7  *
8  */
9
10 /dts-v1/;
11 #include "fsl-ls1028a-kontron-sl28.dts"
12
13 / {
14         model = "Kontron SMARC-sAL28 (Single PHY) on SMARC Eval 2.0 carrier";
15         compatible = "kontron,sl28-var3-ads2", "kontron,sl28-var3",
16                      "kontron,sl28", "fsl,ls1028a";
17
18         pwm-fan {
19                 compatible = "pwm-fan";
20                 cooling-min-state = <0>;
21                 cooling-max-state = <3>;
22                 #cooling-cells = <2>;
23                 pwms = <&sl28cpld_pwm0 0 4000000>;
24                 cooling-levels = <1 128 192 255>;
25         };
26
27         sound {
28                 #address-cells = <1>;
29                 #size-cells = <0>;
30                 compatible = "simple-audio-card";
31                 simple-audio-card,widgets =
32                         "Headphone", "Headphone Jack",
33                         "Line", "Line Out Jack",
34                         "Microphone", "Microphone Jack",
35                         "Line", "Line In Jack";
36                 simple-audio-card,routing =
37                         "Line Out Jack", "LINEOUTR",
38                         "Line Out Jack", "LINEOUTL",
39                         "Headphone Jack", "HPOUTR",
40                         "Headphone Jack", "HPOUTL",
41                         "IN1L", "Line In Jack",
42                         "IN1R", "Line In Jack",
43                         "Microphone Jack", "MICBIAS",
44                         "IN2L", "Microphone Jack",
45                         "IN2R", "Microphone Jack";
46                 simple-audio-card,mclk-fs = <256>;
47
48                 simple-audio-card,dai-link@0 {
49                         reg = <0>;
50                         bitclock-master = <&dailink0_master>;
51                         frame-master = <&dailink0_master>;
52                         format = "i2s";
53
54                         cpu {
55                                 sound-dai = <&sai6>;
56                         };
57
58                         dailink0_master: codec {
59                                 sound-dai = <&wm8904>;
60                         };
61                 };
62
63                 simple-audio-card,dai-link@1 {
64                         reg = <1>;
65                         bitclock-master = <&dailink1_master>;
66                         frame-master = <&dailink1_master>;
67                         format = "i2s";
68
69                         cpu {
70                                 sound-dai = <&sai5>;
71                         };
72
73                         dailink1_master: codec {
74                                 sound-dai = <&wm8904>;
75                         };
76                 };
77         };
78 };
79
80 &dspi2 {
81         flash@0 {
82                 compatible = "jedec,spi-nor";
83                 m25p,fast-read;
84                 spi-max-frequency = <100000000>;
85                 reg = <0>;
86         };
87 };
88
89 &i2c3 {
90         eeprom@57 {
91                 compatible = "atmel,24c64";
92                 reg = <0x57>;
93                 pagesize = <32>;
94         };
95 };
96
97 &i2c4 {
98         status = "okay";
99
100         wm8904: audio-codec@1a {
101                 #sound-dai-cells = <0>;
102                 compatible = "wlf,wm8904";
103                 reg = <0x1a>;
104                 clocks = <&mclk>;
105                 clock-names = "mclk";
106                 assigned-clocks = <&mclk>;
107                 assigned-clock-rates = <1250000>;
108         };
109 };
110
111 &sai5 {
112         status = "okay";
113 };
114
115 &sai6 {
116         status = "okay";
117 };
118
119 &soc {
120         mclk: clock-mclk@f130080 {
121                 compatible = "fsl,vf610-sai-clock";
122                 reg = <0x0 0xf130080 0x0 0x80>;
123                 clocks = <&clockgen 4 1>;
124                 #clock-cells = <0>;
125         };
126 };