1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/mach-iop33x/include/mach/iop33x.h
5 * Intel IOP33X Chip definitions
7 * Author: Dave Jiang (dave.jiang@intel.com)
8 * Copyright (C) 2003, 2004 Intel Corp.
15 * Peripherals that are shared between the iop32x and iop33x but
16 * located at different addresses.
18 #define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07d0 + (reg))
20 #include <asm/hardware/iop3xx.h>
23 #define IOP33X_UART0_PHYS (IOP3XX_PERIPHERAL_PHYS_BASE + 0x1700)
24 #define IOP33X_UART0_VIRT (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1700)
25 #define IOP33X_UART1_PHYS (IOP3XX_PERIPHERAL_PHYS_BASE + 0x1740)
26 #define IOP33X_UART1_VIRT (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1740)
29 * set up a 1:1 bus to physical ram relationship
30 * w/ pci on top of physical ram in memory map
32 #define IOP33X_MAX_RAM_SIZE 0x80000000UL
33 #define IOP3XX_MAX_RAM_SIZE IOP33X_MAX_RAM_SIZE
34 #define IOP3XX_PCI_LOWER_MEM_BA (PHYS_OFFSET + IOP33X_MAX_RAM_SIZE)