treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / am335x-cm-t335.dts
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * am335x-cm-t335.dts - Device Tree file for Compulab CM-T335
4  *
5  * Copyright (C) 2014 - 2015 CompuLab Ltd. - http://www.compulab.co.il/
6  */
7
8 /dts-v1/;
9
10 #include "am33xx.dtsi"
11 #include <dt-bindings/interrupt-controller/irq.h>
12
13 / {
14         model = "CompuLab CM-T335";
15         compatible = "compulab,cm-t335", "ti,am33xx";
16
17         memory@80000000 {
18                 device_type = "memory";
19                 reg = <0x80000000 0x8000000>;   /* 128 MB */
20         };
21
22         leds {
23                 compatible = "gpio-leds";
24                 pinctrl-names = "default";
25                 pinctrl-0 = <&gpio_led_pins>;
26                 led0 {
27                         label = "cm_t335:green";
28                         gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;     /* gpio2_0 */
29                         linux,default-trigger = "heartbeat";
30                 };
31         };
32
33         /* regulator for mmc */
34         vmmc_fixed: fixedregulator0 {
35                 compatible = "regulator-fixed";
36                 regulator-name = "vmmc_fixed";
37                 regulator-min-microvolt = <3300000>;
38                 regulator-max-microvolt = <3300000>;
39         };
40
41         /* Regulator for WiFi */
42         vwlan_fixed: fixedregulator2 {
43                 compatible = "regulator-fixed";
44                 regulator-name = "vwlan_fixed";
45                 gpio = <&gpio0 20 GPIO_ACTIVE_HIGH>; /* gpio0_20 */
46                 enable-active-high;
47                 regulator-boot-off;
48         };
49
50         backlight {
51                 compatible = "pwm-backlight";
52                 pwms = <&ecap0 0 50000 0>;
53                 brightness-levels = <0 51 53 56 62 75 101 152 255>;
54                 default-brightness-level = <8>;
55         };
56
57         sound {
58                 compatible = "simple-audio-card";
59                 simple-audio-card,name = "cm-t335";
60
61                 simple-audio-card,widgets =
62                         "Microphone", "Mic Jack",
63                         "Line", "Line In",
64                         "Headphone", "Headphone Jack";
65
66                 simple-audio-card,routing =
67                         "Headphone Jack", "LHPOUT",
68                         "Headphone Jack", "RHPOUT",
69                         "LLINEIN", "Line In",
70                         "RLINEIN", "Line In",
71                         "MICIN", "Mic Jack";
72
73                 simple-audio-card,format = "i2s";
74                 simple-audio-card,bitclock-master = <&sound_master>;
75                 simple-audio-card,frame-master = <&sound_master>;
76
77                 simple-audio-card,cpu {
78                         sound-dai = <&mcasp1>;
79                 };
80
81                 sound_master: simple-audio-card,codec {
82                         sound-dai = <&tlv320aic23>;
83                         system-clock-frequency = <12000000>;
84                 };
85         };
86 };
87
88 &am33xx_pinmux {
89         pinctrl-names = "default";
90         pinctrl-0 = <&bluetooth_pins>;
91
92         i2c0_pins: pinmux_i2c0_pins {
93                 pinctrl-single,pins = <
94                         AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
95                         AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
96                 >;
97         };
98
99         i2c1_pins: pinmux_i2c1_pins {
100                 pinctrl-single,pins = <
101                         /* uart0_ctsn.i2c1_sda */
102                         AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE2)
103                         /* uart0_rtsn.i2c1_scl */
104                         AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE2)
105                 >;
106         };
107
108         gpio_led_pins: pinmux_gpio_led_pins {
109                 pinctrl-single,pins = <
110                         /* gpmc_csn3.gpio2_0 */
111                         AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_OUTPUT, MUX_MODE7)
112                 >;
113         };
114
115         nandflash_pins: pinmux_nandflash_pins {
116                 pinctrl-single,pins = <
117                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0)
118                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0)
119                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE0)
120                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE0)
121                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE0)
122                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE0)
123                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0)
124                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0)
125                         AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0)
126                         /* gpmc_wpn.gpio0_30 */
127                         AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7)
128                         AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
129                         AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
130                         AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)
131                         AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0)
132                         AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0)
133                 >;
134         };
135
136         uart0_pins: pinmux_uart0_pins {
137                 pinctrl-single,pins = <
138                         AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
139                         AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
140                 >;
141         };
142
143         uart1_pins: pinmux_uart1_pins {
144                 pinctrl-single,pins = <
145                         AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT, MUX_MODE0)
146                         AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
147                         AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
148                         AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
149                 >;
150         };
151
152         dcan0_pins: pinmux_dcan0_pins {
153                 pinctrl-single,pins = <
154                         /* uart1_ctsn.dcan0_tx */
155                         AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_OUTPUT, MUX_MODE2)
156                         /* uart1_rtsn.dcan0_rx */
157                         AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT, MUX_MODE2)
158                 >;
159         };
160
161         dcan1_pins: pinmux_dcan1_pins {
162                 pinctrl-single,pins = <
163                         /* uart1_rxd.dcan1_tx */
164                         AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_OUTPUT, MUX_MODE2)
165                         /* uart1_txd.dcan1_rx */
166                         AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE2)
167                 >;
168         };
169
170         ecap0_pins: pinmux_ecap0_pins {
171                 pinctrl-single,pins = <
172                         AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, 0x0, MUX_MODE0)
173                 >;
174         };
175
176         cpsw_default: cpsw_default {
177                 pinctrl-single,pins = <
178                         /* Slave 1 */
179                         /* mii1_tx_en.rgmii1_tctl */
180                         AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
181                         /* mii1_rxdv.rgmii1_rctl */
182                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2)
183                         /* mii1_txd3.rgmii1_td3 */
184                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
185                         /* mii1_txd2.rgmii1_td2 */
186                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
187                         /* mii1_txd1.rgmii1_td1 */
188                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
189                         /* mii1_txd0.rgmii1_td0 */
190                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
191                         /* mii1_txclk.rgmii1_tclk */
192                         AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2)
193                         /* mii1_rxclk.rgmii1_rclk */
194                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2)
195                         /* mii1_rxd3.rgmii1_rd3 */
196                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2)
197                         /* mii1_rxd2.rgmii1_rd2 */
198                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2)
199                         /* mii1_rxd1.rgmii1_rd1 */
200                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2)
201                         /* mii1_rxd0.rgmii1_rd0 */
202                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2)
203                 >;
204         };
205
206         cpsw_sleep: cpsw_sleep {
207                 pinctrl-single,pins = <
208                         /* Slave 1 reset value */
209                         AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
210                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
211                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
212                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
213                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
214                         AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
215                         AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
216                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
217                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
218                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
219                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
220                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
221                 >;
222         };
223
224         davinci_mdio_default: davinci_mdio_default {
225                 pinctrl-single,pins = <
226                         AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
227                         AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
228                 >;
229         };
230
231         davinci_mdio_sleep: davinci_mdio_sleep {
232                 pinctrl-single,pins = <
233                         /* MDIO reset value */
234                         AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
235                         AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
236                 >;
237         };
238
239         mmc1_pins: pinmux_mmc1_pins {
240                 pinctrl-single,pins = <
241                         AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
242                         AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
243                         AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
244                         AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
245                         AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
246                         AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
247                 >;
248         };
249
250         spi0_pins: pinmux_spi0_pins {
251                 pinctrl-single,pins = <
252                         AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE0)
253                         AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT_PULLUP, MUX_MODE0)
254                         AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT, MUX_MODE0)
255                         AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_OUTPUT, MUX_MODE0)
256                         AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_OUTPUT, MUX_MODE0)
257                 >;
258         };
259
260         /* wl1271 bluetooth */
261         bluetooth_pins: pinmux_bluetooth_pins {
262                 pinctrl-single,pins = <
263                         /* XDMA_EVENT_INTR0.gpio0_19 - bluetooth enable */
264                         AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLUP, MUX_MODE7)
265                 >;
266         };
267
268         /* TLV320AIC23B codec */
269         mcasp1_pins: pinmux_mcasp1_pins {
270                 pinctrl-single,pins = <
271                         /* MII1_CRS.mcasp1_aclkx */
272                         AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE4)
273                         /* MII1_RX_ER.mcasp1_fsx */
274                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE4)
275                         /* MII1_COL.mcasp1_axr2 */
276                         AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE4)
277                         /* RMII1_REF_CLK.mcasp1_axr3 */
278                         AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE4)
279                 >;
280         };
281
282         /* wl1271 WiFi */
283         wifi_pins: pinmux_wifi_pins {
284                 pinctrl-single,pins = <
285                         /* EMU1.gpio3_8 - WiFi IRQ */
286                         AM33XX_PADCONF(AM335X_PIN_EMU1, PIN_INPUT_PULLUP, MUX_MODE7)
287                         /* XDMA_EVENT_INTR1.gpio0_20 - WiFi enable */
288                         AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT, MUX_MODE7)
289                 >;
290         };
291 };
292
293 &uart0 {
294         pinctrl-names = "default";
295         pinctrl-0 = <&uart0_pins>;
296
297         status = "okay";
298 };
299
300 /* WLS1271 bluetooth */
301 &uart1 {
302         pinctrl-names = "default";
303         pinctrl-0 = <&uart1_pins>;
304
305 status = "okay";
306 };
307
308 &i2c0 {
309         pinctrl-names = "default";
310         pinctrl-0 = <&i2c0_pins>;
311
312         status = "okay";
313         clock-frequency = <400000>;
314         /* CM-T335 board EEPROM */
315         eeprom: 24c02@50 {
316                 compatible = "atmel,24c02";
317                 reg = <0x50>;
318                 pagesize = <16>;
319         };
320         /* Real Time Clock */
321         ext_rtc: em3027@56 {
322                 compatible = "emmicro,em3027";
323                 reg = <0x56>;
324         };
325         /* Audio codec */
326         tlv320aic23: codec@1a {
327                 compatible = "ti,tlv320aic23";
328                 reg = <0x1a>;
329                 #sound-dai-cells= <0>;
330                 status = "okay";
331         };
332 };
333
334 &usb {
335         status = "okay";
336 };
337
338 &usb_ctrl_mod {
339         status = "okay";
340 };
341
342 &usb0_phy {
343         status = "okay";
344 };
345
346 &usb0 {
347         status = "okay";
348 };
349
350 &cppi41dma  {
351         status = "okay";
352 };
353
354 &epwmss0 {
355         status = "okay";
356
357         ecap0: ecap@100 {
358                 status = "okay";
359                 pinctrl-names = "default";
360                 pinctrl-0 = <&ecap0_pins>;
361         };
362 };
363
364 &gpmc {
365         status = "okay";
366         pinctrl-names = "default";
367         pinctrl-0 = <&nandflash_pins>;
368         ranges = <0 0 0x08000000 0x10000000>;   /* CS0: NAND */
369         nand@0,0 {
370                 compatible = "ti,omap2-nand";
371                 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
372                 interrupt-parent = <&gpmc>;
373                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
374                              <1 IRQ_TYPE_NONE>; /* termcount */
375                 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
376                 ti,nand-ecc-opt = "bch8";
377                 ti,elm-id = <&elm>;
378                 nand-bus-width = <8>;
379                 gpmc,device-width = <1>;
380                 gpmc,sync-clk-ps = <0>;
381                 gpmc,cs-on-ns = <0>;
382                 gpmc,cs-rd-off-ns = <44>;
383                 gpmc,cs-wr-off-ns = <44>;
384                 gpmc,adv-on-ns = <6>;
385                 gpmc,adv-rd-off-ns = <34>;
386                 gpmc,adv-wr-off-ns = <44>;
387                 gpmc,we-on-ns = <0>;
388                 gpmc,we-off-ns = <40>;
389                 gpmc,oe-on-ns = <0>;
390                 gpmc,oe-off-ns = <54>;
391                 gpmc,access-ns = <64>;
392                 gpmc,rd-cycle-ns = <82>;
393                 gpmc,wr-cycle-ns = <82>;
394                 gpmc,bus-turnaround-ns = <0>;
395                 gpmc,cycle2cycle-delay-ns = <0>;
396                 gpmc,clk-activation-ns = <0>;
397                 gpmc,wr-access-ns = <40>;
398                 gpmc,wr-data-mux-bus-ns = <0>;
399                 /* MTD partition table */
400                 #address-cells = <1>;
401                 #size-cells = <1>;
402                 partition@0 {
403                         label = "spl";
404                         reg = <0x00000000 0x00200000>;
405                 };
406                 partition@1 {
407                         label = "uboot";
408                         reg = <0x00200000 0x00100000>;
409                 };
410                 partition@2 {
411                         label = "uboot environment";
412                         reg = <0x00300000 0x00100000>;
413                 };
414                 partition@3 {
415                         label = "dtb";
416                         reg = <0x00400000 0x00100000>;
417                 };
418                 partition@4 {
419                         label = "splash";
420                         reg = <0x00500000 0x00400000>;
421                 };
422                 partition@5 {
423                         label = "linux";
424                         reg = <0x00900000 0x00600000>;
425                 };
426                 partition@6 {
427                         label = "rootfs";
428                         reg = <0x00F00000 0>;
429                 };
430         };
431 };
432
433 &elm {
434         status = "okay";
435 };
436
437 &mac {
438         pinctrl-names = "default", "sleep";
439         pinctrl-0 = <&cpsw_default>;
440         pinctrl-1 = <&cpsw_sleep>;
441         slaves = <1>;
442         status = "okay";
443 };
444
445 &davinci_mdio {
446         pinctrl-names = "default", "sleep";
447         pinctrl-0 = <&davinci_mdio_default>;
448         pinctrl-1 = <&davinci_mdio_sleep>;
449         status = "okay";
450
451         ethphy0: ethernet-phy@0 {
452                 reg = <0>;
453         };
454 };
455
456 &cpsw_emac0 {
457         phy-handle = <&ethphy0>;
458         phy-mode = "rgmii-txid";
459 };
460
461 &mmc1 {
462         status = "okay";
463         vmmc-supply = <&vmmc_fixed>;
464         bus-width = <4>;
465         pinctrl-names = "default";
466         pinctrl-0 = <&mmc1_pins>;
467 };
468
469 &dcan0 {
470         status = "okay";
471         pinctrl-names = "default";
472         pinctrl-0 = <&dcan0_pins>;
473 };
474
475 &dcan1 {
476         status = "okay";
477         pinctrl-names = "default";
478         pinctrl-0 = <&dcan1_pins>;
479 };
480
481 /* Touschscreen and analog digital converter */
482 &tscadc {
483         status = "okay";
484         tsc {
485                 ti,wires = <4>;
486                 ti,x-plate-resistance = <200>;
487                 ti,coordinate-readouts = <5>;
488                 ti,wire-config = <0x01 0x10 0x23 0x32>;
489                 ti,charge-delay = <0x400>;
490         };
491
492         adc {
493                 ti,adc-channels = <4 5 6 7>;
494         };
495 };
496
497 /* CPU audio */
498 &mcasp1 {
499                 pinctrl-names = "default";
500                 pinctrl-0 = <&mcasp1_pins>;
501
502                 op-mode = <0>;          /* MCASP_IIS_MODE */
503                 tdm-slots = <2>;
504                 /* 16 serializers */
505                 num-serializer = <16>;
506                 serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
507                         0 0 2 1 0 0 0 0 0 0 0 0 0 0 0 0
508                 >;
509                 tx-num-evt = <1>;
510                 rx-num-evt = <1>;
511
512                 #sound-dai-cells= <0>;
513                 status = "okay";
514 };
515
516 &spi0 {
517         status = "okay";
518         pinctrl-names = "default";
519         pinctrl-0 = <&spi0_pins>;
520         ti,pindir-d0-out-d1-in = <1>;
521         /* WLS1271 WiFi */
522         wlcore: wlcore@1 {
523                 compatible = "ti,wl1271";
524                 pinctrl-names = "default";
525                 pinctrl-0 = <&wifi_pins>;
526                 reg = <1>;
527                 spi-max-frequency = <48000000>;
528                 clock-xtal;
529                 ref-clock-frequency = <38400000>;
530                 interrupt-parent = <&gpio3>;
531                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
532                 vwlan-supply = <&vwlan_fixed>;
533         };
534 };