treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
[sfrench/cifs-2.6.git] / arch / arm / boot / dts / am335x-base0033.dts
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * am335x-base0033.dts - Device Tree file for IGEP AQUILA EXPANSION
4  *
5  * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz
6  */
7
8 #include "am335x-igep0033.dtsi"
9
10 / {
11         model = "IGEP COM AM335x on AQUILA Expansion";
12         compatible = "isee,am335x-base0033", "isee,am335x-igep0033", "ti,am33xx";
13
14         hdmi {
15                 compatible = "ti,tilcdc,slave";
16                 i2c = <&i2c0>;
17                 pinctrl-names = "default", "off";
18                 pinctrl-0 = <&nxp_hdmi_pins>;
19                 pinctrl-1 = <&nxp_hdmi_off_pins>;
20                 status = "okay";
21         };
22
23         leds_base {
24                 pinctrl-names = "default";
25                 pinctrl-0 = <&leds_base_pins>;
26
27                 compatible = "gpio-leds";
28
29                 led0 {
30                         label = "base:red:user";
31                         gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;   /* gpio1_21 */
32                         default-state = "off";
33                 };
34
35                 led1 {
36                         label = "base:green:user";
37                         gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;    /* gpio2_0 */
38                         default-state = "off";
39                 };
40         };
41 };
42
43 &am33xx_pinmux {
44         nxp_hdmi_pins: pinmux_nxp_hdmi_pins {
45                 pinctrl-single,pins = <
46                         AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT, MUX_MODE3)      /* xdma_event_intr0.clkout1 */
47                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
48                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
49                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
50                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
51                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
52                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
53                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
54                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
55                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
56                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
57                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
58                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
59                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
60                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
61                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
62                         AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
63                         AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0)
64                         AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0)
65                         AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0)
66                         AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0)
67                 >;
68         };
69         nxp_hdmi_off_pins: pinmux_nxp_hdmi_off_pins {
70                 pinctrl-single,pins = <
71                         AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT, MUX_MODE3)      /* xdma_event_intr0.clkout1 */
72                 >;
73         };
74
75         leds_base_pins: pinmux_leds_base_pins {
76                 pinctrl-single,pins = <
77                         AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7)      /* gpmc_a5.gpio1_21 */
78                         AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_OUTPUT_PULLDOWN, MUX_MODE7)    /* gpmc_csn3.gpio2_0 */
79                 >;
80         };
81 };
82
83 &lcdc {
84         status = "okay";
85 };
86
87 &i2c0 {
88         eeprom: eeprom@50 {
89                 compatible = "atmel,24c256";
90                 reg = <0x50>;
91         };
92 };