drm/radeon: handle PCIe root ports with addressing limitations
authorChristoph Hellwig <hch@lst.de>
Thu, 15 Aug 2019 07:27:00 +0000 (09:27 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 15 Aug 2019 15:51:00 +0000 (10:51 -0500)
radeon uses a need_dma32 flag to indicate to the drm core that some
allocations need to be done using GFP_DMA32, but it only checks the
device addressing capabilities to make that decision.  Unfortunately
PCIe root ports that have limited addressing exist as well.  Use the
dma_addressing_limited instead to also take those into account.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reported-by: Atish Patra <Atish.Patra@wdc.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/radeon.h
drivers/gpu/drm/radeon/radeon_device.c
drivers/gpu/drm/radeon/radeon_ttm.c

index 3f7701321d2137c7fc8b76518b5fe58bafd32cec..7fc40345b6073d5de2636d6d8afc788a26bacd3f 100644 (file)
@@ -2386,7 +2386,6 @@ struct radeon_device {
        struct radeon_wb                wb;
        struct radeon_dummy_page        dummy_page;
        bool                            shutdown;
-       bool                            need_dma32;
        bool                            need_swiotlb;
        bool                            accel_working;
        bool                            fastfb_working; /* IGP feature*/
index dceb554e567446354f976cc39efcd1c012c443c2..b8cc058266672144d36f7330a9ba79f66cebc83c 100644 (file)
@@ -1365,27 +1365,25 @@ int radeon_device_init(struct radeon_device *rdev,
        else
                rdev->mc.mc_mask = 0xffffffffULL; /* 32 bit MC */
 
-       /* set DMA mask + need_dma32 flags.
+       /* set DMA mask.
         * PCIE - can handle 40-bits.
         * IGP - can handle 40-bits
         * AGP - generally dma32 is safest
         * PCI - dma32 for legacy pci gart, 40 bits on newer asics
         */
-       rdev->need_dma32 = false;
+       dma_bits = 40;
        if (rdev->flags & RADEON_IS_AGP)
-               rdev->need_dma32 = true;
+               dma_bits = 32;
        if ((rdev->flags & RADEON_IS_PCI) &&
            (rdev->family <= CHIP_RS740))
-               rdev->need_dma32 = true;
+               dma_bits = 32;
 #ifdef CONFIG_PPC64
        if (rdev->family == CHIP_CEDAR)
-               rdev->need_dma32 = true;
+               dma_bits = 32;
 #endif
 
-       dma_bits = rdev->need_dma32 ? 32 : 40;
        r = pci_set_dma_mask(rdev->pdev, DMA_BIT_MASK(dma_bits));
        if (r) {
-               rdev->need_dma32 = true;
                dma_bits = 32;
                pr_warn("radeon: No suitable DMA available\n");
        }
index 35ac75a11d3878cbb0f617b84abf8f3e97ff1d79..a05e10724d465f5478d86153ee41de0dfad6aef3 100644 (file)
@@ -794,7 +794,7 @@ int radeon_ttm_init(struct radeon_device *rdev)
        r = ttm_bo_device_init(&rdev->mman.bdev,
                               &radeon_bo_driver,
                               rdev->ddev->anon_inode->i_mapping,
-                              rdev->need_dma32);
+                              dma_addressing_limited(&rdev->pdev->dev));
        if (r) {
                DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
                return r;