2 * linux/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c
4 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com/
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
13 #include <linux/delay.h>
14 #include <linux/err.h>
15 #include <linux/firmware.h>
16 #include <linux/jiffies.h>
17 #include <linux/sched.h>
19 #include "s5p_mfc_cmd_v5.h"
20 #include "s5p_mfc_common.h"
21 #include "s5p_mfc_debug.h"
22 #include "s5p_mfc_intr.h"
23 #include "s5p_mfc_pm.h"
25 static void *s5p_mfc_bitproc_buf;
26 static size_t s5p_mfc_bitproc_phys;
27 static unsigned char *s5p_mfc_bitproc_virt;
29 /* Allocate and load firmware */
30 int s5p_mfc_alloc_and_load_firmware(struct s5p_mfc_dev *dev)
32 struct firmware *fw_blob;
33 size_t bank2_base_phys;
37 /* Firmare has to be present as a separate file or compiled
40 err = request_firmware((const struct firmware **)&fw_blob,
41 "s5p-mfc.fw", dev->v4l2_dev.dev);
43 mfc_err("Firmware is not present in the /lib/firmware directory nor compiled in kernel\n");
46 dev->fw_size = ALIGN(fw_blob->size, FIRMWARE_ALIGN);
47 if (s5p_mfc_bitproc_buf) {
48 mfc_err("Attempting to allocate firmware when it seems that it is already loaded\n");
49 release_firmware(fw_blob);
52 s5p_mfc_bitproc_buf = vb2_dma_contig_memops.alloc(
53 dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], dev->fw_size);
54 if (IS_ERR(s5p_mfc_bitproc_buf)) {
55 s5p_mfc_bitproc_buf = NULL;
56 mfc_err("Allocating bitprocessor buffer failed\n");
57 release_firmware(fw_blob);
60 s5p_mfc_bitproc_phys = s5p_mfc_mem_cookie(
61 dev->alloc_ctx[MFC_BANK1_ALLOC_CTX], s5p_mfc_bitproc_buf);
62 if (s5p_mfc_bitproc_phys & ((1 << MFC_BASE_ALIGN_ORDER) - 1)) {
63 mfc_err("The base memory for bank 1 is not aligned to 128KB\n");
64 vb2_dma_contig_memops.put(s5p_mfc_bitproc_buf);
65 s5p_mfc_bitproc_phys = 0;
66 s5p_mfc_bitproc_buf = NULL;
67 release_firmware(fw_blob);
70 s5p_mfc_bitproc_virt = vb2_dma_contig_memops.vaddr(s5p_mfc_bitproc_buf);
71 if (!s5p_mfc_bitproc_virt) {
72 mfc_err("Bitprocessor memory remap failed\n");
73 vb2_dma_contig_memops.put(s5p_mfc_bitproc_buf);
74 s5p_mfc_bitproc_phys = 0;
75 s5p_mfc_bitproc_buf = NULL;
76 release_firmware(fw_blob);
79 dev->bank1 = s5p_mfc_bitproc_phys;
80 b_base = vb2_dma_contig_memops.alloc(
81 dev->alloc_ctx[MFC_BANK2_ALLOC_CTX], 1 << MFC_BASE_ALIGN_ORDER);
83 vb2_dma_contig_memops.put(s5p_mfc_bitproc_buf);
84 s5p_mfc_bitproc_phys = 0;
85 s5p_mfc_bitproc_buf = NULL;
86 mfc_err("Allocating bank2 base failed\n");
87 release_firmware(fw_blob);
90 bank2_base_phys = s5p_mfc_mem_cookie(
91 dev->alloc_ctx[MFC_BANK2_ALLOC_CTX], b_base);
92 vb2_dma_contig_memops.put(b_base);
93 if (bank2_base_phys & ((1 << MFC_BASE_ALIGN_ORDER) - 1)) {
94 mfc_err("The base memory for bank 2 is not aligned to 128KB\n");
95 vb2_dma_contig_memops.put(s5p_mfc_bitproc_buf);
96 s5p_mfc_bitproc_phys = 0;
97 s5p_mfc_bitproc_buf = NULL;
98 release_firmware(fw_blob);
101 /* Valid buffers passed to MFC encoder with LAST_FRAME command
102 * should not have address of bank2 - MFC will treat it as a null frame.
103 * To avoid such situation we set bank2 address below the pool address.
105 dev->bank2 = bank2_base_phys - (1 << MFC_BASE_ALIGN_ORDER);
106 memcpy(s5p_mfc_bitproc_virt, fw_blob->data, fw_blob->size);
108 release_firmware(fw_blob);
113 /* Reload firmware to MFC */
114 int s5p_mfc_reload_firmware(struct s5p_mfc_dev *dev)
116 struct firmware *fw_blob;
119 /* Firmare has to be present as a separate file or compiled
122 err = request_firmware((const struct firmware **)&fw_blob,
123 "s5p-mfc.fw", dev->v4l2_dev.dev);
125 mfc_err("Firmware is not present in the /lib/firmware directory nor compiled in kernel\n");
128 if (fw_blob->size > dev->fw_size) {
129 mfc_err("MFC firmware is too big to be loaded\n");
130 release_firmware(fw_blob);
133 if (s5p_mfc_bitproc_buf == NULL || s5p_mfc_bitproc_phys == 0) {
134 mfc_err("MFC firmware is not allocated or was not mapped correctly\n");
135 release_firmware(fw_blob);
138 memcpy(s5p_mfc_bitproc_virt, fw_blob->data, fw_blob->size);
140 release_firmware(fw_blob);
145 /* Release firmware memory */
146 int s5p_mfc_release_firmware(struct s5p_mfc_dev *dev)
148 /* Before calling this function one has to make sure
149 * that MFC is no longer processing */
150 if (!s5p_mfc_bitproc_buf)
152 vb2_dma_contig_memops.put(s5p_mfc_bitproc_buf);
153 s5p_mfc_bitproc_virt = NULL;
154 s5p_mfc_bitproc_phys = 0;
155 s5p_mfc_bitproc_buf = NULL;
159 /* Reset the device */
160 int s5p_mfc_reset(struct s5p_mfc_dev *dev)
162 unsigned int mc_status;
163 unsigned long timeout;
168 mfc_write(dev, 0x3f6, S5P_FIMV_SW_RESET);
169 /* All reset except for MC */
170 mfc_write(dev, 0x3e2, S5P_FIMV_SW_RESET);
173 timeout = jiffies + msecs_to_jiffies(MFC_BW_TIMEOUT);
174 /* Check MC status */
176 if (time_after(jiffies, timeout)) {
177 mfc_err("Timeout while resetting MFC\n");
181 mc_status = mfc_read(dev, S5P_FIMV_MC_STATUS);
183 } while (mc_status & 0x3);
185 mfc_write(dev, 0x0, S5P_FIMV_SW_RESET);
186 mfc_write(dev, 0x3fe, S5P_FIMV_SW_RESET);
191 static inline void s5p_mfc_init_memctrl(struct s5p_mfc_dev *dev)
193 mfc_write(dev, dev->bank1, S5P_FIMV_MC_DRAMBASE_ADR_A);
194 mfc_write(dev, dev->bank2, S5P_FIMV_MC_DRAMBASE_ADR_B);
195 mfc_debug(2, "Bank1: %08x, Bank2: %08x\n", dev->bank1, dev->bank2);
198 static inline void s5p_mfc_clear_cmds(struct s5p_mfc_dev *dev)
200 mfc_write(dev, 0xffffffff, S5P_FIMV_SI_CH0_INST_ID);
201 mfc_write(dev, 0xffffffff, S5P_FIMV_SI_CH1_INST_ID);
202 mfc_write(dev, 0, S5P_FIMV_RISC2HOST_CMD);
203 mfc_write(dev, 0, S5P_FIMV_HOST2RISC_CMD);
206 /* Initialize hardware */
207 int s5p_mfc_init_hw(struct s5p_mfc_dev *dev)
213 if (!s5p_mfc_bitproc_buf)
217 mfc_debug(2, "MFC reset..\n");
219 ret = s5p_mfc_reset(dev);
221 mfc_err("Failed to reset MFC - timeout\n");
224 mfc_debug(2, "Done MFC reset..\n");
225 /* 1. Set DRAM base Addr */
226 s5p_mfc_init_memctrl(dev);
227 /* 2. Initialize registers of channel I/F */
228 s5p_mfc_clear_cmds(dev);
229 /* 3. Release reset signal to the RISC */
230 s5p_mfc_clean_dev_int_flags(dev);
231 mfc_write(dev, 0x3ff, S5P_FIMV_SW_RESET);
232 mfc_debug(2, "Will now wait for completion of firmware transfer\n");
233 if (s5p_mfc_wait_for_done_dev(dev, S5P_FIMV_R2H_CMD_FW_STATUS_RET)) {
234 mfc_err("Failed to load firmware\n");
239 s5p_mfc_clean_dev_int_flags(dev);
240 /* 4. Initialize firmware */
241 ret = s5p_mfc_sys_init_cmd(dev);
243 mfc_err("Failed to send command to MFC - timeout\n");
248 mfc_debug(2, "Ok, now will write a command to init the system\n");
249 if (s5p_mfc_wait_for_done_dev(dev, S5P_FIMV_R2H_CMD_SYS_INIT_RET)) {
250 mfc_err("Failed to load firmware\n");
256 if (dev->int_err != 0 || dev->int_type !=
257 S5P_FIMV_R2H_CMD_SYS_INIT_RET) {
259 mfc_err("Failed to init firmware - error: %d int: %d\n",
260 dev->int_err, dev->int_type);
265 ver = mfc_read(dev, S5P_FIMV_FW_VERSION);
266 mfc_debug(2, "MFC F/W version : %02xyy, %02xmm, %02xdd\n",
267 (ver >> 16) & 0xFF, (ver >> 8) & 0xFF, ver & 0xFF);
274 int s5p_mfc_sleep(struct s5p_mfc_dev *dev)
280 s5p_mfc_clean_dev_int_flags(dev);
281 ret = s5p_mfc_sleep_cmd(dev);
283 mfc_err("Failed to send command to MFC - timeout\n");
286 if (s5p_mfc_wait_for_done_dev(dev, S5P_FIMV_R2H_CMD_SLEEP_RET)) {
287 mfc_err("Failed to sleep\n");
292 if (dev->int_err != 0 || dev->int_type !=
293 S5P_FIMV_R2H_CMD_SLEEP_RET) {
295 mfc_err("Failed to sleep - error: %d int: %d\n", dev->int_err,
303 int s5p_mfc_wakeup(struct s5p_mfc_dev *dev)
309 mfc_debug(2, "MFC reset..\n");
311 ret = s5p_mfc_reset(dev);
313 mfc_err("Failed to reset MFC - timeout\n");
316 mfc_debug(2, "Done MFC reset..\n");
317 /* 1. Set DRAM base Addr */
318 s5p_mfc_init_memctrl(dev);
319 /* 2. Initialize registers of channel I/F */
320 s5p_mfc_clear_cmds(dev);
321 s5p_mfc_clean_dev_int_flags(dev);
322 /* 3. Initialize firmware */
323 ret = s5p_mfc_wakeup_cmd(dev);
325 mfc_err("Failed to send command to MFC - timeout\n");
328 /* 4. Release reset signal to the RISC */
329 mfc_write(dev, 0x3ff, S5P_FIMV_SW_RESET);
330 mfc_debug(2, "Ok, now will write a command to wakeup the system\n");
331 if (s5p_mfc_wait_for_done_dev(dev, S5P_FIMV_R2H_CMD_WAKEUP_RET)) {
332 mfc_err("Failed to load firmware\n");
337 if (dev->int_err != 0 || dev->int_type !=
338 S5P_FIMV_R2H_CMD_WAKEUP_RET) {
340 mfc_err("Failed to wakeup - error: %d int: %d\n", dev->int_err,