Merge branch 'spi/next' of git://git.secretlab.ca/git/linux-2.6

* 'spi/next' of git://git.secretlab.ca/git/linux-2.6: (34 commits)
  spi/imx: add device tree probe support
  spi/imx: copy gpio number passed by platform data into driver private data
  spi/imx: use soc name in spi device type naming scheme
  spi/imx: merge type SPI_IMX_VER_0_7 into SPI_IMX_VER_0_4
  spi/imx: do not use spi_imx2_3 to name SPI_IMX_VER_2_3 function and macro
  spi/imx: use mx21 to name SPI_IMX_VER_0_0 function and macro
  spi/imx: do not make copy of spi_imx_devtype_data
  spi/dw: Add spi number into spi irq desc
  spi/tegra: Use engineering names in DT compatible property
  spi/fsl_spi: fix CPM spi driver
  mach-s3c2410: remove unused spi-gpio.h file
  spi: remove obsolete spi-s3c24xx-gpio driver
  mach-gta2: remove unused spi-gpio.h include
  mach-qt2410: convert to spi_gpio
  mach-jive: convert to spi_gpio
  spi/pxa2xx: Remove unavailable ssp_type from documentation
  spi/bfin_spi: uninline fat queue funcs
  spi/bfin_spi: constify pin array
  spi/bfin_spi: use structs for accessing hardware regs
  spi/topcliff-pch: Support new device ML7223 IOH
  ...

Fix up trivial conflict in arch/arm/mach-ep93xx/Makefile

diff --combined arch/arm/mach-ep93xx/Makefile
index 6b7c41d155df19f5bfc953d6a75685ee734752e2,21e721ab7378f846df624a0b77cf3376de4333b9..3cedcf2d39e54a5b15578bba0b85194ce088abc3
--- 1/arch/arm/mach-ep93xx/Makefile
--- 2/arch/arm/mach-ep93xx/Makefile
+++ b/arch/arm/mach-ep93xx/Makefile
@@@ -1,11 -1,13 +1,13 @@@
  #
  # Makefile for the linux kernel.
  #
- obj-y                 := core.o clock.o dma-m2p.o
 -obj-y                 := core.o clock.o gpio.o
++obj-y                 := core.o clock.o
  obj-m                 :=
  obj-n                 :=
  obj-                  :=
  
+ obj-$(CONFIG_EP93XX_DMA)      += dma.o
+ 
  obj-$(CONFIG_MACH_ADSSPHERE)  += adssphere.o
  obj-$(CONFIG_MACH_EDB93XX)    += edb93xx.o
  obj-$(CONFIG_MACH_GESBC9312)  += gesbc9312.o

diff --combined arch/arm/mach-ep93xx/core.c
index c488e4bd61e75c775dad8372f2a1dd96fac73268,ce07e0a6f891fad97cdf44885dffea414d2d5453..c60f081e930bb8cea0567ad9675008c1add1a49f
--- 1/arch/arm/mach-ep93xx/core.c
--- 2/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@@ -174,10 -174,14 +174,10 @@@ struct sys_timer ep93xx_timer = 
  /*************************************************************************
   * EP93xx IRQ handling
   *************************************************************************/
 -extern void ep93xx_gpio_init_irq(void);
 -
  void __init ep93xx_init_irq(void)
  {
        vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
        vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
 -
 -      ep93xx_gpio_init_irq();
  }
  
  
@@@ -236,24 -240,6 +236,24 @@@ unsigned int ep93xx_chip_revision(void
        return v;
  }
  
 +/*************************************************************************
 + * EP93xx GPIO
 + *************************************************************************/
 +static struct resource ep93xx_gpio_resource[] = {
 +      {
 +              .start          = EP93XX_GPIO_PHYS_BASE,
 +              .end            = EP93XX_GPIO_PHYS_BASE + 0xcc - 1,
 +              .flags          = IORESOURCE_MEM,
 +      },
 +};
 +
 +static struct platform_device ep93xx_gpio_device = {
 +      .name           = "gpio-ep93xx",
 +      .id             = -1,
 +      .num_resources  = ARRAY_SIZE(ep93xx_gpio_resource),
 +      .resource       = ep93xx_gpio_resource,
 +};
 +
  /*************************************************************************
   * EP93xx peripheral handling
   *************************************************************************/
@@@ -265,9 -251,9 +265,9 @@@ static void ep93xx_uart_set_mctrl(struc
        unsigned int mcr;
  
        mcr = 0;
 -      if (!(mctrl & TIOCM_RTS))
 +      if (mctrl & TIOCM_RTS)
                mcr |= 2;
 -      if (!(mctrl & TIOCM_DTR))
 +      if (mctrl & TIOCM_DTR)
                mcr |= 1;
  
        __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
@@@ -506,11 -492,15 +506,15 @@@ static struct resource ep93xx_spi_resou
        },
  };
  
+ static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
+ 
  static struct platform_device ep93xx_spi_device = {
        .name           = "ep93xx-spi",
        .id             = 0,
        .dev            = {
-               .platform_data = &ep93xx_spi_master_data,
+               .platform_data          = &ep93xx_spi_master_data,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
+               .dma_mask               = &ep93xx_spi_dma_mask,
        },
        .num_resources  = ARRAY_SIZE(ep93xx_spi_resources),
        .resource       = ep93xx_spi_resources,
@@@ -884,13 -874,14 +888,13 @@@ void __init ep93xx_register_ac97(void
        platform_device_register(&ep93xx_pcm_device);
  }
  
 -extern void ep93xx_gpio_init(void);
 -
  void __init ep93xx_init_devices(void)
  {
        /* Disallow access to MaverickCrunch initially */
        ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
  
 -      ep93xx_gpio_init();
 +      /* Get the GPIO working early, other devices need it */
 +      platform_device_register(&ep93xx_gpio_device);
  
        amba_device_register(&uart1_device, &iomem_resource);
        amba_device_register(&uart2_device, &iomem_resource);

diff --combined drivers/spi/spi-s3c64xx.c
index 8945e201e42eb5a57d66d4a4f8ab762314f601a6,75e3a9bd3b0630fe067f85717fb0e1ab418e0ee3..595dacc7645f48e00a105fa9afb389fc1835692c
--- 1/drivers/spi/spi_s3c64xx.c
--- 2/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@@ -1,5 -1,4 +1,4 @@@
- /* linux/drivers/spi/spi_s3c64xx.c
-  *
+ /*
   * Copyright (C) 2009 Samsung Electronics Ltd.
   *    Jaswinder Singh <jassi.brar@samsung.com>
   *
@@@ -116,7 -115,9 +115,7 @@@
                                        (((i)->fifo_lvl_mask + 1))) \
                                        ? 1 : 0)
  
 -#define S3C64XX_SPI_ST_TX_DONE(v, i) ((((v) >> (i)->rx_lvl_offset) & \
 -                                      (((i)->fifo_lvl_mask + 1) << 1)) \
 -                                      ? 1 : 0)
 +#define S3C64XX_SPI_ST_TX_DONE(v, i) (((v) & (1 << (i)->tx_st_done)) ? 1 : 0)
  #define TX_FIFO_LVL(v, i) (((v) >> 6) & (i)->fifo_lvl_mask)
  #define RX_FIFO_LVL(v, i) (((v) >> (i)->rx_lvl_offset) & (i)->fifo_lvl_mask)