Merge tag 'dmaengine-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul...

[sfrench/cifs-2.6.git] / drivers / dma / fsl-edma-main.c

diff --git a/drivers/dma/fsl-edma-main.c b/drivers/dma/fsl-edma-main.c
index d36e28b9c767ae7ebb44bc9e87de7bbc0363f926..402f0058a180c8042ff35eea5f556c9e5d648df6 100644 (file)
--- a/drivers/dma/fsl-edma-main.c
+++ b/drivers/dma/fsl-edma-main.c
@@ -360,6 +360,18 @@ static struct fsl_edma_drvdata imx93_data4 = {
        .flags = FSL_EDMA_DRV_HAS_CHMUX | FSL_EDMA_DRV_HAS_DMACLK | FSL_EDMA_DRV_EDMA4,
        .chreg_space_sz = 0x8000,
        .chreg_off = 0x10000,
+       .mux_off = 0x10000 + offsetof(struct fsl_edma3_ch_reg, ch_mux),
+       .mux_skip = 0x8000,
+       .setup_irq = fsl_edma3_irq_init,
+};
+
+static struct fsl_edma_drvdata imx95_data5 = {
+       .flags = FSL_EDMA_DRV_HAS_CHMUX | FSL_EDMA_DRV_HAS_DMACLK | FSL_EDMA_DRV_EDMA4 |
+                FSL_EDMA_DRV_TCD64,
+       .chreg_space_sz = 0x8000,
+       .chreg_off = 0x10000,
+       .mux_off = 0x200,
+       .mux_skip = sizeof(u32),
        .setup_irq = fsl_edma3_irq_init,
 };
 
@@ -371,6 +383,7 @@ static const struct of_device_id fsl_edma_dt_ids[] = {
        { .compatible = "fsl,imx8qm-adma", .data = &imx8qm_audio_data},
        { .compatible = "fsl,imx93-edma3", .data = &imx93_data3},
        { .compatible = "fsl,imx93-edma4", .data = &imx93_data4},
+       { .compatible = "fsl,imx95-edma5", .data = &imx95_data5},
        { /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, fsl_edma_dt_ids);
@@ -511,6 +524,9 @@ static int fsl_edma_probe(struct platform_device *pdev)
                        return ret;
        }
 
+       if (drvdata->flags & FSL_EDMA_DRV_TCD64)
+               dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
+
        INIT_LIST_HEAD(&fsl_edma->dma_dev.channels);
        for (i = 0; i < fsl_edma->n_chans; i++) {
                struct fsl_edma_chan *fsl_chan = &fsl_edma->chans[i];
@@ -533,11 +549,12 @@ static int fsl_edma_probe(struct platform_device *pdev)
                                offsetof(struct fsl_edma3_ch_reg, tcd) : 0;
                fsl_chan->tcd = fsl_edma->membase
                                + i * drvdata->chreg_space_sz + drvdata->chreg_off + len;
+               fsl_chan->mux_addr = fsl_edma->membase + drvdata->mux_off + i * drvdata->mux_skip;
 
                fsl_chan->pdev = pdev;
                vchan_init(&fsl_chan->vchan, &fsl_edma->dma_dev);
 
-               edma_write_tcdreg(fsl_chan, 0, csr);
+               edma_write_tcdreg(fsl_chan, cpu_to_le32(0), csr);
                fsl_edma_chan_mux(fsl_chan, 0, false);
        }