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drm/i915/icl: Fix power well 2 wrt. DC-off toggling order
2018-11-06 Manasi Navaredrm/i915/icl: Fix the macros for DFLEXDPMLE register...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-10-18 Manasi Navaredrm/i915/dp: Link train Fallback on eDP only if fallback...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-09-04 Manasi Navaredrm/i915/dsc: Fix PPS register definition macros for...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-08-28 Manasi Navaredrm/i915/dsc: Fix PPS register definition macros for...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-08-20 Manasi Navaredrm/i915/icl: Get DDI clock for ICL for MG PLL and...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-08-20 Manasi Navaredrm/i915/icl: Implement HSDIV_RATIO of MG_CLKTOP2_HSCLKCTL_P...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-07-24 Manasi Navaredrm/i915/icl: Implement voltage swing programming sequence...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-07-24 Manasi Navaredrm/i915/icl: Add remaining registers and bitfields...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-06-14 Manasi Navaredrm/i915/dp: Add support for HBR3 and TPS4 during link...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-06-14 Manasi Navaredrm/i915/icl: Add allowed DP rates for Icelake
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-06-12 Manasi Navaredrm/i915/icl: Add DDI HDMI level selection for ICL
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-06-01 Manasi Navaredrm/i915/icl: Get DDI clock for ICL based on PLLs.
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-06-01 Manasi Navaredrm/i915/icl: Add register definition for DFLEXDPMLE
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-04-30 Manasi Navaredrm/i915/icl: Fix the DP Max Voltage for ICL
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-04-30 Manasi Navaredrm/i915/icl: Implement voltage swing programming sequence...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-04-27 Manasi Navaredrm/dp: Rename the edp_sdp_header as dp_sdp_header
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-03-23 Manasi Navaredrm/i915/icl: Add Voltage swing table for MG PHY DDI...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-03-23 Manasi Navaredrm/i915/icl: Add register defs for voltage swing sequences...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-03-23 Manasi Navaredrm/i915/icl: Add Combo PHY DDI Buffer translation...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-03-23 Manasi Navaredrm/i915/icl: Add register definitions for Combo PHY...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-03-01 Manasi Navaredrm/i915/dp: Add HBR3 rate (8.1 Gbps) to dp_rates array
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-02-27 Manasi Navaredrm/i915/dp: Fix the order of platforms for setting...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-02-01 Manasi Navaredrm/i915/edp: Do not do link training fallback or prune...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-01-26 Manasi Navaredrm/dp: Add definitions for TPS4 bits and macros to...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-01-26 Manasi Navaredrm/dp: Add HBR3 support in existing DRM DP helpers
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2018-01-22 Manasi Navaredrm/i915/edp: Do not do link training fallback or prune...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-10-30 Manasi Navaredrm/i915: Cancel the modeset retry work during modeset...
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-10-26 Manasi Navaredrm/i915: Cancel the modeset retry work during modeset...
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-10-09 Manasi Navaredrm/i915/edp: Increase the T12 delay quirk to 1300ms
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-10-09 Manasi Navaredrm/i915/edp: Get the Panel Power Off timestamp after...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-10-05 Manasi Navaredrm/i915/edp: Increase the T12 delay quirk to 1300ms
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-10-05 Manasi Navaredrm/i915/edp: Get the Panel Power Off timestamp after...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-09-14 Manasi Navaredrm/i915/cnl: Change the macro name to DPLL_CFGCR0_DCO_FRACT...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-09-01 Manasi Navaredrm/i915/edp: Increase T12 panel delay to 900 ms to...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-08-31 Manasi Navaredrm/i915/edp: Increase T12 panel delay to 900 ms to...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-08-15 Manasi Navaredrm/i915/dp: Validate the compliance test link parameters
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-08-15 Manasi Navaredrm/i915/dp: Generalize intel_dp_link_params function...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-07-04 Manasi Navaredrm/i915/edp: Add a T12 panel delay quirk to fix DP...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-06-27 Manasi Navaredrm/i915/dp: Remove -1/+1 from t11_t12 for Gen9_LP...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-06-27 Manasi Navaredrm/i915/dp: Fix the t11_t12 panel power cycle delay...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-04-13 Manasi Navaredrm/i915: Implement Link Rate fallback on Link training...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-04-12 Manasi Navaredrm/i915/dp: Validate cached link rate and lane count...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-03-01 Manasi Navaredrm/i915: Implement Link Rate fallback on Link training...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-03-01 Manasi Navaredrm: Fix the kernel doc warning for drm_link_status
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-02-27 Manasi Navaredrm: Add a new connector atomic property for link status
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-02-15 Manasi Navaredrm/i915/dp: Reset the link params on HPD/connected...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-01-26 Manasi Navaredrm/i915: Add support for DP Video pattern compliance...
test request (Manasi Navare)
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-01-26 Manasi Navaredrm: Add definitions for DP compliance Video pattern...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-01-26 Manasi Navaredrm/i915: Fixes to support DP Compliance EDID tests
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2017-01-26 Manasi Navaredrm/i915: Add support for DP link training compliance
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2016-12-13 Manasi Navaredrm/i915: Move all the DP compliance data to a separate...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2016-12-13 Manasi Navaredrm/i915: Find fallback link rate/lane count
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2016-12-13 Manasi Navaredrm/i915: Compute sink's max lane count/link BW at...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2016-09-07 Manasi Navaredrm/i915: Split hsw_get_dpll()
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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2016-09-07 Manasi Navaredrm/i915: Split intel_ddi_pre_enable() into DP and...
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
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