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drm/i915: Use crtc_state in ironlake_enable_pch_transcoder
2018-09-25
Mahesh Kumar
drm/i915: use for_each_pipe loop to assign crtc_mask
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-09-13
Mahesh Kumar
drm/i915/kbl+: Enable IPC only for symmetric memory...
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-09-13
Mahesh Kumar
drm/i915/skl+: don't trust IPC value set by BIOS
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-09-13
Mahesh Kumar
drm/i915: Implement 16GB dimm wa for latency level-0
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-09-13
Mahesh Kumar
drm/i915/skl+: Decode memory bandwidth and parameters
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-09-13
Mahesh Kumar
drm/i915/bxt: Decode memory bandwidth and parameters
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-08-22
Mahesh Kumar
Revert "drm: crc: Wait for a frame before returning...
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-08-22
Mahesh Kumar
drm/crc: Cleanup crtc_crc_open function
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-08-22
Mahesh Kumar
drm/vkms/crc: Implement verify_crc_source callback
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-08-13
Mahesh Kumar
drm/rcar-du/crc: Implement get_crc_sources callback
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-08-13
Mahesh Kumar
drm/i915/crc: implement get_crc_sources callback
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-08-13
Mahesh Kumar
drm/i915/crc: implement verify_crc_source callback
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-08-13
Mahesh Kumar
drm/rcar-du/crc: Implement verify_crc_source callback
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-08-13
Mahesh Kumar
drm/amdgpu_dm/crc: Implement verify_crc_source callback
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-08-13
Mahesh Kumar
drm/rockchip/crc: Implement verify_crc_source callback
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-08-13
Mahesh Kumar
drm: crc: Introduce get_crc_sources callback
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-08-13
Mahesh Kumar
drm: crc: Introduce verify_crc_source callback
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-08-07
Mahesh Kumar
drm/i915/skl: distribute DDB based on panel resolution
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-08-07
Mahesh Kumar
drm/i915: ddb_size is of u16 type
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-06-12
Mahesh Kumar
drm/i915/icl: fix gmbus gpio pin mapping
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-06-07
Mahesh Kumar
drm/i915/icl: Don't update enabled dbuf slices struct...
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-06-07
Mahesh Kumar
drm/i915/icl: fix icl_unmap/map_plls_to_ports
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-06-04
Mahesh Kumar
drm/i915/icl: Don't update enabled dbuf slices struct...
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-06-01
Mahesh Kumar
drm/i915/icl: fix icl_unmap/map_plls_to_ports
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-04-28
Mahesh Kumar
drm/i915/icl: update ddb entry start/end mask during...
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-04-28
Mahesh Kumar
drm/i915/icl: Enable 2nd DBuf slice only when needed
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-04-28
Mahesh Kumar
drm/i915/icl: track dbuf slice-2 status
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-04-09
Mahesh Kumar
drm/i915/skl: split skl_compute_ddb function
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-04-09
Mahesh Kumar
drm/i915/skl+: nv12 workaround disable WM level 1-7
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-04-09
Mahesh Kumar
drm/i915/skl+: make sure higher latency level has higher...
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-04-09
Mahesh Kumar
drm/i915/skl+: pass skl_wm_level struct to wm compute...
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-04-09
Mahesh Kumar
drm/i915/skl+: NV12 related changes for WM
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-04-09
Mahesh Kumar
drm/i915/skl+: support verification of DDB HW state...
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-04-09
Mahesh Kumar
drm/i915/skl+: add NV12 in skl_format_to_fourcc
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-04-09
Mahesh Kumar
drm/i915/skl+: refactor WM calculation for NV12
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-04-09
Mahesh Kumar
drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-03-14
Mahesh Kumar
drm/i915/cnl: Kill _MMIO_PORT6 macro
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-03-14
Mahesh Kumar
drm/i915/cnl; Add macro to get PORT_TX register
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-03-05
Mahesh Kumar
drm/i915/icl: remove port A/E lane sharing limitation.
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-02-28
Mahesh Kumar
drm/i915/cnl: Fix PORT_TX_DW5/7 register address
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-02-15
Mahesh Kumar
drm/i915/cnl: Fix PORT_TX_DW5/7 register address
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-02-13
Mahesh Kumar
drm/i915/icl: program mbus during pipe enable
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-02-13
Mahesh Kumar
drm/i915/icl: initialize MBus during display init
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-02-13
Mahesh Kumar
drm/i915/icl: Enable both DBuf slices during init
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-01-31
Mahesh Kumar
drm/i915/icl: Introduce MBus related registers
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-01-31
Mahesh Kumar
drm/i915/icl: NV12 y-plane ddb is not in same plane
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-01-31
Mahesh Kumar
drm/i915/icl: Fail flip if ddb allocated are less than...
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-01-31
Mahesh Kumar
drm/i915/icl: Do not fix dbuf block size to 512
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2018-01-31
Mahesh Kumar
drm/i915/icl: Don't allocate fixed bypass path blocks...
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2017-09-07
Mahesh Kumar
drm/i915/gen9+: Add has_ipc flag in device info structure
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2017-07-04
Mahesh Kumar
drm/i915/skl+: Scaling not supported in IF-ID Interlace...
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2017-07-04
Mahesh Kumar
drm/i915/skl+: Check for supported plane configuration...
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2017-06-01
Mahesh Kumar
drm/i915/skl+: consider max supported plane pixel rate...
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2016-12-07
Mahesh Kumar
drm/i915: Add intel_atomic_get_existing_crtc_state...
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2016-12-07
Mahesh Kumar
drm/i915/skl+: change WM calc to fixed point 16.16
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2016-12-07
Mahesh Kumar
drm/i915/kbl: IPC workaround for kabylake
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2016-12-07
Mahesh Kumar
drm/i915/bxt: IPC WA for Broxton
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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2016-12-07
Mahesh Kumar
drm/i915/skl: Add variables to check x_tile and y_tile
Signed-off-by:
Mahesh Kumar
<mahesh1.kumar@intel.com>
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