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drm/i915/icl: Handle YCbCr to RGB conversion for BT2020 case
2019-07-03
Aditya Swarup
drm/i915: Add N & CTS values for 10/12 bit deep color
Signed-off-by:
Aditya Swarup
<aditya.swarup@intel.com>
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2019-07-03
Aditya Swarup
drm/i915: Use port clock to set correct N value
Signed-off-by:
Aditya Swarup
<aditya.swarup@intel.com>
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2019-05-07
Aditya Swarup
drm/i915/icl: Fix setting 10 bit deep color mode
Signed-off-by:
Aditya Swarup
<aditya.swarup@intel.com>
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2019-03-11
Aditya Swarup
drm/i915/icl: Fix CRC mismatch error for DP link layer...
Signed-off-by:
Aditya Swarup
<aditya.swarup@intel.com>
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2019-02-14
Aditya Swarup
drm/i915: Make MG PHY macros semantically consistent
Signed-off-by:
Aditya Swarup
<aditya.swarup@intel.com>
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2019-02-14
Aditya Swarup
drm/i915: Make combo PHY DDI macro definitions consistent...
Signed-off-by:
Aditya Swarup
<aditya.swarup@intel.com>
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2019-02-11
Aditya Swarup
drm/i915/cnl: Fix CNL macros for Voltage Swing programming
Signed-off-by:
Aditya Swarup
<aditya.swarup@intel.com>
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2019-01-15
Aditya Swarup
drm/i915/cnl: Fix CNL macros for Voltage Swing programming
Signed-off-by:
Aditya Swarup
<aditya.swarup@intel.com>
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