sfrench/cifs-2.6.git
2 years agoMerge tag 'drm-next-5.3-2019-06-27' of git://people.freedesktop.org/~agd5f/linux...
Dave Airlie [Thu, 4 Jul 2019 04:52:50 +0000 (14:52 +1000)]
Merge tag 'drm-next-5.3-2019-06-27' of git://people.freedesktop.org/~agd5f/linux into drm-next

drm-next-5.3-2019-06-27:

amdgpu:
- Fix warning on 32 bit ARM
- Fix compilation on big endian
- Misc bug fixes

ttm:
- Live lock fix

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190628015555.3384-1-alexander.deucher@amd.com
2 years agoMerge tag 'drm-misc-next-fixes-2019-06-27' of git://anongit.freedesktop.org/drm/drm...
Dave Airlie [Thu, 4 Jul 2019 04:19:40 +0000 (14:19 +1000)]
Merge tag 'drm-misc-next-fixes-2019-06-27' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

drm-misc-next-fixes for v5.3:
- Fixes to the tfp410 bridge.
- Small build fix for vga_switcheroo to prevent building against modular fbcon.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20a62234-bc27-00eb-e0e2-22b55eec1cb2@linux.intel.com
2 years agoMerge tag 'for-airlie-armada' of git://git.armlinux.org.uk/~rmk/linux-arm into drm...
Dave Airlie [Thu, 4 Jul 2019 04:08:07 +0000 (14:08 +1000)]
Merge tag 'for-airlie-armada' of git://git.armlinux.org.uk/~rmk/linux-arm into drm-next

Armada DRM updates:
- Fix interlace support.
- use __drm_atomic_helper_plane_reset in overlay reset.
- since the overlay and video planes use essentially the same format
  registers, precompute their values while validating.
- fix a long-standing deficiency with overlay planes and interlace modes
- calculate plane starting address at atomic_check stage rather than
  when we're programming the registers.
- add gamma support.
- ensure mode adjustments made by other components are properly handled
  in the driver and applied to the CRTC-programmed mode.
- add and use register definitions for the "REG4F" register.
- use drm_atomic_helper_shutdown() when tearing down to ensure that the
  hardware is properly shutdown.
- add CRTC-level mode validation to ensure that we don't allow a mode
  that the CRTC-level hardware can not support.
- improve the clocking selection for Armada 510 support.
- move CRTC debugfs files into the crtc-specific directory, using the
  DRM helper to create these files.
- patch from Lubomir Rintel to replace a simple framebuffer.
- use the OF graph walker rather than open-coding this.
- eliminate a useless check for the availability of the remote's parent
  which isn't required.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Russell King <rmk@armlinux.org.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190702091313.GA23442@rmk-PC.armlinux.org.uk
2 years agoMerge tag 'exynos-drm-next-for-v5.3' of git://git.kernel.org/pub/scm/linux/kernel...
Dave Airlie [Thu, 4 Jul 2019 01:46:02 +0000 (11:46 +1000)]
Merge tag 'exynos-drm-next-for-v5.3' of git://git./linux/kernel/git/daeinki/drm-exynos into drm-next

- Drop the use of drmP.h header file
   drmP.h header file has been deprecated so this patch drops the use of
   this header, and instead includes appropriate header files required.
 - Add COMPILE_TEST flag
   This patch adds COMPILE_TEST dependency to exynos drm driver to
   increase build test coverage. And also, it includes vmalloc.h
   header file to fix one build warning which is introduced when
   building the Linux kernel using sh.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Inki Dae <inki.dae@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAAQKjZMdBdD8oEa0cNv78FjrpOqu20ozTTvuPEm_XnVo2gRhCQ@mail.gmail.com
2 years agodrm/armada: no need to check parent of remote
Russell King [Thu, 24 Jan 2019 14:18:17 +0000 (14:18 +0000)]
drm/armada: no need to check parent of remote

There's no need to check the parent of the remote device to check
whether it is available or not, the remote is the device itself.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2 years agodrm/armada: use for_each_endpoint_of_node() to walk crtc endpoints
Russell King [Thu, 24 Jan 2019 09:56:46 +0000 (09:56 +0000)]
drm/armada: use for_each_endpoint_of_node() to walk crtc endpoints

Rather than having a nested set of for_each_child_of_node() walkers,
use the graph walker to iterate through the endpoints for CRTCs.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2 years agodrm/armada: replace the simple-framebuffer
Lubomir Rintel [Mon, 21 Jan 2019 06:01:57 +0000 (07:01 +0100)]
drm/armada: replace the simple-framebuffer

If there's a simple-framebuffer carried over from boot firmware, it's going
to stop working once we setup the LCDC for use via DRM. Kick it off from
the hardware.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2 years agodrm/armada: redo CRTC debugfs files
Russell King [Sat, 7 Jul 2018 15:53:39 +0000 (16:53 +0100)]
drm/armada: redo CRTC debugfs files

Move the CRTC debugfs files into the CRTC specific directory.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2 years agoMerge tag 'drm-msm-next-2019-06-25' of https://gitlab.freedesktop.org/drm/msm into...
Dave Airlie [Thu, 27 Jun 2019 23:34:25 +0000 (09:34 +1000)]
Merge tag 'drm-msm-next-2019-06-25' of https://gitlab.freedesktop.org/drm/msm into drm-next

+ usual progress on cleanups
+ dsi vs EPROBE_DEFER fixes
+ msm8998 (snapdragon 835 support)
  + a540 gpu support (mesa support already landed)
  + dsi, dsi-phy support
+ mdp5 and dpu interconnect (bus/memory scaling) support
+ initial prep work for per-context pagetables (at least the parts that
  don't have external dependencies like iommu/arm-smmu)

There is one more patch for fixing DSI cmd mode panels (part of a set of
patches to get things working on nexus5), but it would be conflicty with
1cff7440a86e04a613665803b42034 in drm-next without rebasing or back-merge,
and since it doesn't conflict with anything in msm-next, I think it best
if Sean merges that through drm-mix-fixes instead.

(In other news, I've been making some progress w/ getting efifb working
properly on sdm850 laptop without horrible hacks, and drm/msm + clk stuff
not totally falling over when bootloader enables display and things are
already running when driver probes.. but not quite ready yet, hopefully
we can post some of that for 5.4.. should help for both the sdm835 and
sdm850 laptops.)

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGsj3N4XzDLSDoa+4RHZ9wXObYmhcep0M3LjnRg48BeLvg@mail.gmail.com
2 years agodrm/amd/display: fix a couple of spelling mistakes
Colin Ian King [Wed, 26 Jun 2019 13:24:27 +0000 (14:24 +0100)]
drm/amd/display: fix a couple of spelling mistakes

There are a couple of spelling mistakes in dm_error messages and
a comment. Fix these.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/powerplay: no memory activity support on Vega10
Evan Quan [Fri, 21 Jun 2019 01:46:14 +0000 (09:46 +0800)]
drm/amd/powerplay: no memory activity support on Vega10

Make mem_busy_percent sysfs interface invisible on Vega10.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: remove unnecessary warning message on gpu reset
shaoyunl [Wed, 26 Jun 2019 17:42:24 +0000 (13:42 -0400)]
drm/amdkfd: remove unnecessary warning message on gpu reset

In XGMI configuration, more than one asic can be reset at same time,
kfd is able to handle this and no need to trigger the warning

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: Set queue_preemption_timeout_ms default value
Oak Zeng [Wed, 26 Jun 2019 15:16:56 +0000 (10:16 -0500)]
drm/amdgpu: Set queue_preemption_timeout_ms default value

Set default value of this kernel parameter to 9000

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/powerplay: add missing smu_get_clk_info_from_vbios() call
Evan Quan [Tue, 25 Jun 2019 15:03:00 +0000 (23:03 +0800)]
drm/amd/powerplay: add missing smu_get_clk_info_from_vbios() call

This seems a merge error.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/powerplay: support runtime ppfeatures setting on Navi10
Evan Quan [Tue, 25 Jun 2019 03:06:08 +0000 (11:06 +0800)]
drm/amd/powerplay: support runtime ppfeatures setting on Navi10

Implement Navi10 backend for runtime ppfeatures status retrieving
and setting support.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/powerplay: check prerequisite for VCN power gating
Evan Quan [Mon, 17 Jun 2019 09:27:49 +0000 (17:27 +0800)]
drm/amd/powerplay: check prerequisite for VCN power gating

VCN DPM is a necessary prerequisite for VCN power gating.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/ttm: return -EBUSY if waiting for busy BO fails
Felix Kuehling [Wed, 26 Jun 2019 06:32:43 +0000 (02:32 -0400)]
drm/ttm: return -EBUSY if waiting for busy BO fails

Returning -EAGAIN prevents ttm_bo_mem_space from trying alternate
placements and can lead to live-locks in amdgpu_cs, retrying
indefinitely and never succeeding.

Fixes: d367bd2a5e2b12 ("drm/ttm: fix busy memory to fail other user v10")
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: drop copy/paste leftover to fix big endian
Alex Deucher [Thu, 27 Jun 2019 14:13:41 +0000 (09:13 -0500)]
drm/amdgpu: drop copy/paste leftover to fix big endian

The buf swap field doesn't exist on RB1.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: fix warning on 32 bit
Alex Deucher [Thu, 27 Jun 2019 13:48:19 +0000 (08:48 -0500)]
drm/amdgpu: fix warning on 32 bit

Properly cast pointer to int.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/exynos: trigger build of all modules
Sam Ravnborg [Thu, 27 Jun 2019 11:00:54 +0000 (20:00 +0900)]
drm/exynos: trigger build of all modules

Add COMPILE_TEST dependency to force exynos driver to
built for more than arm and to built modules
that otherwise required other symbols to be de-selected.

This will increase build coverage of the exynos driver
thus allowing most trivial build errors to be detected/fixed early.

This introduces one warning when built using sh:
exynos7_drm_decon.c: In function ‘decon_remove’:
exynos7_drm_decon.c:769:24: warning: unused variable ‘ctx’
  struct decon_context *ctx = dev_get_drvdata(&pdev->dev);

This is due to the definition of iounmap() in sh,
and nothing that exynos driver can fix.

Include fix of exynos build for alpha.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Inki Dae <inki.dae@samsung.com>
Cc: Joonyoung Shim <jy0922.shim@samsung.com>
Cc: Seung-Woo Kim <sw0312.kim@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Jingoo Han <jingoohan1@gmail.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2 years agodrm/exynos: drop drmP.h usage
Sam Ravnborg [Mon, 24 Jun 2019 13:06:28 +0000 (22:06 +0900)]
drm/exynos: drop drmP.h usage

Drop use of the deprecated drmP.h file.
Replace with forwards / externals as appropriate.

While touching the list of include files divide
them up in blocks and sort them.

v3:
- fix build errors in exynos_drm_g2d.c (Inki Dae)
  The exynos_drm_g2d.c file is not built in the
  standard configurations and was therefore missed.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Inki Dae <inki.dae@samsung.com>
Cc: Joonyoung Shim <jy0922.shim@samsung.com>
Cc: Seung-Woo Kim <sw0312.kim@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Jingoo Han <jingoohan1@gmail.com>
Fixed merge conflict.
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2 years agoMerge tag 'drm-next-5.3-2019-06-25' of git://people.freedesktop.org/~agd5f/linux...
Dave Airlie [Thu, 27 Jun 2019 02:33:56 +0000 (12:33 +1000)]
Merge tag 'drm-next-5.3-2019-06-25' of git://people.freedesktop.org/~agd5f/linux into drm-next

drm-next-5.3-2019-06-25:

Merge drm-next

amdgpu:
- SR-IOV L1 policy fixes
- Removed no longer needed vram_page_split module parameter
- Add module parameter to override default ABM level
- Gamma fixes
- No need to check return values for debugfs
- Improve HMM error handling
- Avoid possible OOM situations when lots of thread are submitting with
  memory contention
- Improve hw i2c access abritration
- DSC (Display Stream Compression) support in DC
- Initial navi10 support
  * DC support
  * GFX/Compute support
  * SDMA support
  * Power Management support
  * VCN support
- Static checker fixes
- Misc cleanups
- fix long udelay on arm

amdkfd:
- Implement priority controls for gfx9
- Enable VEGAM
- Rework mqd allocation and init
- Circular locking fix
- Fix SDMA queue allocation race condition
- No need to check return values for debugfs
- Add proc style process information
- Initial navi10 support

radeon:
- No need to check return values for debugfs

UAPI changes:
- GDDR6 added to vram type query
- New Navi10 details added gpu info query
- Navi family added to asic family query

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190625195520.3817-1-alexander.deucher@amd.com
2 years agoMerge tag 'for-airlie-tda998x' of git://git.armlinux.org.uk/~rmk/linux-arm into drm...
Dave Airlie [Thu, 27 Jun 2019 01:48:02 +0000 (11:48 +1000)]
Merge tag 'for-airlie-tda998x' of git://git.armlinux.org.uk/~rmk/linux-arm into drm-next

TDA998x updates:
- improve the driver's approach to audio, adding support for more I2S
  based formats, particularly other justifications, and preparing the
  driver to support other bclk ratios.

- add support for pixel repeated modes, tested with a Panasonic TV.

- correct the quantisation range handling; in particular, do not send
  full range RGB to the sink when the sink does not support full range
  RGB.

- Send the HDMI vendor info frame when required.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Russell King <rmk@armlinux.org.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190625125005.GA31503@rmk-PC.armlinux.org.uk
2 years agoMerge tag 'topic/remove-fbcon-notifiers-2019-06-26' into drm-misc-next-fixes
Maarten Lankhorst [Wed, 26 Jun 2019 10:26:34 +0000 (12:26 +0200)]
Merge tag 'topic/remove-fbcon-notifiers-2019-06-26' into drm-misc-next-fixes

topic/remove-fbcon-notifiers:
- Export fbcon_update_vcs to fix sh_mobile_lcdcfb.c compilation.
- Rely on fbcon being builtin when vgaswitcheroo is builtin.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7dd06ccb-7f8d-943b-bbc0-f4e58e041a23@linux.intel.com
2 years agoMerge remote-tracking branch 'drm/drm-next' into drm-misc-next-fixes
Maarten Lankhorst [Wed, 26 Jun 2019 10:22:54 +0000 (12:22 +0200)]
Merge remote-tracking branch 'drm/drm-next' into drm-misc-next-fixes

Some fixes have been accidentally pushed to this, so I cannot fost-forward.
Required to pull in the remove-fbcon-notifiers fixes.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
2 years agovga_switcheroo: Depend upon fbcon being built-in, if enabled
Daniel Vetter [Mon, 24 Jun 2019 09:21:53 +0000 (11:21 +0200)]
vga_switcheroo: Depend upon fbcon being built-in, if enabled

Fixes linking fail when fbcon/fbdev is modular and vgaswitcheroo is
enabled:

x86_64-linux-gnu-ld: drivers/gpu/vga/vga_switcheroo.o: in function `vga_switchto_stage2':
vga_switcheroo.c:(.text+0x997): undefined reference to `fbcon_remap_all'

Unfortunately this means that in a default allmodconfig we will disable vgaswitcheroo.

v2: I first tried to fix this with an EXPORT_SYMBOL, but vga_switcheroo is
never a module, so this doesn't work.

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Reported-by: kbuild test robot <lkp@intel.com>
Fixes: 1cd51b5d200d ("vgaswitcheroo: call fbcon_remap_all directly")
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Lukas Wunner <lukas@wunner.de>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: Sean Paul <sean@poorly.run>
Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Yisheng Xie <ysxie@foxmail.com>
Cc: linux-fbdev@vger.kernel.org
Cc: Daniel Thompson <daniel.thompson@linaro.org>
Cc: Lee Jones <lee.jones@linaro.org>
Cc: dri-devel@lists.freedesktop.org
Cc: linux-fbdev@vger.kernel.org
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190624092153.23375-1-daniel.vetter@ffwll.ch
2 years agodrm/amd/powerplay: make athub pg bit configured by pg_flags
Huang Rui [Fri, 14 Jun 2019 08:19:36 +0000 (16:19 +0800)]
drm/amd/powerplay: make athub pg bit configured by pg_flags

The athub pg features enabling should be indicated by pg_flags.

Reported-by: Lijo Lazar <Lijo.Lazar@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/powerplay: make mmhub pg bit configured by pg_flags
Huang Rui [Fri, 14 Jun 2019 08:12:51 +0000 (16:12 +0800)]
drm/amd/powerplay: make mmhub pg bit configured by pg_flags

The mmhub pg features enabling should be indicated by pg_flags.

Reported-by: Lijo Lazar <Lijo.Lazar@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/powerplay: add feature check in unforce_dpm_levels function (v2)
Kevin Wang [Mon, 17 Jun 2019 05:05:00 +0000 (13:05 +0800)]
drm/amd/powerplay: add feature check in unforce_dpm_levels function (v2)

if not check dpm feature is enabled, it will cause show smc send message
failed log in dmesg log.
eg:
echo "auto" > power_dpm_force_performance_level

v2: whitespace fix (Alex)

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Rui Teng <rui.teng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/powerplay: check gfxclk dpm enablement before proceeding
Evan Quan [Fri, 14 Jun 2019 09:04:36 +0000 (17:04 +0800)]
drm/amd/powerplay: check gfxclk dpm enablement before proceeding

Support gfxclk dpm disablement.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/powerplay: print smu versions only if version mismatch
Kevin Wang [Tue, 11 Jun 2019 07:21:06 +0000 (15:21 +0800)]
drm/amd/powerplay: print smu versions only if version mismatch

only printf smu version when if version not matched.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/powerplay: fix fan speed show error (for hwmon pwm)
Kevin Wang [Thu, 6 Jun 2019 09:12:34 +0000 (17:12 +0800)]
drm/amd/powerplay: fix fan speed show error (for hwmon pwm)

the navi asic can't get current rpm by MSG_GetCurrentRpm,
it will cause show fan rpm error, use Metrics_t to replace it.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: update infoframe after dig fe is turned on (v2)
Nicholas Kazlauskas [Mon, 24 Jun 2019 17:14:14 +0000 (13:14 -0400)]
drm/amd/display: update infoframe after dig fe is turned on (v2)

[Why]
The AVI infoframe is incorrectly programmed on DCN1/2 when enabling a
stream - causing the wrong pixel encoding to be used for display.

This is because the AVI infoframe is programmed before the DIG BE is
connected to the FE and turned on, so enabling the AFMT block doesn't
actually work and the registers subsequently can't be written to.

[How]
Program the infoframe *after* turning on the DIG FE. This was the
behavior previously used but it was incorrectly reverted
when adding the DCN2 HW sequencer code.

v2: Don't call update_info_frame twice

Fixes: 7ed4e6352c16fe01 ("drm/amd/display: Add DCN2 HW Sequencer and Resource")

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/powerplay:clean up the residual mutex for smu_hw_init
Prike Liang [Mon, 24 Jun 2019 09:25:26 +0000 (17:25 +0800)]
drm/amd/powerplay:clean up the residual mutex for smu_hw_init

The mutex for procting SMU during hw_init was removed as system
will be deadlock when smu_populate_umd_state_clk try get SMU mutex.
Therefore need remove the residual mutex from failed path.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/amdgpu: sdma_v4_0_start: initialize r
Ernst Sjöstrand [Mon, 24 Jun 2019 15:15:44 +0000 (17:15 +0200)]
drm/amd/amdgpu: sdma_v4_0_start: initialize r

Reported by smatch:
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c:1167 sdma_v4_0_start() error: uninitialized symbol 'r'.

Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/amdgpu: Fix style issues in dcn20_resource.c
Ernst Sjöstrand [Mon, 24 Jun 2019 15:15:43 +0000 (17:15 +0200)]
drm/amd/amdgpu: Fix style issues in dcn20_resource.c

Inconsistent indentation and mixed use of brackets.

Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/amdgpu: Check stream in amdgpu_dm_commit_planes
Ernst Sjöstrand [Mon, 24 Jun 2019 15:15:42 +0000 (17:15 +0200)]
drm/amd/amdgpu: Check stream in amdgpu_dm_commit_planes

Reported by smatch:
amdgpu_dm.c:5637 amdgpu_dm_commit_planes() error: we previously assumed 'acrtc_state->stream' could be null
This seems to be checked for null pretty consistently elsewhere.

Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/amdgpu: amdgpu_hwmon_show_temp: initialize temp
Ernst Sjöstrand [Mon, 24 Jun 2019 15:15:41 +0000 (17:15 +0200)]
drm/amd/amdgpu: amdgpu_hwmon_show_temp: initialize temp

Reported by smatch:
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c:1496 amdgpu_hwmon_show_temp() error: uninitialized symbol 'temp'.

Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/amdgpu: Fix amdgpu_set_pp_od_clk_voltage error check
Ernst Sjöstrand [Mon, 24 Jun 2019 15:15:40 +0000 (17:15 +0200)]
drm/amd/amdgpu: Fix amdgpu_set_pp_od_clk_voltage error check

Reported by smatch:
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c:693 amdgpu_set_pp_od_clk_voltage() error: uninitialized symbol 'ret'.

Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/amdgpu: Indent AMD_IS_APU properly
Ernst Sjöstrand [Mon, 24 Jun 2019 15:15:39 +0000 (17:15 +0200)]
drm/amd/amdgpu: Indent AMD_IS_APU properly

Reported by smatch:
drivers/gpu/drm/amd/amdgpu/soc15.c:715 soc15_get_pcie_usage() warn: inconsistent indenting
And a similar one in si.c.

Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu/display: drop ifdefs around comments
Alex Deucher [Mon, 24 Jun 2019 15:13:56 +0000 (10:13 -0500)]
drm/amdgpu/display: drop ifdefs around comments

No need to protect the comments.  The DCN1_01 config
was dopped anyway.  Got accidently brought back with the
navi merge.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu/display: switch udelay to msleep
Alex Deucher [Tue, 25 Jun 2019 13:54:21 +0000 (08:54 -0500)]
drm/amdgpu/display: switch udelay to msleep

We may need to sleep for up to 80ms
(8ms per each of up to 10 loop iterations):

/* First DPCD read after VDD ON can fail if the particular board
 * does not have HPD pin wired correctly. So if DPCD read fails,
 * which it should never happen, retry a few times. Target worst
 * case scenario of 80 ms.
 */

Switch udelay to msleep to avoid limits on arm.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu/powerplay: FEATURE_MASK is 64 bit so use ULL
Alex Deucher [Tue, 25 Jun 2019 13:48:15 +0000 (08:48 -0500)]
drm/amdgpu/powerplay: FEATURE_MASK is 64 bit so use ULL

ULL is needed for 32 bit arches.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agoMerge branch 'drm-next' into drm-next-5.3
Alex Deucher [Tue, 25 Jun 2019 13:42:25 +0000 (08:42 -0500)]
Merge branch 'drm-next' into drm-next-5.3

Backmerge drm-next and fix up conflicts due to drmP.h removal.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/msm: add dirty framebuffer helper
Brian Masney [Fri, 31 May 2019 09:46:14 +0000 (05:46 -0400)]
drm/msm: add dirty framebuffer helper

Use drm_atomic_helper_dirtyfb() as the dirty callback in the
msm_framebuffer_funcs struct. Call drm_plane_enable_fb_damage_clips()
when the planes are initialized in mdp4, mdp5, and dpu1.

Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2 years agodrm/edid: use for_each_displayid_db where applicable
Andres Rodriguez [Wed, 19 Jun 2019 18:30:33 +0000 (14:30 -0400)]
drm/edid: use for_each_displayid_db where applicable

Replace the duplicated versions of the while loop with the new macro.

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190619183033.6922-1-andresx7@gmail.com
2 years agodrm/edid: parse CEA blocks embedded in DisplayID
Andres Rodriguez [Wed, 19 Jun 2019 18:09:01 +0000 (14:09 -0400)]
drm/edid: parse CEA blocks embedded in DisplayID

DisplayID blocks allow embedding of CEA blocks. The payloads are
identical to traditional top level CEA extension blocks, but the header
is slightly different.

This change allows the CEA parser to find a CEA block inside a DisplayID
block. Additionally, it adds support for parsing the embedded CTA
header. No further changes are necessary due to payload parity.

This change fixes audio support for the Valve Index HMD.

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: <stable@vger.kernel.org> # v4.15
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190619180901.17901-1-andresx7@gmail.com
2 years agoMerge tag 'drm/tegra/for-5.3-rc1' of git://anongit.freedesktop.org/tegra/linux into...
Dave Airlie [Tue, 25 Jun 2019 02:59:35 +0000 (12:59 +1000)]
Merge tag 'drm/tegra/for-5.3-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Changes for v5.3-rc1

This contains a couple of small improvements and cleanups for the Tegra
DRM driver.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Thierry Reding <thierry.reding@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190621150753.19550-1-thierry.reding@gmail.com
2 years agoMerge commit 'refs/for-upstream/mali-dp' of git://linux-arm.org/linux-ld into drm...
Dave Airlie [Tue, 25 Jun 2019 02:49:08 +0000 (12:49 +1000)]
Merge commit 'refs/for-upstream/mali-dp' of git://linux-arm.org/linux-ld into drm-next

Picking up pace on the upstreaming of Komeda driver, with quite a lot
of new features added this time. On top of that we have the small
cleanups and improved usage of the debugfs functions. Please pull!

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Liviu Dudau <Liviu.Dudau@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190621095349.GI17204@e110455-lin.cambridge.arm.com
2 years agodrm/msm/a3xx: remove TPL1 regs from snapshot
Rob Clark [Mon, 24 Jun 2019 16:09:47 +0000 (09:09 -0700)]
drm/msm/a3xx: remove TPL1 regs from snapshot

These regs are write-only, and the hw throws a hissy-fit (ie. reboots)
when we try to read them for GPU state snapshot, in response to a GPU
hang.  It is rather impolite when GPU recovery triggers an insta-
reboot, so lets remove the TPL1 registers from the snapshot.

Fixes: 7198e6b03155 drm/msm: add a3xx gpu support
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
2 years agodrm/amdgpu: disable gfxoff on navi10
tiancyin [Thu, 20 Jun 2019 06:56:17 +0000 (14:56 +0800)]
drm/amdgpu: disable gfxoff on navi10

The gfxoff brings unstability, disable it by default

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: tiancyin <tianci.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: fix modprobe failure for uvd_4/5/6
Hawking Zhang [Mon, 24 Jun 2019 11:26:00 +0000 (19:26 +0800)]
drm/amdgpu: fix modprobe failure for uvd_4/5/6

For uvd_4/5/6, amdgpu driver will only power on them when
there are jobs assigned to decode/enc rings.uvd_4/5/6 dpm was broken
since amdgpu_dpm_set_powergating_by_smu only covers gfx block.

The change would add more IP block support in amdgpu_dpm_set_powergating_by_smu
For GFX/UVD/VCN/VCE, if the new SMU driver is supported, invoke new
power gate helper function smu_dpm_set_power_gate, otherwise, fallback to
legacy powerplay helper function pp_set_powergating_by_smu. For other IP blocks
always invoke legacy powerplay helper function.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tianci Yin <tianci.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: drop unused df init callback
Alex Deucher [Fri, 21 Jun 2019 21:32:25 +0000 (16:32 -0500)]
drm/amdgpu: drop unused df init callback

It was replaced with the sw_init callback so is no longer
needed.

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: add sw_init to df_v1_7
Jonathan Kim [Fri, 21 Jun 2019 02:23:35 +0000 (22:23 -0400)]
drm/amdgpu:  add sw_init to df_v1_7

change df_init to df_sw_init df 1.7 to prevent regression issues on pre-vega20
products when callback is called in sw_common_sw_init.

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: Set gws_mask to 64 bit 1s
Oak Zeng [Fri, 14 Jun 2019 15:55:50 +0000 (10:55 -0500)]
drm/amdkfd: Set gws_mask to 64 bit 1s

Previous kfd doesn't use gws so this mask was set to 0.
Set it to 64 bit 1s because now kfd can use all 64 gws
resources.

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display/dc: set num-dwb = 1 as navi10 asic cap
hersen wu [Thu, 23 May 2019 22:49:39 +0000 (18:49 -0400)]
drm/amd/display/dc: set num-dwb = 1 as navi10 asic cap

during navi10 bring up, dwb causes system hang.
to continue debug major issue, disable dwb by
set num-dwb = 0. the hang issue is not reproduced now
by enable num-dwb =1. dc source is shared by all os.
win needs num-dwb = 1.

Signed-off-by: hersen wu <hersenxs.wu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: make clk_mgr call enable_pme_wa
Su Sung Chung [Thu, 30 May 2019 18:59:03 +0000 (14:59 -0400)]
drm/amd/display: make clk_mgr call enable_pme_wa

[why]
Before for raven and navi we are calling pp_smu functions for pme

[how]
refactor a code so we will call clk_mgr's enable_pme_wa function so we
can use pme_wa for future asics. This way we don't need to worry about
different ASIC since clk_mgr already have that information

Signed-off-by: Su Sung Chung <Su.Chung@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: expose dentist_get_did_from_divider
Charlene Liu [Tue, 28 May 2019 23:44:32 +0000 (19:44 -0400)]
drm/amd/display: expose dentist_get_did_from_divider

for future use

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: add missing mod_vmid destructor
Dmytro Laktyushkin [Wed, 29 May 2019 15:24:35 +0000 (11:24 -0400)]
drm/amd/display: add missing mod_vmid destructor

mod_vmid is missing a destructor.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Add Underflow Asserts to dc
Thomas Lim [Mon, 29 Apr 2019 20:05:42 +0000 (16:05 -0400)]
drm/amd/display: Add Underflow Asserts to dc

[Why]
For debugging underflow issues it can be useful to have asserts when the
underflow initially occurs.

[How]
Read the underflow status registers after actions that have a high risk
of causing underflow and assert that no underflow occurred. If underflow
occurred, clear the bit.

Signed-off-by: Thomas Lim <Thomas.Lim@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: move vmid determination logic to a module
Dmytro Laktyushkin [Wed, 22 May 2019 22:05:41 +0000 (18:05 -0400)]
drm/amd/display: move vmid determination logic to a module

Currently vmid is decided internally inside dc. With the introduction
of new asics we are required to coordinate vmid use with external
components.

This change converts vmid logic to a DAL module allowing vmid to be
passed in as a parameter to DC.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: dcn2 use fixed clocks.
Charlene Liu [Tue, 28 May 2019 17:52:09 +0000 (13:52 -0400)]
drm/amd/display: dcn2 use fixed clocks.

[Description]
dcn2 use fixed clocks and not program DPP CLK or Disp_CLK.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: add p010 and ayuv plane caps
Charlene Liu [Wed, 22 May 2019 22:25:33 +0000 (18:25 -0400)]
drm/amd/display: add p010 and ayuv plane caps

for future use

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Chris Park <Chris.Park@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: update DCN2 uclk switch time
Jun Lei [Mon, 27 May 2019 18:15:27 +0000 (14:15 -0400)]
drm/amd/display: update DCN2 uclk switch time

[why]
value commited to by HW team is going to be higher
than pre-silicon, and will cause underflow if driver not
updated

[how]
update hardcoded value, update pstate switching logic
to fix case where with long uclk time we won't allow switch
even when we should

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Rework CRTC color management
Nicholas Kazlauskas [Thu, 9 May 2019 16:14:58 +0000 (12:14 -0400)]
drm/amd/display: Rework CRTC color management

[Why]
To prepare for the upcoming DRM plane color management properties
we need to correct a lot of wrong behavior and assumptions made for
CRTC color management.

The documentation added by this commit in amdgpu_dm_color explains
how the HW color pipeline works and its limitations with the DRM
interface.

The current implementation does the following wrong:
- Implicit sRGB DGM when no CRTC DGM is set
- Implicit sRGB RGM when no CRTC RGM is set
- No way to specify a non-linear DGM matrix that produces correct output
- No way to specify a correct RGM when a linear DGM is used

We had workarounds for passing kms_color tests but not all of the
behavior we had wrong was covered by these tests (especially when
it comes to non-linear DGM). Testing both DGM and RGM at the same time
isn't something kms_color tests well either.

[How]
The specifics for how color management works in AMDGPU and the new
behavior can be found by reading the documentation added to
amdgpu_dm_color.c from this patch.

All of the incorrect cases from the old implementation have been
addressed for the atomic interface, but there still a few TODOs for
the legacy one.

Note: this does cause regressions for kms_color@pipe-a-ctm-* over HDMI.

The result looks correct from visual inspection but the CRC no longer
matches. For reference, the test was previously doing the following:

linear degamma -> CTM -> sRGB regamma -> RGB to YUV (709) -> ...

Now the test is doing:

linear degamma -> CTM -> linear regamma -> RGB to YUV (709) -> ...

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Use macro for invalid OPP ID
Wesley Chalmers [Thu, 23 May 2019 15:54:12 +0000 (11:54 -0400)]
drm/amd/display: Use macro for invalid OPP ID

[WHY]
This is meant to make it clearer that 0xf is not a valid OPP ID, and
that code making use of OPP IDs should not accept this value.

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: expose enable dp output functions
Eric Bernstein [Thu, 16 May 2019 22:00:05 +0000 (18:00 -0400)]
drm/amd/display: expose enable dp output functions

expose this function for future use

Implementation of DCN3 DIO Link Encoder including
dpcs register headers.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: add dwb stere caps and version
Charlene Liu [Tue, 21 May 2019 17:32:02 +0000 (13:32 -0400)]
drm/amd/display: add dwb stere caps and version

add dwb stereo caps and ver for future use

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Alpha plane type
Eric Bernstein [Wed, 22 May 2019 15:30:41 +0000 (11:30 -0400)]
drm/amd/display: Alpha plane type

Add Alpha surface type for future use

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: making DCN20 WM table non-overlapping
Jun Lei [Wed, 22 May 2019 17:20:34 +0000 (13:20 -0400)]
drm/amd/display: making DCN20 WM table non-overlapping

[why]
Existing behavior has overlapping ranges resulting in path
dependent SMU selection

[how]
Make ranges non-overlapping, resulting in non-path dependent
selection

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: update dsc max_target_bpp to 16 bpp
Wenjing Liu [Wed, 22 May 2019 15:50:20 +0000 (11:50 -0400)]
drm/amd/display: update dsc max_target_bpp to 16 bpp

[why]
According to the latest specs, the max_target bpp sink
can support is 16 bpp.

[how]
update dsc max_target_bpp to 16

Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: add some parameters to validate bandwidth functions
Charlene Liu [Mon, 3 Jun 2019 14:53:44 +0000 (10:53 -0400)]
drm/amd/display: add some parameters to validate bandwidth functions

required for new checks.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: update DSC MST DP virtual DPCD peer device enumeration policy
Wenjing Liu [Thu, 16 May 2019 17:01:51 +0000 (13:01 -0400)]
drm/amd/display: update DSC MST DP virtual DPCD peer device enumeration policy

[why]
Current policy assumes virtual DPCD peer device as
an individual MST branch device with 1 input and 1 output.
However this is only true for virtual DP-to-DP peer device.
In general there are three types of virtual DP peer devices.
1. Sink peer device with virtual DPCD.
2. Virtual DP-to-DP Peer device with virtual DPCD.
3. Virtual DP-to-HDMI Protocol Converter Peer Device with
Virtual DPCD.
So we should break the assumption and handle all three types.

[how]
DP-to-DP peer device will have virtual DPCD cap upstream.
Sink peer device will have virtual DPCD on the logical port.
Dp to HDMI protocol converter peer device will have virtual DPCD
on its converter port.
For DSC capable Synaptics non VGA port we workaround by enumerating
a virutal DPCD peer device on its upstream
even if it doesn't have one.

Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: add support for forcing DCFCLK without affecting watermarks
Jun Lei [Fri, 17 May 2019 15:08:02 +0000 (11:08 -0400)]
drm/amd/display: add support for forcing DCFCLK without affecting watermarks

[why]
useful for debugging

[how]
plumb a debug option in dc

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Copy stream updates onto streams
Nicholas Kazlauskas [Tue, 14 May 2019 13:19:01 +0000 (09:19 -0400)]
drm/amd/display: Copy stream updates onto streams

[Why]
Almost every function in DC that works with stream state expects that
the current state on the stream is the one that it should be writing
out. These functions are typically triggered by specifying a particular
stream update - but the actual contents of the stream update itself
are ignored, leaving it to the DM to actually update the stream state
itself.

The problem with doing this in DM is a matter of timing. On Linux
most of this is incorrectly done in atomic check, when we actually want
it to be done during atomic commit tail while access to DC is locked.

To give an example, a commit requesting to modify color management
state for DM could come in, be rejected, but still have modified
the actual system state for the stream since it's shared memory. The
next time color management gets programmed it'll use the rejected
color management info - which might not even still be around if it's
a custom transfer function.

So a reasonable place to perform this is within DC itself and this is
the model that's currently in use for surface updates. DC can even
compare the current system state to the incoming surface update to
determine update level, something that can't currnetly be done with the
framework for stream updates.

[How]
Duplicate the framework used for surface updates for stream updates
as well. Copy all the updates after checking the update type.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Fix incorrect vba type
Ilya Bakoulin [Thu, 16 May 2019 18:33:14 +0000 (14:33 -0400)]
drm/amd/display: Fix incorrect vba type

SwathWidthCThisState is expected to be an unsigned int array.

Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: removing MODULO change for dcn2
Martin Leung [Wed, 15 May 2019 19:50:51 +0000 (15:50 -0400)]
drm/amd/display: removing MODULO change for dcn2

[why]
when resetting pipes from 480p to dual-pipe 8k, modulo reg write for
video optimized rate updated one pipe without changing the other, causing
sync error

[how]
removed code from dcn2

Signed-off-by: Martin Leung <martin.leung@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Fix incorrect DML output_bpp value
Ilya Bakoulin [Fri, 3 May 2019 21:22:32 +0000 (17:22 -0400)]
drm/amd/display: Fix incorrect DML output_bpp value

[Why]
The output_bpp pipe parameter was assigned an incorrect value
(color depth enum), and subsequently used to overwrite
the OutputBpp parameter calculated by DML. Seems like this had no
effect except with DSC enabled, which would make DML produce
bad outputs.

[How]
Removed assignment to OutputBpp, fixed output_bpp assignment,
and properly set ForcedOutputLinkBPP instead of OutputBpp.
Also removed condition in DML that prevented forcing of
Output BPP with DSC enabled.

Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Add missing VM conversion from hw values
Jun Lei [Mon, 13 May 2019 19:09:13 +0000 (15:09 -0400)]
drm/amd/display: Add missing VM conversion from hw values

[why]
VM implemenation is missing conversion from HW values in hubbub
DM not passing actual PTB during flip

[how]
add proper HW conversion from logical values
fix cases where we programmed VA even though we are in PA
plumb in PTB from DM

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Drive-by fixes for display_mode_vba
Ilya Bakoulin [Fri, 3 May 2019 16:59:35 +0000 (12:59 -0400)]
drm/amd/display: Drive-by fixes for display_mode_vba

Fixes for the following:
- Incorrect pointer type (unsigned int instead of double)
- Incorrect DSC number of slices setting

Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Enable DSC power-gating for DSC streams
Nikola Cornij [Wed, 8 May 2019 18:36:03 +0000 (14:36 -0400)]
drm/amd/display: Enable DSC power-gating for DSC streams

[why]
Currently DSC power gating is disabled by default because the power
transition doesn't happen, causing a crash on some systems

[how]
Fix the lack of power state transition and enable DSC power gating
by default.

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Return UPDATE_TYPE_FULL on writeback update
Charlene Liu [Wed, 8 May 2019 17:29:09 +0000 (13:29 -0400)]
drm/amd/display: Return UPDATE_TYPE_FULL on writeback update

Should do full update when display writeback is updated.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Duke Du <Duke.Du@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: decouple dsc adjustment out of enablement
Wenjing Liu [Mon, 6 May 2019 18:22:39 +0000 (14:22 -0400)]
drm/amd/display: decouple dsc adjustment out of enablement

[why]
dsc adjustment is allowed via stream update sequence.
dsc enablement is only allowed via commit stream sequence.
with the current unified dsc set function, it is hard
to determine which sequence it is called by.
The solution is to decouple dsc adjustment out of enablement
sequence so we can handle them separately.

[how]
decouple dsc adjustment out of enablement.

Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: always use 4 dp lanes for dml
Jun Lei [Fri, 3 May 2019 19:59:54 +0000 (15:59 -0400)]
drm/amd/display: always use 4 dp lanes for dml

[why]
current DML logic uses currently trained setting for number
of dp lanes in DML calculations.  this is obviously flawed since
just because 1 lane is in use doesn't mean only 1 lane can be used

this causes mode validation to fail depending on current state,
which is incorrect

[how]
DML should always assume 4 lanes are available.  validation of
bandwidth is not supposed to be handled by DML, since we do
link validation without DML already

also, DML is expecting there to be a copy of the max state, this
state is removed when update_bounding_box is called to update
actual SKU clocks.  fix this as well by duping last state.

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Eric Yang <eric.yang2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Use DCN2 functions instead of DCE
Wesley Chalmers [Wed, 24 Apr 2019 19:29:06 +0000 (15:29 -0400)]
drm/amd/display: Use DCN2 functions instead of DCE

[WHY]
DCN code should make as few references to DCE as possible

[HOW]
Copy DCE110 implementation of find_first_free_match_stream_enc_for_link
into DCN10

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: DCN2 Engine-specifc encoder allocation
Wesley Chalmers [Wed, 24 Apr 2019 19:25:41 +0000 (15:25 -0400)]
drm/amd/display: DCN2 Engine-specifc encoder allocation

[WHY]
From DCE110 onward, we have the ability to assign DIG BE and FE
separately for any display connector type; before, we could only do this
for DP.

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Disable DSC power gating in Diags
Nikola Cornij [Tue, 30 Apr 2019 21:54:31 +0000 (17:54 -0400)]
drm/amd/display: Disable DSC power gating in Diags

[why]
With DSC power gating enabled, one of the register reads times out occasionally,
causing a DSC test to fail.

[how]
Disable DSC power gating in Diags.
NOTE: This has to be reverted once the problems with DSC power gating are
resolved.

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Set test pattern on blank when using Visual Confirm
Joshua Aberback [Mon, 29 Apr 2019 21:27:12 +0000 (17:27 -0400)]
drm/amd/display: Set test pattern on blank when using Visual Confirm

[Why]
We want a test pattern to show up on screen when we're blanked and have
visual confirm enabled, for debugging. Raven does this, it's a mistake that
Navi does not.

[How]
 - in "blank_pixel_data", set appropriate DPG pattern for visual confirm
 - refactor DPG calls out of "enable_stream_timing"

Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: add null checks and set update flags for DCN2
Dmytro Laktyushkin [Mon, 8 Apr 2019 18:56:29 +0000 (14:56 -0400)]
drm/amd/display: add null checks and set update flags for DCN2

* add plane state null checks
* add and set update surface flags

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: move DWB structs and enums to dc_hw_types
Tyler DiBattista [Mon, 8 Apr 2019 17:30:07 +0000 (13:30 -0400)]
drm/amd/display: move DWB structs and enums to dc_hw_types

[Why]
these enums/structs will be used more generically in the future
so moving it to dc_hw_types and dc_types

Signed-off-by: Tyler DiBattista <tyler.dibattista@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Integrate color transform3x4 with 3dlut tm
Vitaly Prosyak [Thu, 18 Apr 2019 14:51:12 +0000 (09:51 -0500)]
drm/amd/display: Integrate color transform3x4 with 3dlut tm

[Why & How]
Reuse existent code path (dcn1+) and in order to do that apply de gamma
in 1D blender LUT and re use MPC OGAM.
Follow up is required.

Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Vitaly Prosyak <Vitaly.Prosyak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: used optimum VSTARTUP instead of MaxVStartup
Charlene Liu [Fri, 26 Apr 2019 04:29:13 +0000 (00:29 -0400)]
drm/amd/display: used optimum VSTARTUP instead of MaxVStartup

[Description]
Features that are desirable for minimizing the Global Sync Period:
DRR and lateflip

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: add dsc_passthrough_support bit in dpcd struct
Wenjing Liu [Thu, 25 Apr 2019 20:24:13 +0000 (16:24 -0400)]
drm/amd/display: add dsc_passthrough_support bit in dpcd struct

Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: fix a potential issue in DSC logic
Wenjing Liu [Thu, 25 Apr 2019 16:11:50 +0000 (12:11 -0400)]
drm/amd/display: fix a potential issue in DSC logic

[why]
In compute dsc bandwidth range there is an uninitialized variable

[how]
Initialize the variable to the correct value.

Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Expose send immediate sdp message interface
Leo (Hanghong) Ma [Tue, 16 Apr 2019 15:07:22 +0000 (11:07 -0400)]
drm/amd/display: Expose send immediate sdp message interface

[Why]
To send sdp message immediately from a single slot.

[How]
Modify the generic SDP message interface, and use GSP4 to send immediate
sdp message.

Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Fix LB BPP and Cursor width
Ilya Bakoulin [Wed, 17 Apr 2019 18:48:25 +0000 (14:48 -0400)]
drm/amd/display: Fix LB BPP and Cursor width

DCN2.0 LB BPP should be 48 or 16BPC and max cursor width should be 256.

Also use populate_dml_pipes as functions pointer instead of using it directly

Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: fix macro_tile_size for tiling
Dmytro Laktyushkin [Mon, 22 Apr 2019 19:38:09 +0000 (15:38 -0400)]
drm/amd/display: fix macro_tile_size for tiling

A regression was introduced when we set correct tile size
for the gfx9 swizzle mode. This resulted in incorrect
macro tile size.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Remove OPP clock programming on plane disable
Joshua Aberback [Tue, 23 Apr 2019 20:50:50 +0000 (16:50 -0400)]
drm/amd/display: Remove OPP clock programming on plane disable

[Why]
Plane disable gets calls when we enable blank. On DCN2, we blank by using
DPG to display a black colour instead of using OTG blank. DPG runs off the
OPP clock, therefore we shouldn't disable the OPP clock when disabling the
plane. We do need to disable the OPP clock when disabling the entire pipe,
that will be addressed in a separate commit.

Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: fix odm mpo disable
Dmytro Laktyushkin [Tue, 23 Apr 2019 20:02:45 +0000 (16:02 -0400)]
drm/amd/display: fix odm mpo disable

It looks like mpo isn't properly disabled during odm, this change is
meant to fix that.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: [backport] dwb dm + efc support
Charlene Liu [Wed, 17 Apr 2019 23:15:15 +0000 (19:15 -0400)]
drm/amd/display: [backport] dwb dm + efc support

dwb fixes.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Duke Du <Duke.Du@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>