sfrench/cifs-2.6.git
2 years agoMerge tag 'drm/tegra/for-4.21-rc1' of git://anongit.freedesktop.org/tegra/linux into...
Dave Airlie [Thu, 13 Dec 2018 00:16:09 +0000 (10:16 +1000)]
Merge tag 'drm/tegra/for-4.21-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next

drm/tegra: Changes for v4.21-rc1

These changes contain a couple of minor fixes for host1x and the Falcon
library in Tegra DRM. There are also a couple of missing pieces that
finally enable support for host1x, VIC and display on Tegra194. I've
also added a patch that enables audio over HDMI using the SOR which has
been tested, and works, on both Tegra186 and Tegra194.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Thierry Reding <thierry.reding@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181207134712.32683-1-thierry.reding@gmail.com
2 years agoMerge branch 'drm-next-4.21' of git://people.freedesktop.org/~agd5f/linux into drm...
Dave Airlie [Wed, 12 Dec 2018 23:49:04 +0000 (09:49 +1000)]
Merge branch 'drm-next-4.21' of git://people.freedesktop.org/~agd5f/linux into drm-next

[airlied: make etnaviv build again]

amdgpu:
- DC trace support
- More DC documentation
- XGMI hive reset support
- Rework IH interaction with KFD
- Misc fixes and cleanups
- Powerplay updates for newer polaris variants
- Add cursor plane update fast path
- Enable gpu reset by default on CI parts
- Fix config with KFD/HSA not enabled

amdkfd:
- Limit vram overcommit
- dmabuf support
- Support for doorbell BOs

ttm:
- Support for simultaneous submissions to multiple engines

scheduler:
- Add helpers for hw with preemption support

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181207233119.16861-1-alexander.deucher@amd.com
2 years agodrm/amd/display: Add fast path for cursor plane updates
Nicholas Kazlauskas [Wed, 5 Dec 2018 19:59:07 +0000 (14:59 -0500)]
drm/amd/display: Add fast path for cursor plane updates

[Why]
Legacy cursor plane updates from drm helpers go through the full
atomic codepath. A high volume of cursor updates through this slow
code path can cause subsequent page-flips to skip vblank intervals
since each individual update is slow.

This problem is particularly noticeable for the compton compositor.

[How]
A fast path for cursor plane updates is added by using DRM asynchronous
commit support provided by async_check and async_update. These don't do
a full state/flip_done dependency stall and they don't block other
commit work.

However, DC still expects itself to be single-threaded for anything
that can issue register writes. Screen corruption or hangs can occur
if write sequences overlap. Every call that potentially perform
register writes needs to be guarded for asynchronous updates to work.
The dc_lock mutex was added for this.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106175

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: Enable GPU recovery by default for CI
Andrey Grodzovsky [Tue, 11 Dec 2018 20:31:35 +0000 (15:31 -0500)]
drm/amdgpu: Enable GPU recovery by default for CI

I retested Bonaire (gfx7 dGPU) and it works fine.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Fix duplicating scaling/underscan connector state
Nicholas Kazlauskas [Fri, 7 Dec 2018 15:07:09 +0000 (10:07 -0500)]
drm/amd/display: Fix duplicating scaling/underscan connector state

[Why]
These properties aren't being carried over when the atomic state.
This tricks atomic check and commit tail into performing underscan
and scaling operations when they aren't needed.

With the patch that forced scaling/RMX_ASPECT on by default this
results in many unnecessary surface updates and hangs under certain
conditions.

[How]
Duplicate the properties.

Fixes: 91b66c47ba34 ("drm/amd/display: Set RMX_ASPECT as default")

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Fix unintialized max_bpc state values
Nicholas Kazlauskas [Wed, 28 Nov 2018 21:17:50 +0000 (16:17 -0500)]
drm/amd/display: Fix unintialized max_bpc state values

[Why]
If the "max bpc" isn't explicitly set in the atomic state then it
have a value of 0. This has the correct behavior of limiting a panel
to 8bpc in the case where the panel supports 8bpc. In the case of eDP
panels this isn't a true assumption - there are panels that can only
do 6bpc.

Banding occurs for these displays.

[How]
Initialize the max_bpc when the connector resets to 8bpc. Also carry
over the value when the state is duplicated.

Bugzilla: https://bugs.freedesktop.org/108825
Fixes: 307638884f72 ("drm/amd/display: Support amdgpu "max bpc" connector property")

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agoRevert "drm/amd/display: Set RMX_ASPECT as default"
Nicholas Kazlauskas [Fri, 7 Dec 2018 17:15:01 +0000 (12:15 -0500)]
Revert "drm/amd/display: Set RMX_ASPECT as default"

This reverts commit 91b66c47ba3468f7882ea4a84d5e0e0c186b638f.

Forcing RMX_ASPECT as default uses the preferred/native mode's timings
for any mode the user selects and scales the image. This provides a
a consistently nicer result in the case where the selected mode's
refresh rate matches the native mode's refresh but this isn't always
the case.

For example, if the monitor is 1080p@144Hz and the preferred mode is
60Hz then even if the user selects 1080p@144Hz as their selected mode
they'll get 1080p@60Hz.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: Fix stub function name
Kuehling, Felix [Mon, 10 Dec 2018 21:29:00 +0000 (21:29 +0000)]
drm/amdgpu: Fix stub function name

This function was renamed in a previous commit. Update the stub
function name for builds with CONFIG_HSA_AMD disabled.

Fixes: 611736d8447c ("drm/amdgpu: Add KFD VRAM limit checking")
Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu/powerplay: Add special avfs cases for some polaris asics (v3)
Alex Deucher [Thu, 6 Dec 2018 15:41:27 +0000 (10:41 -0500)]
drm/amdgpu/powerplay: Add special avfs cases for some polaris asics (v3)

Add special avfs handling for some polaris variants.

v2: fix copy paste typo.
v3: fix asic rid check

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: remove set but not used variable 'grbm_soft_reset'
YueHaibing [Sat, 8 Dec 2018 15:01:13 +0000 (15:01 +0000)]
drm/amdgpu: remove set but not used variable 'grbm_soft_reset'

Fixes gcc '-Wunused-but-set-variable' warning:

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c: In function 'gfx_v8_0_pre_soft_reset':
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c:4950:27: warning:
 variable 'srbm_soft_reset' set but not used [-Wunused-but-set-variable]

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c: In function 'gfx_v8_0_post_soft_reset':
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c:5054:27: warning:
 variable 'srbm_soft_reset' set but not used [-Wunused-but-set-variable]

It never used since introduction in commit d31a501ead7f ("drm/amdgpu: add
pre_soft_reset ip func") and e4ae0fc33631 ("drm/amdgpu: implement
gfx8 post_soft_reset")

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: Limit vm max ctx number to 4096
Rex Zhu [Wed, 24 Oct 2018 08:10:33 +0000 (16:10 +0800)]
drm/amdgpu: Limit vm max ctx number to 4096

driver need to reserve resource for each ctx for
some hw features. so add this limitation.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: bypass RLC init under sriov for Tonga (v2)
Tiecheng Zhou [Fri, 7 Dec 2018 01:11:35 +0000 (09:11 +0800)]
drm/amdgpu: bypass RLC init under sriov for Tonga (v2)

RLC will go wrong in soft_reset under sriov

Workaroound: only need to init RLC csb, and skip RLC stop, reset, start
    this is because host-driver has already done full initialization on RLC

v2: squash in build fix

Signed-off-by: Tiecehng Zhou <Tiecheng.Zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: move IV prescreening into the GMC code
Christian König [Wed, 26 Sep 2018 09:50:09 +0000 (11:50 +0200)]
drm/amdgpu: move IV prescreening into the GMC code

The GMC/VM subsystem is causing the faults, so move the handling here as
well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: remove VM fault_credit handling
Christian König [Wed, 26 Sep 2018 09:15:36 +0000 (11:15 +0200)]
drm/amdgpu: remove VM fault_credit handling

printk_ratelimit() is much better suited to limit the number of reported
VM faults.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: send IVs to the KFD only after processing them v3
Christian König [Wed, 26 Sep 2018 09:08:32 +0000 (11:08 +0200)]
drm/amdgpu: send IVs to the KFD only after processing them v3

This allows us to filter out VM faults in the GMC code.

v2: don't filter out all faults
v3: fix copy&paste typo, send all IV to the KFD, don't change message level

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: Add support for doorbell BOs
Felix Kuehling [Wed, 21 Nov 2018 02:44:27 +0000 (21:44 -0500)]
drm/amdkfd: Add support for doorbell BOs

This allows user mode to map doorbell pages into GPUVM address space.
That way GPUs can submit to user mode queues (self-dispatch).

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: Add DMABuf import functionality
Felix Kuehling [Wed, 21 Nov 2018 02:00:29 +0000 (21:00 -0500)]
drm/amdkfd: Add DMABuf import functionality

This is used for interoperability between ROCm compute and graphics
APIs. It allows importing graphics driver BOs into the ROCm SVM
address space for zero-copy GPU access.

The API is split into two steps (query and import) to allow user mode
to manage the virtual address space allocation for the imported buffer.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: Add NULL-pointer check
Felix Kuehling [Wed, 21 Nov 2018 01:52:37 +0000 (20:52 -0500)]
drm/amdkfd: Add NULL-pointer check

top_dev->gpu is NULL for CPUs. Avoid dereferencing it if NULL.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: Add KFD VRAM limit checking
Felix Kuehling [Tue, 20 Nov 2018 01:05:54 +0000 (20:05 -0500)]
drm/amdgpu: Add KFD VRAM limit checking

We don't want KFD processes evicting each other over VRAM usage.
Therefore prevent overcommitting VRAM among KFD applications with
a per-GPU limit. Also leave enough room for page tables on top
of the application memory usage.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: Workaround build failure due to trace conflict
Kuehling, Felix [Fri, 7 Dec 2018 22:07:20 +0000 (22:07 +0000)]
drm/amdgpu: Workaround build failure due to trace conflict

Avoid including mmu_context.h in amdgpu_amdkfd.h since that may be
included in other header files that define traces. This leads to
conflicts due to traces defined in other headers included via
mmu_context.h.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/powerplay: rv dal-pplib interface refactor powerplay part
hersen wu [Wed, 28 Nov 2018 21:55:47 +0000 (16:55 -0500)]
drm/amd/powerplay: rv dal-pplib interface refactor powerplay part

[WHY] clarify dal input parameters to pplib interface, remove
un-used parameters. dal knows exactly which parameters needed
and their effects at pplib and smu sides.

current dal sequence for dcn1_update_clock to pplib:

1.smu10_display_clock_voltage_request for dcefclk
2.smu10_display_clock_voltage_request for fclk
3.phm_store_dal_configuration_data {
  set_min_deep_sleep_dcfclk
  set_active_display_count
  store_cc6_data --- this data never be referenced

new sequence will be:

1. set_display_count  --- need add new pplib interface
2. set_min_deep_sleep_dcfclk -- new pplib interface
3. set_hard_min_dcfclk_by_freq
4. set_hard_min_fclk_by_freq

after this code refactor, smu10_display_clock_voltage_request,
phm_store_dal_configuration_data will not be needed for rv.

[HOW] step 1: add new functions at pplib interface
      step 2: add new functions at amdgpu dm and dc

Signed-off-by: hersen wu <hersenxs.wu@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: Skip ring soft recovery when fence was NULL
wentalou [Thu, 6 Dec 2018 02:29:52 +0000 (10:29 +0800)]
drm/amdgpu: Skip ring soft recovery when fence was NULL

amdgpu_ring_soft_recovery would have Call-Trace,
when s_fence->parent was NULL inside amdgpu_job_timedout.
Check fence first, as drm_sched_hw_job_reset did.

Signed-off-by: Wentao Lou <Wentao.Lou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu/psp: Destroy psp ring when doing gpu reset
Xiangliang Yu [Wed, 5 Dec 2018 06:36:33 +0000 (14:36 +0800)]
drm/amdgpu/psp: Destroy psp ring when doing gpu reset

PSP ring need to be destroy before starting reinit for vf.
This patche move it from hypervisor driver into guest.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Frank Min <Frank.Min@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu/psp: Add support VMR ring for VF
Xiangliang Yu [Wed, 5 Dec 2018 03:23:43 +0000 (11:23 +0800)]
drm/amdgpu/psp: Add support VMR ring for VF

PSP only support VMR ring for SRIOV vf since v45 and all commands will
be send to VMR ring for executing.

VMR ring use C2PMSG 101 ~ 103 instead of C2PMSG 64 ~ 71.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu/psp: Get psp fw version through reading register
Xiangliang Yu [Tue, 4 Dec 2018 07:13:28 +0000 (15:13 +0800)]
drm/amdgpu/psp: Get psp fw version through reading register

If PSP FW is running already, driver will not load PSP FW again and skip
it. So psp fw version is not correct if reading it from FW binary file,
need to get right version from register.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: always reserve one more shared slot for pipelined BO moves
Christian König [Mon, 24 Sep 2018 11:35:08 +0000 (13:35 +0200)]
drm/amdgpu: always reserve one more shared slot for pipelined BO moves

This allows us to drop the extra reserve in TTM.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: always reserve two slots for the VM
Christian König [Fri, 21 Sep 2018 16:09:59 +0000 (18:09 +0200)]
drm/amdgpu: always reserve two slots for the VM

And drop the now superflous extra reservations.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: fix using shared fence for exported BOs v2
Christian König [Wed, 19 Sep 2018 14:54:35 +0000 (16:54 +0200)]
drm/amdgpu: fix using shared fence for exported BOs v2

It is perfectly possible that the BO list is created before the BO is
exported. While at it clean up setting shared to one instead of true.

v2: add comment and simplify logic

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/ttm: allow reserving more than one shared slot v3
Christian König [Wed, 19 Sep 2018 14:25:08 +0000 (16:25 +0200)]
drm/ttm: allow reserving more than one shared slot v3

Let's support simultaneous submissions to multiple engines.

v2: rename the field to num_shared and fix up all users
v3: rebased

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: both support PCO FP5/AM4 rlc fw
Aaron Liu [Wed, 5 Dec 2018 03:07:55 +0000 (11:07 +0800)]
drm/amdgpu: both support PCO FP5/AM4 rlc fw

For Picasso && AM4 SOCKET board, we use picasso_rlc_am4.bin
For Picasso && FP5 SOCKET board, we use picasso_rlc.bin

Judgment method:
PCO AM4: revision >= 0xC8 && revision <= 0xCF
         or revision >= 0xD8 && revision <= 0xDF
otherwise is PCO FP5

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
Reviewed-by: Huang Rui <ray.huang at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu/powerplay: check MC firmware for FFC support
Alex Deucher [Fri, 30 Nov 2018 00:35:14 +0000 (19:35 -0500)]
drm/amdgpu/powerplay: check MC firmware for FFC support

Check if the MC firmware supports FFC and tell the SMC so
mclk switching is handled properly.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu/powerplay: update smu7_ppsmc.h
Alex Deucher [Fri, 30 Nov 2018 00:34:27 +0000 (19:34 -0500)]
drm/amdgpu/powerplay: update smu7_ppsmc.h

Add new messages for polaris.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agoMerge tag 'drm-misc-next-2018-12-06' of git://anongit.freedesktop.org/drm/drm-misc...
Dave Airlie [Fri, 7 Dec 2018 00:46:29 +0000 (10:46 +1000)]
Merge tag 'drm-misc-next-2018-12-06' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

Final changes to drm-misc-next for v4.21:

UAPI Changes:

Core Changes:
- Add dma_fence_get_stub to dma-buf, and use it in drm/syncobj.
- Add and use DRM_MODESET_LOCK_BEGIN/END helpers.
- Small fixes to drm_atomic_helper_resume(), drm_mode_setcrtc() and
  drm_atomic_helper_commit_duplicated_state()
- Fix drm_atomic_state_helper.[c] extraction.

Driver Changes:
- Small fixes to tinydrm, vkms, meson, rcar-du, virtio, vkms,
  v3d, and pl111.
- vc4: Allow scaling and YUV formats on cursor planes.
- v3d: Enable use of the Texture Formatting Unit, and fix
  prime imports of buffers from other drivers.
- Add support for the AUO G101EVN010 panel.
- sun4i: Enable support for the H6 display engine.

Signed-off-by: Dave Airlie <airlied@redhat.com>
[airlied: added drm/v3d: fix broken build to the merge commit]
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/321be9d3-ab75-5f92-8193-e5113662edef@linux.intel.com
2 years agodrm/tegra: sor: Reset the SOR if possible
Thierry Reding [Thu, 6 Dec 2018 17:56:47 +0000 (18:56 +0100)]
drm/tegra: sor: Reset the SOR if possible

If the SOR is already up and running when the kernel driver is probed,
setting a mode will typically fail. This can be seen for example on
Jetson TX2. Under certain circumstances the generic power domain code
will cause the SOR to be reset. However, if the power domain is never
powered off (this can happen if the HDA controller is enabled, which
is part of the same power domain as the SOR), then the SOR will end up
not getting reset and fail to properly set a mode.

To work around this, try to get the reset control and assert/deassert
it, irrespective of whether or not a generic power domain is attached
to the SOR. On platforms where the kernel implements generic power
domains (up to Tegra210) this will fail, because the power domain will
already have acquired an exclusive reference to the reset control. But
on recent platforms there the BPMP provides an ABI to control power
domains, it's possible to acquire the reset control from SOR and use
it to put the SOR into a known good state at probe time.

The proper solution for this is to make the SOR driver capable of
dealing with hardware that's already up and running (by first grace-
fully shutting it down, or perhaps by seamlessly transitioning to the
kernel driver and taking over the running display configuration). That
is fairly involved, though, so we'll go with this quickfix for now.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2 years agodrm/tegra: sor: Remove temporary workaround
Thierry Reding [Thu, 6 Dec 2018 17:57:41 +0000 (18:57 +0100)]
drm/tegra: sor: Remove temporary workaround

Remove the temporary workaround of storing the Tegra186 HDMI/DP I/O pad
ID in the SOR driver. The definition has long been available in the
soc/tegra/pmc.h header file.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2 years agoMerge tag 'vmwgfx-next-2018-12-05' of git://people.freedesktop.org/~thomash/linux...
Dave Airlie [Thu, 6 Dec 2018 03:43:22 +0000 (13:43 +1000)]
Merge tag 'vmwgfx-next-2018-12-05' of git://people.freedesktop.org/~thomash/linux into drm-next

Pull request of 2018-12-05

Page flip with damage by Deepak and others,
Various vmwgfx minor fixes anc cleanups.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Thomas Hellstrom <thellstrom@vmware.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181205103554.3675-1-thellstrom@vmware.com
2 years agoMerge tag 'exynos-drm-next-for-v4.21' of git://git.kernel.org/pub/scm/linux/kernel...
Dave Airlie [Thu, 6 Dec 2018 03:29:34 +0000 (13:29 +1000)]
Merge tag 'exynos-drm-next-for-v4.21' of git://git./linux/kernel/git/daeinki/drm-exynos into drm-next

- Refactoring of DMA and IOMMU code
  . This patch series simplifies DMA mapping creation by avoiding looping
    all components to get dma device object, reduces code size by merging
    IOMMU and DMA code.
- Enhance plane alpha and blend mode support
  . This patch series adds configurable plane and pixel blend mode support
    for Exynos5433 DECON device.
- Fix color format setting of Mixer driver
  . This patch series fixes color format and range setting by splitting
    range and format.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Inki Dae <inki.dae@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1544002853-11661-1-git-send-email-inki.dae@samsung.com
2 years agoMerge branch 'drm-next-4.21' of git://people.freedesktop.org/~agd5f/linux into drm...
Dave Airlie [Thu, 6 Dec 2018 03:28:19 +0000 (13:28 +1000)]
Merge branch 'drm-next-4.21' of git://people.freedesktop.org/~agd5f/linux into drm-next

amdgpu and amdkfd:
- Freesync support
- ABM support in DC
- KFD support for vega12 and polaris12
- Add sdma paging queue support for vega
- Use ACPI to query backlight range on supported platforms
- Clean up doorbell handling
- KFD fix for pasid handling under non-HWS
- Misc cleanups and fixes

scheduler:
- Revert "fix timeout handling v2"

radeon:
- Fix possible overflow on 32 bit

ttm:
- Fix for LRU handling for ghost objects

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181130192505.2946-1-alexander.deucher@amd.com
2 years agoMerge tag 'drm-intel-next-2018-12-04' of git://anongit.freedesktop.org/drm/drm-intel...
Dave Airlie [Wed, 5 Dec 2018 22:09:33 +0000 (08:09 +1000)]
Merge tag 'drm-intel-next-2018-12-04' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

Final drm/i915 changes for v4.21:
- ICL DSI video mode enabling (Madhav, Vandita, Jani, Imre)
- eDP sink count fix (José)
- PSR fixes (José)
- DRM DP helper and i915 DSC enabling (Manasi, Gaurav, Anusha)
- DP FEC enabling (Anusha)
- SKL+ watermark/ddb programming improvements (Ville)
- Pixel format fixes (Ville)
- Selftest updates (Chris, Tvrtko)
- GT and engine workaround improvements (Tvrtko)

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/87va496uoe.fsf@intel.com
2 years agodrm/scheduler: Add drm_sched_suspend/resume_timeout()
Sharat Masetty [Thu, 29 Nov 2018 10:05:20 +0000 (15:35 +0530)]
drm/scheduler: Add drm_sched_suspend/resume_timeout()

This patch adds two new functions to help client drivers suspend and
resume the scheduler job timeout. This can be useful in cases where the
hardware has preemption support enabled. Using this, it is possible to have
the timeout active only for the ring which is active on the ringbuffer.
This patch also makes the job_list_lock IRQ safe.

Suggested-by: Christian Koenig <Christian.Koenig@amd.com>
Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/scheduler: Set sched->thread to NULL on failure
Sharat Masetty [Thu, 29 Nov 2018 10:05:19 +0000 (15:35 +0530)]
drm/scheduler: Set sched->thread to NULL on failure

In cases where the scheduler instance is used as a base object of another
driver object, it's not clear if the driver can call scheduler cleanup on the
fail path. So, Set the sched->thread to NULL, so that the driver can safely
call drm_sched_fini() during cleanup.

Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu/acpi: NULL check before some freeing functions is not needed
Wen Yang [Wed, 5 Dec 2018 07:43:19 +0000 (15:43 +0800)]
drm/amdgpu/acpi: NULL check before some freeing functions is not needed

kfree(NULL) is safe, so removes NULL check before freeing the mem.
This patch also fix the ifnullfree.cocci warnings.

Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Wen Yang <wen.yang99@zte.com.cn>
CC: Alex Deucher <alexander.deucher@amd.com>
CC: christian.koenig@amd.com
CC: "David (ChunMing) Zhou" <David1.Zhou@amd.com>
CC: David Airlie <airlied@linux.ie> (maintainer:DRM DRIVERS)
CC: Lyude Paul <lyude@redhat.com>
CC: Rex Zhu <Rex.Zhu@amd.com>
CC: Jim Qu <Jim.Qu@amd.com>
CC: amd-gfx@lists.freedesktop.org
CC: dri-devel@lists.freedesktop.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/include: Add mmhub 9.4 reg offsets and shift-mask
Leo Li [Thu, 22 Nov 2018 14:39:17 +0000 (09:39 -0500)]
drm/amd/include: Add mmhub 9.4 reg offsets and shift-mask

In particular, we need the mmMC_VM_XGMI_LFB_CNTL register, for
determining if xGMI is enabled on VG20. This will be used by DC to
determine the correct spread spectrum adjustment for display and audio
clocks.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu/si: fix SI after doorbell rework
Alex Deucher [Mon, 3 Dec 2018 02:47:42 +0000 (21:47 -0500)]
drm/amdgpu/si: fix SI after doorbell rework

SI does not use doorbells, move asic doorbell init later
asic check.

Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=108920
Reviewed-by: Oak Zeng <Oak.Zeng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu/powerplay: fix clock stretcher limits on polaris (v2)
Alex Deucher [Fri, 30 Nov 2018 00:22:07 +0000 (19:22 -0500)]
drm/amdgpu/powerplay: fix clock stretcher limits on polaris (v2)

Adjust limits for newer polaris variants.

v2: fix polaris11 kicker (Jerry)

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu/powerplay: fix mclk switch limit on polaris
Alex Deucher [Fri, 30 Nov 2018 00:20:28 +0000 (19:20 -0500)]
drm/amdgpu/powerplay: fix mclk switch limit on polaris

Update switch limit on newer polaris variants.  This may fix
flickering with high refresh rates with mclk switching enabled.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Add tracing to dc
David Francis [Fri, 30 Nov 2018 14:57:06 +0000 (09:57 -0500)]
drm/amd/display: Add tracing to dc

[Why]
Tracing is a useful and cheap debug functionality

[How]
This creates a new trace system amdgpu_dm, currently with
three trace events

amdgpu_dc_rreg and amdgpu_dc_wreg report the address and value
of any dc register reads and writes

amdgpu_dc_performance requires at least one of those two to be
enabled.  It counts the register reads and writes since the
last entry

v2: Don't check for NULL before kfree

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm: revert "expand replace_fence to support timeline point v2"
Christian König [Wed, 14 Nov 2018 13:24:27 +0000 (14:24 +0100)]
drm: revert "expand replace_fence to support timeline point v2"

This reverts commit 9a09a42369a4a37a959c051d8e1a1f948c1529a4.

The whole interface isn't thought through. Since this function can't
fail we actually can't allocate an object to store the sync point.

Sorry, I should have taken the lead on this from the very beginning and
reviewed it more thoughtfully. Going to propose a new interface as a
follow up change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Link: https://patchwork.freedesktop.org/patch/265580/
2 years agodrm/vmwgfx: Use the standard atomic helpers for page-flip
Thomas Hellstrom [Wed, 14 Nov 2018 07:11:05 +0000 (08:11 +0100)]
drm/vmwgfx: Use the standard atomic helpers for page-flip

Our wrappers don't do anything useful anymore except calling the
atomic helpers.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2 years agodrm/vmwgfx: Remove set but not used variable 'file_priv'
YueHaibing [Fri, 5 Oct 2018 11:36:58 +0000 (11:36 +0000)]
drm/vmwgfx: Remove set but not used variable 'file_priv'

Fixes gcc '-Wunused-but-set-variable' warning:

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c: In function 'vmw_event_fence_action_seq_passed':
drivers/gpu/drm/vmwgfx/vmwgfx_fence.c:909:19: warning:
 variable 'file_priv' set but not used [-Wunused-but-set-variable]
  struct drm_file *file_priv;

It not used any more since
commit fb740cf2492c ("drm: Create drm_send_event helpers")

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm/vmwgfx: remove redundant return ret statement
Colin Ian King [Thu, 4 Oct 2018 17:49:53 +0000 (18:49 +0100)]
drm/vmwgfx: remove redundant return ret statement

The return statement is redundant as there is a return statement
immediately before it so we have dead code that can be removed.
Also remove the unused declaration of ret.

Detected by CoverityScan, CID#1473793 ("Structurally dead code")

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm/vmwgfx: Fix a layout race condition
Thomas Hellstrom [Mon, 12 Nov 2018 14:46:39 +0000 (15:46 +0100)]
drm/vmwgfx: Fix a layout race condition

This fixes a layout update race condition. We make sure
the crtc mutex is locked before we dereference crtc->state. Otherwise the
state might change under us.

Since now we're already holding the crtc mutexes when reading the gui
coordinates, protect them with the crtc mutexes rather than with the
requested_layout mutex.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2 years agodrm/vmwgfx: Fix up the implicit display unit handling
Thomas Hellstrom [Thu, 4 Oct 2018 22:38:17 +0000 (22:38 +0000)]
drm/vmwgfx: Fix up the implicit display unit handling

Make the connector is_implicit property immutable.
As far as we know, no user-space application is writing to it.

Also move the verification that all implicit display units scan out
from the same framebuffer to atomic_check().

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Reviewed-by: Deepak Rawat <drawat@vmware.com>
2 years agoMAINTAINERS: Update vmwgfx maintainers
Sinclair Yeh [Mon, 19 Nov 2018 17:56:07 +0000 (09:56 -0800)]
MAINTAINERS: Update vmwgfx maintainers

It's been fun! To be continued.....

Signed-off-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm/vmwgfx: Don't clear mode::type anymore
Deepak Rawat [Thu, 27 Sep 2018 00:17:33 +0000 (17:17 -0700)]
drm/vmwgfx: Don't clear mode::type anymore

With kernel commit "drm/modes: Kill off the oddball DRM_MODE_TYPE_CRTC_C
vs. DRM_MODE_TYPE_BUILTIN handling", no need to clear mode::type for
user-space bug.

Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm/vmwgfx: Use atomic helper function for dirty fb IOCTL
Deepak Rawat [Fri, 21 Sep 2018 21:34:02 +0000 (14:34 -0700)]
drm/vmwgfx: Use atomic helper function for dirty fb IOCTL

USe new atomic helper for dirty fb IOCTL which make use of damage
interface. Note that this is only done for STDU and SOU, for legacy
display unit still using old interface.

Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm/vmwgfx: Enable FB_DAMAGE_CLIPS property for SOU primary plane
Deepak Rawat [Wed, 8 Aug 2018 22:41:56 +0000 (15:41 -0700)]
drm/vmwgfx: Enable FB_DAMAGE_CLIPS property for SOU primary plane

SOU primary plane now support damage clips, enable it for user-space.

Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm/vmwgfx: Update comments for sou plane update function
Deepak Rawat [Fri, 21 Sep 2018 21:10:35 +0000 (14:10 -0700)]
drm/vmwgfx: Update comments for sou plane update function

Update comments to sync with code.

Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm/vmwgfx: Use the new interface for SOU plane update
Deepak Rawat [Fri, 21 Sep 2018 21:07:33 +0000 (14:07 -0700)]
drm/vmwgfx: Use the new interface for SOU plane update

With new interface to do plane update on SOU available, use that instead
of old kms_dirty.

Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm/vmwgfx: Implement SOU plane update for BO backed fb
Deepak Rawat [Wed, 8 Aug 2018 22:02:48 +0000 (15:02 -0700)]
drm/vmwgfx: Implement SOU plane update for BO backed fb

Using the new interface implement SOU plane update for BO backed fb.

v2: Rebase to new resource validation.

Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm/vmwgfx: Implement SOU plane update for surface backed fb
Deepak Rawat [Wed, 8 Aug 2018 19:39:31 +0000 (12:39 -0700)]
drm/vmwgfx: Implement SOU plane update for surface backed fb

Using the new interface implement SOU plane update for surface backed
fb.

v2: Rebase to new resource validation.

Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm/vmwgfx: Enable FB_DAMAGE_CLIPS property for STDU primary plane
Deepak Rawat [Sat, 28 Jul 2018 00:28:17 +0000 (17:28 -0700)]
drm/vmwgfx: Enable FB_DAMAGE_CLIPS property for STDU primary plane

STDU primary plane now support damage clips, enable it for user-space.

Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm/vmwgfx: Update comments for stdu plane update
Deepak Rawat [Fri, 21 Sep 2018 20:46:42 +0000 (13:46 -0700)]
drm/vmwgfx: Update comments for stdu plane update

Update the comments to sync with code.

Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm/vmwgfx: Use the new interface for STDU plane update
Deepak Rawat [Fri, 21 Sep 2018 20:42:35 +0000 (13:42 -0700)]
drm/vmwgfx: Use the new interface for STDU plane update

With new interface to do plane update on STDU available, use that
instead of old kms_dirty.

v2: Use fence from new resource validation.

Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm/vmwgfx: Implement STDU plane update for BO backed fb
Deepak Rawat [Mon, 9 Jul 2018 23:17:17 +0000 (16:17 -0700)]
drm/vmwgfx: Implement STDU plane update for BO backed fb

Using the new interface implement STDU plane update for BO backed fb.

v2: Rebase to new resource validation.

Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm/vmwgfx: Implement STDU plane update for surface backed fb
Deepak Rawat [Wed, 11 Jul 2018 23:25:19 +0000 (16:25 -0700)]
drm/vmwgfx: Implement STDU plane update for surface backed fb

Using the new interface implement STDU plane update for surface backed
fb.

v2: Rebase to new resource validation.

Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm/vmwgfx: Add a new interface for plane update on a display unit
Deepak Rawat [Wed, 11 Jul 2018 22:42:45 +0000 (15:42 -0700)]
drm/vmwgfx: Add a new interface for plane update on a display unit

Add a new struct vmw_du_update_plane similar to vmw_kms_dirty which
represent the flow of operations needed to update a display unit from
surface or bo (blit a new framebuffer).

v2:
- Kernel doc correction.
- Rebase.

v3: Rebase to new resource validation.

Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm: Add helper to implement legacy dirtyfb
Rob Clark [Thu, 31 May 2018 00:46:20 +0000 (17:46 -0700)]
drm: Add helper to implement legacy dirtyfb

Add an atomic helper to implement dirtyfb support.  This is needed to
support DSI command-mode panels with x11 userspace (ie. when we can't
rely on pageflips to trigger a flush to the panel).

v2: Modified the helper to use plane fb_damage_clips property and
removed plane_state::dirty flag.

v3:
- Use uapi drm_mode_rect.
- Support annotate flags.

v4: Correct kernel doc.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm/selftest: Add drm damage helper selftest
Deepak Rawat [Mon, 15 Oct 2018 18:07:08 +0000 (11:07 -0700)]
drm/selftest: Add drm damage helper selftest

Selftest for drm damage helper iterator functions.

v2: Rebase to new test-drm_modeset.

Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm: Add helper iterator functions for plane fb_damage_clips blob
Deepak Rawat [Wed, 30 May 2018 21:42:52 +0000 (14:42 -0700)]
drm: Add helper iterator functions for plane fb_damage_clips blob

With fb_damage_clips blob property in drm_plane_state, this patch adds
helper iterator to traverse the damage clips that lie inside plane src.
Iterator will return full plane src as damage in case need full plane
update or damage is not specified.

v2:
- Plane src clipping correction
- Handle no plane update case in iter_next

Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm: Add a new helper to validate damage during atomic_check
Deepak Rawat [Thu, 9 Aug 2018 00:36:26 +0000 (17:36 -0700)]
drm: Add a new helper to validate damage during atomic_check

This helper function makes sure that damage from plane state is
discarded for full modeset.

Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm: Add a new plane property to send damage during plane update
Lukasz Spintzyk [Thu, 24 May 2018 02:04:08 +0000 (19:04 -0700)]
drm: Add a new plane property to send damage during plane update

FB_DAMAGE_CLIPS is an optional plane property to mark damaged regions
on the plane in framebuffer coordinates of the framebuffer attached to
the plane.

The layout of blob data is simply an array of "struct drm_mode_rect".
Unlike plane src coordinates, damage clips are not in 16.16 fixed point.
As plane src in framebuffer cannot be negative so are damage clips. In
damage clip, x1/y1 are inclusive and x2/y2 are exclusive.

This patch also exports the kernel internal drm_rect to userspace as
drm_mode_rect. This is because "struct drm_clip_rect" is not sufficient
to represent damage for current plane size.

Driver which are interested in enabling FB_DAMAGE_CLIPS property for a
plane should enable this property using drm_plane_enable_damage_clips.

v2:
- Input validation on damage clips against framebuffer size.
- Doc update, other minor changes.

Signed-off-by: Lukasz Spintzyk <lukasz.spintzyk@displaylink.com>
Signed-off-by: Deepak Rawat <drawat@vmware.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2 years agodrm/exynos: mixer: Fix color range setting
Christoph Manszewski [Wed, 28 Nov 2018 15:32:12 +0000 (16:32 +0100)]
drm/exynos: mixer: Fix color range setting

Color format and color range was set based on resolution. Change that,
by splitting range and format. Leave color format setting as it is,
set color range based on drm_display_mode using
drm_default_quant_range helper function.

Tested on Odroid-U3 with Exynos 4412 CPU, kernel next-20181128
using modetest.

Signed-off-by: Christoph Manszewski <c.manszewski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2 years agodrm/exynos: mixer: Fix color format setting
Christoph Manszewski [Wed, 28 Nov 2018 15:32:11 +0000 (16:32 +0100)]
drm/exynos: mixer: Fix color format setting

Fix color format decision based on height(pixels).

According to CEA-861-E:
"High Definition (HD) - A CE video format that, inclusively, has between
720 to 1080 active vertical lines (Vactive) lines per video frame."

Tested on Odroid-U3 with Exynos 4412 CPU, kernel next-20181128
using modetest.

Signed-off-by: Christoph Manszewski <c.manszewski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2 years agodrm/exynos: decon: Make pixel blend mode configurable
Christoph Manszewski [Thu, 25 Oct 2018 16:21:53 +0000 (18:21 +0200)]
drm/exynos: decon: Make pixel blend mode configurable

The decon hardware supports different blend modes. Add pixel blend mode
property and make it configurable, by modifying the blend equation.

Tested on TM2 with Exynos 5433 CPU, on top of linux-next-20181019.

Signed-off-by: Christoph Manszewski <c.manszewski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2 years agodrm/exynos: decon: Make plane alpha configurable
Christoph Manszewski [Thu, 25 Oct 2018 16:21:52 +0000 (18:21 +0200)]
drm/exynos: decon: Make plane alpha configurable

The decon hardware supports variable plane alpha. Currently planes
are opaque, make this configurable.

Tested on TM2 with Exynos 5433 CPU, on top of linux-next-20181019.

Signed-off-by: Christoph Manszewski <c.manszewski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2 years agoMerge tag 'imx-drm-next-2018-12-03' of git://git.pengutronix.de/git/pza/linux into...
Dave Airlie [Wed, 5 Dec 2018 05:00:09 +0000 (15:00 +1000)]
Merge tag 'imx-drm-next-2018-12-03' of git://git.pengutronix.de/git/pza/linux into drm-next

drm/imx: update image-convert with fixes for multi-tiled scaling

Update the ipu-v3 mem2mem image-convert code, with some fixes for race
conditions, alignment issues, and visual artifacts due to tile alignment
and scaling factor issues when scaling images larger than hardware
limitations in multiple tiles. This will allow the V4L2 mem2mem scaler
driver to write output images larger than 1024x1024 pixels.

Also switch drm/imx source files to SPDX license identifiers, constify
struct clk_ops in imx-tve, and add a timeout warning to the busy wait in
ipu_plane_disable().

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://patchwork.freedesktop.org/patch/msgid/1543835266.5647.1.camel@pengutronix.de
2 years agodrm/amdgpu: Update XGMI node print
Andrey Grodzovsky [Mon, 3 Dec 2018 20:00:39 +0000 (15:00 -0500)]
drm/amdgpu: Update XGMI node print

amdgpu_xgmi_update_topology is called both on device registration
and reset. Fix misleading print since the device is added only once to
the hive on registration and not on reset.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/i915: Update DRIVER_DATE to 20181204
Jani Nikula [Tue, 4 Dec 2018 17:26:17 +0000 (19:26 +0200)]
drm/i915: Update DRIVER_DATE to 20181204

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 years agodrm/i915/icl: fix transcoder state readout
Jani Nikula [Tue, 4 Dec 2018 10:19:26 +0000 (12:19 +0200)]
drm/i915/icl: fix transcoder state readout

Commit 2ca711caeca2 ("drm/i915/icl: Consider DSI for getting transcoder
state") clobbers the previously read TRANS_DDI_FUNC_CTL_EDP register
contents with TRANS_DDI_FUNC_CTL_DSI0 contents. Fix the state readout,
and handle DSI 1 while at it.

Use a bitmask for iterating and logging transcoders, because the allowed
combinations are a bit funky.

Fixes: 2ca711caeca2 ("drm/i915/icl: Consider DSI for getting transcoder state")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108928
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Madhav Chauhan <madhav.chauhan@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181204101926.17174-1-jani.nikula@intel.com
2 years agodrm/i915: Allocate a common scratch page
Chris Wilson [Tue, 4 Dec 2018 14:15:16 +0000 (14:15 +0000)]
drm/i915: Allocate a common scratch page

Currently we allocate a scratch page for each engine, but since we only
ever write into it for post-sync operations, it is not exposed to
userspace nor do we care for coherency. As we then do not care about its
contents, we can use one page for all, reducing our allocations and
avoid complications by not assuming per-engine isolation.

For later use, it simplifies engine initialisation (by removing the
allocation that required struct_mutex!) and means that we can always rely
on there being a scratch page.

v2: Check that we allocated a large enough scratch for I830 w/a

Fixes: 06e562e7f515 ("drm/i915/ringbuffer: Delay after EMIT_INVALIDATE for gen4/gen5") # v4.18.20
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108850
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181204141522.13640-1-chris@chris-wilson.co.uk
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: <stable@vger.kernel.org> # v4.18.20+
2 years agodrm/tinydrm: Use kmemdup rather than duplicating its implementation in repaper_spi_tr...
YueHaibing [Thu, 29 Nov 2018 06:00:33 +0000 (06:00 +0000)]
drm/tinydrm: Use kmemdup rather than duplicating its implementation in repaper_spi_transfer()

use kmemdup rather than duplicating its implementation

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
Link: https://patchwork.freedesktop.org/patch/msgid/1543471233-159568-1-git-send-email-yuehaibing@huawei.com
2 years agodrm/i915: Trim unused workaround list entries
Tvrtko Ursulin [Mon, 3 Dec 2018 12:50:14 +0000 (12:50 +0000)]
drm/i915: Trim unused workaround list entries

The new workaround list allocator grows the list in chunks so will end up
with some unused space. Trim it when the initialization phase is done to
free up a tiny bit of slab.

v2:
 * Simplify with kmemdup. (Chris Wilson)

v3:
 * Refactor for __size removal.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20181203125014.3219-8-tvrtko.ursulin@linux.intel.com
2 years agodrm/i915: Fuse per-context workaround handling with the common framework
Tvrtko Ursulin [Mon, 3 Dec 2018 13:33:57 +0000 (13:33 +0000)]
drm/i915: Fuse per-context workaround handling with the common framework

Convert the per context workaround handling code to run against the newly
introduced common workaround framework and fuse the two to use the
existing smarter list add helper, the one which does the sorted insert and
merges registers where possible.

This completes migration of all four classes of workarounds onto the
common framework.

Existing macros are kept untouched for smaller code churn.

v2:
 * Rename to list name ctx_wa_list and move from dev_priv to engine.

v3:
 * API rename and parameters tweaking. (Chris Wilson)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20181203133357.10341-1-tvrtko.ursulin@linux.intel.com
2 years agodrm/i915: Move register white-listing to the common workaround framework
Tvrtko Ursulin [Mon, 3 Dec 2018 12:50:12 +0000 (12:50 +0000)]
drm/i915: Move register white-listing to the common workaround framework

Instead of having a separate list of white-listed registers we can
trivially move this to the common workarounds framework.

This brings us one step closer to the goal of driving all workaround
classes using the same code.

v2:
 * Use GEM_DEBUG_WARN_ON for the sanity check. (Chris Wilson)

v3:
 * API rename. (Chris Wilson)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20181203125014.3219-6-tvrtko.ursulin@linux.intel.com
2 years agodrm/i915/selftests: Add tests for GT and engine workaround verification
Tvrtko Ursulin [Mon, 3 Dec 2018 12:50:11 +0000 (12:50 +0000)]
drm/i915/selftests: Add tests for GT and engine workaround verification

Two simple selftests which test that both GT and engine workarounds are
not lost after either a full GPU reset, or after the per-engine ones.

(Including checks that one engine reset is not affecting workarounds not
belonging to itself.)

v2:
 * Rebase for series refactoring.
 * Add spinner for actual engine reset!
 * Add idle reset test as well. (Chris Wilson)
 * Share existing global_reset_lock. (Chris Wilson)

v3:
 * intel_engine_verify_workarounds can be static.
 * API rename. (Chris Wilson)
 * Move global reset lock out of the loop. (Chris Wilson)

v4:
 * Add missing rpm puts. (Chris Wilson)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20181203125014.3219-5-tvrtko.ursulin@linux.intel.com
2 years agodrm/i915: Verify GT workaround state after GPU init
Tvrtko Ursulin [Mon, 3 Dec 2018 12:50:10 +0000 (12:50 +0000)]
drm/i915: Verify GT workaround state after GPU init

Since we now have all the GT workarounds in a table, by adding a simple
shared helper function we can now verify that their values are still
applied after some interesting events in the lifetime of the driver.

Initially we only do this after GPU initialization.

v2:
 Chris Wilson:
 * Simplify verification by realizing it's a simple xor and and.
 * Remove verification from engine reset path.
 * Return bool straight away from the verify API.

v3:
 * API rename. (Chris Wilson)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20181203125014.3219-4-tvrtko.ursulin@linux.intel.com
2 years agodrm/i915: Introduce per-engine workarounds
Tvrtko Ursulin [Mon, 3 Dec 2018 13:33:41 +0000 (13:33 +0000)]
drm/i915: Introduce per-engine workarounds

We stopped re-applying the GT workarounds after engine reset since commit
59b449d5c82a ("drm/i915: Split out functions for different kinds of
workarounds").

Issue with this is that some of the GT workarounds live in the MMIO space
which gets lost during engine resets. So far the registers in 0x2xxx and
0xbxxx address range have been identified to be affected.

This losing of applied workarounds has obvious negative effects and can
even lead to hard system hangs (see the linked Bugzilla).

Rather than just restoring this re-application, because we have also
observed that it is not safe to just re-write all GT workarounds after
engine resets (GPU might be live and weird hardware states can happen),
we introduce a new class of per-engine workarounds and move only the
affected GT workarounds over.

Using the framework introduced in the previous patch, we therefore after
engine reset, re-apply only the workarounds living in the affected MMIO
address ranges.

v2:
 * Move Wa_1406609255:icl to engine workarounds as well.
 * Rename API. (Chris Wilson)
 * Drop redundant IS_KABYLAKE. (Chris Wilson)
 * Re-order engine wa/ init so latest platforms are first. (Rodrigo Vivi)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Bugzilla: https://bugzilla.freedesktop.org/show_bug.cgi?id=107945
Fixes: 59b449d5c82a ("drm/i915: Split out functions for different kinds of workarounds")
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20181203133341.10258-1-tvrtko.ursulin@linux.intel.com
2 years agodrm/i915: Record GT workarounds in a list
Tvrtko Ursulin [Mon, 3 Dec 2018 13:33:19 +0000 (13:33 +0000)]
drm/i915: Record GT workarounds in a list

To enable later verification of GT workaround state at various stages of
driver lifetime, we record the list of applicable ones per platforms to a
list, from which they are also applied.

The added data structure is a simple array of register, mask and value
items, which is allocated on demand as workarounds are added to the list.

This is a temporary implementation which later in the series gets fused
with the existing per context workaround list handling. It is separated at
this stage since the following patch fixes a bug which needs to be as easy
to backport as possible.

Also, since in the following patch we will be adding a new class of
workarounds (per engine) which can be applied from interrupt context, we
straight away make the provision for safe read-modify-write cycle.

v2:
 * Change dev_priv to i915 along the init path. (Chris Wilson)
 * API rename. (Chris Wilson)

v3:
 * Remove explicit list size tracking in favour of growing the allocation
   in power of two chunks. (Chris Wilson)

v4:
 Chris Wilson:
 * Change wa_list_finish to early return.
 * Copy workarounds using the compiler for static checking.
 * Do not bother zeroing unused entries.
 * Re-order struct i915_wa_list.

v5:
 * kmalloc_array.
 * Whitespace cleanup.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20181203133319.10174-1-tvrtko.ursulin@linux.intel.com
2 years agodrm/i915: change i915_sw_fence license to MIT
Jonathan Gray [Thu, 29 Nov 2018 01:30:51 +0000 (12:30 +1100)]
drm/i915: change i915_sw_fence license to MIT

Change the license of the i915_sw_fence files to MIT matching
most of the other i915 files.  This makes it possible to use them
in a new port of i915 to OpenBSD.

Besides some mechanical tree wide changes Chris Wilson is the sole
author of these files with Intel holding the copyright.

Intel's legal team have given permission to change the license according
to Joonas Lahtinen.

v2: expand commit message and note permission from Intel legal

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20181129013051.17525-1-jsg@jsg.id.au
2 years agodrm/i915: Complete the fences as they are cancelled due to wedging
Chris Wilson [Mon, 3 Dec 2018 11:36:55 +0000 (11:36 +0000)]
drm/i915: Complete the fences as they are cancelled due to wedging

We inspect the requests under the assumption that they will be marked as
completed when they are removed from the queue. Currently however, in the
process of wedging the requests will be removed from the queue before they
are completed, so rearrange the code to complete the fences before the
locks are dropped.

<1>[  354.473346] BUG: unable to handle kernel NULL pointer dereference at 0000000000000250
<6>[  354.473363] PGD 0 P4D 0
<4>[  354.473370] Oops: 0000 [#1] PREEMPT SMP PTI
<4>[  354.473380] CPU: 0 PID: 4470 Comm: gem_eio Tainted: G     U            4.20.0-rc4-CI-CI_DRM_5216+ #1
<4>[  354.473393] Hardware name: Intel Corporation NUC7CJYH/NUC7JYB, BIOS JYGLKCPX.86A.0027.2018.0125.1347 01/25/2018
<4>[  354.473480] RIP: 0010:__i915_schedule+0x311/0x5e0 [i915]
<4>[  354.473490] Code: 49 89 44 24 20 4d 89 4c 24 28 4d 89 29 44 39 b3 a0 04 00 00 7d 3a 41 8b 44 24 78 85 c0 74 13 48 8b 93 78 04 00 00 48 83 e2 fc <39> 82 50 02 00 00 79 1e 44 89 b3 a0 04 00 00 48 8d bb d0 03 00 00
<4>[  354.473515] RSP: 0018:ffffc900001bba90 EFLAGS: 00010046
<4>[  354.473524] RAX: 0000000000000003 RBX: ffff8882624c8008 RCX: f34a737800000000
<4>[  354.473535] RDX: 0000000000000000 RSI: 0000000000000000 RDI: ffff8882624c8048
<4>[  354.473545] RBP: ffffc900001bbab0 R08: 000000005963f1f1 R09: 0000000000000000
<4>[  354.473556] R10: ffffc900001bba10 R11: ffff8882624c8060 R12: ffff88824fdd7b98
<4>[  354.473567] R13: ffff88824fdd7bb8 R14: 0000000000000001 R15: ffff88824fdd7750
<4>[  354.473578] FS:  00007f44b4b5b980(0000) GS:ffff888277e00000(0000) knlGS:0000000000000000
<4>[  354.473590] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
<4>[  354.473599] CR2: 0000000000000250 CR3: 000000026976e000 CR4: 0000000000340ef0
<4>[  354.473611] Call Trace:
<4>[  354.473622]  ? lock_acquire+0xa6/0x1c0
<4>[  354.473677]  ? i915_schedule_bump_priority+0x57/0xd0 [i915]
<4>[  354.473736]  i915_schedule_bump_priority+0x72/0xd0 [i915]
<4>[  354.473792]  i915_request_wait+0x4db/0x840 [i915]
<4>[  354.473804]  ? get_pwq.isra.4+0x2c/0x50
<4>[  354.473813]  ? ___preempt_schedule+0x16/0x18
<4>[  354.473824]  ? wake_up_q+0x70/0x70
<4>[  354.473831]  ? wake_up_q+0x70/0x70
<4>[  354.473882]  ? gen6_rps_boost+0x118/0x120 [i915]
<4>[  354.473936]  i915_gem_object_wait_fence+0x8a/0x110 [i915]
<4>[  354.473991]  i915_gem_object_wait+0x113/0x500 [i915]
<4>[  354.474047]  i915_gem_wait_ioctl+0x11c/0x2f0 [i915]
<4>[  354.474101]  ? i915_gem_unset_wedged+0x210/0x210 [i915]
<4>[  354.474113]  drm_ioctl_kernel+0x81/0xf0
<4>[  354.474123]  drm_ioctl+0x2de/0x390
<4>[  354.474175]  ? i915_gem_unset_wedged+0x210/0x210 [i915]
<4>[  354.474187]  ? finish_task_switch+0x95/0x260
<4>[  354.474197]  ? lock_acquire+0xa6/0x1c0
<4>[  354.474207]  do_vfs_ioctl+0xa0/0x6e0
<4>[  354.474217]  ? __fget+0xfc/0x1e0
<4>[  354.474225]  ksys_ioctl+0x35/0x60
<4>[  354.474233]  __x64_sys_ioctl+0x11/0x20
<4>[  354.474241]  do_syscall_64+0x55/0x190
<4>[  354.474251]  entry_SYSCALL_64_after_hwframe+0x49/0xbe
<4>[  354.474260] RIP: 0033:0x7f44b3de65d7
<4>[  354.474267] Code: b3 66 90 48 8b 05 b1 48 2d 00 64 c7 00 26 00 00 00 48 c7 c0 ff ff ff ff c3 66 2e 0f 1f 84 00 00 00 00 00 b8 10 00 00 00 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 81 48 2d 00 f7 d8 64 89 01 48
<4>[  354.474293] RSP: 002b:00007fff974948e8 EFLAGS: 00000246 ORIG_RAX: 0000000000000010
<4>[  354.474305] RAX: ffffffffffffffda RBX: 0000000000000000 RCX: 00007f44b3de65d7
<4>[  354.474316] RDX: 00007fff97494940 RSI: 00000000c010646c RDI: 0000000000000007
<4>[  354.474327] RBP: 00007fff97494940 R08: 0000000000000000 R09: 00007f44b40bbc40
<4>[  354.474337] R10: 0000000000000000 R11: 0000000000000246 R12: 00000000c010646c
<4>[  354.474348] R13: 0000000000000007 R14: 0000000000000000 R15: 0000000000000000

v2: Avoid floating requests.
v3: Can't call dma_fence_signal() under the timeline lock!
v4: Can't call dma_fence_signal() from inside another fence either.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181203113701.12106-2-chris@chris-wilson.co.uk
2 years agodrm/vkms: Remove set but not used variable 'vkms_obj'
YueHaibing [Sat, 1 Dec 2018 03:20:44 +0000 (03:20 +0000)]
drm/vkms: Remove set but not used variable 'vkms_obj'

Fixes gcc '-Wunused-but-set-variable' warning:

drivers/gpu/drm/vkms/vkms_plane.c: In function 'vkms_prepare_fb':
drivers/gpu/drm/vkms/vkms_plane.c:144:26: warning:
 variable 'vkms_obj' set but not used [-Wunused-but-set-variable]

It never used since introduction in commit
8ce1bb0b5337 ("drm/vkms: map/unmap buffers in [prepare/cleanup]_fb hooks")

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/1543634444-186448-1-git-send-email-yuehaibing@huawei.com
2 years agodrm/i915/dp: Fix inconsistent indenting
Chris Wilson [Tue, 20 Nov 2018 20:24:39 +0000 (20:24 +0000)]
drm/i915/dp: Fix inconsistent indenting

Always show the FEC capability as it is initialised to 0 before error.
Fixing,

drivers/gpu/drm/i915/intel_dp.c:3846 intel_dp_get_dsc_sink_cap() warn: inconsistent indenting

Fixes: 08cadae8e157 ("i915/dp/fec: Cache the FEC_CAPABLE DPCD register")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181120202439.13017-2-chris@chris-wilson.co.uk
2 years agodrm/sun4i: Add compatible for H6 display engine
Jernej Skrabec [Sun, 4 Nov 2018 18:26:45 +0000 (19:26 +0100)]
drm/sun4i: Add compatible for H6 display engine

H6 is first Allwinner SoC which supports 10 bit colors, HDR and AFBC.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181104182705.18047-9-jernej.skrabec@siol.net
2 years agodrm/exynos/iommu: merge IOMMU and DMA code
Andrzej Hajda [Fri, 12 Oct 2018 10:53:46 +0000 (12:53 +0200)]
drm/exynos/iommu: merge IOMMU and DMA code

As DMA code is the only user of IOMMU code both files can be merged.
It allows to remove stub functions, after slight adjustment of
exynos_drm_register_dma. Since IOMMU functions are used locally they
can be marked static.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2 years agodrm/exynos/iommu: replace preprocessor conditionals with C conditionals
Andrzej Hajda [Fri, 12 Oct 2018 10:53:45 +0000 (12:53 +0200)]
drm/exynos/iommu: replace preprocessor conditionals with C conditionals

Using C conditionals is preferred solution - it provides better code
coverage, makes code more clear.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2 years agodrm/exynos/iommu: move IOMMU specific stuff into exynos_drm_iommu.c
Andrzej Hajda [Fri, 12 Oct 2018 10:53:44 +0000 (12:53 +0200)]
drm/exynos/iommu: move IOMMU specific stuff into exynos_drm_iommu.c

Since __exynos_iommu* functions are used only in exynos_drm_iommu.c we can
move them there.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2 years agodrm/exynos/iommu: integrate IOMMU/DMA internal API
Andrzej Hajda [Fri, 12 Oct 2018 10:53:43 +0000 (12:53 +0200)]
drm/exynos/iommu: integrate IOMMU/DMA internal API

Exynos DRM drivers should work with and without IOMMU. Providing common
API generic to both scenarios should make code cleaner and allow further
code improvements.
The patch removes including of exynos_drm_iommu.h as the file contains
mostly IOMMU specific stuff, instead it exposes exynos_drm_*_dma functions
and puts them into exynos_drm_dma.c.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2 years agodrm/exynos/iommu: remove DRM_EXYNOS_IOMMU Kconfig symbol
Andrzej Hajda [Fri, 12 Oct 2018 10:53:42 +0000 (12:53 +0200)]
drm/exynos/iommu: remove DRM_EXYNOS_IOMMU Kconfig symbol

DRM_EXYNOS_IOMMU symbol is not configurable, it is always equal to
EXYNOS_IOMMU.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
2 years agodrm/exynos: simplify DMA mapping
Andrzej Hajda [Fri, 12 Oct 2018 10:53:41 +0000 (12:53 +0200)]
drm/exynos: simplify DMA mapping

Moving DMA mapping creation to drm_iommu_attach_device allows to avoid
looping through all components and maintaining DMA device flags.

v2: take care of configurations without IOMMU

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>