From: Linus Walleij <linus.walleij@linaro.org>
Date: Sun, 10 Feb 2019 22:43:33 +0000 (+0100)
Subject: ARM: dts: Add queue manager and NPE to the IXP4xx DTSI
X-Git-Tag: v5.2-rc1~46^2~4^2
X-Git-Url: http://git.samba.org/samba.git/?p=sfrench%2Fcifs-2.6.git;a=commitdiff_plain;h=1fae0ad1e2032a603f93d4ad752bfa6fe7c9b887

ARM: dts: Add queue manager and NPE to the IXP4xx DTSI

The AHB queue manager and Network Processing Engines are
present on all IXP4xx SoCs, so we add them to the overarching
device tree include.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---

diff --git a/arch/arm/boot/dts/intel-ixp4xx.dtsi b/arch/arm/boot/dts/intel-ixp4xx.dtsi
index 9edd49509af8..d4a09584f417 100644
--- a/arch/arm/boot/dts/intel-ixp4xx.dtsi
+++ b/arch/arm/boot/dts/intel-ixp4xx.dtsi
@@ -14,6 +14,12 @@
 		compatible = "simple-bus";
 		interrupt-parent = <&intcon>;
 
+		qmgr: queue-manager@60000000 {
+			compatible = "intel,ixp4xx-ahb-queue-manager";
+			reg = <0x60000000 0x4000>;
+			interrupts = <3 IRQ_TYPE_LEVEL_HIGH>, <4 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		uart0: serial@c8000000 {
 			compatible = "intel,xscale-uart";
 			reg = <0xc8000000 0x1000>;
@@ -54,5 +60,10 @@
 			reg = <0xc8005000 0x100>;
 			interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
 		};
+
+		npe@c8006000 {
+			compatible = "intel,ixp4xx-network-processing-engine";
+			reg = <0xc8006000 0x1000>, <0xc8007000 0x1000>, <0xc8008000 0x1000>;
+		};
 	};
 };