Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
authorLinus Torvalds <torvalds@linux-foundation.org>
Sat, 18 Oct 2014 16:30:41 +0000 (09:30 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Sat, 18 Oct 2014 16:30:41 +0000 (09:30 -0700)
Pull Sparc bugfix from David Miller:
 "Sparc64 AES ctr mode bug fix"

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
  sparc64: Fix FPU register corruption with AES crypto offload.

417 files changed:
Documentation/ABI/testing/sysfs-class-power
Documentation/acpi/enumeration.txt
Documentation/devicetree/bindings/clock/exynos3250-clock.txt
Documentation/devicetree/bindings/clock/gpio-gate-clock.txt [new file with mode: 0644]
Documentation/devicetree/bindings/clock/maxim,max77686.txt
Documentation/devicetree/bindings/clock/maxim,max77802.txt [new file with mode: 0644]
Documentation/devicetree/bindings/clock/pxa-clock.txt [new file with mode: 0644]
Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt
Documentation/devicetree/bindings/clock/sunxi.txt
Documentation/devicetree/bindings/gpio/gpio-restart.txt [new file with mode: 0644]
Documentation/devicetree/bindings/iommu/arm,smmu.txt
Documentation/devicetree/bindings/mfd/arizona.txt
Documentation/devicetree/bindings/mfd/atmel-gpbr.txt [new file with mode: 0644]
Documentation/devicetree/bindings/mfd/hi6421.txt [new file with mode: 0644]
Documentation/devicetree/bindings/mfd/max14577.txt [new file with mode: 0644]
Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt [new file with mode: 0644]
Documentation/devicetree/bindings/mfd/qcom-pm8xxx.txt [moved from Documentation/devicetree/bindings/mfd/qcom,pm8xxx.txt with 98% similarity]
Documentation/devicetree/bindings/mfd/rk808.txt [new file with mode: 0644]
Documentation/devicetree/bindings/mfd/rn5t618.txt [new file with mode: 0644]
Documentation/devicetree/bindings/mfd/stmpe.txt
Documentation/devicetree/bindings/mfd/twl4030-power.txt
Documentation/devicetree/bindings/power/reset/ltc2952-poweroff.txt [new file with mode: 0644]
Documentation/devicetree/bindings/power/reset/st-reset.txt [new file with mode: 0644]
Documentation/devicetree/bindings/power/reset/syscon-reboot.txt [new file with mode: 0644]
Documentation/kernel-parameters.txt
Documentation/power/charger-manager.txt
Documentation/power/power_supply_class.txt
MAINTAINERS
arch/alpha/kernel/perf_event.c
arch/alpha/kernel/time.c
arch/arm/boot/dts/exynos3250.dtsi
arch/arm/boot/dts/pxa27x.dtsi
arch/arm/boot/dts/sun5i-a10s.dtsi
arch/arm/boot/dts/sun5i-a13.dtsi
arch/arm/boot/dts/sun7i-a20.dtsi
arch/arm/kernel/smp_twd.c
arch/arm/mach-omap2/io.c
arch/arm/mach-omap2/prm_common.c
arch/arm/mach-pxa/include/mach/pxa2xx-regs.h
arch/avr32/kernel/kprobes.c
arch/blackfin/include/asm/ipipe.h
arch/blackfin/kernel/perf_event.c
arch/blackfin/mach-common/ints-priority.c
arch/blackfin/mach-common/smp.c
arch/ia64/include/asm/hw_irq.h
arch/ia64/include/asm/sn/arch.h
arch/ia64/include/asm/sn/nodepda.h
arch/ia64/include/asm/switch_to.h
arch/ia64/include/asm/uv/uv_hub.h
arch/ia64/kernel/irq.c
arch/ia64/kernel/irq_ia64.c
arch/ia64/kernel/kprobes.c
arch/ia64/kernel/mca.c
arch/ia64/kernel/process.c
arch/ia64/kernel/traps.c
arch/ia64/sn/kernel/setup.c
arch/ia64/sn/kernel/sn2/sn2_smp.c
arch/metag/kernel/perf/perf_event.c
arch/mips/cavium-octeon/octeon-irq.c
arch/mips/include/asm/fpu_emulator.h
arch/mips/kernel/kprobes.c
arch/mips/kernel/perf_event_mipsxx.c
arch/mips/kernel/smp-bmips.c
arch/mips/loongson/loongson-3/smp.c
arch/powerpc/include/asm/cputime.h
arch/s390/include/asm/irq.h
arch/s390/include/asm/percpu.h
arch/s390/kernel/idle.c
arch/s390/kernel/kprobes.c
arch/s390/kernel/nmi.c
arch/s390/kernel/perf_cpum_cf.c
arch/s390/kernel/perf_cpum_sf.c
arch/s390/kernel/processor.c
arch/s390/kernel/time.c
arch/s390/oprofile/hwsampler.c
arch/sparc/include/asm/cpudata_32.h
arch/sparc/include/asm/cpudata_64.h
arch/sparc/kernel/kprobes.c
arch/sparc/kernel/leon_smp.c
arch/sparc/kernel/nmi.c
arch/sparc/kernel/pci_sun4v.c
arch/sparc/kernel/perf_event.c
arch/sparc/kernel/sun4d_smp.c
arch/sparc/kernel/time_64.c
arch/sparc/mm/tlb.c
arch/tile/include/asm/irqflags.h
arch/tile/include/asm/mmu_context.h
arch/tile/kernel/irq.c
arch/tile/kernel/messaging.c
arch/tile/kernel/perf_event.c
arch/tile/kernel/process.c
arch/tile/kernel/setup.c
arch/tile/kernel/single_step.c
arch/tile/kernel/smp.c
arch/tile/kernel/smpboot.c
arch/tile/kernel/time.c
arch/tile/mm/highmem.c
arch/tile/mm/init.c
arch/x86/include/asm/debugreg.h
arch/x86/include/asm/perf_event_p4.h
arch/x86/include/asm/uv/uv_hub.h
arch/x86/kernel/apb_timer.c
arch/x86/kernel/apic/apic.c
arch/x86/kernel/apic/x2apic_cluster.c
arch/x86/kernel/cpu/common.c
arch/x86/kernel/cpu/mcheck/mce-inject.c
arch/x86/kernel/cpu/mcheck/mce.c
arch/x86/kernel/cpu/mcheck/mce_amd.c
arch/x86/kernel/cpu/mcheck/mce_intel.c
arch/x86/kernel/cpu/perf_event.c
arch/x86/kernel/cpu/perf_event_amd.c
arch/x86/kernel/cpu/perf_event_intel.c
arch/x86/kernel/cpu/perf_event_intel_ds.c
arch/x86/kernel/cpu/perf_event_intel_lbr.c
arch/x86/kernel/cpu/perf_event_intel_rapl.c
arch/x86/kernel/cpu/perf_event_knc.c
arch/x86/kernel/cpu/perf_event_p4.c
arch/x86/kernel/hw_breakpoint.c
arch/x86/kernel/irq_64.c
arch/x86/kernel/kvm.c
arch/x86/kvm/svm.c
arch/x86/kvm/vmx.c
arch/x86/kvm/x86.c
arch/x86/mm/kmemcheck/kmemcheck.c
arch/x86/oprofile/nmi_int.c
arch/x86/oprofile/op_model_p4.c
arch/x86/platform/uv/uv_nmi.c
arch/x86/platform/uv/uv_time.c
arch/x86/xen/enlighten.c
arch/x86/xen/multicalls.c
arch/x86/xen/spinlock.c
arch/x86/xen/time.c
crypto/hmac.c
crypto/testmgr.c
drivers/base/core.c
drivers/block/rbd.c
drivers/char/random.c
drivers/clk/Kconfig
drivers/clk/Makefile
drivers/clk/at91/clk-pll.c
drivers/clk/at91/clk-usb.c
drivers/clk/clk-axi-clkgen.c
drivers/clk/clk-fractional-divider.c
drivers/clk/clk-gate.c
drivers/clk/clk-gpio-gate.c [new file with mode: 0644]
drivers/clk/clk-max-gen.c [new file with mode: 0644]
drivers/clk/clk-max-gen.h [new file with mode: 0644]
drivers/clk/clk-max77686.c
drivers/clk/clk-max77802.c [new file with mode: 0644]
drivers/clk/clk-palmas.c
drivers/clk/clk-twl6040.c
drivers/clk/clk-wm831x.c
drivers/clk/clk.c
drivers/clk/hisilicon/clk-hix5hd2.c
drivers/clk/mvebu/armada-370.c
drivers/clk/mvebu/armada-375.c
drivers/clk/mvebu/common.c
drivers/clk/mvebu/common.h
drivers/clk/mvebu/kirkwood.c
drivers/clk/pxa/Makefile [new file with mode: 0644]
drivers/clk/pxa/clk-pxa.c [new file with mode: 0644]
drivers/clk/pxa/clk-pxa.h [new file with mode: 0644]
drivers/clk/pxa/clk-pxa27x.c [new file with mode: 0644]
drivers/clk/qcom/clk-pll.c
drivers/clk/qcom/clk-pll.h
drivers/clk/qcom/clk-rcg.c
drivers/clk/qcom/clk-rcg.h
drivers/clk/qcom/clk-rcg2.c
drivers/clk/qcom/common.c
drivers/clk/qcom/common.h
drivers/clk/qcom/gcc-ipq806x.c
drivers/clk/qcom/mmcc-apq8084.c
drivers/clk/qcom/mmcc-msm8960.c
drivers/clk/qcom/mmcc-msm8974.c
drivers/clk/rockchip/Makefile
drivers/clk/rockchip/clk-cpu.c [new file with mode: 0644]
drivers/clk/rockchip/clk-pll.c
drivers/clk/rockchip/clk-rk3188.c
drivers/clk/rockchip/clk-rk3288.c
drivers/clk/rockchip/clk.c
drivers/clk/rockchip/clk.h
drivers/clk/samsung/clk-exynos3250.c
drivers/clk/samsung/clk-exynos4.c
drivers/clk/samsung/clk-exynos5260.c
drivers/clk/samsung/clk-s3c2410-dclk.c
drivers/clk/samsung/clk-s3c2412.c
drivers/clk/samsung/clk-s3c2443.c
drivers/clk/shmobile/clk-rcar-gen2.c
drivers/clk/sunxi/Makefile
drivers/clk/sunxi/clk-factors.c
drivers/clk/sunxi/clk-factors.h
drivers/clk/sunxi/clk-mod0.c [new file with mode: 0644]
drivers/clk/sunxi/clk-sun6i-apb0-gates.c
drivers/clk/sunxi/clk-sun6i-apb0.c
drivers/clk/sunxi/clk-sun6i-ar100.c
drivers/clk/sunxi/clk-sun8i-apb0.c
drivers/clk/sunxi/clk-sun8i-mbus.c [new file with mode: 0644]
drivers/clk/sunxi/clk-sunxi.c
drivers/clk/tegra/clk-tegra124.c
drivers/clk/tegra/clk.c
drivers/clk/ti/clk-dra7-atl.c
drivers/clk/ti/clk.c
drivers/clk/ti/clockdomain.c
drivers/clk/ti/divider.c
drivers/clk/zynq/clkc.c
drivers/clk/zynq/pll.c
drivers/clocksource/dummy_timer.c
drivers/clocksource/metag_generic.c
drivers/clocksource/qcom-timer.c
drivers/cpufreq/kirkwood-cpufreq.c
drivers/cpuidle/governors/ladder.c
drivers/cpuidle/governors/menu.c
drivers/crypto/ccp/ccp-crypto-sha.c
drivers/crypto/mv_cesa.c
drivers/crypto/n2_core.c
drivers/crypto/omap-sham.c
drivers/crypto/qat/qat_common/qat_algs.c
drivers/i2c/busses/i2c-cros-ec-tunnel.c
drivers/ide/atiixp.c
drivers/infiniband/hw/usnic/usnic_uiom.c
drivers/input/keyboard/cros_ec_keyb.c
drivers/iommu/amd_iommu.c
drivers/iommu/amd_iommu_init.c
drivers/iommu/amd_iommu_types.h
drivers/iommu/arm-smmu.c
drivers/iommu/dmar.c
drivers/iommu/exynos-iommu.c
drivers/iommu/fsl_pamu_domain.c
drivers/iommu/intel-iommu.c
drivers/iommu/intel_irq_remapping.c
drivers/iommu/iommu.c
drivers/iommu/irq_remapping.c
drivers/iommu/irq_remapping.h
drivers/iommu/msm_iommu.c
drivers/iommu/omap-iommu.c
drivers/iommu/omap-iommu.h
drivers/iommu/tegra-gart.c
drivers/iommu/tegra-smmu.c
drivers/irqchip/irq-gic.c
drivers/md/dm-crypt.c
drivers/md/dm-stats.c
drivers/mfd/88pm860x-i2c.c
drivers/mfd/Kconfig
drivers/mfd/Makefile
drivers/mfd/arizona-core.c
drivers/mfd/arizona-irq.c
drivers/mfd/axp20x.c
drivers/mfd/cros_ec.c
drivers/mfd/cros_ec_spi.c
drivers/mfd/da9052-core.c
drivers/mfd/da9052-i2c.c
drivers/mfd/da9052-spi.c
drivers/mfd/hi6421-pmic-core.c [new file with mode: 0644]
drivers/mfd/htc-i2cpld.c
drivers/mfd/intel_soc_pmic_core.c
drivers/mfd/lpc_ich.c
drivers/mfd/lpc_sch.c
drivers/mfd/max14577.c
drivers/mfd/max77686.c
drivers/mfd/max77693.c
drivers/mfd/max8925-i2c.c
drivers/mfd/mc13xxx-core.c
drivers/mfd/menelaus.c
drivers/mfd/mfd-core.c
drivers/mfd/pcf50633-core.c
drivers/mfd/qcom-spmi-pmic.c [new file with mode: 0644]
drivers/mfd/rk808.c [new file with mode: 0644]
drivers/mfd/rn5t618.c [new file with mode: 0644]
drivers/mfd/rtsx_pcr.c
drivers/mfd/rtsx_usb.c
drivers/mfd/sm501.c
drivers/mfd/stmpe.c
drivers/mfd/ti_am335x_tscadc.c
drivers/mfd/tps65217.c
drivers/mfd/tps65910.c
drivers/mfd/twl4030-irq.c
drivers/mfd/twl4030-power.c
drivers/mfd/twl6040.c
drivers/mfd/wm5102-tables.c
drivers/mfd/wm5110-tables.c
drivers/mfd/wm8994-irq.c
drivers/mfd/wm8994-regmap.c
drivers/net/ethernet/tile/tilegx.c
drivers/net/ethernet/tile/tilepro.c
drivers/oprofile/cpu_buffer.c
drivers/oprofile/timer_int.c
drivers/power/Kconfig
drivers/power/ab8500_fg.c
drivers/power/bq27x00_battery.c
drivers/power/charger-manager.c
drivers/power/gpio-charger.c
drivers/power/max14577_charger.c
drivers/power/max17040_battery.c
drivers/power/max8925_power.c
drivers/power/power_supply_core.c
drivers/power/power_supply_leds.c
drivers/power/power_supply_sysfs.c
drivers/power/reset/Kconfig
drivers/power/reset/Makefile
drivers/power/reset/gpio-restart.c [new file with mode: 0644]
drivers/power/reset/ltc2952-poweroff.c [new file with mode: 0644]
drivers/power/reset/msm-poweroff.c
drivers/power/reset/st-poweroff.c [new file with mode: 0644]
drivers/power/reset/syscon-reboot.c [new file with mode: 0644]
drivers/power/reset/xgene-reboot.c
drivers/power/sbs-battery.c
drivers/regulator/max14577.c
drivers/s390/cio/ccwreq.c
drivers/s390/cio/chsc_sch.c
drivers/s390/cio/cio.c
drivers/s390/cio/device_fsm.c
drivers/s390/cio/eadm_sch.c
drivers/vfio/vfio_iommu_type1.c
fs/btrfs/hash.c
fs/ceph/acl.c
fs/ceph/addr.c
fs/ceph/caps.c
fs/ceph/debugfs.c
fs/ceph/dir.c
fs/ceph/file.c
fs/ceph/inode.c
fs/ceph/ioctl.c
fs/ceph/mds_client.c
fs/ceph/mds_client.h
fs/ceph/super.h
fs/ceph/xattr.c
fs/ext4/mballoc.c
fs/namespace.c
include/asm-generic/clkdev.h
include/crypto/hash.h
include/dt-bindings/clock/exynos3250.h
include/dt-bindings/clock/exynos4.h
include/dt-bindings/clock/hix5hd2-clock.h
include/dt-bindings/clock/maxim,max77686.h [new file with mode: 0644]
include/dt-bindings/clock/maxim,max77802.h [new file with mode: 0644]
include/dt-bindings/clock/pxa-clock.h [new file with mode: 0644]
include/dt-bindings/clock/rk3188-cru-common.h
include/dt-bindings/clock/rk3288-cru.h
include/dt-bindings/clock/rockchip,rk808.h [new file with mode: 0644]
include/dt-bindings/clock/tegra124-car.h
include/linux/ceph/libceph.h
include/linux/ceph/pagelist.h
include/linux/ceph/rados.h
include/linux/clk-private.h
include/linux/clk-provider.h
include/linux/clk.h
include/linux/clk/ti.h
include/linux/cpumask.h
include/linux/device.h
include/linux/dmar.h
include/linux/iommu.h
include/linux/kernel_stat.h
include/linux/mfd/arizona/registers.h
include/linux/mfd/core.h
include/linux/mfd/cros_ec.h
include/linux/mfd/da9052/da9052.h
include/linux/mfd/davinci_voicecodec.h
include/linux/mfd/hi6421-pmic.h [new file with mode: 0644]
include/linux/mfd/max14577-private.h
include/linux/mfd/max14577.h
include/linux/mfd/max77693-private.h
include/linux/mfd/max77693.h
include/linux/mfd/rk808.h [new file with mode: 0644]
include/linux/mfd/rn5t618.h [new file with mode: 0644]
include/linux/mfd/ti_am335x_tscadc.h
include/linux/mfd/ti_ssp.h [deleted file]
include/linux/mfd/tps65217.h
include/linux/pci_ids.h
include/linux/percpu-defs.h
include/linux/power_supply.h
include/net/netfilter/nf_conntrack.h
include/net/snmp.h
kernel/events/callchain.c
kernel/events/core.c
kernel/futex.c
kernel/irq/chip.c
kernel/irq_work.c
kernel/printk/printk.c
kernel/sched/clock.c
kernel/sched/deadline.c
kernel/sched/fair.c
kernel/sched/rt.c
kernel/sched/sched.h
kernel/smp.c
kernel/softirq.c
kernel/taskstats.c
kernel/time/hrtimer.c
kernel/time/tick-broadcast.c
kernel/time/tick-common.c
kernel/time/tick-oneshot.c
kernel/time/tick-sched.c
kernel/time/timer.c
kernel/user-return-notifier.c
kernel/watchdog.c
lib/libcrc32c.c
net/ceph/Kconfig
net/ceph/ceph_common.c
net/ceph/ceph_strings.c
net/ceph/debugfs.c
net/ceph/messenger.c
net/ceph/mon_client.c
net/ceph/osd_client.c
net/ceph/osdmap.c
net/ceph/pagelist.c
net/core/dev.c
net/core/drop_monitor.c
net/core/skbuff.c
net/ipv4/route.c
net/ipv4/syncookies.c
net/ipv4/tcp.c
net/ipv4/tcp_output.c
net/ipv6/syncookies.c
net/rds/ib_rdma.c
security/integrity/ima/ima_crypto.c
sound/soc/codecs/arizona.c
virt/kvm/iommu.c

index 78c7baca35879103d6de56d08e1c7bd4724bc9aa..909e7602c717aa4555e36be1ef6d1591e420c7cd 100644 (file)
@@ -18,3 +18,17 @@ Description:
                This file is writeable and can be used to set the assumed
                battery 'full level'. As batteries age, this value has to be
                amended over time.
+
+What:          /sys/class/power_supply/max14577-charger/device/fast_charge_timer
+Date:          October 2014
+KernelVersion: 3.18.0
+Contact:       Krzysztof Kozlowski <k.kozlowski@samsung.com>
+Description:
+               This entry shows and sets the maximum time the max14577
+               charger operates in fast-charge mode. When the timer expires
+               the device will terminate fast-charge mode (charging current
+               will drop to 0 A) and will trigger interrupt.
+
+               Valid values:
+               - 5, 6 or 7 (hours),
+               - 0: disabled.
index e182be5e3c83cb553341f7969678370e649fcb2d..b60d2ab69497bc66b47e752d1f7588b3cdbb93ab 100644 (file)
@@ -312,3 +312,30 @@ a code like this:
 
 There are also devm_* versions of these functions which release the
 descriptors once the device is released.
+
+MFD devices
+~~~~~~~~~~~
+The MFD devices register their children as platform devices. For the child
+devices there needs to be an ACPI handle that they can use to reference
+parts of the ACPI namespace that relate to them. In the Linux MFD subsystem
+we provide two ways:
+
+       o The children share the parent ACPI handle.
+       o The MFD cell can specify the ACPI id of the device.
+
+For the first case, the MFD drivers do not need to do anything. The
+resulting child platform device will have its ACPI_COMPANION() set to point
+to the parent device.
+
+If the ACPI namespace has a device that we can match using an ACPI id,
+the id should be set like:
+
+       static struct mfd_cell my_subdevice_cell = {
+               .name = "my_subdevice",
+               /* set the resources relative to the parent */
+               .acpi_pnpid = "XYZ0001",
+       };
+
+The ACPI id "XYZ0001" is then used to lookup an ACPI device directly under
+the MFD device and if found, that ACPI companion device is bound to the
+resulting child platform device.
index aadc9c59e2d17ea31e2ccdc82a3c688de4106a66..f57d9dd9ea8530ae9c8d02723b1bc15d38002497 100644 (file)
@@ -7,6 +7,8 @@ Required Properties:
 
 - compatible: should be one of the following.
   - "samsung,exynos3250-cmu" - controller compatible with Exynos3250 SoC.
+  - "samsung,exynos3250-cmu-dmc" - controller compatible with
+    Exynos3250 SoC for Dynamic Memory Controller domain.
 
 - reg: physical base address of the controller and length of memory mapped
   region.
@@ -20,7 +22,7 @@ All available clocks are defined as preprocessor macros in
 dt-bindings/clock/exynos3250.h header and can be used in device
 tree sources.
 
-Example 1: An example of a clock controller node is listed below.
+Example 1: Examples of clock controller nodes are listed below.
 
        cmu: clock-controller@10030000 {
                compatible = "samsung,exynos3250-cmu";
@@ -28,6 +30,12 @@ Example 1: An example of a clock controller node is listed below.
                #clock-cells = <1>;
        };
 
+       cmu_dmc: clock-controller@105C0000 {
+               compatible = "samsung,exynos3250-cmu-dmc";
+               reg = <0x105C0000 0x2000>;
+               #clock-cells = <1>;
+       };
+
 Example 2: UART controller node that consumes the clock generated by the clock
           controller. Refer to the standard clock bindings for information
           about 'clocks' and 'clock-names' property.
diff --git a/Documentation/devicetree/bindings/clock/gpio-gate-clock.txt b/Documentation/devicetree/bindings/clock/gpio-gate-clock.txt
new file mode 100644 (file)
index 0000000..d3379ff
--- /dev/null
@@ -0,0 +1,21 @@
+Binding for simple gpio gated clock.
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+Required properties:
+- compatible : shall be "gpio-gate-clock".
+- #clock-cells : from common clock binding; shall be set to 0.
+- enable-gpios : GPIO reference for enabling and disabling the clock.
+
+Optional properties:
+- clocks: Maximum of one parent clock is supported.
+
+Example:
+       clock {
+               compatible = "gpio-gate-clock";
+               clocks = <&parentclk>;
+               #clock-cells = <0>;
+               enable-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
+       };
index 96ce71bbd745ebb09a4e9bbe44378cdf0a728cc7..9c40739a661a835af3658af49f183ef98354bbc1 100644 (file)
@@ -9,13 +9,21 @@ The MAX77686 contains three 32.768khz clock outputs that can be controlled
 Following properties should be presend in main device node of the MFD chip.
 
 Required properties:
-- #clock-cells: simple one-cell clock specifier format is used, where the
-  only cell is used as an index of the clock inside the provider. Following
-  indices are allowed:
+
+- #clock-cells: from common clock binding; shall be set to 1.
+
+Optional properties:
+- clock-output-names: From common clock binding.
+
+Each clock is assigned an identifier and client nodes can use this identifier
+to specify the clock which they consume. Following indices are allowed:
     - 0: 32khz_ap clock,
     - 1: 32khz_cp clock,
     - 2: 32khz_pmic clock.
 
+Clocks are defined as preprocessor macros in dt-bindings/clock/maxim,max77686.h
+header and can be used in device tree sources.
+
 Example: Node of the MFD chip
 
        max77686: max77686@09 {
@@ -34,5 +42,5 @@ Example: Clock consumer node
                compatible = "bar,foo";
                /* ... */
                clock-names = "my-clock";
-               clocks = <&max77686 2>;
+               clocks = <&max77686 MAX77686_CLK_PMIC>;
        };
diff --git a/Documentation/devicetree/bindings/clock/maxim,max77802.txt b/Documentation/devicetree/bindings/clock/maxim,max77802.txt
new file mode 100644 (file)
index 0000000..c6dc783
--- /dev/null
@@ -0,0 +1,44 @@
+Binding for Maxim MAX77802 32k clock generator block
+
+This is a part of device tree bindings of MAX77802 multi-function device.
+More information can be found in bindings/mfd/max77802.txt file.
+
+The MAX77802 contains two 32.768khz clock outputs that can be controlled
+(gated/ungated) over I2C.
+
+Following properties should be present in main device node of the MFD chip.
+
+Required properties:
+- #clock-cells: From common clock binding; shall be set to 1.
+
+Optional properties:
+- clock-output-names: From common clock binding.
+
+Each clock is assigned an identifier and client nodes can use this identifier
+to specify the clock which they consume. Following indices are allowed:
+     - 0: 32khz_ap clock,
+     - 1: 32khz_cp clock.
+
+Clocks are defined as preprocessor macros in dt-bindings/clock/maxim,max77802.h
+header and can be used in device tree sources.
+
+Example: Node of the MFD chip
+
+       max77802: max77802@09 {
+               compatible = "maxim,max77802";
+               interrupt-parent = <&wakeup_eint>;
+               interrupts = <26 0>;
+               reg = <0x09>;
+               #clock-cells = <1>;
+
+               /* ... */
+       };
+
+Example: Clock consumer node
+
+       foo@0 {
+               compatible = "bar,foo";
+               /* ... */
+               clock-names = "my-clock";
+               clocks = <&max77802 MAX77802_CLK_32K_AP>;
+       };
diff --git a/Documentation/devicetree/bindings/clock/pxa-clock.txt b/Documentation/devicetree/bindings/clock/pxa-clock.txt
new file mode 100644 (file)
index 0000000..4b4a902
--- /dev/null
@@ -0,0 +1,16 @@
+* Clock bindings for Marvell PXA chips
+
+Required properties:
+- compatible: Should be "marvell,pxa-clocks"
+- #clock-cells: Should be <1>
+
+The clock consumer should specify the desired clock by having the clock
+ID in its "clocks" phandle cell (see include/.../pxa-clock.h).
+
+Examples:
+
+pxa2xx_clks: pxa2xx_clks@41300004 {
+        compatible = "marvell,pxa-clocks";
+        #clock-cells = <1>;
+        status = "okay";
+};
index 8f1424f0fa439cdfac3e16e0e6e90ef039218ab0..a5f52238c80d5f9b9560914f59e653e772b42bea 100644 (file)
@@ -15,6 +15,7 @@ Required Properties:
     - "renesas,r8a7779-mstp-clocks" for R8A7779 (R-Car H1) MSTP gate clocks
     - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks
     - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks
+    - "renesas,r8a7794-mstp-clocks" for R8A7794 (R-Car E2) MSTP gate clocks
     - "renesas,sh73a0-mstp-clocks" for SH73A0 (SH-MobileAG5) MSTP gate clocks
     - "renesas,cpg-mstp-clock" for generic MSTP gate clocks
   - reg: Base address and length of the I/O mapped registers used by the MSTP
index 7b41c2fe54dbcfbd950b9b650d6bfc2ae374a0c0..e6ad35b894f919f537dbf58cbdea6fffd9cddfc9 100644 (file)
@@ -8,6 +8,7 @@ Required Properties:
   - compatible: Must be one of
     - "renesas,r8a7790-cpg-clocks" for the r8a7790 CPG
     - "renesas,r8a7791-cpg-clocks" for the r8a7791 CPG
+    - "renesas,r8a7794-cpg-clocks" for the r8a7794 CPG
     - "renesas,rcar-gen2-cpg-clocks" for the generic R-Car Gen2 CPG
 
   - reg: Base address and length of the memory resource used by the CPG
index d3a5c3c6d6774602667a69e9e93e7511039ef3f4..ed116df9c3e769a2ceef9cb4d1dd1eaf44473f38 100644 (file)
@@ -46,7 +46,11 @@ Required properties:
        "allwinner,sun6i-a31-apb2-div-clk" - for the APB2 gates on A31
        "allwinner,sun6i-a31-apb2-gates-clk" - for the APB2 gates on A31
        "allwinner,sun8i-a23-apb2-gates-clk" - for the APB2 gates on A23
+       "allwinner,sun5i-a13-mbus-clk" - for the MBUS clock on A13
+       "allwinner,sun4i-a10-mmc-output-clk" - for the MMC output clock on A10
+       "allwinner,sun4i-a10-mmc-sample-clk" - for the MMC sample clock on A10
        "allwinner,sun4i-a10-mod0-clk" - for the module 0 family of clocks
+       "allwinner,sun8i-a23-mbus-clk" - for the MBUS clock on A23
        "allwinner,sun7i-a20-out-clk" - for the external output clocks
        "allwinner,sun7i-a20-gmac-clk" - for the GMAC clock module on A20/A31
        "allwinner,sun4i-a10-usb-clk" - for usb gates + resets on A10 / A20
diff --git a/Documentation/devicetree/bindings/gpio/gpio-restart.txt b/Documentation/devicetree/bindings/gpio/gpio-restart.txt
new file mode 100644 (file)
index 0000000..af3701b
--- /dev/null
@@ -0,0 +1,54 @@
+Drive a GPIO line that can be used to restart the system from a restart
+handler.
+
+This binding supports level and edge triggered reset.  At driver load
+time, the driver will request the given gpio line and install a restart
+handler. If the optional properties 'open-source' is not found, the GPIO line
+will be driven in the inactive state.  Otherwise its not driven until
+the restart is initiated.
+
+When the system is restarted, the restart handler will be invoked in
+priority order.  The gpio is configured as an output, and driven active,
+triggering a level triggered reset condition. This will also cause an
+inactive->active edge condition, triggering positive edge triggered
+reset. After a delay specified by active-delay, the GPIO is set to
+inactive, thus causing an active->inactive edge, triggering negative edge
+triggered reset. After a delay specified by inactive-delay, the GPIO
+is driven active again.  After a delay specified by wait-delay, the
+restart handler completes allowing other restart handlers to be attempted.
+
+Required properties:
+- compatible : should be "gpio-restart".
+- gpios : The GPIO to set high/low, see "gpios property" in
+  Documentation/devicetree/bindings/gpio/gpio.txt. If the pin should be
+  low to reset the board set it to "Active Low", otherwise set
+  gpio to "Active High".
+
+Optional properties:
+- open-source : Treat the GPIO as being open source and defer driving
+  it to when the restart is initiated.  If this optional property is not
+  specified, the GPIO is initialized as an output in its inactive state.
+- priority : A priority ranging from 0 to 255 (default 128) according to
+  the following guidelines:
+       0:      Restart handler of last resort, with limited restart
+               capabilities
+       128:    Default restart handler; use if no other restart handler is
+               expected to be available, and/or if restart functionality is
+               sufficient to restart the entire system
+       255:    Highest priority restart handler, will preempt all other
+               restart handlers
+- active-delay: Delay (default 100) to wait after driving gpio active [ms]
+- inactive-delay: Delay (default 100) to wait after driving gpio inactive [ms]
+- wait-delay: Delay (default 3000) to wait after completing restart
+  sequence [ms]
+
+Examples:
+
+gpio-restart {
+       compatible = "gpio-restart";
+       gpios = <&gpio 4 0>;
+       priority = <128>;
+       active-delay = <100>;
+       inactive-delay = <100>;
+       wait-delay = <3000>;
+};
index 2d0f7cd867eaede3cad0a0d163e131b46716be2b..06760503a819f5fbc15e747626ce3f734b2888ff 100644 (file)
@@ -14,6 +14,7 @@ conditions.
                         "arm,smmu-v1"
                         "arm,smmu-v2"
                         "arm,mmu-400"
+                        "arm,mmu-401"
                         "arm,mmu-500"
 
                   depending on the particular implementation and/or the
index 5c7e7230984a5c064da0ef8613ded1caf78f2bb9..7bd1273f571a40fa46b7c5c0540a4fe7c9370c4a 100644 (file)
@@ -42,6 +42,13 @@ Optional properties:
     the chip default will be used.  If present exactly five values must
     be specified.
 
+  - wlf,inmode : A list of INn_MODE register values, where n is the number
+    of input signals. Valid values are 0 (Differential), 1 (Single-ended) and
+    2 (Digital Microphone). If absent, INn_MODE registers set to 0 by default.
+    If present, values must be specified less than or equal to the number of
+    input singals. If values less than the number of input signals, elements
+    that has not been specifed are set to 0 by default.
+
   - DCVDD-supply, MICVDD-supply : Power supplies, only need to be specified if
     they are being externally supplied. As covered in
     Documentation/devicetree/bindings/regulator/regulator.txt
diff --git a/Documentation/devicetree/bindings/mfd/atmel-gpbr.txt b/Documentation/devicetree/bindings/mfd/atmel-gpbr.txt
new file mode 100644 (file)
index 0000000..a285695
--- /dev/null
@@ -0,0 +1,15 @@
+* Device tree bindings for Atmel GPBR (General Purpose Backup Registers)
+
+The GPBR are a set of battery-backed registers.
+
+Required properties:
+- compatible:          "atmel,at91sam9260-gpbr", "syscon"
+- reg:                 contains offset/length value of the GPBR memory
+                       region.
+
+Example:
+
+gpbr: gpbr@fffffd50 {
+       compatible = "atmel,at91sam9260-gpbr", "syscon";
+       reg = <0xfffffd50 0x10>;
+};
diff --git a/Documentation/devicetree/bindings/mfd/hi6421.txt b/Documentation/devicetree/bindings/mfd/hi6421.txt
new file mode 100644 (file)
index 0000000..0d5a446
--- /dev/null
@@ -0,0 +1,38 @@
+* HI6421 Multi-Functional Device (MFD), by HiSilicon Ltd.
+
+Required parent device properties:
+- compatible   : contains "hisilicon,hi6421-pmic";
+- reg          : register range space of hi6421;
+
+Supported Hi6421 sub-devices include:
+
+Device                     IRQ Names              Supply Names   Description
+------                     ---------              ------------   -----------
+regulators               :  None                 : None         : Regulators
+
+Required child device properties:
+None.
+
+Example:
+       hi6421 {
+               compatible = "hisilicon,hi6421-pmic";
+               reg = <0xfcc00000 0x0180>; /* 0x60 << 2 */
+
+               regulators {
+                       // supply for MLC NAND/ eMMC
+                       hi6421_vout0_reg: hi6421_vout0 {
+                               regulator-name = "VOUT0";
+                               regulator-min-microvolt = <2850000>;
+                               regulator-max-microvolt = <2850000>;
+                       };
+
+                       // supply for 26M Oscillator
+                       hi6421_vout1_reg: hi6421_vout1 {
+                               regulator-name = "VOUT1";
+                               regulator-min-microvolt = <1700000>;
+                               regulator-max-microvolt = <2000000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+               };
+       };
diff --git a/Documentation/devicetree/bindings/mfd/max14577.txt b/Documentation/devicetree/bindings/mfd/max14577.txt
new file mode 100644 (file)
index 0000000..236264c
--- /dev/null
@@ -0,0 +1,146 @@
+Maxim MAX14577/77836 Multi-Function Device
+
+MAX14577 is a Multi-Function Device with Micro-USB Interface Circuit, Li+
+Battery Charger and SFOUT LDO output for powering USB devices. It is
+interfaced to host controller using I2C.
+
+MAX77836 additionally contains PMIC (with two LDO regulators) and Fuel Gauge.
+
+
+Required properties:
+- compatible : Must be "maxim,max14577" or "maxim,max77836".
+- reg : I2C slave address for the max14577 chip (0x25 for max14577/max77836)
+- interrupts : IRQ line for the chip.
+- interrupt-parent :  The parent interrupt controller.
+
+
+Required nodes:
+ - charger :
+       Node for configuring the charger driver.
+       Required properties:
+               - compatible : "maxim,max14577-charger"
+                       or "maxim,max77836-charger"
+               - maxim,fast-charge-uamp : Current in uA for Fast Charge;
+                       Valid values:
+                       - for max14577: 90000 - 950000;
+                       - for max77836: 45000 - 475000;
+               - maxim,eoc-uamp : Current in uA for End-Of-Charge mode;
+                       Valid values:
+                       - for max14577: 50000 - 200000;
+                       - for max77836: 5000 - 100000;
+               - maxim,ovp-uvolt : OverVoltage Protection Threshold in uV;
+                       In an overvoltage condition, INT asserts and charging
+                       stops. Valid values:
+                       - 6000000, 6500000, 7000000, 7500000;
+               - maxim,constant-uvolt : Battery Constant Voltage in uV;
+                       Valid values:
+                       - 4000000 - 4280000 (step by 20000);
+                       - 4350000;
+
+
+Optional nodes:
+- max14577-muic/max77836-muic :
+       Node used only by extcon consumers.
+       Required properties:
+               - compatible : "maxim,max14577-muic" or "maxim,max77836-muic"
+
+- regulators :
+       Required properties:
+               - compatible : "maxim,max14577-regulator"
+                       or "maxim,max77836-regulator"
+
+       May contain a sub-node per regulator from the list below. Each
+       sub-node should contain the constraints and initialization information
+       for that regulator. See regulator.txt for a description of standard
+       properties for these sub-nodes.
+
+       List of valid regulator names:
+       - for max14577: CHARGER, SAFEOUT.
+       - for max77836: CHARGER, SAFEOUT, LDO1, LDO2.
+
+       The SAFEOUT is a fixed voltage regulator so there is no need to specify
+       voltages for it.
+
+
+Example:
+
+#include <dt-bindings/interrupt-controller/irq.h>
+
+max14577@25 {
+       compatible = "maxim,max14577";
+       reg = <0x25>;
+       interrupt-parent = <&gpx1>;
+       interrupts = <5 IRQ_TYPE_NONE>;
+
+       muic: max14577-muic {
+               compatible = "maxim,max14577-muic";
+       };
+
+       regulators {
+               compatible = "maxim,max14577-regulator";
+
+               SAFEOUT {
+                       regulator-name = "SAFEOUT";
+               };
+               CHARGER {
+                       regulator-name = "CHARGER";
+                       regulator-min-microamp = <90000>;
+                       regulator-max-microamp = <950000>;
+                       regulator-boot-on;
+               };
+       };
+
+       charger {
+               compatible = "maxim,max14577-charger";
+
+               maxim,constant-uvolt = <4350000>;
+               maxim,fast-charge-uamp = <450000>;
+               maxim,eoc-uamp = <50000>;
+               maxim,ovp-uvolt = <6500000>;
+       };
+};
+
+
+max77836@25 {
+       compatible = "maxim,max77836";
+       reg = <0x25>;
+       interrupt-parent = <&gpx1>;
+       interrupts = <5 IRQ_TYPE_NONE>;
+
+       muic: max77836-muic {
+               compatible = "maxim,max77836-muic";
+       };
+
+       regulators {
+               compatible = "maxim,max77836-regulator";
+
+               SAFEOUT {
+                       regulator-name = "SAFEOUT";
+               };
+               CHARGER {
+                       regulator-name = "CHARGER";
+                       regulator-min-microamp = <90000>;
+                       regulator-max-microamp = <950000>;
+                       regulator-boot-on;
+               };
+               LDO1 {
+                       regulator-name = "LDO1";
+                       regulator-min-microvolt = <2700000>;
+                       regulator-max-microvolt = <2700000>;
+               };
+               LDO2 {
+                       regulator-name = "LDO2";
+                       regulator-min-microvolt = <800000>;
+                       regulator-max-microvolt = <3950000>;
+               };
+       };
+
+       charger {
+               compatible = "maxim,max77836-charger";
+
+               maxim,constant-uvolt = <4350000>;
+               maxim,fast-charge-uamp = <225000>;
+               maxim,eoc-uamp = <7500>;
+               maxim,ovp-uvolt = <6500000>;
+       };
+};
diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt
new file mode 100644 (file)
index 0000000..7182b88
--- /dev/null
@@ -0,0 +1,64 @@
+          Qualcomm SPMI PMICs multi-function device bindings
+
+The Qualcomm SPMI series presently includes PM8941, PM8841 and PMA8084
+PMICs.  These PMICs use a QPNP scheme through SPMI interface.
+QPNP is effectively a partitioning scheme for dividing the SPMI extended
+register space up into logical pieces, and set of fixed register
+locations/definitions within these regions, with some of these regions
+specifically used for interrupt handling.
+
+The QPNP PMICs are used with the Qualcomm Snapdragon series SoCs, and are
+interfaced to the chip via the SPMI (System Power Management Interface) bus.
+Support for multiple independent functions are implemented by splitting the
+16-bit SPMI slave address space into 256 smaller fixed-size regions, 256 bytes
+each. A function can consume one or more of these fixed-size register regions.
+
+Required properties:
+- compatible:      Should contain one of:
+                     "qcom,pm8941"
+                     "qcom,pm8841"
+                     "qcom,pma8084"
+                     or generalized "qcom,spmi-pmic".
+- reg:             Specifies the SPMI USID slave address for this device.
+                   For more information see:
+                   Documentation/devicetree/bindings/spmi/spmi.txt
+
+Required properties for peripheral child nodes:
+- compatible:      Should contain "qcom,xxx", where "xxx" is a peripheral name.
+
+Optional properties for peripheral child nodes:
+- interrupts:      Interrupts are specified as a 4-tuple. For more information
+                   see:
+                   Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt
+- interrupt-names: Corresponding interrupt name to the interrupts property
+
+Each child node of SPMI slave id represents a function of the PMIC. In the
+example below the rtc device node represents a peripheral of pm8941
+SID = 0. The regulator device node represents a peripheral of pm8941 SID = 1.
+
+Example:
+
+       spmi {
+               compatible = "qcom,spmi-pmic-arb";
+
+               pm8941@0 {
+                       compatible = "qcom,pm8941", "qcom,spmi-pmic";
+                       reg = <0x0 SPMI_USID>;
+
+                       rtc {
+                               compatible = "qcom,rtc";
+                               interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
+                               interrupt-names = "alarm";
+                       };
+               };
+
+               pm8941@1 {
+                       compatible = "qcom,pm8941", "qcom,spmi-pmic";
+                       reg = <0x1 SPMI_USID>;
+
+                       regulator {
+                               compatible = "qcom,regulator";
+                               regulator-name = "8941_boost";
+                       };
+               };
+       };
similarity index 98%
rename from Documentation/devicetree/bindings/mfd/qcom,pm8xxx.txt
rename to Documentation/devicetree/bindings/mfd/qcom-pm8xxx.txt
index 03518dc8b6bdc71257458e053e1acd275870945f..f24f334091648bbecbe3fd314ea08aaf2f0252cc 100644 (file)
@@ -61,6 +61,7 @@ The below bindings specify the set of valid subnodes.
        Definition: must be one of:
                    "qcom,pm8058-rtc"
                    "qcom,pm8921-rtc"
+                   "qcom,pm8941-rtc"
 
 - reg:
        Usage: required
diff --git a/Documentation/devicetree/bindings/mfd/rk808.txt b/Documentation/devicetree/bindings/mfd/rk808.txt
new file mode 100644 (file)
index 0000000..9e6e259
--- /dev/null
@@ -0,0 +1,177 @@
+RK808 Power Management Integrated Circuit
+
+Required properties:
+- compatible: "rockchip,rk808"
+- reg: I2C slave address
+- interrupt-parent: The parent interrupt controller.
+- interrupts: the interrupt outputs of the controller.
+- #clock-cells: from common clock binding; shall be set to 1 (multiple clock
+  outputs). See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
+
+Optional properties:
+- clock-output-names: From common clock binding to override the
+  default output clock name
+- rockchip,system-power-controller: Telling whether or not this pmic is controlling
+  the system power.
+- vcc1-supply:  The input supply for DCDC_REG1
+- vcc2-supply:  The input supply for DCDC_REG2
+- vcc3-supply:  The input supply for DCDC_REG3
+- vcc4-supply:  The input supply for DCDC_REG4
+- vcc6-supply:  The input supply for LDO_REG1 and LDO_REG2
+- vcc7-supply:  The input supply for LDO_REG3 and LDO_REG7
+- vcc8-supply:  The input supply for SWITCH_REG1
+- vcc9-supply:  The input supply for LDO_REG4 and LDO_REG5
+- vcc10-supply: The input supply for LDO_REG6
+- vcc11-supply: The input supply for LDO_REG8
+- vcc12-supply: The input supply for SWITCH_REG2
+
+Regulators: All the regulators of RK808 to be instantiated shall be
+listed in a child node named 'regulators'. Each regulator is represented
+by a child node of the 'regulators' node.
+
+       regulator-name {
+               /* standard regulator bindings here */
+       };
+
+Following regulators of the RK808 PMIC block are supported. Note that
+the 'n' in regulator name, as in DCDC_REGn or LDOn, represents the DCDC or LDO
+number as described in RK808 datasheet.
+
+       - DCDC_REGn
+               - valid values for n are 1 to 4.
+       - LDO_REGn
+               - valid values for n are 1 to 8.
+       - SWITCH_REGn
+               - valid values for n are 1 to 2
+
+Standard regulator bindings are used inside regulator subnodes. Check
+  Documentation/devicetree/bindings/regulator/regulator.txt
+for more details
+
+Example:
+       rk808: pmic@1b {
+               compatible = "rockchip,rk808";
+               clock-output-names = "xin32k", "rk808-clkout2";
+               interrupt-parent = <&gpio0>;
+               interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pmic_int>;
+               reg = <0x1b>;
+               rockchip,system-power-controller;
+               wakeup-source;
+               #clock-cells = <1>;
+
+               vcc8-supply = <&vcc_18>;
+               vcc9-supply = <&vcc_io>;
+               vcc10-supply = <&vcc_io>;
+               vcc12-supply = <&vcc_io>;
+               vddio-supply = <&vccio_pmu>;
+
+               regulators {
+                       vdd_cpu: DCDC_REG1 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <750000>;
+                               regulator-max-microvolt = <1300000>;
+                               regulator-name = "vdd_arm";
+                       };
+
+                       vdd_gpu: DCDC_REG2 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <850000>;
+                               regulator-max-microvolt = <1250000>;
+                               regulator-name = "vdd_gpu";
+                       };
+
+                       vcc_ddr: DCDC_REG3 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-name = "vcc_ddr";
+                       };
+
+                       vcc_io: DCDC_REG4 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-name = "vcc_io";
+                       };
+
+                       vccio_pmu: LDO_REG1 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-name = "vccio_pmu";
+                       };
+
+                       vcc_tp: LDO_REG2 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-name = "vcc_tp";
+                       };
+
+                       vdd_10: LDO_REG3 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <1000000>;
+                               regulator-max-microvolt = <1000000>;
+                               regulator-name = "vdd_10";
+                       };
+
+                       vcc18_lcd: LDO_REG4 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-name = "vcc18_lcd";
+                       };
+
+                       vccio_sd: LDO_REG5 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-name = "vccio_sd";
+                       };
+
+                       vdd10_lcd: LDO_REG6 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <1000000>;
+                               regulator-max-microvolt = <1000000>;
+                               regulator-name = "vdd10_lcd";
+                       };
+
+                       vcc_18: LDO_REG7 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-name = "vcc_18";
+                       };
+
+                       vcca_codec: LDO_REG8 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-name = "vcca_codec";
+                       };
+
+                       vcc_wl: SWITCH_REG1 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-name = "vcc_wl";
+                       };
+
+                       vcc_lcd: SWITCH_REG2 {
+                               regulator-always-on;
+                               regulator-boot-on;
+                               regulator-name = "vcc_lcd";
+                       };
+               };
+       };
diff --git a/Documentation/devicetree/bindings/mfd/rn5t618.txt b/Documentation/devicetree/bindings/mfd/rn5t618.txt
new file mode 100644 (file)
index 0000000..937785a
--- /dev/null
@@ -0,0 +1,36 @@
+* Ricoh RN5T618 PMIC
+
+Ricoh RN5T618 is a power management IC which integrates 3 step-down
+DCDC converters, 7 low-dropout regulators, a Li-ion battery charger,
+fuel gauge, ADC, GPIOs and a watchdog timer. It can be controlled
+through a I2C interface.
+
+Required properties:
+ - compatible: should be "ricoh,rn5t618"
+ - reg: the I2C slave address of the device
+
+Sub-nodes:
+ - regulators: the node is required if the regulator functionality is
+   needed. The valid regulator names are: DCDC1, DCDC2, DCDC3, LDO1,
+   LDO2, LDO3, LDO4, LDO5, LDORTC1 and LDORTC2.
+   The common bindings for each individual regulator can be found in:
+   Documentation/devicetree/bindings/regulator/regulator.txt
+
+Example:
+
+       pmic@32 {
+               compatible = "ricoh,rn5t618";
+               reg = <0x32>;
+
+               regulators {
+                       DCDC1 {
+                               regulator-min-microvolt = <1050000>;
+                               regulator-max-microvolt = <1050000>;
+                       };
+
+                       DCDC2 {
+                               regulator-min-microvolt = <1175000>;
+                               regulator-max-microvolt = <1175000>;
+                       };
+               };
+       };
index 56edb55206854aeba75d63ce2c85ab707208d12a..3fb68bfefc8b30eb149d8ddf36d7b0eadccb1ded 100644 (file)
@@ -13,6 +13,7 @@ Optional properties:
  - interrupt-parent             : Specifies which IRQ controller we're connected to
  - wakeup-source                : Marks the input device as wakable
  - st,autosleep-timeout         : Valid entries (ms); 4, 16, 32, 64, 128, 256, 512 and 1024
+ - irq-gpio                     : If present, which GPIO to use for event IRQ
 
 Example:
 
index b9ee7b98d3e234195ede810f6c32e6afa5a22411..3d19963312ce0a8c9e0a06f597f899df3ad08905 100644 (file)
@@ -23,8 +23,13 @@ down during off-idle. Note that this does not work on all boards
 depending on how the external oscillator is wired.
 
 Optional properties:
-- ti,use_poweroff: With this flag, the chip will initiates an ACTIVE-to-OFF or
-                  SLEEP-to-OFF transition when the system poweroffs.
+
+- ti,system-power-controller: This indicates that TWL4030 is the
+  power supply master of the system. With this flag, the chip will
+  initiate an ACTIVE-to-OFF or SLEEP-to-OFF transition when the
+  system poweroffs.
+
+- ti,use_poweroff: Deprecated name for ti,system-power-controller
 
 Example:
 &i2c1 {
diff --git a/Documentation/devicetree/bindings/power/reset/ltc2952-poweroff.txt b/Documentation/devicetree/bindings/power/reset/ltc2952-poweroff.txt
new file mode 100644 (file)
index 0000000..0c94c63
--- /dev/null
@@ -0,0 +1,26 @@
+Binding for the LTC2952 PowerPath controller
+
+This chip is used to externally trigger a system shut down. Once the trigger has
+been sent, the chips' watchdog has to be reset to gracefully shut down.
+If the Linux systems decides to shut down it powers off the platform via the
+kill signal.
+
+Required properties:
+
+- compatible:          Must contain: "lltc,ltc2952"
+- trigger-gpios:       phandle + gpio-specifier for the GPIO connected to the
+                       chip's trigger line
+- watchdog-gpios:      phandle + gpio-specifier for the GPIO connected to the
+                       chip's watchdog line
+- kill-gpios:          phandle + gpio-specifier for the GPIO connected to the
+                       chip's kill line
+
+Example:
+
+ltc2952 {
+       compatible = "lltc,ltc2952";
+
+       trigger-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+       watchdog-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+       kill-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+};
diff --git a/Documentation/devicetree/bindings/power/reset/st-reset.txt b/Documentation/devicetree/bindings/power/reset/st-reset.txt
new file mode 100644 (file)
index 0000000..809af54
--- /dev/null
@@ -0,0 +1,11 @@
+*Device-Tree bindings for ST SW reset functionality
+
+Required properties:
+- compatible: should be "st,<chip>-restart".
+- st,syscfg: should be a phandle of the syscfg node.
+
+Example node:
+       restart {
+               compatible = "st,stih416-restart";
+               st,syscfg = <&syscfg_sbc>;
+       };
diff --git a/Documentation/devicetree/bindings/power/reset/syscon-reboot.txt b/Documentation/devicetree/bindings/power/reset/syscon-reboot.txt
new file mode 100644 (file)
index 0000000..1190631
--- /dev/null
@@ -0,0 +1,23 @@
+Generic SYSCON mapped register reset driver
+
+This is a generic reset driver using syscon to map the reset register.
+The reset is generally performed with a write to the reset register
+defined by the register map pointed by syscon reference plus the offset
+with the mask defined in the reboot node.
+
+Required properties:
+- compatible: should contain "syscon-reboot"
+- regmap: this is phandle to the register map node
+- offset: offset in the register map for the reboot register (in bytes)
+- mask: the reset value written to the reboot register (32 bit access)
+
+Default will be little endian mode, 32 bit access only.
+
+Examples:
+
+       reboot {
+          compatible = "syscon-reboot";
+          regmap = <&regmapnode>;
+          offset = <0x0>;
+          mask = <0x1>;
+       };
index 04e9f5505faa8fa4133c198a946cdefab241824d..b62bdcb1eb39fc33cb12ffb08b82dc38ecbbf88a 100644 (file)
@@ -605,11 +605,15 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
                        See Documentation/s390/CommonIO for details.
        clk_ignore_unused
                        [CLK]
-                       Keep all clocks already enabled by bootloader on,
-                       even if no driver has claimed them. This is useful
-                       for debug and development, but should not be
-                       needed on a platform with proper driver support.
-                       For more information, see Documentation/clk.txt.
+                       Prevents the clock framework from automatically gating
+                       clocks that have not been explicitly enabled by a Linux
+                       device driver but are enabled in hardware at reset or
+                       by the bootloader/firmware. Note that this does not
+                       force such clocks to be always-on nor does it reserve
+                       those clocks in any way. This parameter is useful for
+                       debug and development, but should not be needed on a
+                       platform with proper driver support.  For more
+                       information, see Documentation/clk.txt.
 
        clock=          [BUGS=X86-32, HW] gettimeofday clocksource override.
                        [Deprecated]
index b4f7f4b23f648e3e129bf3b8d31b68e17e004ee2..9ff1105e58d64fd7df6f0f17f63fc0e7f14bcc7d 100644 (file)
@@ -29,7 +29,7 @@ Charger Manager supports the following:
        While the battery is being charged and the system is in suspend-to-RAM,
        we may need to monitor the battery health by looking at the ambient or
        battery temperature. We can accomplish this by waking up the system
-       periodically. However, such a method wakes up devices unncessary for
+       periodically. However, such a method wakes up devices unnecessarily for
        monitoring the battery health and tasks, and user processes that are
        supposed to be kept suspended. That, in turn, incurs unnecessary power
        consumption and slow down charging process. Or even, such peak power
index 48cff881cb8a13aac48c4455ac44d44f685eaf46..82dacc06e355c1624ca66e5668448f1a767dbfa9 100644 (file)
@@ -101,6 +101,10 @@ VOLTAGE_MAX, VOLTAGE_MIN - same as _DESIGN voltage values except that
 these ones should be used if hardware could only guess (measure and
 retain) the thresholds of a given power supply.
 
+VOLTAGE_BOOT - Reports the voltage measured during boot
+
+CURRENT_BOOT - Reports the current measured during boot
+
 CHARGE_FULL_DESIGN, CHARGE_EMPTY_DESIGN - design charge values, when
 battery considered full/empty.
 
@@ -123,6 +127,8 @@ the current drawn from a charging source.
 CHARGE_TERM_CURRENT - Charge termination current used to detect the end of charge
 condition.
 
+CALIBRATE - battery or coulomb counter calibration status
+
 CONSTANT_CHARGE_VOLTAGE - constant charge voltage programmed by charger.
 CONSTANT_CHARGE_VOLTAGE_MAX - maximum charge voltage supported by the
 power supply object.
index ee1bc5bc20ad221d3d2af470ae2b55f2daf76db0..b0f17d59078eef2185695c34bbf44610d398455f 100644 (file)
@@ -6010,6 +6010,15 @@ S:       Supported
 F:     drivers/mcb/
 F:     include/linux/mcb.h
 
+MEN F21BMC (Board Management Controller)
+M:     Andreas Werner <andreas.werner@men.de>
+S:     Supported
+F:     drivers/mfd/menf21bmc.c
+F:     drivers/watchdog/menf21bmc_wdt.c
+F:     drivers/leds/leds-menf21bmc.c
+F:     drivers/hwmon/menf21bmc_hwmon.c
+F:     Documentation/hwmon/menf21bmc
+
 METAG ARCHITECTURE
 M:     James Hogan <james.hogan@imgtec.com>
 L:     linux-metag@vger.kernel.org
index c52e7f0ee5f6084bd2c8068a552659f97edd9a8d..5c218aa3f3df425e1220e3d1c607b53d5c77dd55 100644 (file)
@@ -431,7 +431,7 @@ static void maybe_change_configuration(struct cpu_hw_events *cpuc)
  */
 static int alpha_pmu_add(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct hw_perf_event *hwc = &event->hw;
        int n0;
        int ret;
@@ -483,7 +483,7 @@ static int alpha_pmu_add(struct perf_event *event, int flags)
  */
 static void alpha_pmu_del(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct hw_perf_event *hwc = &event->hw;
        unsigned long irq_flags;
        int j;
@@ -531,7 +531,7 @@ static void alpha_pmu_read(struct perf_event *event)
 static void alpha_pmu_stop(struct perf_event *event, int flags)
 {
        struct hw_perf_event *hwc = &event->hw;
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
 
        if (!(hwc->state & PERF_HES_STOPPED)) {
                cpuc->idx_mask &= ~(1UL<<hwc->idx);
@@ -551,7 +551,7 @@ static void alpha_pmu_stop(struct perf_event *event, int flags)
 static void alpha_pmu_start(struct perf_event *event, int flags)
 {
        struct hw_perf_event *hwc = &event->hw;
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
 
        if (WARN_ON_ONCE(!(hwc->state & PERF_HES_STOPPED)))
                return;
@@ -724,7 +724,7 @@ static int alpha_pmu_event_init(struct perf_event *event)
  */
 static void alpha_pmu_enable(struct pmu *pmu)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
 
        if (cpuc->enabled)
                return;
@@ -750,7 +750,7 @@ static void alpha_pmu_enable(struct pmu *pmu)
 
 static void alpha_pmu_disable(struct pmu *pmu)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
 
        if (!cpuc->enabled)
                return;
@@ -814,8 +814,8 @@ static void alpha_perf_event_irq_handler(unsigned long la_ptr,
        struct hw_perf_event *hwc;
        int idx, j;
 
-       __get_cpu_var(irq_pmi_count)++;
-       cpuc = &__get_cpu_var(cpu_hw_events);
+       __this_cpu_inc(irq_pmi_count);
+       cpuc = this_cpu_ptr(&cpu_hw_events);
 
        /* Completely counting through the PMC's period to trigger a new PMC
         * overflow interrupt while in this interrupt routine is utterly
index ee39cee8064caa4e930a06eb2fa35457ad6d390e..643a9dcdf0934f333a31cda7ce9bba45f7aaff28 100644 (file)
@@ -56,9 +56,9 @@ unsigned long est_cycle_freq;
 
 DEFINE_PER_CPU(u8, irq_work_pending);
 
-#define set_irq_work_pending_flag()  __get_cpu_var(irq_work_pending) = 1
-#define test_irq_work_pending()      __get_cpu_var(irq_work_pending)
-#define clear_irq_work_pending()     __get_cpu_var(irq_work_pending) = 0
+#define set_irq_work_pending_flag()  __this_cpu_write(irq_work_pending, 1)
+#define test_irq_work_pending()      __this_cpu_read(irq_work_pending)
+#define clear_irq_work_pending()     __this_cpu_write(irq_work_pending, 0)
 
 void arch_irq_work_raise(void)
 {
index 8831c48c2bc93b260d15a0cbb255d64467eb3a4d..693a3275606f2ab4c25e7647c5606ac42e88139d 100644 (file)
                        #clock-cells = <1>;
                };
 
+               cmu_dmc: clock-controller@105C0000 {
+                       compatible = "samsung,exynos3250-cmu-dmc";
+                       reg = <0x105C0000 0x2000>;
+                       #clock-cells = <1>;
+               };
+
                rtc: rtc@10070000 {
                        compatible = "samsung,exynos3250-rtc";
                        reg = <0x10070000 0x100>;
index a7054694598594cb91aefb77b791c6f3f1706018..80fc5d7e9ef9685cc04fb8771f6205aaeaf5932a 100644 (file)
@@ -1,5 +1,6 @@
 /* The pxa3xx skeleton simply augments the 2xx version */
-/include/ "pxa2xx.dtsi"
+#include "pxa2xx.dtsi"
+#include "dt-bindings/clock/pxa2xx-clock.h"
 
 / {
        model = "Marvell PXA27x familiy SoC";
                        #pwm-cells = <1>;
                };
        };
+
+       clocks {
+              /*
+               * The muxing of external clocks/internal dividers for osc* clock
+               * sources has been hidden under the carpet by now.
+               */
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               pxa2xx_clks: pxa2xx_clks@41300004 {
+                       compatible = "marvell,pxa-clocks";
+                       #clock-cells = <1>;
+                       status = "okay";
+               };
+       };
+
 };
index d73a2287b37ab7affcb826c2ad864d8eefdb0c59..531272c0e526aec013c22ec6a7d6a3a044f88467 100644 (file)
 
                mbus_clk: clk@01c2015c {
                        #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-a10-mod0-clk";
+                       compatible = "allwinner,sun5i-a13-mbus-clk";
                        reg = <0x01c2015c 0x4>;
                        clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
                        clock-output-names = "mbus";
index c4b5d7825b9f78c89c0e088f07d77bc60e98e813..b131068f4f351ca92e7df07d63641cec143c5fc2 100644 (file)
 
                mbus_clk: clk@01c2015c {
                        #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-a10-mod0-clk";
+                       compatible = "allwinner,sun5i-a13-mbus-clk";
                        reg = <0x01c2015c 0x4>;
                        clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
                        clock-output-names = "mbus";
index a96b9946506949d89e839310ac4980cd61111a17..82097c905c48cb5e99387db684c113fb6d37cb94 100644 (file)
 
                mbus_clk: clk@01c2015c {
                        #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-a10-mod0-clk";
+                       compatible = "allwinner,sun5i-a13-mbus-clk";
                        reg = <0x01c2015c 0x4>;
                        clocks = <&osc24M>, <&pll6 2>, <&pll5 1>;
                        clock-output-names = "mbus";
index dfc32130bc443ddc407d463b486109ba49632db2..93090213c71ce9f860f018bd1fecd495950c2f0b 100644 (file)
@@ -92,7 +92,7 @@ static int twd_timer_ack(void)
 
 static void twd_timer_stop(void)
 {
-       struct clock_event_device *clk = __this_cpu_ptr(twd_evt);
+       struct clock_event_device *clk = raw_cpu_ptr(twd_evt);
 
        twd_set_mode(CLOCK_EVT_MODE_UNUSED, clk);
        disable_percpu_irq(clk->irq);
@@ -108,7 +108,7 @@ static void twd_update_frequency(void *new_rate)
 {
        twd_timer_rate = *((unsigned long *) new_rate);
 
-       clockevents_update_freq(__this_cpu_ptr(twd_evt), twd_timer_rate);
+       clockevents_update_freq(raw_cpu_ptr(twd_evt), twd_timer_rate);
 }
 
 static int twd_rate_change(struct notifier_block *nb,
@@ -134,7 +134,7 @@ static struct notifier_block twd_clk_nb = {
 
 static int twd_clk_init(void)
 {
-       if (twd_evt && __this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
+       if (twd_evt && raw_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
                return clk_notifier_register(twd_clk, &twd_clk_nb);
 
        return 0;
@@ -153,7 +153,7 @@ static void twd_update_frequency(void *data)
 {
        twd_timer_rate = clk_get_rate(twd_clk);
 
-       clockevents_update_freq(__this_cpu_ptr(twd_evt), twd_timer_rate);
+       clockevents_update_freq(raw_cpu_ptr(twd_evt), twd_timer_rate);
 }
 
 static int twd_cpufreq_transition(struct notifier_block *nb,
@@ -179,7 +179,7 @@ static struct notifier_block twd_cpufreq_nb = {
 
 static int twd_cpufreq_init(void)
 {
-       if (twd_evt && __this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
+       if (twd_evt && raw_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
                return cpufreq_register_notifier(&twd_cpufreq_nb,
                        CPUFREQ_TRANSITION_NOTIFIER);
 
@@ -269,7 +269,7 @@ static void twd_get_clock(struct device_node *np)
  */
 static void twd_timer_setup(void)
 {
-       struct clock_event_device *clk = __this_cpu_ptr(twd_evt);
+       struct clock_event_device *clk = raw_cpu_ptr(twd_evt);
        int cpu = smp_processor_id();
 
        /*
index b8ad045bcb8dfbe528a40b93657e0bf373e1832d..03cbb16898a3f0eeef87144ea70f5b8d96849650 100644 (file)
@@ -723,8 +723,16 @@ int __init omap_clk_init(void)
        ti_clk_init_features();
 
        ret = of_prcm_init();
-       if (!ret)
-               ret = omap_clk_soc_init();
+       if (ret)
+               return ret;
+
+       of_clk_init(NULL);
+
+       ti_dt_clk_init_retry_clks();
+
+       ti_dt_clockdomains_setup();
+
+       ret = omap_clk_soc_init();
 
        return ret;
 }
index 74054b81360079aa835a80a68b0ddc453b393829..ee2b5222eac07f279e87a6126d7ed5a864d12d73 100644 (file)
@@ -525,8 +525,6 @@ int __init of_prcm_init(void)
                memmap_index++;
        }
 
-       ti_dt_clockdomains_setup();
-
        return 0;
 }
 
index ee6ced1cea7f1705cda89be3bff0b3d51356e4cf..f1dd62946b3699f6f25b7dd2683d98de9df141a1 100644 (file)
 #define CCCR_M_MASK    0x0060  /* Memory Frequency to Run Mode Frequency Multiplier */
 #define CCCR_L_MASK    0x001f  /* Crystal Frequency to Memory Frequency Multiplier */
 
+#define CCCR_CPDIS_BIT (31)
+#define CCCR_PPDIS_BIT (30)
+#define CCCR_LCD_26_BIT        (27)
+#define CCCR_A_BIT     (25)
+
+#define CCSR_N2_MASK   CCCR_N_MASK
+#define CCSR_M_MASK    CCCR_M_MASK
+#define CCSR_L_MASK    CCCR_L_MASK
+#define CCSR_N2_SHIFT  7
+
 #define CKEN_AC97CONF   (31)    /* AC97 Controller Configuration */
 #define CKEN_CAMERA    (24)    /* Camera Interface Clock Enable */
 #define CKEN_SSP1      (23)    /* SSP1 Unit Clock Enable */
index f820e9f25520655ae0ddb756928be4d2aba35eb6..a94ece4a72c84394fb3a64ef4b6d729770a7cc77 100644 (file)
@@ -104,7 +104,7 @@ static void __kprobes resume_execution(struct kprobe *p, struct pt_regs *regs)
 
 static void __kprobes set_current_kprobe(struct kprobe *p)
 {
-       __get_cpu_var(current_kprobe) = p;
+       __this_cpu_write(current_kprobe, p);
 }
 
 static int __kprobes kprobe_handler(struct pt_regs *regs)
index 17b5e92e3bc683e1382d926297484582725a0273..fe1160fbff912140b19db436d16380d4c4605181 100644 (file)
@@ -157,7 +157,7 @@ static inline unsigned long __ipipe_ffnz(unsigned long ul)
 }
 
 #define __ipipe_do_root_xirq(ipd, irq)                                 \
-       ((ipd)->irqs[irq].handler(irq, &__raw_get_cpu_var(__ipipe_tick_regs)))
+       ((ipd)->irqs[irq].handler(irq, raw_cpu_ptr(&__ipipe_tick_regs)))
 
 #define __ipipe_run_irqtail(irq)  /* Must be a macro */                        \
        do {                                                            \
index ea2032013cc266a25363a52f6f043e830d243cb2..1e9c8b0bf48666cfba1ee19d8731eb71cf68a77e 100644 (file)
@@ -300,7 +300,7 @@ again:
 
 static void bfin_pmu_stop(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct hw_perf_event *hwc = &event->hw;
        int idx = hwc->idx;
 
@@ -318,7 +318,7 @@ static void bfin_pmu_stop(struct perf_event *event, int flags)
 
 static void bfin_pmu_start(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct hw_perf_event *hwc = &event->hw;
        int idx = hwc->idx;
 
@@ -335,7 +335,7 @@ static void bfin_pmu_start(struct perf_event *event, int flags)
 
 static void bfin_pmu_del(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
 
        bfin_pmu_stop(event, PERF_EF_UPDATE);
        __clear_bit(event->hw.idx, cpuc->used_mask);
@@ -345,7 +345,7 @@ static void bfin_pmu_del(struct perf_event *event, int flags)
 
 static int bfin_pmu_add(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct hw_perf_event *hwc = &event->hw;
        int idx = hwc->idx;
        int ret = -EAGAIN;
@@ -421,7 +421,7 @@ static int bfin_pmu_event_init(struct perf_event *event)
 
 static void bfin_pmu_enable(struct pmu *pmu)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct perf_event *event;
        struct hw_perf_event *hwc;
        int i;
index 694619365265a7792bb457c4fe48ebd484e53bca..dd2af74aff804afb69cdacecf67e3d4f35b02690 100644 (file)
@@ -1309,12 +1309,12 @@ asmlinkage int __ipipe_grab_irq(int vec, struct pt_regs *regs)
                bfin_write_TIMER_STATUS(1); /* Latch TIMIL0 */
 #endif
                /* This is basically what we need from the register frame. */
-               __raw_get_cpu_var(__ipipe_tick_regs).ipend = regs->ipend;
-               __raw_get_cpu_var(__ipipe_tick_regs).pc = regs->pc;
+               __this_cpu_write(__ipipe_tick_regs.ipend, regs->ipend);
+               __this_cpu_write(__ipipe_tick_regs.pc, regs->pc);
                if (this_domain != ipipe_root_domain)
-                       __raw_get_cpu_var(__ipipe_tick_regs).ipend &= ~0x10;
+                       __this_cpu_and(__ipipe_tick_regs.ipend, ~0x10);
                else
-                       __raw_get_cpu_var(__ipipe_tick_regs).ipend |= 0x10;
+                       __this_cpu_or(__ipipe_tick_regs.ipend, 0x10);
        }
 
        /*
index ba6c30d8534d0dec77cac409788aa37c03772748..8ad3e90cc8fc4c7780173003bc531c59624adaa4 100644 (file)
@@ -146,7 +146,7 @@ static irqreturn_t ipi_handler_int1(int irq, void *dev_instance)
        platform_clear_ipi(cpu, IRQ_SUPPLE_1);
 
        smp_rmb();
-       bfin_ipi_data = &__get_cpu_var(bfin_ipi);
+       bfin_ipi_data = this_cpu_ptr(&bfin_ipi);
        while ((pending = atomic_xchg(&bfin_ipi_data->bits, 0)) != 0) {
                msg = 0;
                do {
index 029bab36cd91c0e5949a7ad04ad68264a4be81ad..668786e84af8ae1eee5f0ac97d8926889fc2cb29 100644 (file)
@@ -159,7 +159,7 @@ static inline ia64_vector __ia64_irq_to_vector(int irq)
 static inline unsigned int
 __ia64_local_vector_to_irq (ia64_vector vec)
 {
-       return __get_cpu_var(vector_irq)[vec];
+       return __this_cpu_read(vector_irq[vec]);
 }
 #endif
 
index 7caa1f44cd95d923b21116c7e727c3e787790058..31eb784866f899331d9a0afecffe76a2d775eda3 100644 (file)
@@ -57,7 +57,7 @@ struct sn_hub_info_s {
        u16 nasid_bitmask;
 };
 DECLARE_PER_CPU(struct sn_hub_info_s, __sn_hub_info);
-#define sn_hub_info    (&__get_cpu_var(__sn_hub_info))
+#define sn_hub_info    this_cpu_ptr(&__sn_hub_info)
 #define is_shub2()     (sn_hub_info->shub2)
 #define is_shub1()     (sn_hub_info->shub2 == 0)
 
@@ -72,7 +72,7 @@ DECLARE_PER_CPU(struct sn_hub_info_s, __sn_hub_info);
  * cpu.
  */
 DECLARE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_COMPACT_NODES]);
-#define sn_cnodeid_to_nasid    (&__get_cpu_var(__sn_cnodeid_to_nasid[0]))
+#define sn_cnodeid_to_nasid    this_cpu_ptr(&__sn_cnodeid_to_nasid[0])
 
 
 extern u8 sn_partition_id;
index ee118b901de479e065ccc1cf361c1db141680f4c..7c8b4710f071d5385e6865cdba3d6c841081192a 100644 (file)
@@ -70,7 +70,7 @@ typedef struct nodepda_s nodepda_t;
  */
 
 DECLARE_PER_CPU(struct nodepda_s *, __sn_nodepda);
-#define sn_nodepda             (__get_cpu_var(__sn_nodepda))
+#define sn_nodepda             __this_cpu_read(__sn_nodepda)
 #define        NODEPDA(cnodeid)        (sn_nodepda->pernode_pdaindr[cnodeid])
 
 /*
index d38c7ea5eea5d129a32132583c2bbcb8a319bcb9..e8f3585e7e7a9b5133c3f7f9c71b2d7476e848c9 100644 (file)
@@ -32,7 +32,7 @@ extern void ia64_load_extra (struct task_struct *task);
 
 #ifdef CONFIG_PERFMON
   DECLARE_PER_CPU(unsigned long, pfm_syst_info);
-# define PERFMON_IS_SYSWIDE() (__get_cpu_var(pfm_syst_info) & 0x1)
+# define PERFMON_IS_SYSWIDE() (__this_cpu_read(pfm_syst_info) & 0x1)
 #else
 # define PERFMON_IS_SYSWIDE() (0)
 #endif
index 53e9dfacd07393a57b9ae9ab114c2e4b5596f4dc..2a88c7204e524fc472bcc6919ad6c9d1d29ffbff 100644 (file)
@@ -108,7 +108,7 @@ struct uv_hub_info_s {
        unsigned char   n_val;
 };
 DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
-#define uv_hub_info            (&__get_cpu_var(__uv_hub_info))
+#define uv_hub_info            this_cpu_ptr(&__uv_hub_info)
 #define uv_cpu_hub_info(cpu)   (&per_cpu(__uv_hub_info, cpu))
 
 /*
index f2c41828113050c19f0f09ce6d97beb733ebcd3e..812a1e6b317966610811bb10d97e7c1cdab84a80 100644 (file)
@@ -42,7 +42,7 @@ ia64_vector __ia64_irq_to_vector(int irq)
 
 unsigned int __ia64_local_vector_to_irq (ia64_vector vec)
 {
-       return __get_cpu_var(vector_irq)[vec];
+       return __this_cpu_read(vector_irq[vec]);
 }
 #endif
 
index 03ea78ed64a93384f8d4730720b99fa34e02b2d1..698d8fefde6c2591071be0dd0ccc7d64bca8703e 100644 (file)
@@ -330,7 +330,7 @@ static irqreturn_t smp_irq_move_cleanup_interrupt(int irq, void *dev_id)
                int irq;
                struct irq_desc *desc;
                struct irq_cfg *cfg;
-               irq = __get_cpu_var(vector_irq)[vector];
+               irq = __this_cpu_read(vector_irq[vector]);
                if (irq < 0)
                        continue;
 
@@ -344,7 +344,7 @@ static irqreturn_t smp_irq_move_cleanup_interrupt(int irq, void *dev_id)
                        goto unlock;
 
                spin_lock_irqsave(&vector_lock, flags);
-               __get_cpu_var(vector_irq)[vector] = -1;
+               __this_cpu_write(vector_irq[vector], -1);
                cpu_clear(me, vector_table[vector]);
                spin_unlock_irqrestore(&vector_lock, flags);
                cfg->move_cleanup_count--;
index 074fde49c9e6234f22e3e5b132bcdcfe176e9757..c7c51445c3be32d95ef3704e3b87e3e908b4f9a6 100644 (file)
@@ -396,7 +396,7 @@ static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
 {
        unsigned int i;
        i = atomic_read(&kcb->prev_kprobe_index);
-       __get_cpu_var(current_kprobe) = kcb->prev_kprobe[i-1].kp;
+       __this_cpu_write(current_kprobe, kcb->prev_kprobe[i-1].kp);
        kcb->kprobe_status = kcb->prev_kprobe[i-1].status;
        atomic_sub(1, &kcb->prev_kprobe_index);
 }
@@ -404,7 +404,7 @@ static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
 static void __kprobes set_current_kprobe(struct kprobe *p,
                        struct kprobe_ctlblk *kcb)
 {
-       __get_cpu_var(current_kprobe) = p;
+       __this_cpu_write(current_kprobe, p);
 }
 
 static void kretprobe_trampoline(void)
@@ -823,7 +823,7 @@ static int __kprobes pre_kprobes_handler(struct die_args *args)
                        /*
                         * jprobe instrumented function just completed
                         */
-                       p = __get_cpu_var(current_kprobe);
+                       p = __this_cpu_read(current_kprobe);
                        if (p->break_handler && p->break_handler(p, regs)) {
                                goto ss_probe;
                        }
index db7b36bb068b8d306042028560dbbaafcbf7664f..8bfd36af46f8e216e7330cdc443be16ceb9520c7 100644 (file)
@@ -1341,7 +1341,7 @@ ia64_mca_handler(struct pt_regs *regs, struct switch_stack *sw,
                ia64_mlogbuf_finish(1);
        }
 
-       if (__get_cpu_var(ia64_mca_tr_reload)) {
+       if (__this_cpu_read(ia64_mca_tr_reload)) {
                mca_insert_tr(0x1); /*Reload dynamic itrs*/
                mca_insert_tr(0x2); /*Reload dynamic itrs*/
        }
@@ -1868,14 +1868,14 @@ ia64_mca_cpu_init(void *cpu_data)
                "MCA", cpu);
        format_mca_init_stack(data, offsetof(struct ia64_mca_cpu, init_stack),
                "INIT", cpu);
-       __get_cpu_var(ia64_mca_data) = __per_cpu_mca[cpu] = __pa(data);
+       __this_cpu_write(ia64_mca_data, (__per_cpu_mca[cpu] = __pa(data)));
 
        /*
         * Stash away a copy of the PTE needed to map the per-CPU page.
         * We may need it during MCA recovery.
         */
-       __get_cpu_var(ia64_mca_per_cpu_pte) =
-               pte_val(mk_pte_phys(__pa(cpu_data), PAGE_KERNEL));
+       __this_cpu_write(ia64_mca_per_cpu_pte,
+               pte_val(mk_pte_phys(__pa(cpu_data), PAGE_KERNEL)));
 
        /*
         * Also, stash away a copy of the PAL address and the PTE
@@ -1884,10 +1884,10 @@ ia64_mca_cpu_init(void *cpu_data)
        pal_vaddr = efi_get_pal_addr();
        if (!pal_vaddr)
                return;
-       __get_cpu_var(ia64_mca_pal_base) =
-               GRANULEROUNDDOWN((unsigned long) pal_vaddr);
-       __get_cpu_var(ia64_mca_pal_pte) = pte_val(mk_pte_phys(__pa(pal_vaddr),
-                                                             PAGE_KERNEL));
+       __this_cpu_write(ia64_mca_pal_base,
+               GRANULEROUNDDOWN((unsigned long) pal_vaddr));
+       __this_cpu_write(ia64_mca_pal_pte, pte_val(mk_pte_phys(__pa(pal_vaddr),
+                                                             PAGE_KERNEL)));
 }
 
 static void ia64_mca_cmc_vector_adjust(void *dummy)
index deed6fa96bb054c50c6a12bdf83fe57028a5eb1d..b51514957620bef1d703ddf450700750b1dfd077 100644 (file)
@@ -215,7 +215,7 @@ static inline void play_dead(void)
        unsigned int this_cpu = smp_processor_id();
 
        /* Ack it */
-       __get_cpu_var(cpu_state) = CPU_DEAD;
+       __this_cpu_write(cpu_state, CPU_DEAD);
 
        max_xtp();
        local_irq_disable();
@@ -273,7 +273,7 @@ ia64_save_extra (struct task_struct *task)
        if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
                pfm_save_regs(task);
 
-       info = __get_cpu_var(pfm_syst_info);
+       info = __this_cpu_read(pfm_syst_info);
        if (info & PFM_CPUINFO_SYST_WIDE)
                pfm_syst_wide_update_task(task, info, 0);
 #endif
@@ -293,7 +293,7 @@ ia64_load_extra (struct task_struct *task)
        if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
                pfm_load_regs(task);
 
-       info = __get_cpu_var(pfm_syst_info);
+       info = __this_cpu_read(pfm_syst_info);
        if (info & PFM_CPUINFO_SYST_WIDE) 
                pfm_syst_wide_update_task(task, info, 1);
 #endif
index d3636e67a98e8281f44c0038c762838e942b723f..6f7d4a4dcf24d1a2b207b24f2ecc42e5f6f99d0f 100644 (file)
@@ -299,7 +299,7 @@ handle_fpu_swa (int fp_fault, struct pt_regs *regs, unsigned long isr)
 
        if (!(current->thread.flags & IA64_THREAD_FPEMU_NOPRINT))  {
                unsigned long count, current_jiffies = jiffies;
-               struct fpu_swa_msg *cp = &__get_cpu_var(cpulast);
+               struct fpu_swa_msg *cp = this_cpu_ptr(&cpulast);
 
                if (unlikely(current_jiffies > cp->time))
                        cp->count = 0;
index 36182c84363ce914d15f34a5be72afdc6f580b46..5f6b6b48c1d58567b21ba3680969fb53f52195fa 100644 (file)
@@ -629,7 +629,7 @@ void sn_cpu_init(void)
 
        cnode = nasid_to_cnodeid(nasid);
 
-       sn_nodepda = nodepdaindr[cnode];
+       __this_cpu_write(__sn_nodepda, nodepdaindr[cnode]);
 
        pda->led_address =
            (typeof(pda->led_address)) (LED0 + (slice << LED_CPU_SHIFT));
index 68c845411624a8699e9c6342ccf6b7bf90b4d580..f9c8d9fc593985b7cf027e0186c56b896e551439 100644 (file)
@@ -134,8 +134,8 @@ sn2_ipi_flush_all_tlb(struct mm_struct *mm)
        itc = ia64_get_itc();
        smp_flush_tlb_cpumask(*mm_cpumask(mm));
        itc = ia64_get_itc() - itc;
-       __get_cpu_var(ptcstats).shub_ipi_flushes_itc_clocks += itc;
-       __get_cpu_var(ptcstats).shub_ipi_flushes++;
+       __this_cpu_add(ptcstats.shub_ipi_flushes_itc_clocks, itc);
+       __this_cpu_inc(ptcstats.shub_ipi_flushes);
 }
 
 /**
@@ -199,14 +199,14 @@ sn2_global_tlb_purge(struct mm_struct *mm, unsigned long start,
                        start += (1UL << nbits);
                } while (start < end);
                ia64_srlz_i();
-               __get_cpu_var(ptcstats).ptc_l++;
+               __this_cpu_inc(ptcstats.ptc_l);
                preempt_enable();
                return;
        }
 
        if (atomic_read(&mm->mm_users) == 1 && mymm) {
                flush_tlb_mm(mm);
-               __get_cpu_var(ptcstats).change_rid++;
+               __this_cpu_inc(ptcstats.change_rid);
                preempt_enable();
                return;
        }
@@ -250,11 +250,11 @@ sn2_global_tlb_purge(struct mm_struct *mm, unsigned long start,
        spin_lock_irqsave(PTC_LOCK(shub1), flags);
        itc2 = ia64_get_itc();
 
-       __get_cpu_var(ptcstats).lock_itc_clocks += itc2 - itc;
-       __get_cpu_var(ptcstats).shub_ptc_flushes++;
-       __get_cpu_var(ptcstats).nodes_flushed += nix;
+       __this_cpu_add(ptcstats.lock_itc_clocks, itc2 - itc);
+       __this_cpu_inc(ptcstats.shub_ptc_flushes);
+       __this_cpu_add(ptcstats.nodes_flushed, nix);
        if (!mymm)
-                __get_cpu_var(ptcstats).shub_ptc_flushes_not_my_mm++;
+                __this_cpu_inc(ptcstats.shub_ptc_flushes_not_my_mm);
 
        if (use_cpu_ptcga && !mymm) {
                old_rr = ia64_get_rr(start);
@@ -299,9 +299,9 @@ sn2_global_tlb_purge(struct mm_struct *mm, unsigned long start,
 
 done:
        itc2 = ia64_get_itc() - itc2;
-       __get_cpu_var(ptcstats).shub_itc_clocks += itc2;
-       if (itc2 > __get_cpu_var(ptcstats).shub_itc_clocks_max)
-               __get_cpu_var(ptcstats).shub_itc_clocks_max = itc2;
+       __this_cpu_add(ptcstats.shub_itc_clocks, itc2);
+       if (itc2 > __this_cpu_read(ptcstats.shub_itc_clocks_max))
+               __this_cpu_write(ptcstats.shub_itc_clocks_max, itc2);
 
        if (old_rr) {
                ia64_set_rr(start, old_rr);
@@ -311,7 +311,7 @@ done:
        spin_unlock_irqrestore(PTC_LOCK(shub1), flags);
 
        if (flush_opt == 1 && deadlock) {
-               __get_cpu_var(ptcstats).deadlocks++;
+               __this_cpu_inc(ptcstats.deadlocks);
                sn2_ipi_flush_all_tlb(mm);
        }
 
@@ -334,7 +334,7 @@ sn2_ptc_deadlock_recovery(short *nasids, short ib, short ie, int mynasid,
        short nasid, i;
        unsigned long *piows, zeroval, n;
 
-       __get_cpu_var(ptcstats).deadlocks++;
+       __this_cpu_inc(ptcstats.deadlocks);
 
        piows = (unsigned long *) pda->pio_write_status_addr;
        zeroval = pda->pio_write_status_val;
@@ -349,7 +349,7 @@ sn2_ptc_deadlock_recovery(short *nasids, short ib, short ie, int mynasid,
                        ptc1 = CHANGE_NASID(nasid, ptc1);
 
                n = sn2_ptc_deadlock_recovery_core(ptc0, data0, ptc1, data1, piows, zeroval);
-               __get_cpu_var(ptcstats).deadlocks2 += n;
+               __this_cpu_add(ptcstats.deadlocks2, n);
        }
 
 }
index 02c08737f6aa0579c03b1d237d2db240efb509c1..2478ec6d23c9e3e0b14954d670f9f96e925c8f6d 100644 (file)
@@ -258,7 +258,7 @@ int metag_pmu_event_set_period(struct perf_event *event,
 
 static void metag_pmu_start(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct hw_perf_event *hwc = &event->hw;
        int idx = hwc->idx;
 
@@ -306,7 +306,7 @@ static void metag_pmu_stop(struct perf_event *event, int flags)
 
 static int metag_pmu_add(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct hw_perf_event *hwc = &event->hw;
        int idx = 0, ret = 0;
 
@@ -348,7 +348,7 @@ out:
 
 static void metag_pmu_del(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct hw_perf_event *hwc = &event->hw;
        int idx = hwc->idx;
 
@@ -597,7 +597,7 @@ static int _hw_perf_event_init(struct perf_event *event)
 
 static void metag_pmu_enable_counter(struct hw_perf_event *event, int idx)
 {
-       struct cpu_hw_events *events = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *events = this_cpu_ptr(&cpu_hw_events);
        unsigned int config = event->config;
        unsigned int tmp = config & 0xf0;
        unsigned long flags;
@@ -670,7 +670,7 @@ unlock:
 
 static void metag_pmu_disable_counter(struct hw_perf_event *event, int idx)
 {
-       struct cpu_hw_events *events = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *events = this_cpu_ptr(&cpu_hw_events);
        unsigned int tmp = 0;
        unsigned long flags;
 
@@ -718,7 +718,7 @@ out:
 
 static void metag_pmu_write_counter(int idx, u32 val)
 {
-       struct cpu_hw_events *events = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *events = this_cpu_ptr(&cpu_hw_events);
        u32 tmp = 0;
        unsigned long flags;
 
@@ -751,7 +751,7 @@ static int metag_pmu_event_map(int idx)
 static irqreturn_t metag_pmu_counter_overflow(int irq, void *dev)
 {
        int idx = (int)dev;
-       struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
        struct perf_event *event = cpuhw->events[idx];
        struct hw_perf_event *hwc = &event->hw;
        struct pt_regs *regs = get_irq_regs();
index 1b82ac6921e031644687979d69b4287064751891..7417340496756d30d159aae9b48e4af0f8edf531 100644 (file)
@@ -264,13 +264,13 @@ static void octeon_irq_ciu_enable_local(struct irq_data *data)
        unsigned long *pen;
        unsigned long flags;
        union octeon_ciu_chip_data cd;
-       raw_spinlock_t *lock = &__get_cpu_var(octeon_irq_ciu_spinlock);
+       raw_spinlock_t *lock = this_cpu_ptr(&octeon_irq_ciu_spinlock);
 
        cd.p = irq_data_get_irq_chip_data(data);
 
        raw_spin_lock_irqsave(lock, flags);
        if (cd.s.line == 0) {
-               pen = &__get_cpu_var(octeon_irq_ciu0_en_mirror);
+               pen = this_cpu_ptr(&octeon_irq_ciu0_en_mirror);
                __set_bit(cd.s.bit, pen);
                /*
                 * Must be visible to octeon_irq_ip{2,3}_ciu() before
@@ -279,7 +279,7 @@ static void octeon_irq_ciu_enable_local(struct irq_data *data)
                wmb();
                cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2), *pen);
        } else {
-               pen = &__get_cpu_var(octeon_irq_ciu1_en_mirror);
+               pen = this_cpu_ptr(&octeon_irq_ciu1_en_mirror);
                __set_bit(cd.s.bit, pen);
                /*
                 * Must be visible to octeon_irq_ip{2,3}_ciu() before
@@ -296,13 +296,13 @@ static void octeon_irq_ciu_disable_local(struct irq_data *data)
        unsigned long *pen;
        unsigned long flags;
        union octeon_ciu_chip_data cd;
-       raw_spinlock_t *lock = &__get_cpu_var(octeon_irq_ciu_spinlock);
+       raw_spinlock_t *lock = this_cpu_ptr(&octeon_irq_ciu_spinlock);
 
        cd.p = irq_data_get_irq_chip_data(data);
 
        raw_spin_lock_irqsave(lock, flags);
        if (cd.s.line == 0) {
-               pen = &__get_cpu_var(octeon_irq_ciu0_en_mirror);
+               pen = this_cpu_ptr(&octeon_irq_ciu0_en_mirror);
                __clear_bit(cd.s.bit, pen);
                /*
                 * Must be visible to octeon_irq_ip{2,3}_ciu() before
@@ -311,7 +311,7 @@ static void octeon_irq_ciu_disable_local(struct irq_data *data)
                wmb();
                cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2), *pen);
        } else {
-               pen = &__get_cpu_var(octeon_irq_ciu1_en_mirror);
+               pen = this_cpu_ptr(&octeon_irq_ciu1_en_mirror);
                __clear_bit(cd.s.bit, pen);
                /*
                 * Must be visible to octeon_irq_ip{2,3}_ciu() before
@@ -431,11 +431,11 @@ static void octeon_irq_ciu_enable_local_v2(struct irq_data *data)
 
        if (cd.s.line == 0) {
                int index = cvmx_get_core_num() * 2;
-               set_bit(cd.s.bit, &__get_cpu_var(octeon_irq_ciu0_en_mirror));
+               set_bit(cd.s.bit, this_cpu_ptr(&octeon_irq_ciu0_en_mirror));
                cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask);
        } else {
                int index = cvmx_get_core_num() * 2 + 1;
-               set_bit(cd.s.bit, &__get_cpu_var(octeon_irq_ciu1_en_mirror));
+               set_bit(cd.s.bit, this_cpu_ptr(&octeon_irq_ciu1_en_mirror));
                cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask);
        }
 }
@@ -450,11 +450,11 @@ static void octeon_irq_ciu_disable_local_v2(struct irq_data *data)
 
        if (cd.s.line == 0) {
                int index = cvmx_get_core_num() * 2;
-               clear_bit(cd.s.bit, &__get_cpu_var(octeon_irq_ciu0_en_mirror));
+               clear_bit(cd.s.bit, this_cpu_ptr(&octeon_irq_ciu0_en_mirror));
                cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask);
        } else {
                int index = cvmx_get_core_num() * 2 + 1;
-               clear_bit(cd.s.bit, &__get_cpu_var(octeon_irq_ciu1_en_mirror));
+               clear_bit(cd.s.bit, this_cpu_ptr(&octeon_irq_ciu1_en_mirror));
                cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask);
        }
 }
@@ -1063,7 +1063,7 @@ static void octeon_irq_ip2_ciu(void)
        const unsigned long core_id = cvmx_get_core_num();
        u64 ciu_sum = cvmx_read_csr(CVMX_CIU_INTX_SUM0(core_id * 2));
 
-       ciu_sum &= __get_cpu_var(octeon_irq_ciu0_en_mirror);
+       ciu_sum &= __this_cpu_read(octeon_irq_ciu0_en_mirror);
        if (likely(ciu_sum)) {
                int bit = fls64(ciu_sum) - 1;
                int irq = octeon_irq_ciu_to_irq[0][bit];
@@ -1080,7 +1080,7 @@ static void octeon_irq_ip3_ciu(void)
 {
        u64 ciu_sum = cvmx_read_csr(CVMX_CIU_INT_SUM1);
 
-       ciu_sum &= __get_cpu_var(octeon_irq_ciu1_en_mirror);
+       ciu_sum &= __this_cpu_read(octeon_irq_ciu1_en_mirror);
        if (likely(ciu_sum)) {
                int bit = fls64(ciu_sum) - 1;
                int irq = octeon_irq_ciu_to_irq[1][bit];
@@ -1129,10 +1129,10 @@ static void octeon_irq_init_ciu_percpu(void)
        int coreid = cvmx_get_core_num();
 
 
-       __get_cpu_var(octeon_irq_ciu0_en_mirror) = 0;
-       __get_cpu_var(octeon_irq_ciu1_en_mirror) = 0;
+       __this_cpu_write(octeon_irq_ciu0_en_mirror, 0);
+       __this_cpu_write(octeon_irq_ciu1_en_mirror, 0);
        wmb();
-       raw_spin_lock_init(&__get_cpu_var(octeon_irq_ciu_spinlock));
+       raw_spin_lock_init(this_cpu_ptr(&octeon_irq_ciu_spinlock));
        /*
         * Disable All CIU Interrupts. The ones we need will be
         * enabled later.  Read the SUM register so we know the write
index 0195745b4b1b47384ef324e52ce14577d4137677..3ee34771330718ec4c674c738f21a9dfb30af515 100644 (file)
 #ifdef CONFIG_DEBUG_FS
 
 struct mips_fpu_emulator_stats {
-       local_t emulated;
-       local_t loads;
-       local_t stores;
-       local_t cp1ops;
-       local_t cp1xops;
-       local_t errors;
-       local_t ieee754_inexact;
-       local_t ieee754_underflow;
-       local_t ieee754_overflow;
-       local_t ieee754_zerodiv;
-       local_t ieee754_invalidop;
+       unsigned long emulated;
+       unsigned long loads;
+       unsigned long stores;
+       unsigned long cp1ops;
+       unsigned long cp1xops;
+       unsigned long errors;
+       unsigned long ieee754_inexact;
+       unsigned long ieee754_underflow;
+       unsigned long ieee754_overflow;
+       unsigned long ieee754_zerodiv;
+       unsigned long ieee754_invalidop;
 };
 
 DECLARE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats);
@@ -51,7 +51,7 @@ DECLARE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats);
 #define MIPS_FPU_EMU_INC_STATS(M)                                      \
 do {                                                                   \
        preempt_disable();                                              \
-       __local_inc(&__get_cpu_var(fpuemustats).M);                     \
+       __this_cpu_inc(fpuemustats.M);                                  \
        preempt_enable();                                               \
 } while (0)
 
index 1f8187ab0997be478f69b66eadb8ac4a6bf7e489..212f46f2014e06b36aed708b26215457be72ece7 100644 (file)
@@ -224,7 +224,7 @@ static void save_previous_kprobe(struct kprobe_ctlblk *kcb)
 
 static void restore_previous_kprobe(struct kprobe_ctlblk *kcb)
 {
-       __get_cpu_var(current_kprobe) = kcb->prev_kprobe.kp;
+       __this_cpu_write(current_kprobe, kcb->prev_kprobe.kp);
        kcb->kprobe_status = kcb->prev_kprobe.status;
        kcb->kprobe_old_SR = kcb->prev_kprobe.old_SR;
        kcb->kprobe_saved_SR = kcb->prev_kprobe.saved_SR;
@@ -234,7 +234,7 @@ static void restore_previous_kprobe(struct kprobe_ctlblk *kcb)
 static void set_current_kprobe(struct kprobe *p, struct pt_regs *regs,
                               struct kprobe_ctlblk *kcb)
 {
-       __get_cpu_var(current_kprobe) = p;
+       __this_cpu_write(current_kprobe, p);
        kcb->kprobe_saved_SR = kcb->kprobe_old_SR = (regs->cp0_status & ST0_IE);
        kcb->kprobe_saved_epc = regs->cp0_epc;
 }
@@ -385,7 +385,7 @@ static int __kprobes kprobe_handler(struct pt_regs *regs)
                                ret = 1;
                                goto no_kprobe;
                        }
-                       p = __get_cpu_var(current_kprobe);
+                       p = __this_cpu_read(current_kprobe);
                        if (p->break_handler && p->break_handler(p, regs))
                                goto ss_probe;
                }
index b63f2482f2881c24a3d62d2f95ca9a2eb5cf2799..a8f9cdc6f8b0417583d7433c116e1916cf5b7f7d 100644 (file)
@@ -340,7 +340,7 @@ static int mipsxx_pmu_alloc_counter(struct cpu_hw_events *cpuc,
 
 static void mipsxx_pmu_enable_event(struct hw_perf_event *evt, int idx)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
 
        WARN_ON(idx < 0 || idx >= mipspmu.num_counters);
 
@@ -360,7 +360,7 @@ static void mipsxx_pmu_enable_event(struct hw_perf_event *evt, int idx)
 
 static void mipsxx_pmu_disable_event(int idx)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        unsigned long flags;
 
        WARN_ON(idx < 0 || idx >= mipspmu.num_counters);
@@ -460,7 +460,7 @@ static void mipspmu_stop(struct perf_event *event, int flags)
 
 static int mipspmu_add(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct hw_perf_event *hwc = &event->hw;
        int idx;
        int err = 0;
@@ -496,7 +496,7 @@ out:
 
 static void mipspmu_del(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct hw_perf_event *hwc = &event->hw;
        int idx = hwc->idx;
 
@@ -1275,7 +1275,7 @@ static int __hw_perf_event_init(struct perf_event *event)
 
 static void pause_local_counters(void)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        int ctr = mipspmu.num_counters;
        unsigned long flags;
 
@@ -1291,7 +1291,7 @@ static void pause_local_counters(void)
 
 static void resume_local_counters(void)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        int ctr = mipspmu.num_counters;
 
        do {
@@ -1302,7 +1302,7 @@ static void resume_local_counters(void)
 
 static int mipsxx_pmu_handle_shared_irq(void)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct perf_sample_data data;
        unsigned int counters = mipspmu.num_counters;
        u64 counter;
index df9e2bd9b2c292e0497cdd0daba5217589575c2c..06bb5ed6d80a68728b56329db41a6531d377eca8 100644 (file)
@@ -346,7 +346,7 @@ static irqreturn_t bmips43xx_ipi_interrupt(int irq, void *dev_id)
        int action, cpu = irq - IPI0_IRQ;
 
        spin_lock_irqsave(&ipi_lock, flags);
-       action = __get_cpu_var(ipi_action_mask);
+       action = __this_cpu_read(ipi_action_mask);
        per_cpu(ipi_action_mask, cpu) = 0;
        clear_c0_cause(cpu ? C_SW1 : C_SW0);
        spin_unlock_irqrestore(&ipi_lock, flags);
index 74e827b4ec8f11aa208844d738d2b74afa1a1e7c..d8c63af6c7ccea9c69a4985ae14d2f0c263e7281 100644 (file)
@@ -299,16 +299,16 @@ static void loongson3_init_secondary(void)
        per_cpu(cpu_state, cpu) = CPU_ONLINE;
 
        i = 0;
-       __get_cpu_var(core0_c0count) = 0;
+       __this_cpu_write(core0_c0count, 0);
        loongson3_send_ipi_single(0, SMP_ASK_C0COUNT);
-       while (!__get_cpu_var(core0_c0count)) {
+       while (!__this_cpu_read(core0_c0count)) {
                i++;
                cpu_relax();
        }
 
        if (i > MAX_LOOPS)
                i = MAX_LOOPS;
-       initcount = __get_cpu_var(core0_c0count) + i;
+       initcount = __this_cpu_read(core0_c0count) + i;
        write_c0_count(initcount);
 }
 
index 6c840ceab8201cc191f4699d15561c62b2e0c9c2..e2452550bcb16322ddab48582fa93a632bba80b5 100644 (file)
@@ -58,10 +58,10 @@ static inline unsigned long cputime_to_jiffies(const cputime_t ct)
 static inline cputime_t cputime_to_scaled(const cputime_t ct)
 {
        if (cpu_has_feature(CPU_FTR_SPURR) &&
-           __get_cpu_var(cputime_last_delta))
+           __this_cpu_read(cputime_last_delta))
                return (__force u64) ct *
-                       __get_cpu_var(cputime_scaled_last_delta) /
-                       __get_cpu_var(cputime_last_delta);
+                       __this_cpu_read(cputime_scaled_last_delta) /
+                       __this_cpu_read(cputime_last_delta);
        return ct;
 }
 
index e787cc1bff8fa30874358e069ecbeb1a8b136b10..b0d5f0a97a010f355d2071acb2a5af8d2de88574 100644 (file)
@@ -82,7 +82,7 @@ DECLARE_PER_CPU_SHARED_ALIGNED(struct irq_stat, irq_stat);
 
 static __always_inline void inc_irq_stat(enum interruption_class irq)
 {
-       __get_cpu_var(irq_stat).irqs[irq]++;
+       __this_cpu_inc(irq_stat.irqs[irq]);
 }
 
 struct ext_code {
index fa91e0097458d8d56cd3d41f24fd0a5a9f42d72a..933355e0d091b86025c411e793de63cede01fee6 100644 (file)
@@ -31,7 +31,7 @@
        pcp_op_T__ old__, new__, prev__;                                \
        pcp_op_T__ *ptr__;                                              \
        preempt_disable();                                              \
-       ptr__ = __this_cpu_ptr(&(pcp));                                 \
+       ptr__ = raw_cpu_ptr(&(pcp));                                    \
        prev__ = *ptr__;                                                \
        do {                                                            \
                old__ = prev__;                                         \
@@ -70,7 +70,7 @@
        pcp_op_T__ val__ = (val);                                       \
        pcp_op_T__ old__, *ptr__;                                       \
        preempt_disable();                                              \
-       ptr__ = __this_cpu_ptr(&(pcp));                                 \
+       ptr__ = raw_cpu_ptr(&(pcp));                            \
        if (__builtin_constant_p(val__) &&                              \
            ((szcast)val__ > -129) && ((szcast)val__ < 128)) {          \
                asm volatile(                                           \
@@ -97,7 +97,7 @@
        pcp_op_T__ val__ = (val);                                       \
        pcp_op_T__ old__, *ptr__;                                       \
        preempt_disable();                                              \
-       ptr__ = __this_cpu_ptr(&(pcp));                                 \
+       ptr__ = raw_cpu_ptr(&(pcp));                                    \
        asm volatile(                                                   \
                op "    %[old__],%[val__],%[ptr__]\n"                   \
                : [old__] "=d" (old__), [ptr__] "+Q" (*ptr__)           \
        pcp_op_T__ val__ = (val);                                       \
        pcp_op_T__ old__, *ptr__;                                       \
        preempt_disable();                                              \
-       ptr__ = __this_cpu_ptr(&(pcp));                                 \
+       ptr__ = raw_cpu_ptr(&(pcp));                                    \
        asm volatile(                                                   \
                op "    %[old__],%[val__],%[ptr__]\n"                   \
                : [old__] "=d" (old__), [ptr__] "+Q" (*ptr__)           \
        pcp_op_T__ ret__;                                               \
        pcp_op_T__ *ptr__;                                              \
        preempt_disable();                                              \
-       ptr__ = __this_cpu_ptr(&(pcp));                                 \
+       ptr__ = raw_cpu_ptr(&(pcp));                                    \
        ret__ = cmpxchg(ptr__, oval, nval);                             \
        preempt_enable();                                               \
        ret__;                                                          \
        typeof(pcp) *ptr__;                                             \
        typeof(pcp) ret__;                                              \
        preempt_disable();                                              \
-       ptr__ = __this_cpu_ptr(&(pcp));                                 \
+       ptr__ = raw_cpu_ptr(&(pcp));                                    \
        ret__ = xchg(ptr__, nval);                                      \
        preempt_enable();                                               \
        ret__;                                                          \
        typeof(pcp2) *p2__;                                             \
        int ret__;                                                      \
        preempt_disable();                                              \
-       p1__ = __this_cpu_ptr(&(pcp1));                                 \
-       p2__ = __this_cpu_ptr(&(pcp2));                                 \
+       p1__ = raw_cpu_ptr(&(pcp1));                                    \
+       p2__ = raw_cpu_ptr(&(pcp2));                                    \
        ret__ = __cmpxchg_double(p1__, p2__, o1__, o2__, n1__, n2__);   \
        preempt_enable();                                               \
        ret__;                                                          \
index c846aee7372f391b6d975bad40d2a7ad7f7c1cf8..7559f1beab2918f84831791ae93a901cd826bb57 100644 (file)
@@ -21,7 +21,7 @@ static DEFINE_PER_CPU(struct s390_idle_data, s390_idle);
 
 void __kprobes enabled_wait(void)
 {
-       struct s390_idle_data *idle = &__get_cpu_var(s390_idle);
+       struct s390_idle_data *idle = this_cpu_ptr(&s390_idle);
        unsigned long long idle_time;
        unsigned long psw_mask;
 
index 27ae5433fe4d40dde353983e5a7fed711b3d7db4..014d4729b134d0abb526044f64d4e81a7a262261 100644 (file)
@@ -218,9 +218,9 @@ static void __kprobes disable_singlestep(struct kprobe_ctlblk *kcb,
  */
 static void __kprobes push_kprobe(struct kprobe_ctlblk *kcb, struct kprobe *p)
 {
-       kcb->prev_kprobe.kp = __get_cpu_var(current_kprobe);
+       kcb->prev_kprobe.kp = __this_cpu_read(current_kprobe);
        kcb->prev_kprobe.status = kcb->kprobe_status;
-       __get_cpu_var(current_kprobe) = p;
+       __this_cpu_write(current_kprobe, p);
 }
 
 /*
@@ -230,7 +230,7 @@ static void __kprobes push_kprobe(struct kprobe_ctlblk *kcb, struct kprobe *p)
  */
 static void __kprobes pop_kprobe(struct kprobe_ctlblk *kcb)
 {
-       __get_cpu_var(current_kprobe) = kcb->prev_kprobe.kp;
+       __this_cpu_write(current_kprobe, kcb->prev_kprobe.kp);
        kcb->kprobe_status = kcb->prev_kprobe.status;
 }
 
@@ -311,7 +311,7 @@ static int __kprobes kprobe_handler(struct pt_regs *regs)
                enable_singlestep(kcb, regs, (unsigned long) p->ainsn.insn);
                return 1;
        } else if (kprobe_running()) {
-               p = __get_cpu_var(current_kprobe);
+               p = __this_cpu_read(current_kprobe);
                if (p->break_handler && p->break_handler(p, regs)) {
                        /*
                         * Continuation after the jprobe completed and
index db96b418160a0260e305e54d73190097e3dce4f0..dd1c24ceda50245978c97e13c5b992db3139f329 100644 (file)
@@ -54,8 +54,12 @@ void s390_handle_mcck(void)
         */
        local_irq_save(flags);
        local_mcck_disable();
-       mcck = __get_cpu_var(cpu_mcck);
-       memset(&__get_cpu_var(cpu_mcck), 0, sizeof(struct mcck_struct));
+       /*
+        * Ummm... Does this make sense at all? Copying the percpu struct
+        * and then zapping it one statement later?
+        */
+       memcpy(&mcck, this_cpu_ptr(&cpu_mcck), sizeof(mcck));
+       memset(&mcck, 0, sizeof(struct mcck_struct));
        clear_cpu_flag(CIF_MCCK_PENDING);
        local_mcck_enable();
        local_irq_restore(flags);
@@ -269,7 +273,7 @@ void notrace s390_do_machine_check(struct pt_regs *regs)
        nmi_enter();
        inc_irq_stat(NMI_NMI);
        mci = (struct mci *) &S390_lowcore.mcck_interruption_code;
-       mcck = &__get_cpu_var(cpu_mcck);
+       mcck = this_cpu_ptr(&cpu_mcck);
        umode = user_mode(regs);
 
        if (mci->sd) {
index d3194de7ae1e6bb42fdf7132f3109c08fc5e591f..56fdad479115eafe3ec4acd6f4e5f128d71737a7 100644 (file)
@@ -173,7 +173,7 @@ static int validate_ctr_auth(const struct hw_perf_event *hwc)
  */
 static void cpumf_pmu_enable(struct pmu *pmu)
 {
-       struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
        int err;
 
        if (cpuhw->flags & PMU_F_ENABLED)
@@ -196,7 +196,7 @@ static void cpumf_pmu_enable(struct pmu *pmu)
  */
 static void cpumf_pmu_disable(struct pmu *pmu)
 {
-       struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
        int err;
        u64 inactive;
 
@@ -230,7 +230,7 @@ static void cpumf_measurement_alert(struct ext_code ext_code,
                return;
 
        inc_irq_stat(IRQEXT_CMC);
-       cpuhw = &__get_cpu_var(cpu_hw_events);
+       cpuhw = this_cpu_ptr(&cpu_hw_events);
 
        /* Measurement alerts are shared and might happen when the PMU
         * is not reserved.  Ignore these alerts in this case. */
@@ -250,7 +250,7 @@ static void cpumf_measurement_alert(struct ext_code ext_code,
 #define PMC_RELEASE   1
 static void setup_pmc_cpu(void *flags)
 {
-       struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
 
        switch (*((int *) flags)) {
        case PMC_INIT:
@@ -475,7 +475,7 @@ static void cpumf_pmu_read(struct perf_event *event)
 
 static void cpumf_pmu_start(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
        struct hw_perf_event *hwc = &event->hw;
 
        if (WARN_ON_ONCE(!(hwc->state & PERF_HES_STOPPED)))
@@ -506,7 +506,7 @@ static void cpumf_pmu_start(struct perf_event *event, int flags)
 
 static void cpumf_pmu_stop(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
        struct hw_perf_event *hwc = &event->hw;
 
        if (!(hwc->state & PERF_HES_STOPPED)) {
@@ -527,7 +527,7 @@ static void cpumf_pmu_stop(struct perf_event *event, int flags)
 
 static int cpumf_pmu_add(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
 
        /* Check authorization for the counter set to which this
         * counter belongs.
@@ -551,7 +551,7 @@ static int cpumf_pmu_add(struct perf_event *event, int flags)
 
 static void cpumf_pmu_del(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
 
        cpumf_pmu_stop(event, PERF_EF_UPDATE);
 
@@ -575,7 +575,7 @@ static void cpumf_pmu_del(struct perf_event *event, int flags)
  */
 static void cpumf_pmu_start_txn(struct pmu *pmu)
 {
-       struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
 
        perf_pmu_disable(pmu);
        cpuhw->flags |= PERF_EVENT_TXN;
@@ -589,7 +589,7 @@ static void cpumf_pmu_start_txn(struct pmu *pmu)
  */
 static void cpumf_pmu_cancel_txn(struct pmu *pmu)
 {
-       struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
 
        WARN_ON(cpuhw->tx_state != cpuhw->state);
 
@@ -604,7 +604,7 @@ static void cpumf_pmu_cancel_txn(struct pmu *pmu)
  */
 static int cpumf_pmu_commit_txn(struct pmu *pmu)
 {
-       struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
        u64 state;
 
        /* check if the updated state can be scheduled */
index ea0c7b2ef030f2d855df012af852cab54e509287..08e761318c17d786d2e40ce85fcd0b631fecc731 100644 (file)
@@ -562,7 +562,7 @@ static DEFINE_MUTEX(pmc_reserve_mutex);
 static void setup_pmc_cpu(void *flags)
 {
        int err;
-       struct cpu_hw_sf *cpusf = &__get_cpu_var(cpu_hw_sf);
+       struct cpu_hw_sf *cpusf = this_cpu_ptr(&cpu_hw_sf);
 
        err = 0;
        switch (*((int *) flags)) {
@@ -849,7 +849,7 @@ static int cpumsf_pmu_event_init(struct perf_event *event)
 
 static void cpumsf_pmu_enable(struct pmu *pmu)
 {
-       struct cpu_hw_sf *cpuhw = &__get_cpu_var(cpu_hw_sf);
+       struct cpu_hw_sf *cpuhw = this_cpu_ptr(&cpu_hw_sf);
        struct hw_perf_event *hwc;
        int err;
 
@@ -898,7 +898,7 @@ static void cpumsf_pmu_enable(struct pmu *pmu)
 
 static void cpumsf_pmu_disable(struct pmu *pmu)
 {
-       struct cpu_hw_sf *cpuhw = &__get_cpu_var(cpu_hw_sf);
+       struct cpu_hw_sf *cpuhw = this_cpu_ptr(&cpu_hw_sf);
        struct hws_lsctl_request_block inactive;
        struct hws_qsi_info_block si;
        int err;
@@ -1306,7 +1306,7 @@ static void cpumsf_pmu_read(struct perf_event *event)
  */
 static void cpumsf_pmu_start(struct perf_event *event, int flags)
 {
-       struct cpu_hw_sf *cpuhw = &__get_cpu_var(cpu_hw_sf);
+       struct cpu_hw_sf *cpuhw = this_cpu_ptr(&cpu_hw_sf);
 
        if (WARN_ON_ONCE(!(event->hw.state & PERF_HES_STOPPED)))
                return;
@@ -1327,7 +1327,7 @@ static void cpumsf_pmu_start(struct perf_event *event, int flags)
  */
 static void cpumsf_pmu_stop(struct perf_event *event, int flags)
 {
-       struct cpu_hw_sf *cpuhw = &__get_cpu_var(cpu_hw_sf);
+       struct cpu_hw_sf *cpuhw = this_cpu_ptr(&cpu_hw_sf);
 
        if (event->hw.state & PERF_HES_STOPPED)
                return;
@@ -1346,7 +1346,7 @@ static void cpumsf_pmu_stop(struct perf_event *event, int flags)
 
 static int cpumsf_pmu_add(struct perf_event *event, int flags)
 {
-       struct cpu_hw_sf *cpuhw = &__get_cpu_var(cpu_hw_sf);
+       struct cpu_hw_sf *cpuhw = this_cpu_ptr(&cpu_hw_sf);
        int err;
 
        if (cpuhw->flags & PMU_F_IN_USE)
@@ -1397,7 +1397,7 @@ out:
 
 static void cpumsf_pmu_del(struct perf_event *event, int flags)
 {
-       struct cpu_hw_sf *cpuhw = &__get_cpu_var(cpu_hw_sf);
+       struct cpu_hw_sf *cpuhw = this_cpu_ptr(&cpu_hw_sf);
 
        perf_pmu_disable(event->pmu);
        cpumsf_pmu_stop(event, PERF_EF_UPDATE);
@@ -1470,7 +1470,7 @@ static void cpumf_measurement_alert(struct ext_code ext_code,
        if (!(alert & CPU_MF_INT_SF_MASK))
                return;
        inc_irq_stat(IRQEXT_CMS);
-       cpuhw = &__get_cpu_var(cpu_hw_sf);
+       cpuhw = this_cpu_ptr(&cpu_hw_sf);
 
        /* Measurement alerts are shared and might happen when the PMU
         * is not reserved.  Ignore these alerts in this case. */
index edefead3b43a55dee5e197fae4a68011a1c3c41c..dbdd33ee010204f0e03c9c1fd48ad30acad59b4c 100644 (file)
@@ -23,7 +23,7 @@ static DEFINE_PER_CPU(struct cpuid, cpu_id);
  */
 void cpu_init(void)
 {
-       struct cpuid *id = &__get_cpu_var(cpu_id);
+       struct cpuid *id = this_cpu_ptr(&cpu_id);
 
        get_cpu_id(id);
        atomic_inc(&init_mm.mm_count);
index 69e980de0f6282310e7978ee398a2a5a0d7184c6..005d665fe4a5290eedca6e7d2177bed687332920 100644 (file)
@@ -92,7 +92,7 @@ void clock_comparator_work(void)
        struct clock_event_device *cd;
 
        S390_lowcore.clock_comparator = -1ULL;
-       cd = &__get_cpu_var(comparators);
+       cd = this_cpu_ptr(&comparators);
        cd->event_handler(cd);
 }
 
@@ -373,7 +373,7 @@ EXPORT_SYMBOL(get_sync_clock);
  */
 static void disable_sync_clock(void *dummy)
 {
-       atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
+       atomic_t *sw_ptr = this_cpu_ptr(&clock_sync_word);
        /*
         * Clear the in-sync bit 2^31. All get_sync_clock calls will
         * fail until the sync bit is turned back on. In addition
@@ -390,7 +390,7 @@ static void disable_sync_clock(void *dummy)
  */
 static void enable_sync_clock(void)
 {
-       atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
+       atomic_t *sw_ptr = this_cpu_ptr(&clock_sync_word);
        atomic_set_mask(0x80000000, sw_ptr);
 }
 
index e53c6f268807aa5c15ec6dc8ff87a67bdc633d88..ff9b4eb3458908ccd70da612c346659f734e7641 100644 (file)
@@ -178,7 +178,7 @@ static int smp_ctl_qsi(int cpu)
 static void hws_ext_handler(struct ext_code ext_code,
                            unsigned int param32, unsigned long param64)
 {
-       struct hws_cpu_buffer *cb = &__get_cpu_var(sampler_cpu_buffer);
+       struct hws_cpu_buffer *cb = this_cpu_ptr(&sampler_cpu_buffer);
 
        if (!(param32 & CPU_MF_INT_SF_MASK))
                return;
index 0300d94c25b35722f30e72d36d2c558ebf3d8bc3..05f366379f5336ce239205cb956c49ada99ec18e 100644 (file)
@@ -26,6 +26,6 @@ typedef struct {
 
 DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data);
 #define cpu_data(__cpu) per_cpu(__cpu_data, (__cpu))
-#define local_cpu_data() __get_cpu_var(__cpu_data)
+#define local_cpu_data() (*this_cpu_ptr(&__cpu_data))
 
 #endif /* _SPARC_CPUDATA_H */
index 0e594076912c07f5d5a3114ec87ec14429436288..a6e424d185d063bdddd43719e6a994fad6902c17 100644 (file)
@@ -30,7 +30,7 @@ typedef struct {
 
 DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data);
 #define cpu_data(__cpu)                per_cpu(__cpu_data, (__cpu))
-#define local_cpu_data()       __get_cpu_var(__cpu_data)
+#define local_cpu_data()       (*this_cpu_ptr(&__cpu_data))
 
 #endif /* !(__ASSEMBLY__) */
 
index 98d71284341332d5c5bc0ecfeaa4acb17875d139..cd83be527586ee0be802266d8bc5f35c1b1b1121 100644 (file)
@@ -83,7 +83,7 @@ static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
 
 static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
 {
-       __get_cpu_var(current_kprobe) = kcb->prev_kprobe.kp;
+       __this_cpu_write(current_kprobe, kcb->prev_kprobe.kp);
        kcb->kprobe_status = kcb->prev_kprobe.status;
        kcb->kprobe_orig_tnpc = kcb->prev_kprobe.orig_tnpc;
        kcb->kprobe_orig_tstate_pil = kcb->prev_kprobe.orig_tstate_pil;
@@ -92,7 +92,7 @@ static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
 static void __kprobes set_current_kprobe(struct kprobe *p, struct pt_regs *regs,
                                struct kprobe_ctlblk *kcb)
 {
-       __get_cpu_var(current_kprobe) = p;
+       __this_cpu_write(current_kprobe, p);
        kcb->kprobe_orig_tnpc = regs->tnpc;
        kcb->kprobe_orig_tstate_pil = (regs->tstate & TSTATE_PIL);
 }
@@ -155,7 +155,7 @@ static int __kprobes kprobe_handler(struct pt_regs *regs)
                                ret = 1;
                                goto no_kprobe;
                        }
-                       p = __get_cpu_var(current_kprobe);
+                       p = __this_cpu_read(current_kprobe);
                        if (p->break_handler && p->break_handler(p, regs))
                                goto ss_probe;
                }
index 018ef11f57df7060a1bd83d7db6a35a82bfc7391..ea2bad306f9356d8e2803a61c09944360160edac 100644 (file)
@@ -343,7 +343,7 @@ static void leon_ipi_resched(int cpu)
 
 void leonsmp_ipi_interrupt(void)
 {
-       struct leon_ipi_work *work = &__get_cpu_var(leon_ipi_work);
+       struct leon_ipi_work *work = this_cpu_ptr(&leon_ipi_work);
 
        if (work->single) {
                work->single = 0;
index 5b1151dcba13b919cefde000a55949acb9a3ae6b..a9973bb4a1b228ae982bfd9a97fe9b7ab7aea6f4 100644 (file)
@@ -100,20 +100,20 @@ notrace __kprobes void perfctr_irq(int irq, struct pt_regs *regs)
                pcr_ops->write_pcr(0, pcr_ops->pcr_nmi_disable);
 
        sum = local_cpu_data().irq0_irqs;
-       if (__get_cpu_var(nmi_touch)) {
-               __get_cpu_var(nmi_touch) = 0;
+       if (__this_cpu_read(nmi_touch)) {
+               __this_cpu_write(nmi_touch, 0);
                touched = 1;
        }
-       if (!touched && __get_cpu_var(last_irq_sum) == sum) {
+       if (!touched && __this_cpu_read(last_irq_sum) == sum) {
                __this_cpu_inc(alert_counter);
                if (__this_cpu_read(alert_counter) == 30 * nmi_hz)
                        die_nmi("BUG: NMI Watchdog detected LOCKUP",
                                regs, panic_on_timeout);
        } else {
-               __get_cpu_var(last_irq_sum) = sum;
+               __this_cpu_write(last_irq_sum, sum);
                __this_cpu_write(alert_counter, 0);
        }
-       if (__get_cpu_var(wd_enabled)) {
+       if (__this_cpu_read(wd_enabled)) {
                pcr_ops->write_pic(0, pcr_ops->nmi_picl_value(nmi_hz));
                pcr_ops->write_pcr(0, pcr_ops->pcr_nmi_enable);
        }
@@ -154,7 +154,7 @@ static void report_broken_nmi(int cpu, int *prev_nmi_count)
 void stop_nmi_watchdog(void *unused)
 {
        pcr_ops->write_pcr(0, pcr_ops->pcr_nmi_disable);
-       __get_cpu_var(wd_enabled) = 0;
+       __this_cpu_write(wd_enabled, 0);
        atomic_dec(&nmi_active);
 }
 
@@ -207,7 +207,7 @@ error:
 
 void start_nmi_watchdog(void *unused)
 {
-       __get_cpu_var(wd_enabled) = 1;
+       __this_cpu_write(wd_enabled, 1);
        atomic_inc(&nmi_active);
 
        pcr_ops->write_pcr(0, pcr_ops->pcr_nmi_disable);
@@ -218,7 +218,7 @@ void start_nmi_watchdog(void *unused)
 
 static void nmi_adjust_hz_one(void *unused)
 {
-       if (!__get_cpu_var(wd_enabled))
+       if (!__this_cpu_read(wd_enabled))
                return;
 
        pcr_ops->write_pcr(0, pcr_ops->pcr_nmi_disable);
index d07f6b29aed88510f1625d90655a4fbd10159b4c..49d33b178793c59ca04cd55a60ba5161f9f5e508 100644 (file)
@@ -48,7 +48,7 @@ static int iommu_batch_initialized;
 /* Interrupts must be disabled.  */
 static inline void iommu_batch_start(struct device *dev, unsigned long prot, unsigned long entry)
 {
-       struct iommu_batch *p = &__get_cpu_var(iommu_batch);
+       struct iommu_batch *p = this_cpu_ptr(&iommu_batch);
 
        p->dev          = dev;
        p->prot         = prot;
@@ -94,7 +94,7 @@ static long iommu_batch_flush(struct iommu_batch *p)
 
 static inline void iommu_batch_new_entry(unsigned long entry)
 {
-       struct iommu_batch *p = &__get_cpu_var(iommu_batch);
+       struct iommu_batch *p = this_cpu_ptr(&iommu_batch);
 
        if (p->entry + p->npages == entry)
                return;
@@ -106,7 +106,7 @@ static inline void iommu_batch_new_entry(unsigned long entry)
 /* Interrupts must be disabled.  */
 static inline long iommu_batch_add(u64 phys_page)
 {
-       struct iommu_batch *p = &__get_cpu_var(iommu_batch);
+       struct iommu_batch *p = this_cpu_ptr(&iommu_batch);
 
        BUG_ON(p->npages >= PGLIST_NENTS);
 
@@ -120,7 +120,7 @@ static inline long iommu_batch_add(u64 phys_page)
 /* Interrupts must be disabled.  */
 static inline long iommu_batch_end(void)
 {
-       struct iommu_batch *p = &__get_cpu_var(iommu_batch);
+       struct iommu_batch *p = this_cpu_ptr(&iommu_batch);
 
        BUG_ON(p->npages >= PGLIST_NENTS);
 
index c9759ad3f34af8230104309eec4168bae2980708..46a5e4508752814cb0ec21b820673cd445b19ada 100644 (file)
@@ -1013,7 +1013,7 @@ static void update_pcrs_for_enable(struct cpu_hw_events *cpuc)
 
 static void sparc_pmu_enable(struct pmu *pmu)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        int i;
 
        if (cpuc->enabled)
@@ -1031,7 +1031,7 @@ static void sparc_pmu_enable(struct pmu *pmu)
 
 static void sparc_pmu_disable(struct pmu *pmu)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        int i;
 
        if (!cpuc->enabled)
@@ -1065,7 +1065,7 @@ static int active_event_index(struct cpu_hw_events *cpuc,
 
 static void sparc_pmu_start(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        int idx = active_event_index(cpuc, event);
 
        if (flags & PERF_EF_RELOAD) {
@@ -1080,7 +1080,7 @@ static void sparc_pmu_start(struct perf_event *event, int flags)
 
 static void sparc_pmu_stop(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        int idx = active_event_index(cpuc, event);
 
        if (!(event->hw.state & PERF_HES_STOPPED)) {
@@ -1096,7 +1096,7 @@ static void sparc_pmu_stop(struct perf_event *event, int flags)
 
 static void sparc_pmu_del(struct perf_event *event, int _flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        unsigned long flags;
        int i;
 
@@ -1133,7 +1133,7 @@ static void sparc_pmu_del(struct perf_event *event, int _flags)
 
 static void sparc_pmu_read(struct perf_event *event)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        int idx = active_event_index(cpuc, event);
        struct hw_perf_event *hwc = &event->hw;
 
@@ -1145,7 +1145,7 @@ static DEFINE_MUTEX(pmc_grab_mutex);
 
 static void perf_stop_nmi_watchdog(void *unused)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        int i;
 
        stop_nmi_watchdog(NULL);
@@ -1356,7 +1356,7 @@ static int collect_events(struct perf_event *group, int max_count,
 
 static int sparc_pmu_add(struct perf_event *event, int ef_flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        int n0, ret = -EAGAIN;
        unsigned long flags;
 
@@ -1498,7 +1498,7 @@ static int sparc_pmu_event_init(struct perf_event *event)
  */
 static void sparc_pmu_start_txn(struct pmu *pmu)
 {
-       struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
 
        perf_pmu_disable(pmu);
        cpuhw->group_flag |= PERF_EVENT_TXN;
@@ -1511,7 +1511,7 @@ static void sparc_pmu_start_txn(struct pmu *pmu)
  */
 static void sparc_pmu_cancel_txn(struct pmu *pmu)
 {
-       struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuhw = this_cpu_ptr(&cpu_hw_events);
 
        cpuhw->group_flag &= ~PERF_EVENT_TXN;
        perf_pmu_enable(pmu);
@@ -1524,13 +1524,13 @@ static void sparc_pmu_cancel_txn(struct pmu *pmu)
  */
 static int sparc_pmu_commit_txn(struct pmu *pmu)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        int n;
 
        if (!sparc_pmu)
                return -EINVAL;
 
-       cpuc = &__get_cpu_var(cpu_hw_events);
+       cpuc = this_cpu_ptr(&cpu_hw_events);
        n = cpuc->n_events;
        if (check_excludes(cpuc->event, 0, n))
                return -EINVAL;
@@ -1601,7 +1601,7 @@ static int __kprobes perf_event_nmi_handler(struct notifier_block *self,
 
        regs = args->regs;
 
-       cpuc = &__get_cpu_var(cpu_hw_events);
+       cpuc = this_cpu_ptr(&cpu_hw_events);
 
        /* If the PMU has the TOE IRQ enable bits, we need to do a
         * dummy write to the %pcr to clear the overflow bits and thus
index d5c319553fd0874903515106920d283c066d8fbd..9d98e5002a09a483eb87b23bd68b33a6e6f83e05 100644 (file)
@@ -204,7 +204,7 @@ static void __init smp4d_ipi_init(void)
 
 void sun4d_ipi_interrupt(void)
 {
-       struct sun4d_ipi_work *work = &__get_cpu_var(sun4d_ipi_work);
+       struct sun4d_ipi_work *work = this_cpu_ptr(&sun4d_ipi_work);
 
        if (work->single) {
                work->single = 0;
index 3fddf64c7fc63ab81bb1ec0599b9cefa790ec6c8..59da0c3ea78879f14420946a06095da5d7628289 100644 (file)
@@ -765,7 +765,7 @@ void setup_sparc64_timer(void)
                             : /* no outputs */
                             : "r" (pstate));
 
-       sevt = &__get_cpu_var(sparc64_events);
+       sevt = this_cpu_ptr(&sparc64_events);
 
        memcpy(sevt, &sparc64_clockevent, sizeof(*sevt));
        sevt->cpumask = cpumask_of(smp_processor_id());
index b89aba217e3b5105c3fae5737cca2f279db4dc95..9df2190c097e1bb09de8378ca89b19e79c384917 100644 (file)
@@ -52,14 +52,14 @@ out:
 
 void arch_enter_lazy_mmu_mode(void)
 {
-       struct tlb_batch *tb = &__get_cpu_var(tlb_batch);
+       struct tlb_batch *tb = this_cpu_ptr(&tlb_batch);
 
        tb->active = 1;
 }
 
 void arch_leave_lazy_mmu_mode(void)
 {
-       struct tlb_batch *tb = &__get_cpu_var(tlb_batch);
+       struct tlb_batch *tb = this_cpu_ptr(&tlb_batch);
 
        if (tb->tlb_nr)
                flush_tlb_pending();
index 71af5747874d6a47b90534bd54a4d56bbcd138ad..60d62a292fce6f3170eb67416e517647d670d8b4 100644 (file)
@@ -140,12 +140,12 @@ extern unsigned int debug_smp_processor_id(void);
 
 /*
  * Read the set of maskable interrupts.
- * We avoid the preemption warning here via __this_cpu_ptr since even
+ * We avoid the preemption warning here via raw_cpu_ptr since even
  * if irqs are already enabled, it's harmless to read the wrong cpu's
  * enabled mask.
  */
 #define arch_local_irqs_enabled() \
-       (*__this_cpu_ptr(&interrupts_enabled_mask))
+       (*raw_cpu_ptr(&interrupts_enabled_mask))
 
 /* Re-enable all maskable interrupts. */
 #define arch_local_irq_enable() \
index 4734215e2ad451ecb5b9d3e655ccc72f31ac80f0..f67753db1f782cf10e81eb9820a985e42e59e560 100644 (file)
@@ -84,7 +84,7 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *t)
         * clear any pending DMA interrupts.
         */
        if (current->thread.tile_dma_state.enabled)
-               install_page_table(mm->pgd, __get_cpu_var(current_asid));
+               install_page_table(mm->pgd, __this_cpu_read(current_asid));
 #endif
 }
 
@@ -96,12 +96,12 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
                int cpu = smp_processor_id();
 
                /* Pick new ASID. */
-               int asid = __get_cpu_var(current_asid) + 1;
+               int asid = __this_cpu_read(current_asid) + 1;
                if (asid > max_asid) {
                        asid = min_asid;
                        local_flush_tlb();
                }
-               __get_cpu_var(current_asid) = asid;
+               __this_cpu_write(current_asid, asid);
 
                /* Clear cpu from the old mm, and set it in the new one. */
                cpumask_clear_cpu(cpu, mm_cpumask(prev));
index 637f2ffaa5f56159bb7eee1fe0e8b2eda8f97579..ba85765e1436d6aa828af3f74f3a4f80b354bd59 100644 (file)
@@ -73,7 +73,7 @@ static DEFINE_PER_CPU(int, irq_depth);
  */
 void tile_dev_intr(struct pt_regs *regs, int intnum)
 {
-       int depth = __get_cpu_var(irq_depth)++;
+       int depth = __this_cpu_inc_return(irq_depth);
        unsigned long original_irqs;
        unsigned long remaining_irqs;
        struct pt_regs *old_regs;
@@ -120,7 +120,7 @@ void tile_dev_intr(struct pt_regs *regs, int intnum)
 
                /* Count device irqs; Linux IPIs are counted elsewhere. */
                if (irq != IRQ_RESCHEDULE)
-                       __get_cpu_var(irq_stat).irq_dev_intr_count++;
+                       __this_cpu_inc(irq_stat.irq_dev_intr_count);
 
                generic_handle_irq(irq);
        }
@@ -130,10 +130,10 @@ void tile_dev_intr(struct pt_regs *regs, int intnum)
         * including any that were reenabled during interrupt
         * handling.
         */
-       if (depth == 0)
-               unmask_irqs(~__get_cpu_var(irq_disable_mask));
+       if (depth == 1)
+               unmask_irqs(~__this_cpu_read(irq_disable_mask));
 
-       __get_cpu_var(irq_depth)--;
+       __this_cpu_dec(irq_depth);
 
        /*
         * Track time spent against the current process again and
@@ -151,7 +151,7 @@ void tile_dev_intr(struct pt_regs *regs, int intnum)
 static void tile_irq_chip_enable(struct irq_data *d)
 {
        get_cpu_var(irq_disable_mask) &= ~(1UL << d->irq);
-       if (__get_cpu_var(irq_depth) == 0)
+       if (__this_cpu_read(irq_depth) == 0)
                unmask_irqs(1UL << d->irq);
        put_cpu_var(irq_disable_mask);
 }
@@ -197,7 +197,7 @@ static void tile_irq_chip_ack(struct irq_data *d)
  */
 static void tile_irq_chip_eoi(struct irq_data *d)
 {
-       if (!(__get_cpu_var(irq_disable_mask) & (1UL << d->irq)))
+       if (!(__this_cpu_read(irq_disable_mask) & (1UL << d->irq)))
                unmask_irqs(1UL << d->irq);
 }
 
index 7867266f97169a5dd87fb09508e6833a94ef5b74..ac950be1318e410733627f7ca237c4f6ea9cd4c7 100644 (file)
@@ -28,7 +28,7 @@ static DEFINE_PER_CPU(HV_MsgState, msg_state);
 void init_messaging(void)
 {
        /* Allocate storage for messages in kernel space */
-       HV_MsgState *state = &__get_cpu_var(msg_state);
+       HV_MsgState *state = this_cpu_ptr(&msg_state);
        int rc = hv_register_message_state(state);
        if (rc != HV_OK)
                panic("hv_register_message_state: error %d", rc);
@@ -96,7 +96,7 @@ void hv_message_intr(struct pt_regs *regs, int intnum)
                        struct hv_driver_cb *cb =
                                (struct hv_driver_cb *)him->intarg;
                        cb->callback(cb, him->intdata);
-                       __get_cpu_var(irq_stat).irq_hv_msg_count++;
+                       __this_cpu_inc(irq_stat.irq_hv_msg_count);
                }
        }
 
index 2bf6c9c135c15e7b44b980a72c0b2f9592073799..bb509cee3b598807eeae1aca6056e7adaed59e19 100644 (file)
@@ -590,7 +590,7 @@ static int tile_event_set_period(struct perf_event *event)
  */
 static void tile_pmu_stop(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct hw_perf_event *hwc = &event->hw;
        int idx = hwc->idx;
 
@@ -616,7 +616,7 @@ static void tile_pmu_stop(struct perf_event *event, int flags)
  */
 static void tile_pmu_start(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        int idx = event->hw.idx;
 
        if (WARN_ON_ONCE(!(event->hw.state & PERF_HES_STOPPED)))
@@ -650,7 +650,7 @@ static void tile_pmu_start(struct perf_event *event, int flags)
  */
 static int tile_pmu_add(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct hw_perf_event *hwc;
        unsigned long mask;
        int b, max_cnt;
@@ -706,7 +706,7 @@ static int tile_pmu_add(struct perf_event *event, int flags)
  */
 static void tile_pmu_del(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        int i;
 
        /*
@@ -880,14 +880,14 @@ static struct pmu tilera_pmu = {
 int tile_pmu_handle_irq(struct pt_regs *regs, int fault)
 {
        struct perf_sample_data data;
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct perf_event *event;
        struct hw_perf_event *hwc;
        u64 val;
        unsigned long status;
        int bit;
 
-       __get_cpu_var(perf_irqs)++;
+       __this_cpu_inc(perf_irqs);
 
        if (!atomic_read(&tile_active_events))
                return 0;
index 16ed58948757565639d93dc0417b69ea17269b68..0050cbc1d9de4230cc772413b6fde977954a000d 100644 (file)
@@ -64,7 +64,7 @@ early_param("idle", idle_setup);
 
 void arch_cpu_idle(void)
 {
-       __get_cpu_var(irq_stat).idle_timestamp = jiffies;
+       __this_cpu_write(irq_stat.idle_timestamp, jiffies);
        _cpu_idle();
 }
 
index 112ababa9e5502c6593969d44c976fbd495cf663..b9736ded06f25fb341c5e7d7a248218b803549cc 100644 (file)
@@ -1218,7 +1218,8 @@ static void __init validate_hv(void)
         * various asid variables to their appropriate initial states.
         */
        asid_range = hv_inquire_asid(0);
-       __get_cpu_var(current_asid) = min_asid = asid_range.start;
+       min_asid = asid_range.start;
+       __this_cpu_write(current_asid, min_asid);
        max_asid = asid_range.start + asid_range.size - 1;
 
        if (hv_confstr(HV_CONFSTR_CHIP_MODEL, (HV_VirtAddr)chip_model,
index de07fa7d1315e34c93bfa82d995c1393cadcf096..6cb2ce31b5a2d394aa290ca81a103ba824969dca 100644 (file)
@@ -740,7 +740,7 @@ static DEFINE_PER_CPU(unsigned long, ss_saved_pc);
 
 void gx_singlestep_handle(struct pt_regs *regs, int fault_num)
 {
-       unsigned long *ss_pc = &__get_cpu_var(ss_saved_pc);
+       unsigned long *ss_pc = this_cpu_ptr(&ss_saved_pc);
        struct thread_info *info = (void *)current_thread_info();
        int is_single_step = test_ti_thread_flag(info, TIF_SINGLESTEP);
        unsigned long control = __insn_mfspr(SPR_SINGLE_STEP_CONTROL_K);
@@ -766,7 +766,7 @@ void gx_singlestep_handle(struct pt_regs *regs, int fault_num)
 
 void single_step_once(struct pt_regs *regs)
 {
-       unsigned long *ss_pc = &__get_cpu_var(ss_saved_pc);
+       unsigned long *ss_pc = this_cpu_ptr(&ss_saved_pc);
        unsigned long control = __insn_mfspr(SPR_SINGLE_STEP_CONTROL_K);
 
        *ss_pc = regs->pc;
index 19eaa62d456a7c0635c9ec407dc3b998b7027bd4..d3c4ed780ce2244cfcab4da5068fb29442ac5786 100644 (file)
@@ -189,7 +189,7 @@ EXPORT_SYMBOL(flush_icache_range);
 /* Called when smp_send_reschedule() triggers IRQ_RESCHEDULE. */
 static irqreturn_t handle_reschedule_ipi(int irq, void *token)
 {
-       __get_cpu_var(irq_stat).irq_resched_count++;
+       __this_cpu_inc(irq_stat.irq_resched_count);
        scheduler_ipi();
 
        return IRQ_HANDLED;
index 732e9d1386618066ad8cb294e0155a6fcd70417d..0d59a1b60c742b1c719ddfefa9bb6a87c7ad1c0b 100644 (file)
@@ -41,7 +41,7 @@ void __init smp_prepare_boot_cpu(void)
        int cpu = smp_processor_id();
        set_cpu_online(cpu, 1);
        set_cpu_present(cpu, 1);
-       __get_cpu_var(cpu_state) = CPU_ONLINE;
+       __this_cpu_write(cpu_state, CPU_ONLINE);
 
        init_messaging();
 }
@@ -158,7 +158,7 @@ static void start_secondary(void)
        /* printk(KERN_DEBUG "Initializing CPU#%d\n", cpuid); */
 
        /* Initialize the current asid for our first page table. */
-       __get_cpu_var(current_asid) = min_asid;
+       __this_cpu_write(current_asid, min_asid);
 
        /* Set up this thread as another owner of the init_mm */
        atomic_inc(&init_mm.mm_count);
@@ -201,7 +201,7 @@ void online_secondary(void)
        notify_cpu_starting(smp_processor_id());
 
        set_cpu_online(smp_processor_id(), 1);
-       __get_cpu_var(cpu_state) = CPU_ONLINE;
+       __this_cpu_write(cpu_state, CPU_ONLINE);
 
        /* Set up tile-specific state for this cpu. */
        setup_cpu(0);
index c1b362277fb7110a5980979336f097bfb7c44509..b854a1cd0079ebb864efd63791753d83f6455ad9 100644 (file)
@@ -162,7 +162,7 @@ static DEFINE_PER_CPU(struct clock_event_device, tile_timer) = {
 
 void setup_tile_timer(void)
 {
-       struct clock_event_device *evt = &__get_cpu_var(tile_timer);
+       struct clock_event_device *evt = this_cpu_ptr(&tile_timer);
 
        /* Fill in fields that are speed-specific. */
        clockevents_calc_mult_shift(evt, cycles_per_sec, TILE_MINSEC);
@@ -182,7 +182,7 @@ void setup_tile_timer(void)
 void do_timer_interrupt(struct pt_regs *regs, int fault_num)
 {
        struct pt_regs *old_regs = set_irq_regs(regs);
-       struct clock_event_device *evt = &__get_cpu_var(tile_timer);
+       struct clock_event_device *evt = this_cpu_ptr(&tile_timer);
 
        /*
         * Mask the timer interrupt here, since we are a oneshot timer
@@ -194,7 +194,7 @@ void do_timer_interrupt(struct pt_regs *regs, int fault_num)
        irq_enter();
 
        /* Track interrupt count. */
-       __get_cpu_var(irq_stat).irq_timer_count++;
+       __this_cpu_inc(irq_stat.irq_timer_count);
 
        /* Call the generic timer handler */
        evt->event_handler(evt);
@@ -235,7 +235,7 @@ cycles_t ns2cycles(unsigned long nsecs)
         * We do not have to disable preemption here as each core has the same
         * clock frequency.
         */
-       struct clock_event_device *dev = &__raw_get_cpu_var(tile_timer);
+       struct clock_event_device *dev = raw_cpu_ptr(&tile_timer);
 
        /*
         * as in clocksource.h and x86's timer.h, we split the calculation
index 0dc218294770c23658158ccccb5ca566f60a8939..6aa2f26254471e730e29b0c1f1382c3f7a4d0f64 100644 (file)
@@ -103,7 +103,7 @@ static void kmap_atomic_register(struct page *page, int type,
        spin_lock(&amp_lock);
 
        /* With interrupts disabled, now fill in the per-cpu info. */
-       amp = &__get_cpu_var(amps).per_type[type];
+       amp = this_cpu_ptr(&amps.per_type[type]);
        amp->page = page;
        amp->cpu = smp_processor_id();
        amp->va = va;
index a092e393bd202f2254dc00f1c6461d805419054e..caa270165f864e08a32f513e5c393fca17ad02a8 100644 (file)
@@ -593,14 +593,14 @@ static void __init kernel_physical_mapping_init(pgd_t *pgd_base)
        interrupt_mask_set_mask(-1ULL);
        rc = flush_and_install_context(__pa(pgtables),
                                       init_pgprot((unsigned long)pgtables),
-                                      __get_cpu_var(current_asid),
+                                      __this_cpu_read(current_asid),
                                       cpumask_bits(my_cpu_mask));
        interrupt_mask_restore_mask(irqmask);
        BUG_ON(rc != 0);
 
        /* Copy the page table back to the normal swapper_pg_dir. */
        memcpy(pgd_base, pgtables, sizeof(pgtables));
-       __install_page_table(pgd_base, __get_cpu_var(current_asid),
+       __install_page_table(pgd_base, __this_cpu_read(current_asid),
                             swapper_pgprot);
 
        /*
index 4b528a970bd43f0ceed423d4f01819e251d47284..61fd18b83b6c6af777f2cdd2a63d943089de55e1 100644 (file)
@@ -97,11 +97,11 @@ extern void hw_breakpoint_restore(void);
 DECLARE_PER_CPU(int, debug_stack_usage);
 static inline void debug_stack_usage_inc(void)
 {
-       __get_cpu_var(debug_stack_usage)++;
+       __this_cpu_inc(debug_stack_usage);
 }
 static inline void debug_stack_usage_dec(void)
 {
-       __get_cpu_var(debug_stack_usage)--;
+       __this_cpu_dec(debug_stack_usage);
 }
 int is_debug_stack(unsigned long addr);
 void debug_stack_set_zero(void);
index 85e13ccf15c4f29f38ab3c89806346857697f2a4..d725382c2ae0f4c8d7fbe6db7818e9878b652f41 100644 (file)
@@ -189,7 +189,7 @@ static inline int p4_ht_thread(int cpu)
 {
 #ifdef CONFIG_SMP
        if (smp_num_siblings == 2)
-               return cpu != cpumask_first(__get_cpu_var(cpu_sibling_map));
+               return cpu != cpumask_first(this_cpu_cpumask_var_ptr(cpu_sibling_map));
 #endif
        return 0;
 }
index c63e925fd6b7382900dcd6805082f354a20934de..a00ad8f2a6578f61db3e322013b93888fbef4afa 100644 (file)
@@ -164,7 +164,7 @@ struct uv_hub_info_s {
 };
 
 DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
-#define uv_hub_info            (&__get_cpu_var(__uv_hub_info))
+#define uv_hub_info            this_cpu_ptr(&__uv_hub_info)
 #define uv_cpu_hub_info(cpu)   (&per_cpu(__uv_hub_info, cpu))
 
 /*
@@ -601,16 +601,16 @@ struct uv_hub_nmi_s {
 
 struct uv_cpu_nmi_s {
        struct uv_hub_nmi_s     *hub;
-       atomic_t                state;
-       atomic_t                pinging;
+       int                     state;
+       int                     pinging;
        int                     queries;
        int                     pings;
 };
 
-DECLARE_PER_CPU(struct uv_cpu_nmi_s, __uv_cpu_nmi);
-#define uv_cpu_nmi                     (__get_cpu_var(__uv_cpu_nmi))
+DECLARE_PER_CPU(struct uv_cpu_nmi_s, uv_cpu_nmi);
+
 #define uv_hub_nmi                     (uv_cpu_nmi.hub)
-#define uv_cpu_nmi_per(cpu)            (per_cpu(__uv_cpu_nmi, cpu))
+#define uv_cpu_nmi_per(cpu)            (per_cpu(uv_cpu_nmi, cpu))
 #define uv_hub_nmi_per(cpu)            (uv_cpu_nmi_per(cpu).hub)
 
 /* uv_cpu_nmi_states */
index af5b08ab3b712836e09d7eb9f6cd79919035d22f..5972b108f15a739a06b47276a05d86713d08a3a2 100644 (file)
@@ -146,7 +146,7 @@ static inline int is_apbt_capable(void)
 static int __init apbt_clockevent_register(void)
 {
        struct sfi_timer_table_entry *mtmr;
-       struct apbt_dev *adev = &__get_cpu_var(cpu_apbt_dev);
+       struct apbt_dev *adev = this_cpu_ptr(&cpu_apbt_dev);
 
        mtmr = sfi_get_mtmr(APBT_CLOCKEVENT0_NUM);
        if (mtmr == NULL) {
@@ -200,7 +200,7 @@ void apbt_setup_secondary_clock(void)
        if (!cpu)
                return;
 
-       adev = &__get_cpu_var(cpu_apbt_dev);
+       adev = this_cpu_ptr(&cpu_apbt_dev);
        if (!adev->timer) {
                adev->timer = dw_apb_clockevent_init(cpu, adev->name,
                        APBT_CLOCKEVENT_RATING, adev_virt_addr(adev),
index 67760275544b4f548f98c5b18c098d481637995d..00853b254ab09c36afdb2a681bd9c68037ac17dc 100644 (file)
@@ -561,7 +561,7 @@ static DEFINE_PER_CPU(struct clock_event_device, lapic_events);
  */
 static void setup_APIC_timer(void)
 {
-       struct clock_event_device *levt = &__get_cpu_var(lapic_events);
+       struct clock_event_device *levt = this_cpu_ptr(&lapic_events);
 
        if (this_cpu_has(X86_FEATURE_ARAT)) {
                lapic_clockevent.features &= ~CLOCK_EVT_FEAT_C3STOP;
@@ -696,7 +696,7 @@ calibrate_by_pmtimer(long deltapm, long *delta, long *deltatsc)
 
 static int __init calibrate_APIC_clock(void)
 {
-       struct clock_event_device *levt = &__get_cpu_var(lapic_events);
+       struct clock_event_device *levt = this_cpu_ptr(&lapic_events);
        void (*real_handler)(struct clock_event_device *dev);
        unsigned long deltaj;
        long delta, deltatsc;
index 6ce600f9bc789e2ccf0fe53bd6cb61091ebd0340..e658f21681c82e1ad8fa28bde084c7933939548b 100644 (file)
@@ -42,7 +42,7 @@ __x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
         * We are to modify mask, so we need an own copy
         * and be sure it's manipulated with irq off.
         */
-       ipi_mask_ptr = __raw_get_cpu_var(ipi_mask);
+       ipi_mask_ptr = this_cpu_cpumask_var_ptr(ipi_mask);
        cpumask_copy(ipi_mask_ptr, mask);
 
        /*
index 3eff36f719fb62dbb78ef64f37421b73a90c95ac..4b4f78c9ba1902ed87127738052135ed54071088 100644 (file)
@@ -1200,9 +1200,9 @@ DEFINE_PER_CPU(int, debug_stack_usage);
 
 int is_debug_stack(unsigned long addr)
 {
-       return __get_cpu_var(debug_stack_usage) ||
-               (addr <= __get_cpu_var(debug_stack_addr) &&
-                addr > (__get_cpu_var(debug_stack_addr) - DEBUG_STKSZ));
+       return __this_cpu_read(debug_stack_usage) ||
+               (addr <= __this_cpu_read(debug_stack_addr) &&
+                addr > (__this_cpu_read(debug_stack_addr) - DEBUG_STKSZ));
 }
 NOKPROBE_SYMBOL(is_debug_stack);
 
index 5ac2d1fb28bc590bd9403aea70d8641d3b05e03b..4cfba4371a71f28c4615610475e3eec9e8d9790c 100644 (file)
@@ -83,7 +83,7 @@ static DEFINE_MUTEX(mce_inject_mutex);
 static int mce_raise_notify(unsigned int cmd, struct pt_regs *regs)
 {
        int cpu = smp_processor_id();
-       struct mce *m = &__get_cpu_var(injectm);
+       struct mce *m = this_cpu_ptr(&injectm);
        if (!cpumask_test_cpu(cpu, mce_inject_cpumask))
                return NMI_DONE;
        cpumask_clear_cpu(cpu, mce_inject_cpumask);
@@ -97,7 +97,7 @@ static int mce_raise_notify(unsigned int cmd, struct pt_regs *regs)
 static void mce_irq_ipi(void *info)
 {
        int cpu = smp_processor_id();
-       struct mce *m = &__get_cpu_var(injectm);
+       struct mce *m = this_cpu_ptr(&injectm);
 
        if (cpumask_test_cpu(cpu, mce_inject_cpumask) &&
                        m->inject_flags & MCJ_EXCEPTION) {
@@ -109,7 +109,7 @@ static void mce_irq_ipi(void *info)
 /* Inject mce on current CPU */
 static int raise_local(void)
 {
-       struct mce *m = &__get_cpu_var(injectm);
+       struct mce *m = this_cpu_ptr(&injectm);
        int context = MCJ_CTX(m->inject_flags);
        int ret = 0;
        int cpu = m->extcpu;
index bd9ccda8087ff5f46ab30bc89225b8912ceaac40..61a9668cebfde8d0ca22ce7dd5bde07f99a2e65f 100644 (file)
@@ -400,7 +400,7 @@ static u64 mce_rdmsrl(u32 msr)
 
                if (offset < 0)
                        return 0;
-               return *(u64 *)((char *)&__get_cpu_var(injectm) + offset);
+               return *(u64 *)((char *)this_cpu_ptr(&injectm) + offset);
        }
 
        if (rdmsrl_safe(msr, &v)) {
@@ -422,7 +422,7 @@ static void mce_wrmsrl(u32 msr, u64 v)
                int offset = msr_to_offset(msr);
 
                if (offset >= 0)
-                       *(u64 *)((char *)&__get_cpu_var(injectm) + offset) = v;
+                       *(u64 *)((char *)this_cpu_ptr(&injectm) + offset) = v;
                return;
        }
        wrmsrl(msr, v);
@@ -478,7 +478,7 @@ static DEFINE_PER_CPU(struct mce_ring, mce_ring);
 /* Runs with CPU affinity in workqueue */
 static int mce_ring_empty(void)
 {
-       struct mce_ring *r = &__get_cpu_var(mce_ring);
+       struct mce_ring *r = this_cpu_ptr(&mce_ring);
 
        return r->start == r->end;
 }
@@ -490,7 +490,7 @@ static int mce_ring_get(unsigned long *pfn)
 
        *pfn = 0;
        get_cpu();
-       r = &__get_cpu_var(mce_ring);
+       r = this_cpu_ptr(&mce_ring);
        if (r->start == r->end)
                goto out;
        *pfn = r->ring[r->start];
@@ -504,7 +504,7 @@ out:
 /* Always runs in MCE context with preempt off */
 static int mce_ring_add(unsigned long pfn)
 {
-       struct mce_ring *r = &__get_cpu_var(mce_ring);
+       struct mce_ring *r = this_cpu_ptr(&mce_ring);
        unsigned next;
 
        next = (r->end + 1) % MCE_RING_SIZE;
@@ -526,7 +526,7 @@ int mce_available(struct cpuinfo_x86 *c)
 static void mce_schedule_work(void)
 {
        if (!mce_ring_empty())
-               schedule_work(&__get_cpu_var(mce_work));
+               schedule_work(this_cpu_ptr(&mce_work));
 }
 
 DEFINE_PER_CPU(struct irq_work, mce_irq_work);
@@ -551,7 +551,7 @@ static void mce_report_event(struct pt_regs *regs)
                return;
        }
 
-       irq_work_queue(&__get_cpu_var(mce_irq_work));
+       irq_work_queue(this_cpu_ptr(&mce_irq_work));
 }
 
 /*
@@ -1045,7 +1045,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
 
        mce_gather_info(&m, regs);
 
-       final = &__get_cpu_var(mces_seen);
+       final = this_cpu_ptr(&mces_seen);
        *final = m;
 
        memset(valid_banks, 0, sizeof(valid_banks));
@@ -1278,22 +1278,22 @@ static unsigned long (*mce_adjust_timer)(unsigned long interval) =
 
 static int cmc_error_seen(void)
 {
-       unsigned long *v = &__get_cpu_var(mce_polled_error);
+       unsigned long *v = this_cpu_ptr(&mce_polled_error);
 
        return test_and_clear_bit(0, v);
 }
 
 static void mce_timer_fn(unsigned long data)
 {
-       struct timer_list *t = &__get_cpu_var(mce_timer);
+       struct timer_list *t = this_cpu_ptr(&mce_timer);
        unsigned long iv;
        int notify;
 
        WARN_ON(smp_processor_id() != data);
 
-       if (mce_available(__this_cpu_ptr(&cpu_info))) {
+       if (mce_available(this_cpu_ptr(&cpu_info))) {
                machine_check_poll(MCP_TIMESTAMP,
-                               &__get_cpu_var(mce_poll_banks));
+                               this_cpu_ptr(&mce_poll_banks));
                mce_intel_cmci_poll();
        }
 
@@ -1323,7 +1323,7 @@ static void mce_timer_fn(unsigned long data)
  */
 void mce_timer_kick(unsigned long interval)
 {
-       struct timer_list *t = &__get_cpu_var(mce_timer);
+       struct timer_list *t = this_cpu_ptr(&mce_timer);
        unsigned long when = jiffies + interval;
        unsigned long iv = __this_cpu_read(mce_next_interval);
 
@@ -1659,7 +1659,7 @@ static void mce_start_timer(unsigned int cpu, struct timer_list *t)
 
 static void __mcheck_cpu_init_timer(void)
 {
-       struct timer_list *t = &__get_cpu_var(mce_timer);
+       struct timer_list *t = this_cpu_ptr(&mce_timer);
        unsigned int cpu = smp_processor_id();
 
        setup_timer(t, mce_timer_fn, cpu);
@@ -1702,8 +1702,8 @@ void mcheck_cpu_init(struct cpuinfo_x86 *c)
        __mcheck_cpu_init_generic();
        __mcheck_cpu_init_vendor(c);
        __mcheck_cpu_init_timer();
-       INIT_WORK(&__get_cpu_var(mce_work), mce_process_work);
-       init_irq_work(&__get_cpu_var(mce_irq_work), &mce_irq_work_cb);
+       INIT_WORK(this_cpu_ptr(&mce_work), mce_process_work);
+       init_irq_work(this_cpu_ptr(&mce_irq_work), &mce_irq_work_cb);
 }
 
 /*
@@ -1955,7 +1955,7 @@ static struct miscdevice mce_chrdev_device = {
 static void __mce_disable_bank(void *arg)
 {
        int bank = *((int *)arg);
-       __clear_bit(bank, __get_cpu_var(mce_poll_banks));
+       __clear_bit(bank, this_cpu_ptr(mce_poll_banks));
        cmci_disable_bank(bank);
 }
 
@@ -2065,7 +2065,7 @@ static void mce_syscore_shutdown(void)
 static void mce_syscore_resume(void)
 {
        __mcheck_cpu_init_generic();
-       __mcheck_cpu_init_vendor(__this_cpu_ptr(&cpu_info));
+       __mcheck_cpu_init_vendor(raw_cpu_ptr(&cpu_info));
 }
 
 static struct syscore_ops mce_syscore_ops = {
@@ -2080,7 +2080,7 @@ static struct syscore_ops mce_syscore_ops = {
 
 static void mce_cpu_restart(void *data)
 {
-       if (!mce_available(__this_cpu_ptr(&cpu_info)))
+       if (!mce_available(raw_cpu_ptr(&cpu_info)))
                return;
        __mcheck_cpu_init_generic();
        __mcheck_cpu_init_timer();
@@ -2096,14 +2096,14 @@ static void mce_restart(void)
 /* Toggle features for corrected errors */
 static void mce_disable_cmci(void *data)
 {
-       if (!mce_available(__this_cpu_ptr(&cpu_info)))
+       if (!mce_available(raw_cpu_ptr(&cpu_info)))
                return;
        cmci_clear();
 }
 
 static void mce_enable_ce(void *all)
 {
-       if (!mce_available(__this_cpu_ptr(&cpu_info)))
+       if (!mce_available(raw_cpu_ptr(&cpu_info)))
                return;
        cmci_reenable();
        cmci_recheck();
@@ -2336,7 +2336,7 @@ static void mce_disable_cpu(void *h)
        unsigned long action = *(unsigned long *)h;
        int i;
 
-       if (!mce_available(__this_cpu_ptr(&cpu_info)))
+       if (!mce_available(raw_cpu_ptr(&cpu_info)))
                return;
 
        if (!(action & CPU_TASKS_FROZEN))
@@ -2354,7 +2354,7 @@ static void mce_reenable_cpu(void *h)
        unsigned long action = *(unsigned long *)h;
        int i;
 
-       if (!mce_available(__this_cpu_ptr(&cpu_info)))
+       if (!mce_available(raw_cpu_ptr(&cpu_info)))
                return;
 
        if (!(action & CPU_TASKS_FROZEN))
index 1e49f8f41276edac73dfc8cbea3417693c6aedd2..5d4999f95aec54c70f237183fedd89ed10cad832 100644 (file)
@@ -310,7 +310,7 @@ static void amd_threshold_interrupt(void)
                         * event.
                         */
                        machine_check_poll(MCP_TIMESTAMP,
-                                       &__get_cpu_var(mce_poll_banks));
+                                       this_cpu_ptr(&mce_poll_banks));
 
                        if (high & MASK_OVERFLOW_HI) {
                                rdmsrl(address, m.misc);
index 3bdb95ae8c430fa8bacc76a9f644c4abce8ec35e..b3c97bafc1238fedd30f1ec0a3bab2ba7ee05cb8 100644 (file)
@@ -86,7 +86,7 @@ void mce_intel_cmci_poll(void)
 {
        if (__this_cpu_read(cmci_storm_state) == CMCI_STORM_NONE)
                return;
-       machine_check_poll(MCP_TIMESTAMP, &__get_cpu_var(mce_banks_owned));
+       machine_check_poll(MCP_TIMESTAMP, this_cpu_ptr(&mce_banks_owned));
 }
 
 void mce_intel_hcpu_update(unsigned long cpu)
@@ -145,7 +145,7 @@ static void cmci_storm_disable_banks(void)
        u64 val;
 
        raw_spin_lock_irqsave(&cmci_discover_lock, flags);
-       owned = __get_cpu_var(mce_banks_owned);
+       owned = this_cpu_ptr(mce_banks_owned);
        for_each_set_bit(bank, owned, MAX_NR_BANKS) {
                rdmsrl(MSR_IA32_MCx_CTL2(bank), val);
                val &= ~MCI_CTL2_CMCI_EN;
@@ -195,7 +195,7 @@ static void intel_threshold_interrupt(void)
 {
        if (cmci_storm_detect())
                return;
-       machine_check_poll(MCP_TIMESTAMP, &__get_cpu_var(mce_banks_owned));
+       machine_check_poll(MCP_TIMESTAMP, this_cpu_ptr(&mce_banks_owned));
        mce_notify_irq();
 }
 
@@ -206,7 +206,7 @@ static void intel_threshold_interrupt(void)
  */
 static void cmci_discover(int banks)
 {
-       unsigned long *owned = (void *)&__get_cpu_var(mce_banks_owned);
+       unsigned long *owned = (void *)this_cpu_ptr(&mce_banks_owned);
        unsigned long flags;
        int i;
        int bios_wrong_thresh = 0;
@@ -228,7 +228,7 @@ static void cmci_discover(int banks)
                /* Already owned by someone else? */
                if (val & MCI_CTL2_CMCI_EN) {
                        clear_bit(i, owned);
-                       __clear_bit(i, __get_cpu_var(mce_poll_banks));
+                       __clear_bit(i, this_cpu_ptr(mce_poll_banks));
                        continue;
                }
 
@@ -252,7 +252,7 @@ static void cmci_discover(int banks)
                /* Did the enable bit stick? -- the bank supports CMCI */
                if (val & MCI_CTL2_CMCI_EN) {
                        set_bit(i, owned);
-                       __clear_bit(i, __get_cpu_var(mce_poll_banks));
+                       __clear_bit(i, this_cpu_ptr(mce_poll_banks));
                        /*
                         * We are able to set thresholds for some banks that
                         * had a threshold of 0. This means the BIOS has not
@@ -263,7 +263,7 @@ static void cmci_discover(int banks)
                                        (val & MCI_CTL2_CMCI_THRESHOLD_MASK))
                                bios_wrong_thresh = 1;
                } else {
-                       WARN_ON(!test_bit(i, __get_cpu_var(mce_poll_banks)));
+                       WARN_ON(!test_bit(i, this_cpu_ptr(mce_poll_banks)));
                }
        }
        raw_spin_unlock_irqrestore(&cmci_discover_lock, flags);
@@ -284,10 +284,10 @@ void cmci_recheck(void)
        unsigned long flags;
        int banks;
 
-       if (!mce_available(__this_cpu_ptr(&cpu_info)) || !cmci_supported(&banks))
+       if (!mce_available(raw_cpu_ptr(&cpu_info)) || !cmci_supported(&banks))
                return;
        local_irq_save(flags);
-       machine_check_poll(MCP_TIMESTAMP, &__get_cpu_var(mce_banks_owned));
+       machine_check_poll(MCP_TIMESTAMP, this_cpu_ptr(&mce_banks_owned));
        local_irq_restore(flags);
 }
 
@@ -296,12 +296,12 @@ static void __cmci_disable_bank(int bank)
 {
        u64 val;
 
-       if (!test_bit(bank, __get_cpu_var(mce_banks_owned)))
+       if (!test_bit(bank, this_cpu_ptr(mce_banks_owned)))
                return;
        rdmsrl(MSR_IA32_MCx_CTL2(bank), val);
        val &= ~MCI_CTL2_CMCI_EN;
        wrmsrl(MSR_IA32_MCx_CTL2(bank), val);
-       __clear_bit(bank, __get_cpu_var(mce_banks_owned));
+       __clear_bit(bank, this_cpu_ptr(mce_banks_owned));
 }
 
 /*
index 16c73022306ebcde1c92a208cfa460dea0fc47f0..1b8299dd3d919de522374301b6b33777412e7e7b 100644 (file)
@@ -494,7 +494,7 @@ static int __x86_pmu_event_init(struct perf_event *event)
 
 void x86_pmu_disable_all(void)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        int idx;
 
        for (idx = 0; idx < x86_pmu.num_counters; idx++) {
@@ -512,7 +512,7 @@ void x86_pmu_disable_all(void)
 
 static void x86_pmu_disable(struct pmu *pmu)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
 
        if (!x86_pmu_initialized())
                return;
@@ -529,7 +529,7 @@ static void x86_pmu_disable(struct pmu *pmu)
 
 void x86_pmu_enable_all(int added)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        int idx;
 
        for (idx = 0; idx < x86_pmu.num_counters; idx++) {
@@ -876,7 +876,7 @@ static void x86_pmu_start(struct perf_event *event, int flags);
 
 static void x86_pmu_enable(struct pmu *pmu)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct perf_event *event;
        struct hw_perf_event *hwc;
        int i, added = cpuc->n_added;
@@ -1030,7 +1030,7 @@ void x86_pmu_enable_event(struct perf_event *event)
  */
 static int x86_pmu_add(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct hw_perf_event *hwc;
        int assign[X86_PMC_IDX_MAX];
        int n, n0, ret;
@@ -1081,7 +1081,7 @@ out:
 
 static void x86_pmu_start(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        int idx = event->hw.idx;
 
        if (WARN_ON_ONCE(!(event->hw.state & PERF_HES_STOPPED)))
@@ -1160,7 +1160,7 @@ void perf_event_print_debug(void)
 
 void x86_pmu_stop(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct hw_perf_event *hwc = &event->hw;
 
        if (__test_and_clear_bit(hwc->idx, cpuc->active_mask)) {
@@ -1182,7 +1182,7 @@ void x86_pmu_stop(struct perf_event *event, int flags)
 
 static void x86_pmu_del(struct perf_event *event, int flags)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        int i;
 
        /*
@@ -1237,7 +1237,7 @@ int x86_pmu_handle_irq(struct pt_regs *regs)
        int idx, handled = 0;
        u64 val;
 
-       cpuc = &__get_cpu_var(cpu_hw_events);
+       cpuc = this_cpu_ptr(&cpu_hw_events);
 
        /*
         * Some chipsets need to unmask the LVTPC in a particular spot
@@ -1646,7 +1646,7 @@ static void x86_pmu_cancel_txn(struct pmu *pmu)
  */
 static int x86_pmu_commit_txn(struct pmu *pmu)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        int assign[X86_PMC_IDX_MAX];
        int n, ret;
 
@@ -2005,7 +2005,7 @@ static unsigned long get_segment_base(unsigned int segment)
                if (idx > GDT_ENTRIES)
                        return 0;
 
-               desc = __this_cpu_ptr(&gdt_page.gdt[0]);
+               desc = raw_cpu_ptr(gdt_page.gdt);
        }
 
        return get_desc_base(desc + idx);
index beeb7cc0704400aaec6d62479331bfe089bef7eb..28926311aac1833b72a932e7108916e25bf4804d 100644 (file)
@@ -699,7 +699,7 @@ __init int amd_pmu_init(void)
 
 void amd_pmu_enable_virt(void)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
 
        cpuc->perf_ctr_virt_mask = 0;
 
@@ -711,7 +711,7 @@ EXPORT_SYMBOL_GPL(amd_pmu_enable_virt);
 
 void amd_pmu_disable_virt(void)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
 
        /*
         * We only mask out the Host-only bit so that host-only counting works
index 3851def5057c3dd1b2a7b08acc6641dc918a395a..a73947c53b65aa683f29d61a115d0e6d19a9ec5b 100644 (file)
@@ -1174,7 +1174,7 @@ static inline bool intel_pmu_needs_lbr_smpl(struct perf_event *event)
 
 static void intel_pmu_disable_all(void)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
 
        wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0);
 
@@ -1187,7 +1187,7 @@ static void intel_pmu_disable_all(void)
 
 static void intel_pmu_enable_all(int added)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
 
        intel_pmu_pebs_enable_all();
        intel_pmu_lbr_enable_all();
@@ -1221,7 +1221,7 @@ static void intel_pmu_enable_all(int added)
  */
 static void intel_pmu_nhm_workaround(void)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        static const unsigned long nhm_magic[4] = {
                0x4300B5,
                0x4300D2,
@@ -1320,7 +1320,7 @@ static inline bool event_is_checkpointed(struct perf_event *event)
 static void intel_pmu_disable_event(struct perf_event *event)
 {
        struct hw_perf_event *hwc = &event->hw;
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
 
        if (unlikely(hwc->idx == INTEL_PMC_IDX_FIXED_BTS)) {
                intel_pmu_disable_bts();
@@ -1384,7 +1384,7 @@ static void intel_pmu_enable_fixed(struct hw_perf_event *hwc)
 static void intel_pmu_enable_event(struct perf_event *event)
 {
        struct hw_perf_event *hwc = &event->hw;
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
 
        if (unlikely(hwc->idx == INTEL_PMC_IDX_FIXED_BTS)) {
                if (!__this_cpu_read(cpu_hw_events.enabled))
@@ -1478,7 +1478,7 @@ static int intel_pmu_handle_irq(struct pt_regs *regs)
        u64 status;
        int handled;
 
-       cpuc = &__get_cpu_var(cpu_hw_events);
+       cpuc = this_cpu_ptr(&cpu_hw_events);
 
        /*
         * No known reason to not always do late ACK,
@@ -1910,7 +1910,7 @@ EXPORT_SYMBOL_GPL(perf_guest_get_msrs);
 
 static struct perf_guest_switch_msr *intel_guest_get_msrs(int *nr)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct perf_guest_switch_msr *arr = cpuc->guest_switch_msrs;
 
        arr[0].msr = MSR_CORE_PERF_GLOBAL_CTRL;
@@ -1931,7 +1931,7 @@ static struct perf_guest_switch_msr *intel_guest_get_msrs(int *nr)
 
 static struct perf_guest_switch_msr *core_guest_get_msrs(int *nr)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct perf_guest_switch_msr *arr = cpuc->guest_switch_msrs;
        int idx;
 
@@ -1965,7 +1965,7 @@ static void core_pmu_enable_event(struct perf_event *event)
 
 static void core_pmu_enable_all(int added)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        int idx;
 
        for (idx = 0; idx < x86_pmu.num_counters; idx++) {
index b1553d05a5cb6adee590a2733913e1c774192025..46211bcc813ee812760c15be6c7c11da4bfd52c2 100644 (file)
@@ -474,7 +474,7 @@ void intel_pmu_enable_bts(u64 config)
 
 void intel_pmu_disable_bts(void)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        unsigned long debugctlmsr;
 
        if (!cpuc->ds)
@@ -491,7 +491,7 @@ void intel_pmu_disable_bts(void)
 
 int intel_pmu_drain_bts_buffer(void)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct debug_store *ds = cpuc->ds;
        struct bts_record {
                u64     from;
@@ -669,7 +669,7 @@ struct event_constraint *intel_pebs_constraints(struct perf_event *event)
 
 void intel_pmu_pebs_enable(struct perf_event *event)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct hw_perf_event *hwc = &event->hw;
 
        hwc->config &= ~ARCH_PERFMON_EVENTSEL_INT;
@@ -684,7 +684,7 @@ void intel_pmu_pebs_enable(struct perf_event *event)
 
 void intel_pmu_pebs_disable(struct perf_event *event)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct hw_perf_event *hwc = &event->hw;
 
        cpuc->pebs_enabled &= ~(1ULL << hwc->idx);
@@ -702,7 +702,7 @@ void intel_pmu_pebs_disable(struct perf_event *event)
 
 void intel_pmu_pebs_enable_all(void)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
 
        if (cpuc->pebs_enabled)
                wrmsrl(MSR_IA32_PEBS_ENABLE, cpuc->pebs_enabled);
@@ -710,7 +710,7 @@ void intel_pmu_pebs_enable_all(void)
 
 void intel_pmu_pebs_disable_all(void)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
 
        if (cpuc->pebs_enabled)
                wrmsrl(MSR_IA32_PEBS_ENABLE, 0);
@@ -718,7 +718,7 @@ void intel_pmu_pebs_disable_all(void)
 
 static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        unsigned long from = cpuc->lbr_entries[0].from;
        unsigned long old_to, to = cpuc->lbr_entries[0].to;
        unsigned long ip = regs->ip;
@@ -829,7 +829,7 @@ static void __intel_pmu_pebs_event(struct perf_event *event,
         * We cast to the biggest pebs_record but are careful not to
         * unconditionally access the 'extra' entries.
         */
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct pebs_record_hsw *pebs = __pebs;
        struct perf_sample_data data;
        struct pt_regs regs;
@@ -916,7 +916,7 @@ static void __intel_pmu_pebs_event(struct perf_event *event,
 
 static void intel_pmu_drain_pebs_core(struct pt_regs *iregs)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct debug_store *ds = cpuc->ds;
        struct perf_event *event = cpuc->events[0]; /* PMC0 only */
        struct pebs_record_core *at, *top;
@@ -957,7 +957,7 @@ static void intel_pmu_drain_pebs_core(struct pt_regs *iregs)
 
 static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
        struct debug_store *ds = cpuc->ds;
        struct perf_event *event = NULL;
        void *at, *top;
index 4af10617de3389040f28a24dac6875ce933e359a..45fa730a5283255b3c49b1360b6c7c61a34ba513 100644 (file)
@@ -133,7 +133,7 @@ static void intel_pmu_lbr_filter(struct cpu_hw_events *cpuc);
 static void __intel_pmu_lbr_enable(void)
 {
        u64 debugctl;
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
 
        if (cpuc->lbr_sel)
                wrmsrl(MSR_LBR_SELECT, cpuc->lbr_sel->config);
@@ -183,7 +183,7 @@ void intel_pmu_lbr_reset(void)
 
 void intel_pmu_lbr_enable(struct perf_event *event)
 {
-       struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
+       struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
 
        if (!x86_pmu.lbr_nr)
     &