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clk: stm32mp1: remove unnecessary CLK_DIVIDER_ALLOW_ZERO flag
author
Gabriel Fernandez
<gabriel.fernandez@st.com>
Thu, 14 Feb 2019 10:40:46 +0000
(11:40 +0100)
committer
Stephen Boyd
<sboyd@kernel.org>
Thu, 21 Feb 2019 22:13:21 +0000
(14:13 -0800)
The divisor of ethptp_k and ck_hse_rtc clocks is: 'value register
plus one'.
Then CLK_DIVIDER_ALLOW_ZERO flag has no effect and is useless here.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/clk-stm32mp1.c
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diff --git
a/drivers/clk/clk-stm32mp1.c
b/drivers/clk/clk-stm32mp1.c
index 8958bc11ff052efbcba34e3ea14631a46f0a8bba..ca987632564e163390ab52e36181da8d6669689d 100644
(file)
--- a/
drivers/clk/clk-stm32mp1.c
+++ b/
drivers/clk/clk-stm32mp1.c
@@
-1959,11
+1959,10
@@
static const struct clock_config stm32mp1_clock_cfg[] = {
CLK_SET_RATE_NO_REPARENT,
_NO_GATE,
_MMUX(M_ETHCK),
- _DIV(RCC_ETHCKSELR, 4, 4,
CLK_DIVIDER_ALLOW_ZERO
, NULL)),
+ _DIV(RCC_ETHCKSELR, 4, 4,
0
, NULL)),
/* RTC clock */
- DIV(NO_ID, "ck_hse_rtc", "ck_hse", 0, RCC_RTCDIVR, 0, 7,
- CLK_DIVIDER_ALLOW_ZERO),
+ DIV(NO_ID, "ck_hse_rtc", "ck_hse", 0, RCC_RTCDIVR, 0, 7, 0),
COMPOSITE(RTC, "ck_rtc", rtc_src, CLK_OPS_PARENT_ENABLE |
CLK_SET_RATE_PARENT,