Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6
authorLinus Torvalds <torvalds@linux-foundation.org>
Fri, 3 Apr 2009 04:05:30 +0000 (21:05 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Fri, 3 Apr 2009 04:05:30 +0000 (21:05 -0700)
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (54 commits)
  glge: remove unused #include <version.h>
  dnet: remove unused #include <version.h>
  tcp: miscounts due to tcp_fragment pcount reset
  tcp: add helper for counter tweaking due mid-wq change
  hso: fix for the 'invalid frame length' messages
  hso: fix for crash when unplugging the device
  fsl_pq_mdio: Fix compile failure
  fsl_pq_mdio: Revive UCC MDIO support
  ucc_geth: Pass proper device to DMA routines, otherwise oops happens
  i.MX31: Fixing cs89x0 network building to i.MX31ADS
  tc35815: Fix build error if NAPI enabled
  hso: add Vendor/Product ID's for new devices
  ucc_geth: Remove unused header
  gianfar: Remove unused header
  kaweth: Fix locking to be SMP-safe
  net: allow multiple dev per napi with GRO
  r8169: reset IntrStatus after chip reset
  ixgbe: Fix potential memory leak/driver panic issue while setting up Tx & Rx ring parameters
  ixgbe: fix ethtool -A|a behavior
  ixgbe: Patch to fix driver panic while freeing up tx & rx resources
  ...

72 files changed:
Documentation/networking/vxge.txt [new file with mode: 0644]
MAINTAINERS
drivers/net/Kconfig
drivers/net/Makefile
drivers/net/dnet.c
drivers/net/fec_mpc52xx.c
drivers/net/fsl_pq_mdio.c
drivers/net/gianfar.h
drivers/net/hamradio/yam.c
drivers/net/hamradio/yam1200.h [deleted file]
drivers/net/hamradio/yam9600.h [deleted file]
drivers/net/igb/e1000_phy.c
drivers/net/igb/igb_ethtool.c
drivers/net/igb/igb_main.c
drivers/net/ixgbe/ixgbe_82598.c
drivers/net/ixgbe/ixgbe_common.c
drivers/net/ixgbe/ixgbe_common.h
drivers/net/ixgbe/ixgbe_dcb_nl.c
drivers/net/ixgbe/ixgbe_ethtool.c
drivers/net/ixgbe/ixgbe_main.c
drivers/net/ixgbe/ixgbe_type.h
drivers/net/pcmcia/ositech.h [deleted file]
drivers/net/pcmcia/smc91c92_cs.c
drivers/net/qlge/qlge_ethtool.c
drivers/net/r8169.c
drivers/net/sfc/efx.c
drivers/net/tc35815.c
drivers/net/tokenring/3c359.c
drivers/net/tokenring/3c359.h
drivers/net/tokenring/3c359_microcode.h [deleted file]
drivers/net/ucc_geth.c
drivers/net/ucc_geth.h
drivers/net/ucc_geth_ethtool.c
drivers/net/usb/hso.c
drivers/net/usb/kaweth.c
drivers/net/vxge/Makefile [new file with mode: 0644]
drivers/net/vxge/vxge-config.c [new file with mode: 0644]
drivers/net/vxge/vxge-config.h [new file with mode: 0644]
drivers/net/vxge/vxge-ethtool.c [new file with mode: 0644]
drivers/net/vxge/vxge-ethtool.h [new file with mode: 0644]
drivers/net/vxge/vxge-main.c [new file with mode: 0644]
drivers/net/vxge/vxge-main.h [new file with mode: 0644]
drivers/net/vxge/vxge-reg.h [new file with mode: 0644]
drivers/net/vxge/vxge-traffic.c [new file with mode: 0644]
drivers/net/vxge/vxge-traffic.h [new file with mode: 0644]
drivers/net/vxge/vxge-version.h [new file with mode: 0644]
firmware/3com/3C359.bin.ihex [new file with mode: 0644]
firmware/Makefile
firmware/WHENCE
firmware/ositech/Xilinx7OD.bin.ihex [new file with mode: 0644]
firmware/yam/1200.bin.ihex [new file with mode: 0644]
firmware/yam/9600.bin.ihex [new file with mode: 0644]
include/net/tcp.h
net/core/dev.c
net/core/ethtool.c
net/ipv4/netfilter/arp_tables.c
net/ipv4/netfilter/ip_tables.c
net/ipv4/tcp.c
net/ipv4/tcp_output.c
net/ipv6/netfilter/ip6_tables.c
net/rds/ib.c
net/rds/ib.h
net/rds/ib_cm.c
net/rds/ib_rdma.c
net/rds/ib_recv.c
net/rds/iw.c
net/rds/iw.h
net/rds/iw_cm.c
net/rds/iw_rdma.c
net/rds/iw_recv.c
net/rds/rds.h
net/rds/send.c

diff --git a/Documentation/networking/vxge.txt b/Documentation/networking/vxge.txt
new file mode 100644 (file)
index 0000000..d2e2997
--- /dev/null
@@ -0,0 +1,100 @@
+Neterion's (Formerly S2io) X3100 Series 10GbE PCIe Server Adapter Linux driver
+==============================================================================
+
+Contents
+--------
+
+1) Introduction
+2) Features supported
+3) Configurable driver parameters
+4) Troubleshooting
+
+1) Introduction:
+----------------
+This Linux driver supports all Neterion's X3100 series 10 GbE PCIe I/O
+Virtualized Server adapters.
+The X3100 series supports four modes of operation, configurable via
+firmware -
+       Single function mode
+       Multi function mode
+       SRIOV mode
+       MRIOV mode
+The functions share a 10GbE link and the pci-e bus, but hardly anything else
+inside the ASIC. Features like independent hw reset, statistics, bandwidth/
+priority allocation and guarantees, GRO, TSO, interrupt moderation etc are
+supported independently on each function.
+
+(See below for a complete list of features supported for both IPv4 and IPv6)
+
+2) Features supported:
+----------------------
+
+i)   Single function mode (up to 17 queues)
+
+ii)  Multi function mode (up to 17 functions)
+
+iii) PCI-SIG's I/O Virtualization
+       - Single Root mode: v1.0 (up to 17 functions)
+       - Multi-Root mode: v1.0 (up to 17 functions)
+
+iv)  Jumbo frames
+       X3100 Series supports MTU up to 9600 bytes, modifiable using
+       ifconfig command.
+
+v)   Offloads supported: (Enabled by default)
+       Checksum offload (TCP/UDP/IP) on transmit and receive paths
+       TCP Segmentation Offload (TSO) on transmit path
+       Generic Receive Offload (GRO) on receive path
+
+vi)  MSI-X: (Enabled by default)
+       Resulting in noticeable performance improvement (up to 7% on certain
+       platforms).
+
+vii) NAPI: (Enabled by default)
+       For better Rx interrupt moderation.
+
+viii)RTH (Receive Traffic Hash): (Enabled by default)
+       Receive side steering for better scaling.
+
+ix)  Statistics
+       Comprehensive MAC-level and software statistics displayed using
+       "ethtool -S" option.
+
+x)   Multiple hardware queues: (Enabled by default)
+       Up to 17 hardware based transmit and receive data channels, with
+       multiple steering options (transmit multiqueue enabled by default).
+
+3) Configurable driver parameters:
+----------------------------------
+
+i)  max_config_dev
+       Specifies maximum device functions to be enabled.
+       Valid range: 1-8
+
+ii) max_config_port
+       Specifies number of ports to be enabled.
+       Valid range: 1,2
+       Default: 1
+
+iii)max_config_vpath
+       Specifies maximum VPATH(s) configured for each device function.
+       Valid range: 1-17
+
+iv) vlan_tag_strip
+       Enables/disables vlan tag stripping from all received tagged frames that
+       are not replicated at the internal L2 switch.
+       Valid range: 0,1 (disabled, enabled respectively)
+       Default: 1
+
+v)  addr_learn_en
+       Enable learning the mac address of the guest OS interface in
+       virtualization environment.
+       Valid range: 0,1 (disabled, enabled respectively)
+       Default: 0
+
+4) Troubleshooting:
+-------------------
+
+To resolve an issue with the source code or X3100 series adapter, please collect
+the statistics, register dumps using ethool, relevant logs and email them to
+support@neterion.com.
index b5e278f9fb23632ff76229895b3af07585ca7990..ebaf77ebd8b717e8fe42208f7b49c9b38f55e180 100644 (file)
@@ -3104,7 +3104,7 @@ M:        shemminger@linux-foundation.org
 L:     netem@lists.linux-foundation.org
 S:     Maintained
 
-NETERION (S2IO) Xframe 10GbE DRIVER
+NETERION (S2IO) 10GbE DRIVER (xframe/vxge)
 P:     Ramkrishna Vepa
 M:     ram.vepa@neterion.com
 P:     Rastapur Santosh
@@ -3113,8 +3113,11 @@ P:       Sivakumar Subramani
 M:     sivakumar.subramani@neterion.com
 P:     Sreenivasa Honnur
 M:     sreenivasa.honnur@neterion.com
+P:     Anil Murthy
+M:     anil.murthy@neterion.com
 L:     netdev@vger.kernel.org
-W:     http://trac.neterion.com/cgi-bin/trac.cgi/wiki/TitleIndex?anonymous
+W:     http://trac.neterion.com/cgi-bin/trac.cgi/wiki/Linux?Anonymous
+W:     http://trac.neterion.com/cgi-bin/trac.cgi/wiki/X3100Linux?Anonymous
 S:     Supported
 
 NETFILTER/IPTABLES/IPCHAINS
index f062b424704eeb9a869b656451f0b4752de7ae54..16899eee397ebf2d2c7e0a843e4a71174d04936b 100644 (file)
@@ -974,7 +974,7 @@ config ENC28J60_WRITEVERIFY
 
 config ETHOC
        tristate "OpenCores 10/100 Mbps Ethernet MAC support"
-       depends on NET_ETHERNET
+       depends on NET_ETHERNET && HAS_IOMEM
        select MII
        select PHYLIB
        help
@@ -2547,6 +2547,23 @@ config S2IO
          More specific information on configuring the driver is in 
          <file:Documentation/networking/s2io.txt>.
 
+config VXGE
+       tristate "Neterion X3100 Series 10GbE PCIe Server Adapter"
+       depends on PCI && INET
+       ---help---
+         This driver supports Neterion Inc's X3100 Series 10 GbE PCIe
+         I/O Virtualized Server Adapter.
+         More specific information on configuring the driver is in
+         <file:Documentation/networking/vxge.txt>.
+
+config VXGE_DEBUG_TRACE_ALL
+       bool "Enabling All Debug trace statments in driver"
+       default n
+       depends on VXGE
+       ---help---
+         Say Y here if you want to enabling all the debug trace statements in
+         driver. By  default only few debug trace statements are enabled.
+
 config MYRI10GE
        tristate "Myricom Myri-10G Ethernet support"
        depends on PCI && INET
index 98409c9dd445c7b16d79ab9bb543a02a91a274e1..edc9a0d6171ddd6d9643f855b61dc5b51724e0ba 100644 (file)
@@ -220,6 +220,7 @@ obj-$(CONFIG_R8169) += r8169.o
 obj-$(CONFIG_AMD8111_ETH) += amd8111e.o
 obj-$(CONFIG_IBMVETH) += ibmveth.o
 obj-$(CONFIG_S2IO) += s2io.o
+obj-$(CONFIG_VXGE) += vxge/
 obj-$(CONFIG_MYRI10GE) += myri10ge/
 obj-$(CONFIG_SMC91X) += smc91x.o
 obj-$(CONFIG_SMC911X) += smc911x.o
index db1e31f952003a1100d8954d0fc7b08bd3640eea..33fa9eee4cacbfc3a735ef1d4ad95377539a9d52 100644 (file)
@@ -8,7 +8,6 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-#include <linux/version.h>
 #include <linux/io.h>
 #include <linux/module.h>
 #include <linux/moduleparam.h>
index 049b0a7e01f36b7278c984b7cf3fe47ca385fc7a..8bbe7f6179949c30b167d82cb2236394af9332c4 100644 (file)
@@ -129,7 +129,8 @@ static void mpc52xx_fec_free_rx_buffers(struct net_device *dev, struct bcom_task
                struct sk_buff *skb;
 
                skb = bcom_retrieve_buffer(s, NULL, (struct bcom_bd **)&bd);
-               dma_unmap_single(&dev->dev, bd->skb_pa, skb->len, DMA_FROM_DEVICE);
+               dma_unmap_single(dev->dev.parent, bd->skb_pa, skb->len,
+                                DMA_FROM_DEVICE);
                kfree_skb(skb);
        }
 }
@@ -150,7 +151,7 @@ static int mpc52xx_fec_alloc_rx_buffers(struct net_device *dev, struct bcom_task
                bd = (struct bcom_fec_bd *)bcom_prepare_next_buffer(rxtsk);
 
                bd->status = FEC_RX_BUFFER_SIZE;
-               bd->skb_pa = dma_map_single(&dev->dev, skb->data,
+               bd->skb_pa = dma_map_single(dev->dev.parent, skb->data,
                                FEC_RX_BUFFER_SIZE, DMA_FROM_DEVICE);
 
                bcom_submit_next_buffer(rxtsk, skb);
@@ -270,15 +271,6 @@ static void mpc52xx_fec_phy_stop(struct net_device *dev)
        phy_write(priv->phydev, MII_BMCR, BMCR_PDOWN);
 }
 
-static int mpc52xx_fec_phy_mii_ioctl(struct mpc52xx_fec_priv *priv,
-               struct mii_ioctl_data *mii_data, int cmd)
-{
-       if (!priv->phydev)
-               return -ENOTSUPP;
-
-       return phy_mii_ioctl(priv->phydev, mii_data, cmd);
-}
-
 static void mpc52xx_fec_phy_hw_init(struct mpc52xx_fec_priv *priv)
 {
        struct mpc52xx_fec __iomem *fec = priv->fec;
@@ -370,7 +362,7 @@ static int mpc52xx_fec_close(struct net_device *dev)
  * invariant will hold if you make sure that the netif_*_queue()
  * calls are done at the proper times.
  */
-static int mpc52xx_fec_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
+static int mpc52xx_fec_start_xmit(struct sk_buff *skb, struct net_device *dev)
 {
        struct mpc52xx_fec_priv *priv = netdev_priv(dev);
        struct bcom_fec_bd *bd;
@@ -378,7 +370,7 @@ static int mpc52xx_fec_hard_start_xmit(struct sk_buff *skb, struct net_device *d
        if (bcom_queue_full(priv->tx_dmatsk)) {
                if (net_ratelimit())
                        dev_err(&dev->dev, "transmit queue overrun\n");
-               return 1;
+               return NETDEV_TX_BUSY;
        }
 
        spin_lock_irq(&priv->lock);
@@ -388,7 +380,8 @@ static int mpc52xx_fec_hard_start_xmit(struct sk_buff *skb, struct net_device *d
                bcom_prepare_next_buffer(priv->tx_dmatsk);
 
        bd->status = skb->len | BCOM_FEC_TX_BD_TFD | BCOM_FEC_TX_BD_TC;
-       bd->skb_pa = dma_map_single(&dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
+       bd->skb_pa = dma_map_single(dev->dev.parent, skb->data, skb->len,
+                                   DMA_TO_DEVICE);
 
        bcom_submit_next_buffer(priv->tx_dmatsk, skb);
 
@@ -398,7 +391,7 @@ static int mpc52xx_fec_hard_start_xmit(struct sk_buff *skb, struct net_device *d
 
        spin_unlock_irq(&priv->lock);
 
-       return 0;
+       return NETDEV_TX_OK;
 }
 
 #ifdef CONFIG_NET_POLL_CONTROLLER
@@ -430,7 +423,8 @@ static irqreturn_t mpc52xx_fec_tx_interrupt(int irq, void *dev_id)
                struct bcom_fec_bd *bd;
                skb = bcom_retrieve_buffer(priv->tx_dmatsk, NULL,
                                (struct bcom_bd **)&bd);
-               dma_unmap_single(&dev->dev, bd->skb_pa, skb->len, DMA_TO_DEVICE);
+               dma_unmap_single(dev->dev.parent, bd->skb_pa, skb->len,
+                                DMA_TO_DEVICE);
 
                dev_kfree_skb_irq(skb);
        }
@@ -455,7 +449,8 @@ static irqreturn_t mpc52xx_fec_rx_interrupt(int irq, void *dev_id)
 
                rskb = bcom_retrieve_buffer(priv->rx_dmatsk, &status,
                                (struct bcom_bd **)&bd);
-               dma_unmap_single(&dev->dev, bd->skb_pa, rskb->len, DMA_FROM_DEVICE);
+               dma_unmap_single(dev->dev.parent, bd->skb_pa, rskb->len,
+                                DMA_FROM_DEVICE);
 
                /* Test for errors in received frame */
                if (status & BCOM_FEC_RX_BD_ERRORS) {
@@ -464,7 +459,8 @@ static irqreturn_t mpc52xx_fec_rx_interrupt(int irq, void *dev_id)
                                bcom_prepare_next_buffer(priv->rx_dmatsk);
 
                        bd->status = FEC_RX_BUFFER_SIZE;
-                       bd->skb_pa = dma_map_single(&dev->dev, rskb->data,
+                       bd->skb_pa = dma_map_single(dev->dev.parent,
+                                       rskb->data,
                                        FEC_RX_BUFFER_SIZE, DMA_FROM_DEVICE);
 
                        bcom_submit_next_buffer(priv->rx_dmatsk, rskb);
@@ -499,7 +495,7 @@ static irqreturn_t mpc52xx_fec_rx_interrupt(int irq, void *dev_id)
                        bcom_prepare_next_buffer(priv->rx_dmatsk);
 
                bd->status = FEC_RX_BUFFER_SIZE;
-               bd->skb_pa = dma_map_single(&dev->dev, skb->data,
+               bd->skb_pa = dma_map_single(dev->dev.parent, skb->data,
                                FEC_RX_BUFFER_SIZE, DMA_FROM_DEVICE);
 
                bcom_submit_next_buffer(priv->rx_dmatsk, skb);
@@ -847,12 +843,20 @@ static void mpc52xx_fec_get_drvinfo(struct net_device *dev,
 static int mpc52xx_fec_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 {
        struct mpc52xx_fec_priv *priv = netdev_priv(dev);
+
+       if (!priv->phydev)
+               return -ENODEV;
+
        return phy_ethtool_gset(priv->phydev, cmd);
 }
 
 static int mpc52xx_fec_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
 {
        struct mpc52xx_fec_priv *priv = netdev_priv(dev);
+
+       if (!priv->phydev)
+               return -ENODEV;
+
        return phy_ethtool_sset(priv->phydev, cmd);
 }
 
@@ -882,9 +886,28 @@ static int mpc52xx_fec_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 {
        struct mpc52xx_fec_priv *priv = netdev_priv(dev);
 
-       return mpc52xx_fec_phy_mii_ioctl(priv, if_mii(rq), cmd);
+       if (!priv->phydev)
+               return -ENOTSUPP;
+
+       return phy_mii_ioctl(priv->phydev, if_mii(rq), cmd);
 }
 
+static const struct net_device_ops mpc52xx_fec_netdev_ops = {
+       .ndo_open = mpc52xx_fec_open,
+       .ndo_stop = mpc52xx_fec_close,
+       .ndo_start_xmit = mpc52xx_fec_start_xmit,
+       .ndo_set_multicast_list = mpc52xx_fec_set_multicast_list,
+       .ndo_set_mac_address = mpc52xx_fec_set_mac_address,
+       .ndo_validate_addr = eth_validate_addr,
+       .ndo_do_ioctl = mpc52xx_fec_ioctl,
+       .ndo_change_mtu = eth_change_mtu,
+       .ndo_tx_timeout = mpc52xx_fec_tx_timeout,
+       .ndo_get_stats = mpc52xx_fec_get_stats,
+#ifdef CONFIG_NET_POLL_CONTROLLER
+       .ndo_poll_controller = mpc52xx_fec_poll_controller,
+#endif
+};
+
 /* ======================================================================== */
 /* OF Driver                                                                */
 /* ======================================================================== */
@@ -929,22 +952,10 @@ mpc52xx_fec_probe(struct of_device *op, const struct of_device_id *match)
                return -EBUSY;
 
        /* Init ether ndev with what we have */
-       ndev->open              = mpc52xx_fec_open;
-       ndev->stop              = mpc52xx_fec_close;
-       ndev->hard_start_xmit   = mpc52xx_fec_hard_start_xmit;
-       ndev->do_ioctl          = mpc52xx_fec_ioctl;
+       ndev->netdev_ops        = &mpc52xx_fec_netdev_ops;
        ndev->ethtool_ops       = &mpc52xx_fec_ethtool_ops;
-       ndev->get_stats         = mpc52xx_fec_get_stats;
-       ndev->set_mac_address   = mpc52xx_fec_set_mac_address;
-       ndev->set_multicast_list = mpc52xx_fec_set_multicast_list;
-       ndev->tx_timeout        = mpc52xx_fec_tx_timeout;
        ndev->watchdog_timeo    = FEC_WATCHDOG_TIMEOUT;
        ndev->base_addr         = mem.start;
-#ifdef CONFIG_NET_POLL_CONTROLLER
-       ndev->poll_controller = mpc52xx_fec_poll_controller;
-#endif
-
-       priv->t_irq = priv->r_irq = ndev->irq = NO_IRQ; /* IRQ are free for now */
 
        spin_lock_init(&priv->lock);
 
index b3079a5a7f2bda4929d4a68a56ac326a11b250c7..aa1eb88c21fc725196f4ff084b073b41298a4aa3 100644 (file)
@@ -204,6 +204,7 @@ void fsl_pq_mdio_bus_name(char *name, struct device_node *np)
        snprintf(name, MII_BUS_ID_SIZE, "%s@%llx", np->name,
                (unsigned long long)taddr);
 }
+EXPORT_SYMBOL_GPL(fsl_pq_mdio_bus_name);
 
 /* Scan the bus in reverse, looking for an empty spot */
 static int fsl_pq_mdio_find_free(struct mii_bus *new_bus)
@@ -387,7 +388,7 @@ static int fsl_pq_mdio_probe(struct of_device *ofdev,
         * The TBIPHY-only buses will find PHYs at every address,
         * so we mask them all but the TBI
         */
-       if (!of_device_is_compatible(np, "fsl,gianfar-mdio"))
+       if (of_device_is_compatible(np, "fsl,gianfar-tbi"))
                new_bus->phy_mask = ~(1 << tbiaddr);
 
        err = mdiobus_register(new_bus);
index dd499d7cde2670c6b38fb59b4a39694c49660b1b..0642d52aef5ca703d29e415bb054ace303d8e4f1 100644 (file)
@@ -45,7 +45,6 @@
 #include <linux/crc32.h>
 #include <linux/workqueue.h>
 #include <linux/ethtool.h>
-#include <linux/fsl_devices.h>
 
 /* The maximum number of packets to be handled in one call of gfar_poll */
 #define GFAR_DEV_WEIGHT 64
index 500a40b2afe785087c9f5ab2f93aeeb2863c0a40..b06691937ce947b980dc73360ed72afa09abd1cd 100644 (file)
@@ -55,6 +55,8 @@
 #include <asm/system.h>
 #include <linux/interrupt.h>
 #include <linux/ioport.h>
+#include <linux/firmware.h>
+#include <linux/platform_device.h>
 
 #include <linux/netdevice.h>
 #include <linux/if_arp.h>
@@ -71,8 +73,6 @@
 #include <linux/init.h>
 
 #include <linux/yam.h>
-#include "yam9600.h"
-#include "yam1200.h"
 
 /* --------------------------------------------------------------------- */
 
@@ -82,6 +82,9 @@ static const char yam_drvinfo[] __initdata = KERN_INFO \
 
 /* --------------------------------------------------------------------- */
 
+#define FIRMWARE_9600  "yam/9600.bin"
+#define FIRMWARE_1200  "yam/1200.bin"
+
 #define YAM_9600       1
 #define YAM_1200       2
 
@@ -342,9 +345,51 @@ static int fpga_write(int iobase, unsigned char wrd)
        return 0;
 }
 
-static unsigned char *add_mcs(unsigned char *bits, int bitrate)
+/*
+ * predef should be 0 for loading user defined mcs
+ * predef should be YAM_1200 for loading predef 1200 mcs
+ * predef should be YAM_9600 for loading predef 9600 mcs
+ */
+static unsigned char *add_mcs(unsigned char *bits, int bitrate,
+                             unsigned int predef)
 {
+       const char *fw_name[2] = {FIRMWARE_9600, FIRMWARE_1200};
+       const struct firmware *fw;
+       struct platform_device *pdev;
        struct yam_mcs *p;
+       int err;
+
+       switch (predef) {
+       case 0:
+               fw = NULL;
+               break;
+       case YAM_1200:
+       case YAM_9600:
+               predef--;
+               pdev = platform_device_register_simple("yam", 0, NULL, 0);
+               if (IS_ERR(pdev)) {
+                       printk(KERN_ERR "yam: Failed to register firmware\n");
+                       return NULL;
+               }
+               err = request_firmware(&fw, fw_name[predef], &pdev->dev);
+               platform_device_unregister(pdev);
+               if (err) {
+                       printk(KERN_ERR "Failed to load firmware \"%s\"\n",
+                              fw_name[predef]);
+                       return NULL;
+               }
+               if (fw->size != YAM_FPGA_SIZE) {
+                       printk(KERN_ERR "Bogus length %zu in firmware \"%s\"\n",
+                              fw->size, fw_name[predef]);
+                       release_firmware(fw);
+                       return NULL;
+               }
+               bits = (unsigned char *)fw->data;
+               break;
+       default:
+               printk(KERN_ERR "yam: Invalid predef number %u\n", predef);
+               return NULL;
+       }
 
        /* If it already exists, replace the bit data */
        p = yam_data;
@@ -359,6 +404,7 @@ static unsigned char *add_mcs(unsigned char *bits, int bitrate)
        /* Allocate a new mcs */
        if ((p = kmalloc(sizeof(struct yam_mcs), GFP_KERNEL)) == NULL) {
                printk(KERN_WARNING "YAM: no memory to allocate mcs\n");
+               release_firmware(fw);
                return NULL;
        }
        memcpy(p->bits, bits, YAM_FPGA_SIZE);
@@ -366,6 +412,7 @@ static unsigned char *add_mcs(unsigned char *bits, int bitrate)
        p->next = yam_data;
        yam_data = p;
 
+       release_firmware(fw);
        return p->bits;
 }
 
@@ -383,9 +430,11 @@ static unsigned char *get_mcs(int bitrate)
        /* Load predefined mcs data */
        switch (bitrate) {
        case 1200:
-               return add_mcs(bits_1200, bitrate);
+               /* setting predef as YAM_1200 for loading predef 1200 mcs */
+               return add_mcs(NULL, bitrate, YAM_1200);
        default:
-               return add_mcs(bits_9600, bitrate);
+               /* setting predef as YAM_9600 for loading predef 9600 mcs */
+               return add_mcs(NULL, bitrate, YAM_9600);
        }
 }
 
@@ -936,7 +985,8 @@ static int yam_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
                        kfree(ym);
                        return -EINVAL;
                }
-               add_mcs(ym->bits, ym->bitrate);
+               /* setting predef as 0 for loading userdefined mcs data */
+               add_mcs(ym->bits, ym->bitrate, 0);
                kfree(ym);
                break;
 
@@ -1159,6 +1209,8 @@ static void __exit yam_cleanup_driver(void)
 MODULE_AUTHOR("Frederic Rible F1OAT frible@teaser.fr");
 MODULE_DESCRIPTION("Yam amateur radio modem driver");
 MODULE_LICENSE("GPL");
+MODULE_FIRMWARE(FIRMWARE_1200);
+MODULE_FIRMWARE(FIRMWARE_9600);
 
 module_init(yam_init_driver);
 module_exit(yam_cleanup_driver);
diff --git a/drivers/net/hamradio/yam1200.h b/drivers/net/hamradio/yam1200.h
deleted file mode 100644 (file)
index 53ca8a3..0000000
+++ /dev/null
@@ -1,343 +0,0 @@
-/*
- *
- * File yam1k2b5.mcs converted to h format by mcs2h
- *
- * (C) F6FBB 1998
- *
- * Tue Aug 25 20:24:08 1998
- *
- */
-
-static unsigned char bits_1200[]= {
-0xff,0xf2,0x00,0xa5,0xad,0xff,0xfe,0x9f,0xff,0xef,0xf3,0xcb,0xff,0xdb,0xfc,0xf2,
-0xff,0xf6,0xff,0x3c,0xbf,0xfd,0xbf,0xdf,0x6e,0x3f,0x6f,0xf1,0x7d,0xb4,0xfd,0xbf,
-0xdf,0x6f,0x3f,0x6f,0xf7,0x0b,0xff,0xdb,0xfd,0xf2,0xff,0xf6,0xff,0xff,0xff,0xff,
-0xf0,0xcf,0xff,0xff,0xff,0xfe,0xff,0xff,0xdf,0xff,0xff,0xff,0xef,0xff,0xff,0xff,
-0xfd,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xf1,0xff,0xff,0xff,0xff,0xbf,
-0xff,0xff,0xf7,0xff,0xff,0xfb,0xff,0xff,0xff,0xfc,0xff,0xfe,0xff,0xff,0xff,0xf0,
-0x5f,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xff,0xff,0xf1,0xff,0xff,0xfe,0x7f,0xbf,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf7,0xff,0xfb,0xff,0xff,0xff,0xf0,0x9f,
-0xff,0xff,0xff,0xfe,0xff,0xfd,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xf7,0xff,
-0xff,0xff,0xfb,0xff,0xfb,0xff,0xff,0xff,0xf0,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xf7,0xff,0xff,0xfb,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xef,0xff,0xf0,0x5f,0xff,
-0xff,0xff,0xfe,0xff,0xff,0xef,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xbf,0xff,0xff,0xdf,0xf7,0xff,0xf1,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xfb,0xfe,0xff,0xff,0xff,0xff,0xff,0xf0,0xff,0xff,0xff,
-0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xeb,
-0xff,0xff,0xff,0xfd,0xff,0xbf,0xf1,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xfb,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf0,0x6f,0xff,0xff,0xff,
-0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xf7,0xff,0xff,0xf1,0xff,0xff,0xf7,0xbf,0xe7,0xff,0xff,0xff,0xff,0xfb,
-0xff,0xff,0xff,0xff,0xff,0xff,0x77,0xff,0xff,0xff,0xf0,0xff,0xff,0xff,0xff,0xfe,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xf1,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf0,0x1f,0xff,0xff,0xff,0xfe,0xdb,
-0xff,0xff,0xf5,0xa5,0xfd,0x4b,0x6e,0xef,0x33,0x32,0xdd,0xd3,0x4a,0xd6,0x92,0xfe,
-0xb3,0x3f,0xbd,0xf1,0xfa,0xdb,0xfe,0xf7,0xf6,0x96,0xbd,0xbd,0xff,0xbd,0xff,0xed,
-0x7f,0x6b,0x7f,0xfb,0xdf,0xfe,0xfb,0xfe,0x90,0xcf,0xff,0xff,0xff,0xfe,0xbe,0xef,
-0xff,0xff,0xdb,0x5f,0xf6,0xff,0xf6,0x8f,0xfd,0xa5,0xdd,0xff,0xff,0xff,0xff,0x6f,
-0x7f,0xdb,0xf1,0xfc,0xbf,0xff,0x6f,0xff,0xef,0xfc,0x5b,0x5d,0xda,0xdf,0xf4,0xff,
-0xf2,0xff,0xfd,0xbf,0xff,0xff,0xff,0xd0,0x1f,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,
-0xff,0xfb,0xef,0xb7,0xfc,0x33,0xff,0xfb,0xff,0x04,0x6a,0xf3,0x3c,0x36,0xff,0xf0,
-0x0f,0xf1,0x0f,0xff,0xff,0xff,0xf3,0x15,0x72,0x0f,0xf1,0x6f,0xff,0xfe,0x94,0x3f,
-0xff,0xff,0xff,0x7b,0xff,0xff,0xf0,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xf0,
-0xf7,0xef,0xb7,0xfc,0x33,0xff,0xff,0xff,0x04,0x6a,0xf3,0x3c,0x36,0xff,0xf0,0x0f,
-0xf1,0x0f,0xff,0xff,0xff,0xf3,0x15,0x73,0x8f,0xf2,0x6f,0xff,0xfe,0x94,0x3f,0xff,
-0xff,0xff,0x7d,0x9f,0xff,0xf0,0x0f,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0x9e,
-0xff,0xfc,0xef,0xd3,0xfb,0xff,0x7f,0xf5,0x5f,0xfe,0x59,0xff,0xff,0xff,0xfc,0xf1,
-0xfe,0x7f,0xff,0xff,0xfa,0x17,0xff,0xe7,0xef,0xef,0xff,0xff,0x3f,0xf1,0xff,0xff,
-0xff,0xff,0xff,0xff,0xf0,0xff,0xff,0xff,0xff,0xfe,0xf5,0xff,0xbf,0xff,0xfc,0xea,
-0xff,0xf0,0xff,0xff,0xbf,0xf9,0x3f,0xb1,0xef,0xff,0xd7,0xff,0xfb,0xff,0xf0,0xff,
-0xff,0xf3,0xff,0xdf,0xff,0x7b,0xff,0xfd,0xff,0xf6,0xff,0xbf,0xff,0xff,0xbf,0xff,
-0xff,0xff,0xda,0xf0,0xff,0xff,0xff,0xff,0xfe,0xf2,0xc0,0x01,0x00,0x00,0x02,0x02,
-0x02,0x02,0x00,0x40,0x40,0x40,0x10,0x00,0x00,0x00,0x20,0x00,0x00,0x01,0x00,0x00,
-0x00,0x00,0x00,0x00,0x19,0x00,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x10,
-0x00,0x3c,0xf0,0xaf,0xff,0xff,0xff,0xfe,0xfd,0xbf,0xff,0xff,0xfb,0xff,0xfd,0xff,
-0xff,0x7f,0xff,0xff,0xbf,0xff,0xef,0xff,0xff,0xfd,0xff,0xff,0xf1,0xff,0xdf,0xff,
-0xff,0xff,0xff,0xff,0xff,0xbf,0xfe,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xdf,
-0xdb,0xf0,0x6f,0xff,0xff,0xff,0xfe,0xf0,0xbf,0xdf,0xff,0x7f,0xff,0xff,0xff,0xff,
-0xdf,0xdf,0xff,0xef,0xff,0x9e,0xef,0xff,0xff,0x7f,0xff,0xf1,0xef,0xff,0xff,0xff,
-0xf7,0xfa,0xbf,0xff,0xff,0xfe,0x47,0xef,0xff,0xbd,0xf6,0xff,0xff,0xdf,0xf5,0xf0,
-0xf0,0xef,0xff,0xff,0xff,0xfe,0xf8,0x30,0x00,0x00,0x00,0x04,0x00,0x01,0x02,0x08,
-0x16,0x00,0x00,0x00,0x80,0x00,0x01,0x02,0x00,0x80,0x01,0x0c,0x02,0x00,0x00,0x01,
-0x00,0x00,0x20,0x00,0x00,0x06,0x00,0x20,0x00,0x10,0x00,0x14,0x00,0x04,0xc1,0xf0,
-0x2f,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xff,0x7f,
-0xec,0xff,0xff,0xfa,0xff,0xbf,0xff,0x6f,0xff,0xe1,0xff,0xff,0xff,0xff,0xbd,0xfe,
-0x46,0xff,0xef,0x7f,0xcd,0xdf,0xff,0xff,0xfd,0xff,0xbd,0xff,0x7f,0x7f,0xf0,0x4f,
-0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf1,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf0,0x0f,0xff,
-0xff,0xff,0xfe,0xff,0xff,0xff,0xfd,0xa4,0xbc,0xcd,0x6d,0x6b,0x6f,0x5b,0xdc,0x33,
-0x5a,0xf6,0xf7,0xf6,0xb3,0x3f,0xbd,0xc1,0xfa,0x5a,0xf6,0xf6,0xb6,0xf7,0xff,0xbd,
-0xbb,0x3c,0xce,0xcf,0x34,0xef,0x33,0xbb,0xcc,0xff,0xff,0xff,0xf0,0x4f,0xff,0xff,
-0xff,0xfe,0xbf,0xff,0xff,0xff,0xdb,0xff,0xf6,0xd6,0xff,0xfd,0xfd,0xbf,0xff,0xad,
-0xbf,0xf9,0x7f,0x6f,0xfc,0xdb,0xf1,0xfd,0xbf,0xff,0x6f,0xff,0xff,0xda,0xdb,0xfc,
-0xdb,0xff,0x76,0x8f,0xf6,0xff,0xcd,0xab,0xfe,0xfb,0xff,0xd0,0xff,0xff,0xff,0xff,
-0xfe,0xff,0x9f,0xff,0xf4,0x20,0xaf,0x6d,0x0b,0xc1,0x7b,0xff,0xff,0xff,0xcb,0xff,
-0x3f,0xf0,0xef,0x7f,0x0f,0xf1,0xc3,0x3c,0xff,0xff,0xff,0xff,0xff,0xff,0xf8,0x0b,
-0x1d,0x6a,0x64,0x05,0x6b,0x99,0x01,0xff,0xfd,0xef,0xf0,0x2f,0xff,0xff,0xff,0xfe,
-0xff,0xff,0xff,0xf4,0x00,0x2f,0xcc,0x0b,0xc3,0x7f,0xff,0xff,0xff,0x0a,0xdf,0xbf,
-0xfd,0x7f,0xff,0xff,0xf1,0xc3,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xf0,0x4a,0x0e,
-0x96,0x64,0x02,0x97,0x99,0x10,0xff,0xff,0xff,0xf0,0xdf,0xff,0xff,0xff,0xfe,0xff,
-0xff,0xff,0xfe,0x84,0xf9,0xd5,0x27,0xf1,0x7f,0xff,0xf8,0xeb,0xdf,0xf3,0xcf,0x3f,
-0x1f,0xff,0xf7,0x11,0xff,0xcf,0xff,0xfe,0x67,0xff,0xff,0xff,0xff,0xc4,0xff,0xff,
-0xb3,0xa1,0xff,0xf9,0xe0,0xff,0xff,0xff,0xf0,0xef,0xff,0xff,0xff,0xfe,0xf5,0xff,
-0xff,0xfb,0x7f,0xe0,0xff,0xc7,0xfe,0x7f,0x3f,0xff,0xfd,0x77,0x8d,0x7f,0x0f,0xff,
-0xc3,0xff,0xf1,0xbf,0x8f,0xcf,0xff,0xff,0xdd,0x7b,0xff,0xf6,0xfa,0xf7,0xff,0x40,
-0x9f,0xf9,0x7f,0xd8,0xff,0xff,0xfa,0xf0,0x1f,0xff,0xff,0xff,0xfe,0xf1,0xc0,0x00,
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-0xff,0xf1,0xe7,0xff,0xff,0xf3,0x8e,0x7b,0xff,0xa8,0xff,0xdf,0x7f,0x8e,0x78,0x73,
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-0xff,0x7f,0xff,0xe0,0xff,0xff,0xff,0xf0,0x4f,0xff,0xff,0xff,0xfe,0xf5,0xff,0xff,
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-0x01,0x04,0x00,0x00,0x00,0x00,0x80,0x02,0x00,0x00,0x10,0x00,0x10,0x00,0x10,0x08,
-0x41,0x80,0x10,0x00,0x00,0x08,0x10,0x84,0x00,0x0c,0x04,0x02,0x61,0x00,0x00,0x81,
-0x00,0x00,0x00,0x00,0x3d,0xf0,0x7f,0xff,0xff,0xff,0xfe,0xfd,0xbf,0xff,0xff,0xff,
-0xff,0xff,0x7f,0xff,0xfe,0xfd,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf1,
-0x7f,0xbf,0xf7,0x7f,0xef,0xff,0xef,0xff,0xf7,0xfd,0xff,0xff,0xfd,0x7f,0xff,0xbe,
-0xdf,0xff,0xff,0xd9,0xf0,0xbf,0xff,0xff,0xff,0xfe,0xf0,0xbb,0xff,0x7f,0xfb,0xff,
-0xfb,0xff,0xbf,0xff,0xf3,0x7f,0xfb,0xfd,0xeb,0x7f,0xdf,0xfa,0xff,0xde,0xf0,0xed,
-0xff,0xb1,0xf7,0xf9,0x1f,0xb5,0x5b,0xfe,0x7e,0xf7,0xbe,0xfd,0x7f,0x5f,0xb5,0xf7,
-0xff,0xff,0xd0,0xf0,0x4f,0xff,0xff,0xff,0xfe,0xf8,0x30,0x01,0x00,0x07,0x42,0x01,
-0x00,0x6a,0x18,0x50,0x80,0x00,0x00,0x02,0x40,0x01,0x01,0x20,0x01,0x01,0x24,0x14,
-0x21,0x10,0x02,0x08,0x07,0x08,0x00,0x40,0x10,0x80,0x58,0x00,0x84,0x80,0x18,0x10,
-0x40,0xc1,0xf0,0xbf,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xf7,0xff,0xdb,0xb7,0xf3,
-0xdf,0x7c,0xf8,0x74,0xff,0xff,0x6f,0x7d,0x3f,0x7e,0xec,0x7f,0xc1,0xf5,0xff,0xcf,
-0x6f,0x9f,0xf9,0xdf,0xbe,0xe5,0xe7,0xff,0xd7,0xf3,0xdd,0xfb,0xff,0xfc,0xff,0xbf,
-0xff,0xf0,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf1,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xf0,0x2f,0xff,0xff,0xff,0xfe,0xd7,0xff,0xff,0xff,0xb4,0xcf,0xef,0x77,0x6f,0x73,
-0x3a,0x4a,0x3a,0xcb,0xd4,0xf7,0x2e,0xd6,0xbd,0xbd,0xa1,0x3b,0xdf,0xd6,0xf7,0xee,
-0xd3,0x35,0xbd,0xfb,0xbd,0xce,0xeb,0x2b,0x4d,0x2f,0xbb,0xda,0xff,0xff,0xfe,0xb0,
-0x5f,0xff,0xff,0xff,0xfe,0xbf,0xff,0xff,0xff,0xdf,0x5f,0x36,0xaf,0x3f,0xed,0xb7,
-0xf5,0xfd,0xf3,0x2b,0xef,0x77,0xff,0xfb,0xda,0xb1,0xbd,0xa3,0x77,0x69,0x7f,0x4f,
-0xff,0xdb,0xfa,0x5b,0xff,0xf2,0xfe,0xff,0x96,0xff,0xff,0xfe,0xdf,0xff,0xd0,0xaf,
-0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xfd,0x8f,0xfd,0x40,0x6f,0x9e,0x83,0x5a,0x0f,
-0xfa,0xc3,0xff,0xff,0xfc,0xe9,0x7f,0xf3,0x01,0xd0,0x00,0xfe,0xbf,0xcd,0x3f,0xf0,
-0xef,0xfc,0xc5,0x0c,0x3f,0xfd,0x68,0x0b,0xff,0xff,0xff,0xfe,0xdf,0xf0,0xff,0xff,
-0xff,0xff,0xfe,0xff,0xbb,0xff,0xfd,0x85,0xff,0xd4,0x6f,0x9f,0xc3,0x5a,0x0f,0xff,
-0xff,0xff,0xff,0xfc,0xe9,0x7f,0xf3,0x01,0xf0,0xfb,0xc2,0xbf,0xfc,0x00,0x37,0xef,
-0xfc,0xcd,0xbc,0x3f,0xff,0x0c,0xbf,0xff,0xff,0xff,0xff,0xff,0xf0,0x5f,0xff,0xff,
-0xff,0xfe,0xff,0xff,0xff,0xff,0xd9,0xf7,0xd1,0xb7,0x7e,0x7f,0xf1,0xe4,0xfd,0xff,
-0xfb,0xfb,0xff,0x5f,0xff,0x7f,0xb1,0xbc,0x0f,0x67,0xeb,0xb8,0x3f,0xff,0xe2,0xff,
-0xe9,0xff,0xfd,0xe3,0xff,0x3f,0x9f,0xc2,0xff,0xff,0xff,0xf0,0x9f,0xff,0xff,0xff,
-0xfe,0xf5,0x7f,0xff,0xf0,0x3f,0xbc,0xff,0xd5,0xf5,0xce,0x3f,0xfe,0xff,0xfe,0x6d,
-0xff,0xf1,0xbf,0x7b,0xff,0xf1,0xfd,0xff,0x4f,0xff,0x87,0xff,0xae,0xff,0xb1,0xf8,
-0xfe,0xff,0xff,0x78,0x01,0xb9,0xff,0xff,0xff,0xfa,0xf0,0x2f,0xff,0xff,0xff,0xfe,
-0xf3,0xc0,0x00,0x00,0x00,0x04,0x02,0x13,0x02,0x00,0x80,0x40,0x00,0x90,0x10,0x00,
-0x10,0x00,0x02,0x00,0x01,0x20,0x80,0x12,0x10,0x00,0x40,0x08,0x00,0x04,0x00,0x00,
-0x02,0x00,0x01,0x40,0x00,0x80,0x00,0x00,0x3c,0xf0,0xef,0xff,0xff,0xff,0xfe,0xfd,
-0x1f,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0x7f,0xff,0x7f,0xf7,0xdf,0xf7,0xff,
-0xf7,0xfb,0xeb,0xd1,0xff,0xff,0xff,0xff,0xef,0xf7,0xff,0xff,0xfb,0xff,0xfe,0xff,
-0xff,0x7e,0xff,0xfb,0xff,0xff,0xff,0xdb,0xf0,0xff,0xff,0xff,0xff,0xfe,0xf0,0xff,
-0xff,0xb7,0xeb,0xf7,0xdf,0xff,0xfe,0xf5,0x6b,0xe7,0xed,0xf7,0x3e,0xec,0xff,0x54,
-0xef,0x6f,0xf1,0xf5,0xaf,0x6f,0xf6,0xfd,0xff,0xdd,0x7b,0xff,0xef,0xbf,0x7f,0xff,
-0xff,0xf7,0xff,0xf3,0x5f,0xf7,0xd0,0xf0,0xcf,0xff,0xff,0xff,0xfe,0xf8,0x30,0x00,
-0x80,0x40,0x04,0x00,0x81,0x2c,0x04,0x24,0x00,0x02,0x01,0xc8,0x02,0x00,0x02,0x24,
-0x00,0x01,0xb4,0x42,0xdc,0x44,0x02,0x15,0x90,0x02,0x03,0x48,0x39,0x10,0x02,0x24,
-0xa0,0xba,0x00,0x00,0x40,0xc1,0xf0,0xbf,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,
-0xfe,0xfc,0xf7,0xf0,0xee,0xb6,0x5d,0xfd,0xf5,0xff,0xdb,0xf7,0x7f,0x7f,0xbe,0xff,
-0xc1,0xfe,0xbf,0xfa,0xfa,0x5f,0xff,0xad,0xff,0xef,0xff,0x7f,0xdf,0x7f,0xfe,0xbf,
-0xb7,0x94,0xbf,0xff,0xff,0xf0,0x9f,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf1,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xf0,0x8f,0xff,0xff,0xff,0xfe,0xd7,0xff,0xff,0xfb,0xb5,0xff,
-0xef,0x7c,0xeb,0x2b,0x52,0x5b,0x3b,0xda,0xd4,0xf3,0x36,0x96,0xb5,0xbd,0xf1,0xfb,
-0xda,0xee,0xf6,0xfe,0xd3,0x35,0xbd,0xdf,0xad,0xcf,0xef,0x7e,0xcd,0x6b,0xbb,0xdf,
-0xff,0xff,0xfd,0xb0,0xef,0xff,0xff,0xff,0xfe,0xbf,0xff,0xff,0xff,0xd3,0x5f,0xf6,
-0xff,0xf6,0xff,0xfd,0xad,0xfd,0xff,0x7f,0xef,0xff,0x6f,0x7f,0xdb,0xf1,0xa5,0xa3,
-0x7f,0x6f,0x6b,0x4f,0xff,0xdb,0xfb,0xcb,0xff,0xf6,0xff,0xf4,0xd7,0xfd,0xbf,0xfe,
-0xdf,0xff,0xd0,0xcf,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xf7,0xdf,0xff,0xff,0xff,
-0x3f,0x7f,0xfc,0xe5,0xff,0x20,0xfe,0xff,0xff,0xdf,0x7f,0xff,0xf1,0x7f,0xff,0xfe,
-0xff,0xf0,0x7c,0x3d,0x4f,0xf3,0xc3,0x3f,0xff,0xff,0x6f,0xc3,0xff,0x0f,0xff,0xff,
-0xaf,0xf0,0x2f,0xff,0xff,0xff,0xfe,0xff,0xff,0xfb,0xb7,0xe0,0x0f,0xff,0xff,0x2b,
-0xff,0x7d,0xbf,0xff,0xdf,0xff,0xff,0xf8,0x9f,0x7f,0xff,0xf1,0x55,0xff,0xff,0xff,
-0xfd,0x7c,0x3c,0xff,0xf3,0xc3,0x3f,0xff,0xff,0xef,0xc3,0xff,0xdf,0xff,0xff,0xff,
-0xf0,0x9f,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xef,0xff,0xff,0x9f,0xbf,0x7f,
-0xf9,0x19,0x47,0x8e,0xe7,0x9f,0x3f,0x17,0xff,0xfc,0x81,0xc1,0x7e,0xf3,0xd9,0xf9,
-0x73,0xdf,0xf4,0x7f,0xfa,0xff,0xff,0xff,0xfb,0x7f,0x77,0xc7,0xff,0xff,0xff,0xf0,
-0x2f,0xff,0xff,0xff,0xfe,0xf5,0xf7,0xff,0xfb,0xff,0xf7,0x3f,0xfc,0xbf,0x3e,0x3f,
-0xec,0xff,0x81,0xaf,0xfe,0x4f,0xf3,0xbb,0xff,0xf0,0x7e,0xff,0x6f,0xff,0x87,0xff,
-0xbb,0xff,0xd5,0xfc,0xff,0x7f,0xfc,0x6f,0xff,0xef,0xe7,0xff,0xff,0xfa,0xf0,0x3f,
-0xff,0xff,0xff,0xfe,0xf3,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,
-0x00,0x30,0x10,0x60,0x20,0x00,0x08,0x00,0x01,0x20,0x80,0x00,0x10,0x00,0x04,0x00,
-0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x80,0x40,0x00,0x08,0x20,0x3c,0xf0,0x6f,0xff,
-0xff,0xff,0xfe,0xf5,0xbf,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0x7f,0xfe,0x3f,0xff,
-0xff,0xff,0xff,0xff,0xef,0xff,0xff,0xf1,0xdf,0xdf,0xff,0xff,0xff,0x7f,0xdf,0xff,
-0xfd,0xbd,0xff,0xff,0xff,0xfb,0xdf,0xff,0xff,0xff,0xff,0x5b,0xf0,0xff,0xff,0xff,
-0xff,0xfe,0xf0,0xbf,0xbf,0xbf,0xff,0xf7,0xfb,0xff,0xfe,0xee,0xfa,0xff,0xff,0xff,
-0x3d,0x3b,0xff,0xff,0xfe,0xfb,0xf1,0xff,0xbf,0x7b,0xff,0xff,0xef,0xff,0xbf,0xff,
-0xff,0xff,0xff,0xff,0xfe,0xff,0xf7,0xef,0xff,0xfb,0xd0,0xf0,0xdf,0xff,0xff,0xff,
-0xfe,0xf8,0x30,0x00,0x00,0x00,0x00,0x00,0x0b,0x10,0x05,0x01,0x00,0x08,0x00,0x02,
-0x01,0x01,0x00,0x00,0x10,0x01,0xc8,0x08,0x00,0x00,0x00,0x00,0x42,0x02,0x00,0x00,
-0x00,0x80,0x02,0x00,0x00,0x40,0x24,0x80,0x00,0xc1,0xf0,0x3f,0xff,0xff,0xff,0xfe,
-0xff,0xff,0xff,0xff,0xf7,0xfd,0xf7,0xfa,0xef,0xee,0xf9,0xfd,0xff,0xf7,0xfe,0xbf,
-0x1f,0xfd,0x9e,0xfd,0xd1,0xef,0xff,0xf7,0x7f,0x9f,0xff,0xef,0xff,0xf6,0xff,0xfe,
-0xfe,0x7b,0xff,0xbd,0xff,0x7e,0xff,0xff,0xff,0xf0,0x3f,0xff,0xff,0xff,0xfe,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xf1,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf0,0xaf,0xff,0xff,0xff,0xfe,0xff,0xff,
-0xff,0xf7,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xdf,0xfd,0xff,0xff,0xdf,0xff,
-0xff,0x5f,0xf1,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf0,0xdf,0xff,0xff,0xff,0xfe,0xff,0xef,0xff,
-0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x3f,0xfb,0xff,0xff,0xef,0xfb,0xfd,
-0xff,0xf1,0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xf0,0x2f,0xff,0xff,0xff,0xfe,0xf7,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0x7f,0xff,0xff,0xe7,0xff,
-0xf1,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xf0,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xcf,0xff,0xfb,0xff,0xfb,0xf1,
-0xff,0xff,0xfb,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xf0,0x2f,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0x7b,0xff,0xff,0xff,0x7f,0xff,0xf1,0xff,
-0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xf0,0x7f,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xef,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0x57,0xff,0xfe,0xbf,0xfb,0xf1,0xff,0xff,
-0xfd,0xf7,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xd7,0xff,0xf0,0x7f,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xf7,0xdb,0xff,0xdb,0xfd,
-0xf6,0xff,0xf6,0xff,0x3c,0xbc,0xbc,0xbf,0xdf,0x6f,0xef,0x2f,0xf1,0x3c,0xbf,0xbc,
-0xbf,0xdf,0x6f,0xff,0x6f,0xf7,0xdb,0xff,0xdb,0xfd,0xf6,0xff,0xf6,0xff,0xff,0xff,
-0x01,0xe2,0xef,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff };
diff --git a/drivers/net/hamradio/yam9600.h b/drivers/net/hamradio/yam9600.h
deleted file mode 100644 (file)
index 5ed1fe6..0000000
+++ /dev/null
@@ -1,343 +0,0 @@
-/*
- *
- * File yam111.mcs converted to h format by mcs2h
- *
- * (C) F6FBB 1998
- *
- * Tue Aug 25 20:23:03 1998
- *
- */
-
-static unsigned char bits_9600[]= {
-0xff,0xf2,0x00,0xa5,0xad,0xff,0xfe,0x9f,0xff,0xef,0xfb,0xcb,0xff,0xdb,0xfe,0xf2,
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-0x00,0x02,0x00,0x80,0x00,0xc1,0xf0,0x5f,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,
-0xf7,0x7b,0xff,0xf3,0xeb,0xbf,0xff,0xf7,0xff,0xff,0xff,0xe7,0x5d,0x3f,0xff,0xf6,
-0xd1,0xfd,0xff,0xeb,0xf7,0x3d,0xff,0xff,0xff,0x5f,0xff,0x7f,0x7f,0xf3,0xff,0xff,
-0xef,0xfd,0xbf,0xff,0xff,0xf0,0x5f,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf1,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xf0,0xdf,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xf5,0xb5,0xdf,
-0x6f,0x7d,0x69,0x7f,0xfb,0xdf,0x52,0x5f,0xf6,0xf7,0xfe,0xf6,0xf3,0xbd,0xb1,0xda,
-0xcd,0xfe,0xf6,0xee,0xd2,0xbd,0xa5,0xaf,0xbd,0xff,0x6f,0x7c,0xeb,0x2b,0xfa,0xda,
-0xff,0xfe,0xdf,0xf0,0x4f,0xff,0xff,0xff,0xfe,0xbf,0xff,0xff,0xff,0xdb,0xff,0xf6,
-0xff,0xf6,0xff,0xbd,0xbf,0xcd,0xbf,0xeb,0x6f,0xf7,0x6f,0xdf,0xdb,0x51,0xfd,0xbd,
-0xff,0x6f,0xff,0x6f,0xfb,0x5b,0xff,0xdb,0xff,0xf6,0xfe,0xf6,0xfd,0xfd,0xbf,0xfe,
-0xf7,0xff,0xd0,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xfa,0x50,0xff,0xff,0xff,
-0xf0,0x6f,0xff,0xff,0xf0,0x96,0xff,0xff,0xc6,0x2b,0xff,0xff,0xf1,0xfc,0xff,0xff,
-0xf7,0xdb,0xc3,0xff,0x00,0xff,0xff,0xff,0xff,0xff,0xc1,0x4f,0xc3,0xff,0xff,0xff,
-0xaf,0xf0,0x9f,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xf5,0xa0,0xff,0xff,0xff,0xf0,
-0x6f,0xff,0xff,0xf0,0x96,0xff,0xff,0xc6,0x2b,0xff,0xff,0xf1,0x5a,0xff,0xff,0xff,
-0xf3,0xc3,0xff,0x00,0xff,0xff,0xff,0xff,0xff,0xc1,0x4f,0xc3,0xff,0xff,0xff,0xff,
-0xf0,0xcf,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xfc,0xff,0xff,0x9f,0xf0,0x7f,
-0xff,0xf9,0xfc,0x4f,0xf3,0xff,0x27,0xeb,0xff,0xfc,0x81,0xfc,0x7f,0xfe,0x7b,0xff,
-0xf7,0xff,0x12,0x7f,0xff,0xff,0xff,0xff,0x18,0xff,0xff,0xff,0xff,0xff,0xff,0xf0,
-0x7f,0xff,0xff,0xff,0xfe,0xf5,0xff,0xff,0xff,0xdf,0xfe,0xff,0xfc,0x7e,0x7f,0xbf,
-0xff,0xff,0xaf,0xef,0xff,0xdf,0xdf,0xfb,0xff,0xf1,0xc3,0xfe,0x6f,0xf1,0xcf,0x3f,
-0xfb,0xff,0xff,0xcf,0xfe,0xff,0xff,0xfe,0x7f,0xbf,0xff,0xff,0xbf,0xfa,0xf0,0xdf,
-0xff,0xff,0xff,0xfe,0xf3,0xc0,0x00,0x00,0x01,0x00,0x00,0x00,0x00,0x01,0x00,0x00,
-0x20,0x00,0x01,0x00,0x10,0x00,0x00,0x00,0x01,0x00,0x02,0x00,0x00,0x00,0x00,0x00,
-0x00,0x00,0x00,0x02,0x00,0x00,0x80,0x00,0x02,0x80,0x00,0x02,0x3c,0xf0,0x2f,0xff,
-0xff,0xff,0xfe,0xfd,0xbf,0xff,0xfb,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xf5,0xf1,0xff,0x7f,0xff,0xff,0xff,0xff,0xef,0xff,
-0xff,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xdb,0xf0,0x2f,0xff,0xff,
-0xff,0xfe,0xf0,0xff,0xff,0xff,0xfb,0xff,0xbf,0xff,0xff,0xff,0xff,0xf7,0xbf,0xfb,
-0xff,0xff,0xff,0xdf,0xf7,0xff,0xf1,0xf7,0xbf,0xfb,0xff,0xff,0xff,0x7f,0xde,0xff,
-0xff,0xff,0xff,0xff,0xff,0xed,0xf7,0xff,0xff,0x7f,0xd0,0xf0,0x3f,0xff,0xff,0xff,
-0xfe,0xf8,0x30,0x00,0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0xe0,0x00,0x00,0x80,
-0x20,0x01,0x01,0x92,0x00,0x01,0x01,0x00,0xe0,0x1c,0x60,0x20,0x30,0x08,0x08,0x00,
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0xc1,0xf0,0x6f,0xff,0xff,0xff,0xfe,
-0xff,0xff,0xff,0xff,0xff,0xdb,0xfe,0xff,0xff,0xdf,0xff,0xfc,0x7f,0xfb,0xbf,0xff,
-0xff,0xff,0xff,0xff,0xf1,0xf6,0xff,0xf7,0x7e,0x3f,0xff,0x7f,0xff,0xff,0xff,0xf7,
-0xff,0xff,0xff,0xed,0xff,0xdf,0xff,0xb7,0xff,0xf0,0x3f,0xff,0xff,0xff,0xfe,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xf1,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf0,0xff,0xff,0xff,0xff,0xfe,0xff,0xff,
-0xff,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xdf,0xff,0xff,0xff,0xff,0xbf,0xff,0xdf,
-0x57,0xef,0xf1,0xfd,0xfe,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xdf,0xfb,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf0,0x7f,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,
-0xff,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfb,0xff,0xdf,0xff,
-0xff,0xf1,0xfd,0xff,0x7f,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xfe,0xff,0xff,0xff,0xff,0xf0,0x9f,0xff,0xff,0xff,0xfe,0xf7,0xfd,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,
-0xf1,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xf0,0x6f,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xf1,
-0xff,0xff,0xfd,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xf0,0xcf,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xfb,0xff,0xff,0xff,0xfe,0xff,0xff,0xfb,0x6f,0xff,0xfe,0xbf,0xff,0xf1,0xff,
-0xf7,0xff,0xff,0x7f,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfd,
-0xff,0xff,0xff,0xf0,0xef,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xfb,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0x57,0xff,0xfd,0xbf,0xff,0xf1,0xff,0xef,
-0xfe,0xff,0xbf,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xfe,0xff,
-0xde,0xff,0xf0,0xcf,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xf7,0xdb,0xff,0xdb,0xfd,
-0xf6,0xff,0xf6,0xff,0x3c,0xbc,0xbc,0xbf,0xdf,0x6f,0xe7,0x2f,0xf1,0x3c,0xbf,0xfd,
-0xbf,0xdf,0x6f,0xff,0x6f,0xf7,0xdb,0xff,0xdb,0xfd,0xf6,0xff,0xf6,0xff,0xff,0xff,
-0x02,0x01,0xdf,0xff,0xff,0xff,0xfe,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
-0xff,0xff,0xff,0xff,0xff,0xff };
index de2d48624683d03388039a15aff3bc4b22d9dbc9..f50fac25be403167f147c1867b31f4b4cac8bb31 100644 (file)
@@ -448,8 +448,11 @@ s32 igb_copper_link_setup_igp(struct e1000_hw *hw)
                goto out;
        }
 
-       /* Wait 15ms for MAC to configure PHY from NVM settings. */
-       msleep(15);
+       /*
+        * Wait 100ms for MAC to configure PHY from NVM settings, to avoid
+        * timeout issues when LFS is enabled.
+        */
+       msleep(100);
 
        /*
         * The NVM settings will configure LPLU in D3 for
index fb09c8ad9f0d2c80fc15ba28797fbea04acaa5be..27eae49e79c27c068ad31cbafc9fc441fed20f46 100644 (file)
@@ -1419,7 +1419,6 @@ static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
 {
        struct e1000_hw *hw = &adapter->hw;
        u32 ctrl_reg = 0;
-       u32 stat_reg = 0;
 
        hw->mac.autoneg = false;
 
@@ -1443,18 +1442,11 @@ static int igb_integrated_phy_loopback(struct igb_adapter *adapter)
        ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
                     E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
                     E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
-                    E1000_CTRL_FD);     /* Force Duplex to FULL */
+                    E1000_CTRL_FD |     /* Force Duplex to FULL */
+                    E1000_CTRL_SLU);    /* Set link up enable bit */
 
-       if (hw->phy.media_type == e1000_media_type_copper &&
-           hw->phy.type == e1000_phy_m88)
+       if (hw->phy.type == e1000_phy_m88)
                ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
-       else {
-               /* Set the ILOS bit on the fiber Nic if half duplex link is
-                * detected. */
-               stat_reg = rd32(E1000_STATUS);
-               if ((stat_reg & E1000_STATUS_FD) == 0)
-                       ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
-       }
 
        wr32(E1000_CTRL, ctrl_reg);
 
index ca842163dce4257abb61782b6d2dcdf2a5e30c39..03aa9593dd9e2d0e9efdc3660a5c25c5e88570ab 100644 (file)
@@ -135,8 +135,8 @@ static inline int igb_set_vf_rlpml(struct igb_adapter *, int, int);
 static int igb_set_vf_mac(struct igb_adapter *adapter, int, unsigned char *);
 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 
-static int igb_suspend(struct pci_dev *, pm_message_t);
 #ifdef CONFIG_PM
+static int igb_suspend(struct pci_dev *, pm_message_t);
 static int igb_resume(struct pci_dev *);
 #endif
 static void igb_shutdown(struct pci_dev *);
@@ -420,6 +420,9 @@ static void igb_free_queues(struct igb_adapter *adapter)
        for (i = 0; i < adapter->num_rx_queues; i++)
                netif_napi_del(&adapter->rx_ring[i].napi);
 
+       adapter->num_rx_queues = 0;
+       adapter->num_tx_queues = 0;
+
        kfree(adapter->tx_ring);
        kfree(adapter->rx_ring);
 }
@@ -1476,9 +1479,10 @@ static int __devinit igb_probe(struct pci_dev *pdev,
                 netdev->name,
                 ((hw->bus.speed == e1000_bus_speed_2500)
                  ? "2.5Gb/s" : "unknown"),
-                ((hw->bus.width == e1000_bus_width_pcie_x4)
-                 ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
-                 ? "Width x1" : "unknown"),
+                ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
+                 (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
+                 (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
+                  "unknown"),
                 netdev->dev_addr);
 
        igb_read_part_num(hw, &part_num);
@@ -5056,7 +5060,7 @@ int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
        return 0;
 }
 
-static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
+static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake)
 {
        struct net_device *netdev = pci_get_drvdata(pdev);
        struct igb_adapter *adapter = netdev_priv(netdev);
@@ -5115,15 +5119,9 @@ static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
                wr32(E1000_WUFC, 0);
        }
 
-       /* make sure adapter isn't asleep if manageability/wol is enabled */
-       if (wufc || adapter->en_mng_pt) {
-               pci_enable_wake(pdev, PCI_D3hot, 1);
-               pci_enable_wake(pdev, PCI_D3cold, 1);
-       } else {
+       *enable_wake = wufc || adapter->en_mng_pt;
+       if (!*enable_wake)
                igb_shutdown_fiber_serdes_link_82575(hw);
-               pci_enable_wake(pdev, PCI_D3hot, 0);
-               pci_enable_wake(pdev, PCI_D3cold, 0);
-       }
 
        /* Release control of h/w to f/w.  If f/w is AMT enabled, this
         * would have already happened in close and is redundant. */
@@ -5131,12 +5129,29 @@ static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
 
        pci_disable_device(pdev);
 
-       pci_set_power_state(pdev, pci_choose_state(pdev, state));
-
        return 0;
 }
 
 #ifdef CONFIG_PM
+static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
+{
+       int retval;
+       bool wake;
+
+       retval = __igb_shutdown(pdev, &wake);
+       if (retval)
+               return retval;
+
+       if (wake) {
+               pci_prepare_to_sleep(pdev);
+       } else {
+               pci_wake_from_d3(pdev, false);
+               pci_set_power_state(pdev, PCI_D3hot);
+       }
+
+       return 0;
+}
+
 static int igb_resume(struct pci_dev *pdev)
 {
        struct net_device *netdev = pci_get_drvdata(pdev);
@@ -5189,7 +5204,14 @@ static int igb_resume(struct pci_dev *pdev)
 
 static void igb_shutdown(struct pci_dev *pdev)
 {
-       igb_suspend(pdev, PMSG_SUSPEND);
+       bool wake;
+
+       __igb_shutdown(pdev, &wake);
+
+       if (system_state == SYSTEM_POWER_OFF) {
+               pci_wake_from_d3(pdev, wake);
+               pci_set_power_state(pdev, PCI_D3hot);
+       }
 }
 
 #ifdef CONFIG_NET_POLL_CONTROLLER
index ed265a7a898faea70408ae635c92328ae54003a7..de4db0dc78795c925882d11a9c830cbd416e4102 100644 (file)
@@ -411,7 +411,8 @@ static s32 ixgbe_setup_fc_82598(struct ixgbe_hw *hw, s32 packetbuf_num)
 
        /* Decide whether to use autoneg or not. */
        hw->mac.ops.check_link(hw, &speed, &link_up, false);
-       if (hw->phy.multispeed_fiber && (speed == IXGBE_LINK_SPEED_1GB_FULL))
+       if (!hw->fc.disable_fc_autoneg && hw->phy.multispeed_fiber &&
+           (speed == IXGBE_LINK_SPEED_1GB_FULL))
                ret_val = ixgbe_fc_autoneg(hw);
 
        if (ret_val)
index 8cfd3fd309a03036dc1ad4ec357e8cbd7d74ce12..63ab6671d08e34b5cf0d54a0aa269a40c5d983a4 100644 (file)
@@ -1937,7 +1937,8 @@ s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw, s32 packetbuf_num)
 
        /* Decide whether to use autoneg or not. */
        hw->mac.ops.check_link(hw, &speed, &link_up, false);
-       if (hw->phy.multispeed_fiber && (speed == IXGBE_LINK_SPEED_1GB_FULL))
+       if (!hw->fc.disable_fc_autoneg && hw->phy.multispeed_fiber &&
+           (speed == IXGBE_LINK_SPEED_1GB_FULL))
                ret_val = ixgbe_fc_autoneg(hw);
 
        if (ret_val)
index 7e94d6d399abfc0b9ebe25c21cad39bcea12ff67..24f73e719c3f48d41bfdb819d73e1b8931749ac2 100644 (file)
@@ -96,14 +96,11 @@ s32 ixgbe_write_analog_reg8_generic(struct ixgbe_hw *hw, u32 reg, u8 val);
 #define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
 
 #ifdef DEBUG
+extern char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw);
 #define hw_dbg(hw, format, arg...) \
-printk(KERN_DEBUG, "%s: " format, ixgbe_get_hw_dev_name(hw), ##arg);
+       printk(KERN_DEBUG "%s: " format, ixgbe_get_hw_dev_name(hw), ##arg)
 #else
-static inline int __attribute__ ((format (printf, 2, 3)))
-hw_dbg(struct ixgbe_hw *hw, const char *format, ...)
-{
-       return 0;
-}
+#define hw_dbg(hw, format, arg...) do {} while (0)
 #endif
 
 #endif /* IXGBE_COMMON */
index 0a8731f1f237061eca666b4a973587ddd984c234..bd0a0c2769520fd3b3f7186dfc7a539a00397d2d 100644 (file)
@@ -90,6 +90,8 @@ int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *src_dcb_cfg,
                        src_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc;
        }
 
+       dst_dcb_cfg->pfc_mode_enable = src_dcb_cfg->pfc_mode_enable;
+
        return 0;
 }
 
@@ -298,8 +300,10 @@ static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,
 
        adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc = setting;
        if (adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc !=
-           adapter->dcb_cfg.tc_config[priority].dcb_pfc)
+           adapter->dcb_cfg.tc_config[priority].dcb_pfc) {
                adapter->dcb_set_bitmap |= BIT_PFC;
+               adapter->temp_dcb_cfg.pfc_mode_enable = true;
+       }
 }
 
 static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority,
index 18ecba7f6ecb32951ebb82324da1637aaf5cb9c9..aafc120f164e66abe809eb28d781f2454969443f 100644 (file)
@@ -129,6 +129,15 @@ static int ixgbe_get_settings(struct net_device *netdev,
                        ecmd->advertising |= ADVERTISED_10000baseT_Full;
                if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
                        ecmd->advertising |= ADVERTISED_1000baseT_Full;
+               /*
+                * It's possible that phy.autoneg_advertised may not be
+                * set yet.  If so display what the default would be -
+                * both 1G and 10G supported.
+                */
+               if (!(ecmd->advertising & (ADVERTISED_1000baseT_Full |
+                                          ADVERTISED_10000baseT_Full)))
+                       ecmd->advertising |= (ADVERTISED_10000baseT_Full |
+                                             ADVERTISED_1000baseT_Full);
 
                ecmd->port = PORT_TP;
        } else if (hw->phy.media_type == ixgbe_media_type_backplane) {
@@ -225,7 +234,16 @@ static void ixgbe_get_pauseparam(struct net_device *netdev,
        struct ixgbe_adapter *adapter = netdev_priv(netdev);
        struct ixgbe_hw *hw = &adapter->hw;
 
-       pause->autoneg = (hw->fc.current_mode == ixgbe_fc_full ? 1 : 0);
+       /*
+        * Flow Control Autoneg isn't on if
+        *  - we didn't ask for it OR
+        *  - it failed, we know this by tx & rx being off
+        */
+       if (hw->fc.disable_fc_autoneg ||
+           (hw->fc.current_mode == ixgbe_fc_none))
+               pause->autoneg = 0;
+       else
+               pause->autoneg = 1;
 
        if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
                pause->rx_pause = 1;
@@ -243,8 +261,12 @@ static int ixgbe_set_pauseparam(struct net_device *netdev,
        struct ixgbe_adapter *adapter = netdev_priv(netdev);
        struct ixgbe_hw *hw = &adapter->hw;
 
-       if ((pause->autoneg == AUTONEG_ENABLE) ||
-           (pause->rx_pause && pause->tx_pause))
+       if (pause->autoneg != AUTONEG_ENABLE)
+               hw->fc.disable_fc_autoneg = true;
+       else
+               hw->fc.disable_fc_autoneg = false;
+
+       if (pause->rx_pause && pause->tx_pause)
                hw->fc.requested_mode = ixgbe_fc_full;
        else if (pause->rx_pause && !pause->tx_pause)
                hw->fc.requested_mode = ixgbe_fc_rx_pause;
@@ -712,9 +734,10 @@ static int ixgbe_set_ringparam(struct net_device *netdev,
                                struct ethtool_ringparam *ring)
 {
        struct ixgbe_adapter *adapter = netdev_priv(netdev);
-       struct ixgbe_ring *temp_ring;
+       struct ixgbe_ring *temp_tx_ring, *temp_rx_ring;
        int i, err;
        u32 new_rx_count, new_tx_count;
+       bool need_update = false;
 
        if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
                return -EINVAL;
@@ -733,80 +756,94 @@ static int ixgbe_set_ringparam(struct net_device *netdev,
                return 0;
        }
 
-       temp_ring = kcalloc(adapter->num_tx_queues,
-                           sizeof(struct ixgbe_ring), GFP_KERNEL);
-       if (!temp_ring)
-               return -ENOMEM;
-
        while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
                msleep(1);
 
-       if (new_tx_count != adapter->tx_ring->count) {
+       temp_tx_ring = kcalloc(adapter->num_tx_queues,
+                              sizeof(struct ixgbe_ring), GFP_KERNEL);
+       if (!temp_tx_ring) {
+               err = -ENOMEM;
+               goto err_setup;
+       }
+
+       if (new_tx_count != adapter->tx_ring_count) {
+               memcpy(temp_tx_ring, adapter->tx_ring,
+                      adapter->num_tx_queues * sizeof(struct ixgbe_ring));
                for (i = 0; i < adapter->num_tx_queues; i++) {
-                       temp_ring[i].count = new_tx_count;
-                       err = ixgbe_setup_tx_resources(adapter, &temp_ring[i]);
+                       temp_tx_ring[i].count = new_tx_count;
+                       err = ixgbe_setup_tx_resources(adapter,
+                                                      &temp_tx_ring[i]);
                        if (err) {
                                while (i) {
                                        i--;
                                        ixgbe_free_tx_resources(adapter,
-                                                               &temp_ring[i]);
+                                                               &temp_tx_ring[i]);
                                }
                                goto err_setup;
                        }
-                       temp_ring[i].v_idx = adapter->tx_ring[i].v_idx;
+                       temp_tx_ring[i].v_idx = adapter->tx_ring[i].v_idx;
                }
-               if (netif_running(netdev))
-                       netdev->netdev_ops->ndo_stop(netdev);
-               ixgbe_reset_interrupt_capability(adapter);
-               ixgbe_napi_del_all(adapter);
-               INIT_LIST_HEAD(&netdev->napi_list);
-               kfree(adapter->tx_ring);
-               adapter->tx_ring = temp_ring;
-               temp_ring = NULL;
-               adapter->tx_ring_count = new_tx_count;
+               need_update = true;
        }
 
-       temp_ring = kcalloc(adapter->num_rx_queues,
-                           sizeof(struct ixgbe_ring), GFP_KERNEL);
-       if (!temp_ring) {
-               if (netif_running(netdev))
-                       netdev->netdev_ops->ndo_open(netdev);
-               return -ENOMEM;
+       temp_rx_ring = kcalloc(adapter->num_rx_queues,
+                              sizeof(struct ixgbe_ring), GFP_KERNEL);
+       if ((!temp_rx_ring) && (need_update)) {
+               for (i = 0; i < adapter->num_tx_queues; i++)
+                       ixgbe_free_tx_resources(adapter, &temp_tx_ring[i]);
+               kfree(temp_tx_ring);
+               err = -ENOMEM;
+               goto err_setup;
        }
 
-       if (new_rx_count != adapter->rx_ring->count) {
+       if (new_rx_count != adapter->rx_ring_count) {
+               memcpy(temp_rx_ring, adapter->rx_ring,
+                      adapter->num_rx_queues * sizeof(struct ixgbe_ring));
                for (i = 0; i < adapter->num_rx_queues; i++) {
-                       temp_ring[i].count = new_rx_count;
-                       err = ixgbe_setup_rx_resources(adapter, &temp_ring[i]);
+                       temp_rx_ring[i].count = new_rx_count;
+                       err = ixgbe_setup_rx_resources(adapter,
+                                                      &temp_rx_ring[i]);
                        if (err) {
                                while (i) {
                                        i--;
                                        ixgbe_free_rx_resources(adapter,
-                                                               &temp_ring[i]);
+                                                             &temp_rx_ring[i]);
                                }
                                goto err_setup;
                        }
-                       temp_ring[i].v_idx = adapter->rx_ring[i].v_idx;
+                       temp_rx_ring[i].v_idx = adapter->rx_ring[i].v_idx;
                }
+               need_update = true;
+       }
+
+       /* if rings need to be updated, here's the place to do it in one shot */
+       if (need_update) {
                if (netif_running(netdev))
-                       netdev->netdev_ops->ndo_stop(netdev);
-               ixgbe_reset_interrupt_capability(adapter);
-               ixgbe_napi_del_all(adapter);
-               INIT_LIST_HEAD(&netdev->napi_list);
-               kfree(adapter->rx_ring);
-               adapter->rx_ring = temp_ring;
-               temp_ring = NULL;
-
-               adapter->rx_ring_count = new_rx_count;
+                       ixgbe_down(adapter);
+
+               /* tx */
+               if (new_tx_count != adapter->tx_ring_count) {
+                       kfree(adapter->tx_ring);
+                       adapter->tx_ring = temp_tx_ring;
+                       temp_tx_ring = NULL;
+                       adapter->tx_ring_count = new_tx_count;
+               }
+
+               /* rx */
+               if (new_rx_count != adapter->rx_ring_count) {
+                       kfree(adapter->rx_ring);
+                       adapter->rx_ring = temp_rx_ring;
+                       temp_rx_ring = NULL;
+                       adapter->rx_ring_count = new_rx_count;
+               }
        }
 
        /* success! */
        err = 0;
-err_setup:
-       ixgbe_init_interrupt_scheme(adapter);
        if (netif_running(netdev))
-               netdev->netdev_ops->ndo_open(netdev);
+               ixgbe_up(adapter);
 
+err_setup:
        clear_bit(__IXGBE_RESETTING, &adapter->state);
        return err;
 }
index 79aa811c403c5c2d5dcd3bfff6939ae067ccc1e5..286ecc0e6ab75148c8ff08513c1776fe68f5cf04 100644 (file)
@@ -187,15 +187,14 @@ static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
                                              struct ixgbe_tx_buffer
                                              *tx_buffer_info)
 {
-       if (tx_buffer_info->dma) {
-               pci_unmap_page(adapter->pdev, tx_buffer_info->dma,
-                              tx_buffer_info->length, PCI_DMA_TODEVICE);
-               tx_buffer_info->dma = 0;
-       }
+       tx_buffer_info->dma = 0;
        if (tx_buffer_info->skb) {
+               skb_dma_unmap(&adapter->pdev->dev, tx_buffer_info->skb,
+                             DMA_TO_DEVICE);
                dev_kfree_skb_any(tx_buffer_info->skb);
                tx_buffer_info->skb = NULL;
        }
+       tx_buffer_info->time_stamp = 0;
        /* tx_buffer_info must be completely set up in the transmit path */
 }
 
@@ -204,15 +203,11 @@ static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
                                        unsigned int eop)
 {
        struct ixgbe_hw *hw = &adapter->hw;
-       u32 head, tail;
 
        /* Detect a transmit hang in hardware, this serializes the
         * check with the clearing of time_stamp and movement of eop */
-       head = IXGBE_READ_REG(hw, tx_ring->head);
-       tail = IXGBE_READ_REG(hw, tx_ring->tail);
        adapter->detect_tx_hung = false;
-       if ((head != tail) &&
-           tx_ring->tx_buffer_info[eop].time_stamp &&
+       if (tx_ring->tx_buffer_info[eop].time_stamp &&
            time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
            !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
                /* detected Tx unit hang */
@@ -227,7 +222,8 @@ static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
                        "  time_stamp           <%lx>\n"
                        "  jiffies              <%lx>\n",
                        tx_ring->queue_index,
-                       head, tail,
+                       IXGBE_READ_REG(hw, tx_ring->head),
+                       IXGBE_READ_REG(hw, tx_ring->tail),
                        tx_ring->next_to_use, eop,
                        tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
                return true;
@@ -2934,6 +2930,7 @@ err_tx_ring_allocation:
  **/
 static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter)
 {
+       struct ixgbe_hw *hw = &adapter->hw;
        int err = 0;
        int vector, v_budget;
 
@@ -2948,12 +2945,12 @@ static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter)
 
        /*
         * At the same time, hardware can only support a maximum of
-        * MAX_MSIX_COUNT vectors.  With features such as RSS and VMDq,
-        * we can easily reach upwards of 64 Rx descriptor queues and
-        * 32 Tx queues.  Thus, we cap it off in those rare cases where
-        * the cpu count also exceeds our vector limit.
+        * hw.mac->max_msix_vectors vectors.  With features
+        * such as RSS and VMDq, we can easily surpass the number of Rx and Tx
+        * descriptor queues supported by our device.  Thus, we cap it off in
+        * those rare cases where the cpu count also exceeds our vector limit.
         */
-       v_budget = min(v_budget, MAX_MSIX_COUNT);
+       v_budget = min(v_budget, (int)hw->mac.max_msix_vectors);
 
        /* A failure in MSI-X entry allocation isn't fatal, but it does
         * mean we disable MSI-X capabilities of the adapter. */
@@ -3169,11 +3166,13 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
 #endif
 
        /* default flow control settings */
-       hw->fc.requested_mode = ixgbe_fc_none;
+       hw->fc.requested_mode = ixgbe_fc_full;
+       hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
        hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
        hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
        hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
        hw->fc.send_xon = true;
+       hw->fc.disable_fc_autoneg = false;
 
        /* enable itr by default in dynamic mode */
        adapter->itr_setting = 1;
@@ -3489,10 +3488,10 @@ err_up:
        ixgbe_release_hw_control(adapter);
        ixgbe_free_irq(adapter);
 err_req_irq:
-       ixgbe_free_all_rx_resources(adapter);
 err_setup_rx:
-       ixgbe_free_all_tx_resources(adapter);
+       ixgbe_free_all_rx_resources(adapter);
 err_setup_tx:
+       ixgbe_free_all_tx_resources(adapter);
        ixgbe_reset(adapter);
 
        return err;
@@ -4163,32 +4162,39 @@ static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
                         struct sk_buff *skb, unsigned int first)
 {
        struct ixgbe_tx_buffer *tx_buffer_info;
-       unsigned int len = skb->len;
+       unsigned int len = skb_headlen(skb);
        unsigned int offset = 0, size, count = 0, i;
        unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
        unsigned int f;
-
-       len -= skb->data_len;
+       dma_addr_t *map;
 
        i = tx_ring->next_to_use;
 
+       if (skb_dma_map(&adapter->pdev->dev, skb, DMA_TO_DEVICE)) {
+               dev_err(&adapter->pdev->dev, "TX DMA map failed\n");
+               return 0;
+       }
+
+       map = skb_shinfo(skb)->dma_maps;
+
        while (len) {
                tx_buffer_info = &tx_ring->tx_buffer_info[i];
                size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
 
                tx_buffer_info->length = size;
-               tx_buffer_info->dma = pci_map_single(adapter->pdev,
-                                                    skb->data + offset,
-                                                    size, PCI_DMA_TODEVICE);
+               tx_buffer_info->dma = map[0] + offset;
                tx_buffer_info->time_stamp = jiffies;
                tx_buffer_info->next_to_watch = i;
 
                len -= size;
                offset += size;
                count++;
-               i++;
-               if (i == tx_ring->count)
-                       i = 0;
+
+               if (len) {
+                       i++;
+                       if (i == tx_ring->count)
+                               i = 0;
+               }
        }
 
        for (f = 0; f < nr_frags; f++) {
@@ -4196,33 +4202,27 @@ static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
 
                frag = &skb_shinfo(skb)->frags[f];
                len = frag->size;
-               offset = frag->page_offset;
+               offset = 0;
 
                while (len) {
+                       i++;
+                       if (i == tx_ring->count)
+                               i = 0;
+
                        tx_buffer_info = &tx_ring->tx_buffer_info[i];
                        size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
 
                        tx_buffer_info->length = size;
-                       tx_buffer_info->dma = pci_map_page(adapter->pdev,
-                                                          frag->page,
-                                                          offset,
-                                                          size,
-                                                          PCI_DMA_TODEVICE);
+                       tx_buffer_info->dma = map[f + 1] + offset;
                        tx_buffer_info->time_stamp = jiffies;
                        tx_buffer_info->next_to_watch = i;
 
                        len -= size;
                        offset += size;
                        count++;
-                       i++;
-                       if (i == tx_ring->count)
-                               i = 0;
                }
        }
-       if (i == 0)
-               i = tx_ring->count - 1;
-       else
-               i = i - 1;
+
        tx_ring->tx_buffer_info[i].skb = skb;
        tx_ring->tx_buffer_info[first].next_to_watch = i;
 
@@ -4388,13 +4388,19 @@ static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
                 (skb->ip_summed == CHECKSUM_PARTIAL))
                tx_flags |= IXGBE_TX_FLAGS_CSUM;
 
-       ixgbe_tx_queue(adapter, tx_ring, tx_flags,
-                      ixgbe_tx_map(adapter, tx_ring, skb, first),
-                      skb->len, hdr_len);
+       count = ixgbe_tx_map(adapter, tx_ring, skb, first);
 
-       netdev->trans_start = jiffies;
+       if (count) {
+               ixgbe_tx_queue(adapter, tx_ring, tx_flags, count, skb->len,
+                              hdr_len);
+               netdev->trans_start = jiffies;
+               ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
 
-       ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
+       } else {
+               dev_kfree_skb_any(skb);
+               tx_ring->tx_buffer_info[first].time_stamp = 0;
+               tx_ring->next_to_use = first;
+       }
 
        return NETDEV_TX_OK;
 }
@@ -4987,8 +4993,20 @@ static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
 
        return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
 }
+
 #endif /* CONFIG_IXGBE_DCA */
+#ifdef DEBUG
+/**
+ * ixgbe_get_hw_dev_name - return device name string
+ * used by hardware layer to print debugging information
+ **/
+char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw)
+{
+       struct ixgbe_adapter *adapter = hw->back;
+       return adapter->netdev->name;
+}
 
+#endif
 module_exit(ixgbe_exit_module);
 
 /* ixgbe_main.c */
index 2b2ecba7b6094d909ba21dcdd56dd68b58808796..030ff0a9ea6757079e75f020679f42360d1b76d9 100644 (file)
@@ -2005,6 +2005,7 @@ struct ixgbe_fc_info {
        u16 pause_time; /* Flow Control Pause timer */
        bool send_xon; /* Flow control send XON */
        bool strict_ieee; /* Strict IEEE mode */
+       bool disable_fc_autoneg; /* Turn off autoneg FC mode */
        enum ixgbe_fc_mode current_mode; /* FC mode in effect */
        enum ixgbe_fc_mode requested_mode; /* FC mode requested by caller */
 };
diff --git a/drivers/net/pcmcia/ositech.h b/drivers/net/pcmcia/ositech.h
deleted file mode 100644 (file)
index 4126efc..0000000
+++ /dev/null
@@ -1,358 +0,0 @@
-/*
-    This file contains the firmware of Seven of Diamonds from OSITECH.
-    (Special thanks to Kevin MacPherson of OSITECH)
-
-    This software may be used and distributed according to the terms of
-    the GNU General Public License, incorporated herein by reference.
-*/
-
-    static const u_char __Xilinx7OD[] = {
-    0xFF, 0x04, 0xA0, 0x36, 0xF3, 0xEC, 0xFF, 0xFF, 0xFF, 0xDF, 0xFB, 0xFF,
-    0xF3, 0xFF, 0xFF, 0xFF, 
-    0xEF, 0x3F, 0xFF, 0xF7, 0xFF, 0xFF, 0xFF, 0xFF, 0xEF, 0x7F, 0xFE, 0xFF,
-    0xCE, 0xFE, 0xFE, 0xFE, 
-    0xFE, 0xDE, 0xBD, 0xDD, 0xFD, 0xFF, 0xFD, 0xCF, 0xF7, 0xBF, 0x7F, 0xFF,
-    0x7F, 0x3F, 0xFE, 0xBF, 
-    0xFF, 0xFF, 0xFF, 0xBC, 0xFF, 0xFF, 0xBD, 0xB5, 0x7F, 0x7F, 0xBF, 0xBF,
-    0x7F, 0xFF, 0xEF, 0xFF, 
-    0xFF, 0xFF, 0xFB, 0xFF, 0xF7, 0xF7, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE, 0xDE,
-    0xFE, 0xFE, 0xFA, 0xDE, 
-    0xBD, 0xFD, 0xED, 0xFD, 0xFD, 0xCF, 0xEF, 0xEF, 0xEF, 0xEF, 0xC7, 0xDF,
-    0xDF, 0xDF, 0xDF, 0xDF, 
-    0xFF, 0x7E, 0xFE, 0xFD, 0x7D, 0x6D, 0xEE, 0xFE, 0x7C, 0xFB, 0xF4, 0xFB,
-    0xCF, 0xDB, 0xDF, 0xFF, 
-    0xFF, 0xBB, 0x7F, 0xFF, 0x7F, 0xFF, 0xF7, 0xFF, 0x9E, 0xBF, 0x3B, 0xBF,
-    0xBF, 0x7F, 0x7F, 0x7F, 
-    0x7E, 0x6F, 0xDF, 0xEF, 0xF5, 0xF6, 0xFD, 0xF6, 0xF5, 0xED, 0xEB, 0xFF,
-    0xEF, 0xEF, 0xEF, 0x7E, 
-    0x7F, 0x7F, 0x6F, 0x7F, 0xFF, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xEF, 0xBF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xBC, 0x1F, 0x1F, 0xEE, 0xFF, 0xBC,
-    0xB7, 0xFF, 0xDF, 0xFF, 
-    0xDF, 0xEF, 0x3B, 0xE3, 0xD3, 0xFF, 0xFB, 0xFF, 0xFF, 0xDF, 0xFF, 0xFF,
-    0xFF, 0xBA, 0xBF, 0x2D, 
-    0xDB, 0xBD, 0xFD, 0xDB, 0xDF, 0xFA, 0xFB, 0xFF, 0xEF, 0xFB, 0xDB, 0xF3,
-    0xFF, 0xDF, 0xFD, 0x7F, 
-    0xEF, 0xFB, 0xFF, 0xFF, 0xBE, 0xBF, 0x27, 0xBA, 0xFE, 0xFB, 0xDF, 0xFF,
-    0xF6, 0xFF, 0xFF, 0xEF, 
-    0xFB, 0xDB, 0xF3, 0xD9, 0x9A, 0x3F, 0xFF, 0xAF, 0xBF, 0xFF, 0xFF, 0xBE,
-    0x3F, 0x37, 0xBD, 0x96, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xAE, 0xFB, 0xF3, 0xF3, 0xEB, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xF7, 0xFA, 0xBC, 0xAE, 0xFE, 0xBE, 0xFE, 0xBB, 0x7F, 0xFD, 0xFF,
-    0x7F, 0xEF, 0xF7, 0xFB, 
-    0xBB, 0xD7, 0xF7, 0x7F, 0xFF, 0xF7, 0xFF, 0xFF, 0xF7, 0xBC, 0xED, 0xFD,
-    0xBD, 0x9D, 0x7D, 0x7B, 
-    0xFB, 0x7B, 0x7B, 0xFB, 0xAF, 0xFF, 0xFE, 0xFD, 0xFD, 0xFE, 0xFE, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xF7, 
-    0xAA, 0xB9, 0xBF, 0x8F, 0xBF, 0xDF, 0xFF, 0x7F, 0xFF, 0xFF, 0x7F, 0xCF,
-    0xFB, 0xEB, 0xCB, 0xEB, 
-    0xEE, 0xFF, 0xFF, 0xD7, 0xFF, 0xFF, 0xFF, 0x3E, 0x33, 0x3F, 0x1C, 0x7C,
-    0xFC, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xCF, 0xD3, 0xF3, 0xE3, 0xF3, 0xFB, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xEB, 0xFE, 0x35, 
-    0x3F, 0x3D, 0xFD, 0xFD, 0xFF, 0xFF, 0xFF, 0xBF, 0xFF, 0xEF, 0x6F, 0xE3,
-    0xE3, 0xE3, 0xEF, 0xFF, 
-    0xFF, 0xDF, 0xFF, 0xFF, 0xF7, 0xFE, 0x3E, 0x5E, 0xFE, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFD, 0xFF, 0xFF, 
-    0xAF, 0xCF, 0xF2, 0xCB, 0xCF, 0x8E, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFD,
-    0xFC, 0x3E, 0x1F, 0x9E, 
-    0xAD, 0xFD, 0xFF, 0xFF, 0xBF, 0xFF, 0xFF, 0xEF, 0xFF, 0xB3, 0xF7, 0xE7,
-    0xF7, 0xFA, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xEE, 0xEB, 0xAB, 0xAF, 0x9F, 0xE3, 0x7F, 0xFF, 0xDE,
-    0xFF, 0x7F, 0xEE, 0xFF, 
-    0xFF, 0xFB, 0x3A, 0xFA, 0xFF, 0xF2, 0x77, 0xFF, 0xFF, 0xF7, 0xFE, 0xFF,
-    0xFE, 0xBD, 0xAE, 0xDE, 
-    0x7D, 0x7D, 0xFD, 0xFF, 0xBF, 0xEE, 0xFF, 0xFD, 0xFF, 0xDB, 0xFB, 0xFF,
-    0xF7, 0xEF, 0xFB, 0xFF, 
-    0xFF, 0xFE, 0xFF, 0x2D, 0xAF, 0xB9, 0xFD, 0x79, 0xFB, 0xFA, 0xFF, 0xBF,
-    0xEF, 0xFF, 0xFF, 0x91, 
-    0xFA, 0xFB, 0xDF, 0xF7, 0xF7, 0xFF, 0xFF, 0xFF, 0xFC, 0xCF, 0x37, 0xBF,
-    0xBF, 0xFF, 0x7F, 0x7F, 
-    0xFF, 0xFF, 0xFF, 0xAF, 0xFF, 0xFF, 0xF3, 0xFB, 0xFB, 0xFF, 0xF5, 0xEF,
-    0xFF, 0xFF, 0xF7, 0xFA, 
-    0xFF, 0xFF, 0xEE, 0xFA, 0xFE, 0xFB, 0x55, 0xDD, 0xFF, 0x7F, 0xAF, 0xFE,
-    0xFF, 0xFB, 0xFB, 0xF5, 
-    0xFF, 0xF7, 0xEF, 0xFF, 0xFF, 0xFF, 0xBE, 0xBD, 0xBD, 0xBD, 0xBD, 0x7D,
-    0x7B, 0x7B, 0x7B, 0x7B, 
-    0xFB, 0xAE, 0xFF, 0xFD, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xF7, 0xDA, 0xB7, 0x61, 
-    0xFF, 0xB9, 0x59, 0xF3, 0x73, 0xF3, 0xDF, 0x7F, 0x6F, 0xDF, 0xEF, 0xF7,
-    0xEB, 0xEB, 0xD7, 0xFF, 
-    0xD7, 0xFF, 0xFF, 0xF7, 0xFE, 0x7F, 0xFB, 0x3E, 0x38, 0x73, 0xF6, 0x7F,
-    0xFC, 0xFF, 0xFF, 0xCF, 
-    0xFF, 0xB7, 0xFB, 0xB3, 0xB3, 0x67, 0xFF, 0xE7, 0xFD, 0xFF, 0xEF, 0xF6,
-    0x7F, 0xB7, 0xBC, 0xF5, 
-    0x7B, 0xF6, 0xF7, 0xF5, 0xFF, 0xFF, 0xEF, 0xFF, 0xF7, 0xFF, 0xF7, 0xCE,
-    0xE7, 0xFF, 0x9F, 0xFF, 
-    0xFF, 0xF5, 0xFE, 0x7D, 0xFF, 0x5F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xEF, 0xFF, 0xF6, 
-    0xCB, 0xDB, 0xEE, 0xFE, 0xFF, 0xDF, 0xFF, 0xFF, 0xFF, 0xFE, 0x7F, 0xBE,
-    0x1E, 0x3E, 0xFE, 0xFF, 
-    0x7D, 0xFE, 0xFF, 0xFF, 0xEF, 0xBF, 0xE7, 0xFF, 0xE3, 0xE3, 0xFF, 0xDF,
-    0xE7, 0xFF, 0xFF, 0xFF, 
-    0xB8, 0xEF, 0xB7, 0x2F, 0xEE, 0xFF, 0xDF, 0xFF, 0xBF, 0xFF, 0x7F, 0xEF,
-    0xEB, 0xBF, 0xA3, 0xD3, 
-    0xFF, 0x7F, 0xFF, 0xFF, 0xFF, 0xFF, 0xF7, 0xBE, 0xFD, 0x3F, 0xCF, 0xFD,
-    0xFB, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xAF, 0xFB, 0xBF, 0xBB, 0xBF, 0xDB, 0xFD, 0xFB, 0xFF, 0xFF,
-    0xFF, 0xFF, 0x3E, 0xFE, 
-    0x3F, 0xBA, 0xBA, 0xFE, 0xFF, 0xFF, 0xFF, 0xEF, 0xFF, 0xEF, 0xC3, 0x7F,
-    0xB2, 0x9B, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0x3C, 0xFF, 0x3F, 0x3C, 0xFF, 0xFE, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xAF, 0xF3, 0xFE, 0xF3, 0xE3, 0xEB, 0xFF, 0xFF, 0xFF, 0xFB, 0xFF, 0xF7,
-    0x9A, 0xFE, 0xAF, 0x9E, 
-    0xBE, 0xFE, 0xFF, 0xDF, 0xFF, 0xFF, 0x7B, 0xEF, 0xF7, 0xBF, 0xFB, 0xFB,
-    0xFB, 0xFF, 0xFF, 0x7F, 
-    0xFF, 0xFF, 0xFF, 0xBC, 0xBD, 0xFD, 0xBD, 0xDD, 0x7D, 0x7B, 0x7B, 0x7B,
-    0x7B, 0xFB, 0xAE, 0xFF, 
-    0xFF, 0xFF, 0xFE, 0xFE, 0xFF, 0xFD, 0xFF, 0xFF, 0xFF, 0xF7, 0x9A, 0xFF,
-    0x9F, 0xFF, 0xAF, 0xEF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0x7F, 0xCF, 0xF3, 0xFF, 0xEB, 0xFF, 0xEB, 0xFF,
-    0xFF, 0xBF, 0xFF, 0xFF, 
-    0xEF, 0xFE, 0xFF, 0x37, 0xFC, 0xBF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xCF, 0xEF, 0xFD, 0xF3, 
-    0xFF, 0xEE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x6E, 0xFD, 0x2F, 0xFD,
-    0xFF, 0xFD, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xEF, 0xCF, 0xFF, 0xF3, 0xBF, 0x69, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFE, 
-    0xFB, 0x9F, 0xFF, 0xBF, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEF, 0x87,
-    0xFE, 0xDA, 0xEF, 0xCF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE, 0xEF, 0xBF, 0xEF, 0xEF, 0xFD,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xEF, 0xFD, 0xFF, 0x7B, 0xFF, 0xEB, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xEB, 0xF8, 0xFF, 0xEF, 
-    0xAF, 0xFF, 0xFF, 0xBD, 0xFF, 0xFF, 0xFF, 0x7F, 0xEE, 0x7F, 0xEF, 0xFF,
-    0xBB, 0xFF, 0xBF, 0xFB, 
-    0xFF, 0xFF, 0xFF, 0xF7, 0xF6, 0xFB, 0xBD, 0xFD, 0xDD, 0xF5, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xAF, 
-    0xFF, 0x5F, 0xF5, 0xDF, 0xFF, 0x7F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF6,
-    0xF3, 0xFF, 0xDE, 0xFE, 
-    0xEF, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xEF, 0xFF, 0xDE, 0xDF, 0x5F, 0xDF,
-    0xFD, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFE, 0xFE, 0xFF, 0xFD, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xAF, 0xFF, 0xFF, 
-    0xEF, 0xED, 0xFF, 0xDF, 0xFF, 0xFF, 0xFB, 0xFF, 0xFF, 0xDA, 0xBD, 0xBE,
-    0xAE, 0xFE, 0x7F, 0xFD, 
-    0xDF, 0xFF, 0xFF, 0x7F, 0xEF, 0xFF, 0xFB, 0xFB, 0xFB, 0x7F, 0xF7, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xF7, 
-    0xBC, 0xFD, 0xBD, 0xBD, 0xBD, 0xFD, 0x7B, 0x7B, 0x7B, 0x7B, 0xFB, 0xAE,
-    0xFF, 0xFF, 0xFD, 0xFF, 
-    0xFF, 0xFF, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xFA, 0x9F, 0xBF, 0xBF, 0xCF,
-    0x7F, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xAF, 0xFF, 0xEB, 0xEB, 0xEB, 0xFF, 0xD7, 0xFE, 0xFF, 0xFF,
-    0xBF, 0xE7, 0xFE, 0xBF, 
-    0x7F, 0xFC, 0xFF, 0xFF, 0xED, 0xFF, 0xFF, 0xFF, 0xFF, 0x4F, 0xFF, 0xFB,
-    0xFB, 0xFF, 0xFF, 0xDD, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE, 0xBD, 0xDF, 0x9D, 0xFD, 0xDF, 0xB9,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xEF, 0xFF, 0xFB, 0xEF, 0xEB, 0xFF, 0xDE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xF6, 0x9F, 0xFF, 0xFC, 
-    0xFE, 0xFB, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xEF, 0xDF, 0xFA, 0xCD, 0xCF,
-    0xBF, 0x9F, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xF7, 0xFE, 0xBF, 0xFF, 0xDF, 0xEF, 0x5F, 0xFF, 0xFF, 0xFF,
-    0xFF, 0x7F, 0x6F, 0xFF, 
-    0xBB, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7E, 0xFF,
-    0x5F, 0xFF, 0xBF, 0xBF, 
-    0xF9, 0xFF, 0xFF, 0xFF, 0x7F, 0x6E, 0x7B, 0xFF, 0xEF, 0xFD, 0xEB, 0xDF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xF7, 0xB6, 0x3E, 0xFC, 0xFD, 0xBF, 0x7E, 0xFB, 0xFF, 0xFF, 0xFF, 0xF7,
-    0xEF, 0xF7, 0xF3, 0xF7, 
-    0xFF, 0xFB, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x6E, 0x35, 0x79, 0xFF,
-    0xBF, 0xFC, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xEF, 0xFB, 0x53, 0xDF, 0xFF, 0xEB, 0xBF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xBC, 
-    0xFF, 0xFF, 0xFF, 0xBF, 0xFF, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xAF, 0xF5,
-    0xFF, 0xF7, 0xFF, 0xFB, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xBA, 0xAA, 0xEE, 0xFE, 0x3F, 0x7D,
-    0xFD, 0xFF, 0xFF, 0xFF, 
-    0x7F, 0xAF, 0x77, 0xFB, 0xFB, 0xFF, 0xFB, 0xF7, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xF7, 0xBE, 0xBD, 0xBD, 
-    0xBD, 0xBD, 0xFD, 0x7B, 0x7B, 0x7B, 0x7B, 0xFB, 0xAE, 0xFF, 0xEF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFC, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0x9A, 0xD9, 0xB8, 0xFF, 0xFF, 0x79, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xCF, 
-    0xFB, 0xFF, 0xEB, 0xFF, 0xEB, 0xD7, 0xFF, 0xFF, 0xFF, 0xFF, 0xE7, 0xDE,
-    0xF8, 0xFB, 0xFE, 0x3F, 
-    0xFB, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xCF, 0xAD, 0xBF, 0xFA, 0xFF, 0x73,
-    0xDF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0x3A, 0xF5, 0xB7, 0xFC, 0x3F, 0xF9, 0xFD, 0xFF, 0xFF, 0xFF,
-    0x7F, 0xEF, 0xF3, 0xFF, 
-    0xBF, 0xFE, 0xF3, 0x9F, 0xFE, 0xFF, 0xFF, 0xFF, 0xF7, 0x3E, 0xFF, 0xFF,
-    0xFF, 0xBF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xAF, 0xD3, 0xFE, 0xDB, 0xFF, 0xDB, 0xDF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0x3E, 0xFF, 0xBF, 0xFF, 0x7F, 0xFF, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0x8F,
-    0xF3, 0xFF, 0xED, 0xFF, 
-    0xF7, 0xFB, 0xFF, 0xFF, 0xFF, 0xFF, 0xEF, 0xF6, 0x3C, 0xFE, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0x9F, 0xEF, 0xEF, 0xD1, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0x7E, 0xBF, 
-    0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xBB, 0xEF, 0xDF, 0xF1,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEE, 0x3E, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xBF, 
-    0xEF, 0xFD, 0xC3, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xBF, 0xFF,
-    0xFC, 0x3E, 0xFE, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x2E, 0xEF, 0xF3, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xF7, 0xBA, 0xBE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0x7F, 0xAF, 0xFB, 
-    0xFB, 0xFD, 0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xF2, 0xD6, 0xED,
-    0xBD, 0xBD, 0xBD, 0x7D, 
-    0x7B, 0x7B, 0x7B, 0x7B, 0xFB, 0xAF, 0xDF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0x92, 0xBF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7F,
-    0xAF, 0xEB, 0xEB, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xE7, 0xFE, 0x2E, 0xFE, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0x4F, 0xEF, 0xF3, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFE, 
-    0x3C, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEF, 0xCE,
-    0xC3, 0xFD, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE, 0x5D, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xEF, 0xCF, 0xEB, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xF7, 0xEE, 0x3E, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7F, 0xEF, 0xDF, 0xE2, 0xFF,
-    0xFF, 0xFF, 0xFB, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xF6, 0xBE, 0xFC, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0x7F, 0xEE, 
-    0x5F, 0xE6, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x3E,
-    0x7D, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEF, 0xF3, 0xFB, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xBF, 0xF7, 0x36, 0xBE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xEF, 0xD3, 0xF6, 
-    0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFC, 0x7F, 0xEE,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xAF, 0xEF, 0xEB, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xBA, 0xBE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEE,
-    0xFB, 0xFA, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF7, 0xD6, 0xFD, 0xBD, 0xBD, 0xBD,
-    0x7D, 0x7B, 0x7B, 0x7B, 
-    0x7B, 0xFB, 0xAE, 0xFF, 0x7E, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xF7, 0xBA, 0xBF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7F, 0xEF, 0xEB, 0x6B,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xF7, 0xFE, 0xBE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0x4F, 0xEF, 0xF7, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEF,
-    0x3E, 0x6E, 0xFC, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEF, 0xC3, 0xC9, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0x3E, 0xBF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xEF, 0xFB, 
-    0xD5, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE, 0xFE,
-    0xFE, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x6F, 0xEF, 0xFB, 0xFF, 0xFF, 0xFF, 0xFB,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xF6, 0xDF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7F, 0xFE,
-    0xEF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xE7, 0xFF, 0xFE, 0xFF, 0xF7, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0x7F, 0xFA, 0xEF, 0xBF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xE7, 0xFF, 0xFE, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7F, 0xFE, 0xEF, 0xBF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xA7, 0xFF, 0xFC, 0xF7, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0x7F, 
-    0xFE, 0xAE, 0xFF, 0xFF, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xE7,
-    0xF7, 0xFA, 0xFF, 0xFD, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7F, 0xAF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xF7, 0xBE, 0xBD, 0xBD, 0xBD, 0xBD, 0x7D, 0x7B, 0x7B,
-    0x7B, 0x7B, 0xFB, 0xAF, 
-    0x7F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xCA,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7F, 0x6F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xE7, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xCF, 0xFE, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE, 0xDF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xEF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF7, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xEF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFB, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xE7, 0xF2, 0xFC, 
-    0xEF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7F, 0xAE, 0xEF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xF7, 0x7E, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xEF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xBF, 0xFF, 0xFF, 0xFF, 0xBF, 0xFF,
-    0xFE, 0xFE, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xDF, 0xEF, 0xDD, 0xFE, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFE, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xAF, 0xEF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xBA, 0xFE,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEF, 0xFA, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xF6, 0x9C, 0xBD, 0xBD, 0xBD, 0xBD, 0x7D, 0x7B, 0x7B, 0x7B, 0x7B, 0xFB,
-    0xAE, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF7, 0x7A, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xDF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0x6F, 0xEF, 0xF7, 0xFF, 0xFF, 0xFF, 0xDF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xF7, 0xFE, 
-    0xFE, 0xFF, 0xFF, 0xFF, 0xDF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xCF, 0xEB,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEF, 0x9E, 0xFC, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xEF, 0xEF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFE, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7F, 0xEF, 0xCB, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFD, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xBE, 0xFD, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xEF, 
-    0xEF, 0xFF, 0xFF, 0xFF, 0xDF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF8,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xBF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFB, 0xAF, 0x7F, 0xFF, 
-    0xFF, 0xFF, 0xDF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE, 0xEF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xEF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xBF, 0xFF, 
-    0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xAE,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF7, 0xFA, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0x7F, 0xEF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xF7, 0xBC, 0xBD, 
-    0xBD, 0xBD, 0xBD, 0x7D, 0x7B, 0x7B, 0x7B, 0x7B, 0xFB, 0xAF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xF7, 0xFA, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0x7F, 
-    0xAF, 0x7F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEF,
-    0xFE, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xCF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFB, 0xFF,
-    0xFF, 0xFF, 0xEF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFE, 0xFF,
-    0xFF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xBF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFC, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
-    0xEF, 0xFF, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFB, 0xFF, 0xFF, 0xFF, 0xFF, 0xEF, 0xFE, 0xFF, 0x9F, 0x9F,
-    0x9F, 0x3F, 0x3F, 0x3F, 
-    0x3F, 0x3F, 0xFF, 0xEF, 0xDF, 0xDF, 0xDF, 0xDF, 0xCF, 0xB7, 0xBF, 0xBF,
-    0xBF, 0xBF, 0xFF, 0xBC, 
-    0xB9, 0x9D, 0xBD, 0xBD, 0x7D, 0x7B, 0x7B, 0x7B, 0x7B, 0xFB, 0xEF, 0xD7,
-    0xF5, 0xF3, 0xF1, 0xD1, 
-    0x65, 0xE3, 0xE3, 0xE3, 0xA3, 0xFF, 0xFE, 0x7F, 0xFE, 0xDE, 0xDE, 0xFF,
-    0xBD, 0xBD, 0xBD, 0xBD, 
-    0xDF, 0xEF, 0xFB, 0xF7, 0xF3, 0xF3, 0xF3, 0xE7, 0xE7, 0xE7, 0xE7, 0xE7,
-    0xFB, 0xFE, 0xFF, 0xFF, 
-    0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
-    
-    };
index 774232c13b3188db1d163ee167dd3982ea4acaf1..48dbb35747d8aefa4f04ee098e1f8dd37b022ed7 100644 (file)
@@ -42,6 +42,7 @@
 #include <linux/ethtool.h>
 #include <linux/mii.h>
 #include <linux/jiffies.h>
+#include <linux/firmware.h>
 
 #include <pcmcia/cs_types.h>
 #include <pcmcia/cs.h>
 #include <asm/system.h>
 #include <asm/uaccess.h>
 
-/* Ositech Seven of Diamonds firmware */
-#include "ositech.h"
-
 /*====================================================================*/
 
 static const char *if_names[] = { "auto", "10baseT", "10base2"};
 
+/* Firmware name */
+#define FIRMWARE_NAME          "ositech/Xilinx7OD.bin"
+
 /* Module parameters */
 
 MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver");
 MODULE_LICENSE("GPL");
+MODULE_FIRMWARE(FIRMWARE_NAME);
 
 #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
 
@@ -771,6 +773,26 @@ static int osi_config(struct pcmcia_device *link)
     return i;
 }
 
+static int osi_load_firmware(struct pcmcia_device *link)
+{
+       const struct firmware *fw;
+       int i, err;
+
+       err = request_firmware(&fw, FIRMWARE_NAME, &link->dev);
+       if (err) {
+               pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME);
+               return err;
+       }
+
+       /* Download the Seven of Diamonds firmware */
+       for (i = 0; i < fw->size; i++) {
+           outb(fw->data[i], link->io.BasePort1 + 2);
+           udelay(50);
+       }
+       release_firmware(fw);
+       return err;
+}
+
 static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid)
 {
     struct net_device *dev = link->priv;
@@ -811,11 +833,9 @@ static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid)
         (cardid == PRODID_OSITECH_SEVEN)) ||
        ((manfid == MANFID_PSION) &&
         (cardid == PRODID_PSION_NET100))) {
-       /* Download the Seven of Diamonds firmware */
-       for (i = 0; i < sizeof(__Xilinx7OD); i++) {
-           outb(__Xilinx7OD[i], link->io.BasePort1+2);
-           udelay(50);
-       }
+       rc = osi_load_firmware(link);
+       if (rc)
+               goto free_cfg_mem;
     } else if (manfid == MANFID_OSITECH) {
        /* Make sure both functions are powered up */
        set_bits(0x300, link->io.BasePort1 + OSITECH_AUI_PWR);
@@ -862,10 +882,10 @@ static int smc91c92_resume(struct pcmcia_device *link)
             (smc->cardid == PRODID_OSITECH_SEVEN)) ||
            ((smc->manfid == MANFID_PSION) &&
             (smc->cardid == PRODID_PSION_NET100))) {
-               /* Download the Seven of Diamonds firmware */
-               for (i = 0; i < sizeof(__Xilinx7OD); i++) {
-                       outb(__Xilinx7OD[i], link->io.BasePort1+2);
-                       udelay(50);
+               i = osi_load_firmware(link);
+               if (i) {
+                       pr_err("smc91c92_cs: Failed to load firmware\n");
+                       return i;
                }
        }
        if (link->open) {
index a50078627fb6a40f7eeb07772f49eef5fc05131b..913b2a5fafc9fea160fb90bf0c18d1fd2f6e4447 100644 (file)
@@ -33,7 +33,6 @@
 #include <linux/mm.h>
 #include <linux/vmalloc.h>
 
-#include <linux/version.h>
 
 #include "qlge.h"
 
index 06c535222666be7e1c5a0f933268cec7b58052a0..e1a638a05f8621d15cfb74c6f15806bc33323fe8 100644 (file)
@@ -2075,8 +2075,7 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
        if (!tp->pcie_cap && netif_msg_probe(tp))
                dev_info(&pdev->dev, "no PCI Express capability\n");
 
-       /* Unneeded ? Don't mess with Mrs. Murphy. */
-       rtl8169_irq_mask_and_ack(ioaddr);
+       RTL_W16(IntrMask, 0x0000);
 
        /* Soft reset the chip. */
        RTL_W8(ChipCmd, CmdReset);
@@ -2088,6 +2087,8 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
                msleep_interruptible(1);
        }
 
+       RTL_W16(IntrStatus, 0xffff);
+
        /* Identify chip attached to board */
        rtl8169_get_mac_version(tp, ioaddr);
 
index 00c23b1babcad720154fe7f73b346cddc1b3b3f9..dee23b159df2b26deff21e9d18c70339ace15daf 100644 (file)
@@ -448,6 +448,9 @@ static void efx_init_channels(struct efx_nic *efx)
 
                WARN_ON(channel->rx_pkt != NULL);
                efx_rx_strategy(channel);
+
+               netif_napi_add(channel->napi_dev, &channel->napi_str,
+                              efx_poll, napi_weight);
        }
 }
 
@@ -462,10 +465,6 @@ static void efx_start_channel(struct efx_channel *channel)
 
        EFX_LOG(channel->efx, "starting chan %d\n", channel->channel);
 
-       if (!(channel->efx->net_dev->flags & IFF_UP))
-               netif_napi_add(channel->napi_dev, &channel->napi_str,
-                              efx_poll, napi_weight);
-
        /* The interrupt handler for this channel may set work_pending
         * as soon as we enable it.  Make sure it's cleared before
         * then.  Similarly, make sure it sees the enabled flag set. */
index b52a1c088f37717ff19e82df83ee0bd4743bd352..d91e95b237b7822f1442c97d3533b576bcf88dbd 100644 (file)
@@ -1908,7 +1908,7 @@ static int tc35815_poll(struct napi_struct *napi, int budget)
        do {
                tc_writel(status, &tr->Int_Src);        /* write to clear */
 
-               handled = tc35815_do_interrupt(dev, status, limit);
+               handled = tc35815_do_interrupt(dev, status, budget - received);
                if (handled >= 0) {
                        received += handled;
                        if (received >= budget)
index 4a65fc2dd9282ffef9dc72a92a559c90b85dd7e3..534c0f38483c3ea97cb47097182f817deab369db 100644 (file)
@@ -62,6 +62,7 @@
 #include <linux/pci.h>
 #include <linux/spinlock.h>
 #include <linux/bitops.h>
+#include <linux/firmware.h>
 
 #include <net/checksum.h>
 
 static char version[] __devinitdata  = 
 "3c359.c v1.2.0 2/17/01 - Mike Phillips (mikep@linuxtr.net)" ; 
 
+#define FW_NAME                "3com/3C359.bin"
 MODULE_AUTHOR("Mike Phillips <mikep@linuxtr.net>") ; 
 MODULE_DESCRIPTION("3Com 3C359 Velocity XL Token Ring Adapter Driver \n") ;
+MODULE_FIRMWARE(FW_NAME);
 
 /* Module paramters */
 
@@ -114,8 +117,6 @@ MODULE_PARM_DESC(message_level, "3c359: Level of reported messages") ;
  *     will be stuck with 1555 lines of hex #'s in the code.
  */
 
-#include "3c359_microcode.h" 
-
 static struct pci_device_id xl_pci_tbl[] =
 {
        {PCI_VENDOR_ID_3COM,PCI_DEVICE_ID_3COM_3C359, PCI_ANY_ID, PCI_ANY_ID, },
@@ -364,10 +365,30 @@ static int __devinit xl_probe(struct pci_dev *pdev,
        return 0; 
 }
 
+static int xl_init_firmware(struct xl_private *xl_priv)
+{
+       int err;
+
+       err = request_firmware(&xl_priv->fw, FW_NAME, &xl_priv->pdev->dev);
+       if (err) {
+               printk(KERN_ERR "Failed to load firmware \"%s\"\n", FW_NAME);
+               return err;
+       }
+
+       if (xl_priv->fw->size < 16) {
+               printk(KERN_ERR "Bogus length %zu in \"%s\"\n",
+                      xl_priv->fw->size, FW_NAME);
+               release_firmware(xl_priv->fw);
+               err = -EINVAL;
+       }
+
+       return err;
+}
 
 static int __devinit xl_init(struct net_device *dev) 
 {
        struct xl_private *xl_priv = netdev_priv(dev);
+       int err;
 
        printk(KERN_INFO "%s \n", version);
        printk(KERN_INFO "%s: I/O at %hx, MMIO at %p, using irq %d\n",
@@ -375,8 +396,11 @@ static int __devinit xl_init(struct net_device *dev)
 
        spin_lock_init(&xl_priv->xl_lock) ; 
 
-       return xl_hw_reset(dev) ; 
+       err = xl_init_firmware(xl_priv);
+       if (err == 0)
+               err = xl_hw_reset(dev);
 
+       return err;
 }
 
 
@@ -386,7 +410,7 @@ static int __devinit xl_init(struct net_device *dev)
  */
 
 static int xl_hw_reset(struct net_device *dev) 
-{ 
+{
        struct xl_private *xl_priv = netdev_priv(dev);
        u8 __iomem *xl_mmio = xl_priv->xl_mmio ; 
        unsigned long t ; 
@@ -396,6 +420,9 @@ static int xl_hw_reset(struct net_device *dev)
        u16 start ; 
        int j ;
 
+       if (xl_priv->fw == NULL)
+               return -EINVAL;
+
        /*
         *  Reset the card.  If the card has got the microcode on board, we have 
          *  missed the initialization interrupt, so we must always do this.
@@ -458,25 +485,30 @@ static int xl_hw_reset(struct net_device *dev)
 
                /* 
                 * Now to write the microcode into the shared ram 
-                * The microcode must finish at position 0xFFFF, so we must subtract
-                * to get the start position for the code
+                * The microcode must finish at position 0xFFFF,
+                * so we must subtract to get the start position for the code
+                *
+                * Looks strange but ensures compiler only uses
+                * 16 bit unsigned int
                 */
+               start = (0xFFFF - (xl_priv->fw->size) + 1) ;
 
-               start = (0xFFFF - (mc_size) + 1 ) ; /* Looks strange but ensures compiler only uses 16 bit unsigned int for this */ 
-               
                printk(KERN_INFO "3C359: Uploading Microcode: "); 
-               
-               for (i = start, j = 0; j < mc_size; i++, j++) { 
-                       writel(MEM_BYTE_WRITE | 0XD0000 | i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
-                       writeb(microcode[j],xl_mmio + MMIO_MACDATA) ; 
+
+               for (i = start, j = 0; j < xl_priv->fw->size; i++, j++) {
+                       writel(MEM_BYTE_WRITE | 0XD0000 | i,
+                              xl_mmio + MMIO_MAC_ACCESS_CMD);
+                       writeb(xl_priv->fw->data[j], xl_mmio + MMIO_MACDATA);
                        if (j % 1024 == 0)
                                printk(".");
                }
                printk("\n") ; 
 
-               for (i=0;i < 16; i++) { 
-                       writel( (MEM_BYTE_WRITE | 0xDFFF0) + i, xl_mmio + MMIO_MAC_ACCESS_CMD) ; 
-                       writeb(microcode[mc_size - 16 + i], xl_mmio + MMIO_MACDATA) ; 
+               for (i = 0; i < 16; i++) {
+                       writel((MEM_BYTE_WRITE | 0xDFFF0) + i,
+                              xl_mmio + MMIO_MAC_ACCESS_CMD);
+                       writeb(xl_priv->fw->data[xl_priv->fw->size - 16 + i],
+                              xl_mmio + MMIO_MACDATA);
                }
 
                /*
@@ -1782,6 +1814,7 @@ static void __devexit xl_remove_one (struct pci_dev *pdev)
        struct net_device *dev = pci_get_drvdata(pdev);
        struct xl_private *xl_priv=netdev_priv(dev);
        
+       release_firmware(xl_priv->fw);
        unregister_netdev(dev);
        iounmap(xl_priv->xl_mmio) ; 
        pci_release_regions(pdev) ; 
index 66b1ff603234774b1b4a1247af34dc4486afce9c..bcb1a6b4a4c774799a9db2e0d7d10dc3e743ee46 100644 (file)
@@ -284,5 +284,8 @@ struct xl_private {
        u8 xl_laa[6] ; 
        u32 rx_ring_dma_addr ; 
        u32 tx_ring_dma_addr ; 
+
+       /* firmware section */
+       const struct firmware *fw;
 };
 
diff --git a/drivers/net/tokenring/3c359_microcode.h b/drivers/net/tokenring/3c359_microcode.h
deleted file mode 100644 (file)
index 0400c02..0000000
+++ /dev/null
@@ -1,1581 +0,0 @@
-
-/*
- * The firmware this driver downloads into the tokenring card is a
- * separate program and is not GPL'd source code, even though the Linux
- * side driver and the routine that loads this data into the card are.
- *
- * This firmware is licensed to you strictly for use in conjunction
- * with the use of 3Com 3C359 TokenRing adapters. There is no
- * waranty expressed or implied about its fitness for any purpose.
- */
-
-/* 3c359_microcode.mac: 3Com 3C359 Tokenring microcode.
- *
- * Notes:
- *  - Loaded from xl_init upon adapter initialization.
- *
- * Available from 3Com as part of their standard 3C359 driver. 
- *
- * mc_size *must* must match the microcode being used, each version is a 
- * different length.
- */
-
-static int mc_size = 24880 ; 
-
-static const u8 microcode[] = { 
- 0xfe,0x3a,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x33,0x2f,0x30,0x32,0x2f,0x39,0x39,0x20,0x31
-,0x37,0x3a,0x31,0x33,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x41,0x42,0x43,0x44,0x45,0x46
-,0x00,0x00,0x07,0xff,0x02,0x00,0xfe,0x9f,0x06,0x00,0x00,0x7c,0x48,0x00,0x00,0x70
-,0x82,0x00,0xff,0xff,0x86,0x00,0xff,0xff,0x88,0x00,0xff,0xff,0x9a,0x00,0xff,0xff
-,0xff,0xff,0x11,0x00,0xc0,0x00,0xff,0xff,0xff,0xff,0x11,0x22,0x33,0x44,0x55,0x66
-,0x33,0x43,0x4f,0x4d,0x20,0x42,0x41,0x42,0x45,0x11,0x40,0xc0,0x00,0xff,0xff,0xff
-,0xff,0x11,0x22,0x33,0x44,0x55,0x66,0x53,0x74,0x61,0x72,0x74,0x20,0x6f,0x66,0x20
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-,0x78,0x78,0x20,0x20,0x20,0x42,0x41,0x42,0x45,0xe8,0xd2,0x01,0x83,0x3e,0xf7,0x34
-,0x00,0x75,0x21,0xe8,0x41,0x00,0x83,0x3e,0xf7,0x34,0x00,0x75,0x17,0xe8,0x82,0x00
-,0x83,0x3e,0xf7,0x34,0x00,0x75,0x0d,0xe8,0xbf,0x00,0x83,0x3e,0xf7,0x34,0x00,0x75
-,0x03,0xe8,0x41,0x02,0xc3,0x1e,0xb8,0x00,0xf0,0x8e,0xd8,0x33,0xf6,0xb9,0x00,0x80
-,0x33,0xdb,0xad,0x03,0xd8,0xe2,0xfb,0x1f,0xb8,0x00,0x00,0x83,0xfb,0x00,0x74,0x03
-,0xb8,0x22,0x00,0xa3,0xf7,0x34,0xc3,0xfa,0xba,0x56,0x00,0xb0,0xff,0xee,0x33,0xc0
-,0x8e,0xc0,0x33,0xf6,0xb9,0xff,0x7f,0x83,0x3e,0xff,0x34,0x00,0x74,0x08,0x8d,0x3e
-,0x30,0x61,0xd1,0xef,0x2b,0xcf,0x26,0x8b,0x1c,0x26,0xc7,0x04,0xff,0xff,0x26,0x83
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-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00
-,0x90,0xea,0xc0,0x15,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x13,0x06
-} ;  
index 933fcfbf35e1ea332e29081b6ab84bd64a2fca5e..d3f39e86eb95a14cb8cad1b1120377fa5a3b80dc 100644 (file)
@@ -24,7 +24,6 @@
 #include <linux/spinlock.h>
 #include <linux/mm.h>
 #include <linux/dma-mapping.h>
-#include <linux/fsl_devices.h>
 #include <linux/mii.h>
 #include <linux/phy.h>
 #include <linux/workqueue.h>
@@ -223,10 +222,10 @@ static struct sk_buff *get_new_skb(struct ucc_geth_private *ugeth,
                    (((unsigned)skb->data) & (UCC_GETH_RX_DATA_BUF_ALIGNMENT -
                                              1)));
 
-       skb->dev = ugeth->dev;
+       skb->dev = ugeth->ndev;
 
        out_be32(&((struct qe_bd __iomem *)bd)->buf,
-                     dma_map_single(&ugeth->dev->dev,
+                     dma_map_single(ugeth->dev,
                                     skb->data,
                                     ugeth->ug_info->uf_info.max_rx_buf_length +
                                     UCC_GETH_RX_DATA_BUF_ALIGNMENT,
@@ -1872,7 +1871,7 @@ static void ucc_geth_memclean(struct ucc_geth_private *ugeth)
                        continue;
                for (j = 0; j < ugeth->ug_info->bdRingLenTx[i]; j++) {
                        if (ugeth->tx_skbuff[i][j]) {
-                               dma_unmap_single(&ugeth->dev->dev,
+                               dma_unmap_single(ugeth->dev,
                                                 in_be32(&((struct qe_bd __iomem *)bd)->buf),
                                                 (in_be32((u32 __iomem *)bd) &
                                                  BD_LENGTH_MASK),
@@ -1900,7 +1899,7 @@ static void ucc_geth_memclean(struct ucc_geth_private *ugeth)
                        bd = ugeth->p_rx_bd_ring[i];
                        for (j = 0; j < ugeth->ug_info->bdRingLenRx[i]; j++) {
                                if (ugeth->rx_skbuff[i][j]) {
-                                       dma_unmap_single(&ugeth->dev->dev,
+                                       dma_unmap_single(ugeth->dev,
                                                in_be32(&((struct qe_bd __iomem *)bd)->buf),
                                                ugeth->ug_info->
                                                uf_info.max_rx_buf_length +
@@ -3071,7 +3070,7 @@ static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev)
 
        /* set up the buffer descriptor */
        out_be32(&((struct qe_bd __iomem *)bd)->buf,
-                     dma_map_single(&ugeth->dev->dev, skb->data,
+                     dma_map_single(ugeth->dev, skb->data,
                              skb->len, DMA_TO_DEVICE));
 
        /* printk(KERN_DEBUG"skb->data is 0x%x\n",skb->data); */
@@ -3127,7 +3126,7 @@ static int ucc_geth_rx(struct ucc_geth_private *ugeth, u8 rxQ, int rx_work_limit
 
        ugeth_vdbg("%s: IN", __func__);
 
-       dev = ugeth->dev;
+       dev = ugeth->ndev;
 
        /* collect received buffers */
        bd = ugeth->rxBd[rxQ];
@@ -3161,7 +3160,7 @@ static int ucc_geth_rx(struct ucc_geth_private *ugeth, u8 rxQ, int rx_work_limit
                        skb_put(skb, length);
 
                        /* Tell the skb what kind of packet this is */
-                       skb->protocol = eth_type_trans(skb, ugeth->dev);
+                       skb->protocol = eth_type_trans(skb, ugeth->ndev);
 
                        dev->stats.rx_bytes += length;
                        /* Send the packet up the stack */
@@ -3432,7 +3431,7 @@ static int ucc_geth_close(struct net_device *dev)
 
        ucc_geth_stop(ugeth);
 
-       free_irq(ugeth->ug_info->uf_info.irq, ugeth->dev);
+       free_irq(ugeth->ug_info->uf_info.irq, ugeth->ndev);
 
        netif_stop_queue(dev);
 
@@ -3446,7 +3445,7 @@ static void ucc_geth_timeout_work(struct work_struct *work)
        struct net_device *dev;
 
        ugeth = container_of(work, struct ucc_geth_private, timeout_work);
-       dev = ugeth->dev;
+       dev = ugeth->ndev;
 
        ugeth_vdbg("%s: IN", __func__);
 
@@ -3756,7 +3755,8 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma
                memcpy(dev->dev_addr, mac_addr, 6);
 
        ugeth->ug_info = ug_info;
-       ugeth->dev = dev;
+       ugeth->dev = device;
+       ugeth->ndev = dev;
        ugeth->node = np;
 
        return 0;
index e3a25e64a6525f38a2329125b09e01bb116e8ae2..2f8ee7c87efe944e6e788e861ee407ce97018a59 100644 (file)
@@ -20,7 +20,6 @@
 
 #include <linux/kernel.h>
 #include <linux/list.h>
-#include <linux/fsl_devices.h>
 
 #include <asm/immap_qe.h>
 #include <asm/qe.h>
@@ -1129,7 +1128,8 @@ struct ucc_geth_info {
 struct ucc_geth_private {
        struct ucc_geth_info *ug_info;
        struct ucc_fast_private *uccf;
-       struct net_device *dev;
+       struct device *dev;
+       struct net_device *ndev;
        struct napi_struct napi;
        struct work_struct timeout_work;
        struct ucc_geth __iomem *ug_regs;
index a755bea559b98deb9d091c95eba19db84642a732..6fcb500257bc37c6b330b86c6cca19a747ad440b 100644 (file)
@@ -28,7 +28,6 @@
 #include <linux/mm.h>
 #include <linux/delay.h>
 #include <linux/dma-mapping.h>
-#include <linux/fsl_devices.h>
 #include <linux/ethtool.h>
 #include <linux/mii.h>
 #include <linux/phy.h>
index cde423c6d040d1174bc88571802f52ad94d50e85..f84b78d94c400f0533a34a1a568b9e6507f0a1f0 100644 (file)
@@ -5,6 +5,7 @@
  *  Copyright (C) 2008 Option International
  *                     Filip Aben <f.aben@option.com>
  *                     Denis Joseph Barrow <d.barow@option.com>
+ *                     Jan Dumon <j.dumon@option.com>
  *  Copyright (C) 2007 Andrew Bird (Sphere Systems Ltd)
  *                     <ajb@spheresystems.co.uk>
  *  Copyright (C) 2008 Greg Kroah-Hartman <gregkh@suse.de>
@@ -462,9 +463,16 @@ static const struct usb_device_id hso_ids[] = {
        {USB_DEVICE(0x0af0, 0x7701)},
        {USB_DEVICE(0x0af0, 0x7801)},
        {USB_DEVICE(0x0af0, 0x7901)},
-       {USB_DEVICE(0x0af0, 0x7361)},
-       {USB_DEVICE(0x0af0, 0xd057)},
+       {USB_DEVICE(0x0af0, 0x8200)},
+       {USB_DEVICE(0x0af0, 0x8201)},
+       {USB_DEVICE(0x0af0, 0xd035)},
        {USB_DEVICE(0x0af0, 0xd055)},
+       {USB_DEVICE(0x0af0, 0xd155)},
+       {USB_DEVICE(0x0af0, 0xd255)},
+       {USB_DEVICE(0x0af0, 0xd057)},
+       {USB_DEVICE(0x0af0, 0xd157)},
+       {USB_DEVICE(0x0af0, 0xd257)},
+       {USB_DEVICE(0x0af0, 0xd357)},
        {}
 };
 MODULE_DEVICE_TABLE(usb, hso_ids);
@@ -2410,20 +2418,22 @@ static void hso_free_net_device(struct hso_device *hso_dev)
        if (!hso_net)
                return;
 
+       remove_net_device(hso_net->parent);
+
+       if (hso_net->net) {
+               unregister_netdev(hso_net->net);
+               free_netdev(hso_net->net);
+       }
+
        /* start freeing */
        for (i = 0; i < MUX_BULK_RX_BUF_COUNT; i++) {
                usb_free_urb(hso_net->mux_bulk_rx_urb_pool[i]);
                kfree(hso_net->mux_bulk_rx_buf_pool[i]);
+               hso_net->mux_bulk_rx_buf_pool[i] = NULL;
        }
        usb_free_urb(hso_net->mux_bulk_tx_urb);
        kfree(hso_net->mux_bulk_tx_buf);
-
-       remove_net_device(hso_net->parent);
-
-       if (hso_net->net) {
-               unregister_netdev(hso_net->net);
-               free_netdev(hso_net->net);
-       }
+       hso_net->mux_bulk_tx_buf = NULL;
 
        kfree(hso_dev);
 }
@@ -2526,14 +2536,15 @@ static void hso_create_rfkill(struct hso_device *hso_dev,
 }
 
 /* Creates our network device */
-static struct hso_device *hso_create_net_device(struct usb_interface *interface)
+static struct hso_device *hso_create_net_device(struct usb_interface *interface,
+                                               int port_spec)
 {
        int result, i;
        struct net_device *net;
        struct hso_net *hso_net;
        struct hso_device *hso_dev;
 
-       hso_dev = hso_create_device(interface, HSO_INTF_MUX | HSO_PORT_NETWORK);
+       hso_dev = hso_create_device(interface, port_spec);
        if (!hso_dev)
                return NULL;
 
@@ -2613,12 +2624,12 @@ static void hso_free_tiomget(struct hso_serial *serial)
 {
        struct hso_tiocmget *tiocmget = serial->tiocmget;
        if (tiocmget) {
-               kfree(tiocmget);
                if (tiocmget->urb) {
                        usb_free_urb(tiocmget->urb);
                        tiocmget->urb = NULL;
                }
                serial->tiocmget = NULL;
+               kfree(tiocmget);
 
        }
 }
@@ -2933,7 +2944,8 @@ static int hso_probe(struct usb_interface *interface,
                if ((port_spec & HSO_PORT_MASK) == HSO_PORT_NETWORK) {
                        /* Create the network device */
                        if (!disable_net) {
-                               hso_dev = hso_create_net_device(interface);
+                               hso_dev = hso_create_net_device(interface,
+                                                               port_spec);
                                if (!hso_dev)
                                        goto exit;
                                tmp_dev = hso_dev;
@@ -2965,7 +2977,7 @@ static int hso_probe(struct usb_interface *interface,
                /* It's a regular bulk interface */
                if (((port_spec & HSO_PORT_MASK) == HSO_PORT_NETWORK)
                    && !disable_net)
-                       hso_dev = hso_create_net_device(interface);
+                       hso_dev = hso_create_net_device(interface, port_spec);
                else
                        hso_dev =
                            hso_create_bulk_serial_device(interface, port_spec);
index 7cb10a0a53164dc45650a7225ae95c38e4517557..3d0d0b0b37c53d71be8396e3a2a2965bcaf01edd 100644 (file)
@@ -36,7 +36,6 @@
  * Run test procedures
  * Fix bugs from previous two steps
  * Snoop other OSs for any tricks we're not doing
- * SMP locking
  * Reduce arbitrary timeouts
  * Smart multicast support
  * Temporary MAC change support
@@ -796,7 +795,7 @@ static int kaweth_start_xmit(struct sk_buff *skb, struct net_device *net)
 
        int res;
 
-       spin_lock(&kaweth->device_lock);
+       spin_lock_irq(&kaweth->device_lock);
 
        kaweth_async_set_rx_mode(kaweth);
        netif_stop_queue(net);
@@ -814,7 +813,7 @@ static int kaweth_start_xmit(struct sk_buff *skb, struct net_device *net)
                if (!copied_skb) {
                        kaweth->stats.tx_errors++;
                        netif_start_queue(net);
-                       spin_unlock(&kaweth->device_lock);
+                       spin_unlock_irq(&kaweth->device_lock);
                        return 0;
                }
        }
@@ -848,7 +847,7 @@ skip:
                net->trans_start = jiffies;
        }
 
-       spin_unlock(&kaweth->device_lock);
+       spin_unlock_irq(&kaweth->device_lock);
 
        return 0;
 }
diff --git a/drivers/net/vxge/Makefile b/drivers/net/vxge/Makefile
new file mode 100644 (file)
index 0000000..8992ca2
--- /dev/null
@@ -0,0 +1,7 @@
+#
+# Makefile for Neterion Inc's X3100 Series 10 GbE PCIe # I/O
+# Virtualized Server Adapter linux driver
+
+obj-$(CONFIG_VXGE) += vxge.o
+
+vxge-objs := vxge-config.o vxge-traffic.o vxge-ethtool.o vxge-main.o
diff --git a/drivers/net/vxge/vxge-config.c b/drivers/net/vxge/vxge-config.c
new file mode 100644 (file)
index 0000000..6b41c88
--- /dev/null
@@ -0,0 +1,5264 @@
+/******************************************************************************
+ * This software may be used and distributed according to the terms of
+ * the GNU General Public License (GPL), incorporated herein by reference.
+ * Drivers based on or derived from this code fall under the GPL and must
+ * retain the authorship, copyright and license notice.  This file is not
+ * a complete program and may only be used when the entire operating
+ * system is licensed under the GPL.
+ * See the file COPYING in this distribution for more information.
+ *
+ * vxge-config.c: Driver for Neterion Inc's X3100 Series 10GbE PCIe I/O
+ *                Virtualized Server Adapter.
+ * Copyright(c) 2002-2009 Neterion Inc.
+ ******************************************************************************/
+#include <linux/vmalloc.h>
+#include <linux/etherdevice.h>
+#include <linux/pci.h>
+#include <linux/pci_hotplug.h>
+
+#include "vxge-traffic.h"
+#include "vxge-config.h"
+
+/*
+ * __vxge_hw_channel_allocate - Allocate memory for channel
+ * This function allocates required memory for the channel and various arrays
+ * in the channel
+ */
+struct __vxge_hw_channel*
+__vxge_hw_channel_allocate(struct __vxge_hw_vpath_handle *vph,
+                          enum __vxge_hw_channel_type type,
+       u32 length, u32 per_dtr_space, void *userdata)
+{
+       struct __vxge_hw_channel *channel;
+       struct __vxge_hw_device *hldev;
+       int size = 0;
+       u32 vp_id;
+
+       hldev = vph->vpath->hldev;
+       vp_id = vph->vpath->vp_id;
+
+       switch (type) {
+       case VXGE_HW_CHANNEL_TYPE_FIFO:
+               size = sizeof(struct __vxge_hw_fifo);
+               break;
+       case VXGE_HW_CHANNEL_TYPE_RING:
+               size = sizeof(struct __vxge_hw_ring);
+               break;
+       default:
+               break;
+       }
+
+       channel = kzalloc(size, GFP_KERNEL);
+       if (channel == NULL)
+               goto exit0;
+       INIT_LIST_HEAD(&channel->item);
+
+       channel->common_reg = hldev->common_reg;
+       channel->first_vp_id = hldev->first_vp_id;
+       channel->type = type;
+       channel->devh = hldev;
+       channel->vph = vph;
+       channel->userdata = userdata;
+       channel->per_dtr_space = per_dtr_space;
+       channel->length = length;
+       channel->vp_id = vp_id;
+
+       channel->work_arr = kzalloc(sizeof(void *)*length, GFP_KERNEL);
+       if (channel->work_arr == NULL)
+               goto exit1;
+
+       channel->free_arr = kzalloc(sizeof(void *)*length, GFP_KERNEL);
+       if (channel->free_arr == NULL)
+               goto exit1;
+       channel->free_ptr = length;
+
+       channel->reserve_arr = kzalloc(sizeof(void *)*length, GFP_KERNEL);
+       if (channel->reserve_arr == NULL)
+               goto exit1;
+       channel->reserve_ptr = length;
+       channel->reserve_top = 0;
+
+       channel->orig_arr = kzalloc(sizeof(void *)*length, GFP_KERNEL);
+       if (channel->orig_arr == NULL)
+               goto exit1;
+
+       return channel;
+exit1:
+       __vxge_hw_channel_free(channel);
+
+exit0:
+       return NULL;
+}
+
+/*
+ * __vxge_hw_channel_free - Free memory allocated for channel
+ * This function deallocates memory from the channel and various arrays
+ * in the channel
+ */
+void __vxge_hw_channel_free(struct __vxge_hw_channel *channel)
+{
+       kfree(channel->work_arr);
+       kfree(channel->free_arr);
+       kfree(channel->reserve_arr);
+       kfree(channel->orig_arr);
+       kfree(channel);
+}
+
+/*
+ * __vxge_hw_channel_initialize - Initialize a channel
+ * This function initializes a channel by properly setting the
+ * various references
+ */
+enum vxge_hw_status
+__vxge_hw_channel_initialize(struct __vxge_hw_channel *channel)
+{
+       u32 i;
+       struct __vxge_hw_virtualpath *vpath;
+
+       vpath = channel->vph->vpath;
+
+       if ((channel->reserve_arr != NULL) && (channel->orig_arr != NULL)) {
+               for (i = 0; i < channel->length; i++)
+                       channel->orig_arr[i] = channel->reserve_arr[i];
+       }
+
+       switch (channel->type) {
+       case VXGE_HW_CHANNEL_TYPE_FIFO:
+               vpath->fifoh = (struct __vxge_hw_fifo *)channel;
+               channel->stats = &((struct __vxge_hw_fifo *)
+                               channel)->stats->common_stats;
+               break;
+       case VXGE_HW_CHANNEL_TYPE_RING:
+               vpath->ringh = (struct __vxge_hw_ring *)channel;
+               channel->stats = &((struct __vxge_hw_ring *)
+                               channel)->stats->common_stats;
+               break;
+       default:
+               break;
+       }
+
+       return VXGE_HW_OK;
+}
+
+/*
+ * __vxge_hw_channel_reset - Resets a channel
+ * This function resets a channel by properly setting the various references
+ */
+enum vxge_hw_status
+__vxge_hw_channel_reset(struct __vxge_hw_channel *channel)
+{
+       u32 i;
+
+       for (i = 0; i < channel->length; i++) {
+               if (channel->reserve_arr != NULL)
+                       channel->reserve_arr[i] = channel->orig_arr[i];
+               if (channel->free_arr != NULL)
+                       channel->free_arr[i] = NULL;
+               if (channel->work_arr != NULL)
+                       channel->work_arr[i] = NULL;
+       }
+       channel->free_ptr = channel->length;
+       channel->reserve_ptr = channel->length;
+       channel->reserve_top = 0;
+       channel->post_index = 0;
+       channel->compl_index = 0;
+
+       return VXGE_HW_OK;
+}
+
+/*
+ * __vxge_hw_device_pci_e_init
+ * Initialize certain PCI/PCI-X configuration registers
+ * with recommended values. Save config space for future hw resets.
+ */
+void
+__vxge_hw_device_pci_e_init(struct __vxge_hw_device *hldev)
+{
+       u16 cmd = 0;
+
+       /* Set the PErr Repconse bit and SERR in PCI command register. */
+       pci_read_config_word(hldev->pdev, PCI_COMMAND, &cmd);
+       cmd |= 0x140;
+       pci_write_config_word(hldev->pdev, PCI_COMMAND, cmd);
+
+       pci_save_state(hldev->pdev);
+
+       return;
+}
+
+/*
+ * __vxge_hw_device_register_poll
+ * Will poll certain register for specified amount of time.
+ * Will poll until masked bit is not cleared.
+ */
+enum vxge_hw_status
+__vxge_hw_device_register_poll(void __iomem *reg, u64 mask, u32 max_millis)
+{
+       u64 val64;
+       u32 i = 0;
+       enum vxge_hw_status ret = VXGE_HW_FAIL;
+
+       udelay(10);
+
+       do {
+               val64 = readq(reg);
+               if (!(val64 & mask))
+                       return VXGE_HW_OK;
+               udelay(100);
+       } while (++i <= 9);
+
+       i = 0;
+       do {
+               val64 = readq(reg);
+               if (!(val64 & mask))
+                       return VXGE_HW_OK;
+               mdelay(1);
+       } while (++i <= max_millis);
+
+       return ret;
+}
+
+ /* __vxge_hw_device_vpath_reset_in_prog_check - Check if vpath reset
+ * in progress
+ * This routine checks the vpath reset in progress register is turned zero
+ */
+enum vxge_hw_status
+__vxge_hw_device_vpath_reset_in_prog_check(u64 __iomem *vpath_rst_in_prog)
+{
+       enum vxge_hw_status status;
+       status = __vxge_hw_device_register_poll(vpath_rst_in_prog,
+                       VXGE_HW_VPATH_RST_IN_PROG_VPATH_RST_IN_PROG(0x1ffff),
+                       VXGE_HW_DEF_DEVICE_POLL_MILLIS);
+       return status;
+}
+
+/*
+ * __vxge_hw_device_toc_get
+ * This routine sets the swapper and reads the toc pointer and returns the
+ * memory mapped address of the toc
+ */
+struct vxge_hw_toc_reg __iomem *
+__vxge_hw_device_toc_get(void __iomem *bar0)
+{
+       u64 val64;
+       struct vxge_hw_toc_reg __iomem *toc = NULL;
+       enum vxge_hw_status status;
+
+       struct vxge_hw_legacy_reg __iomem *legacy_reg =
+               (struct vxge_hw_legacy_reg __iomem *)bar0;
+
+       status = __vxge_hw_legacy_swapper_set(legacy_reg);
+       if (status != VXGE_HW_OK)
+               goto exit;
+
+       val64 = readq(&legacy_reg->toc_first_pointer);
+       toc = (struct vxge_hw_toc_reg __iomem *)(bar0+val64);
+exit:
+       return toc;
+}
+
+/*
+ * __vxge_hw_device_reg_addr_get
+ * This routine sets the swapper and reads the toc pointer and initializes the
+ * register location pointers in the device object. It waits until the ric is
+ * completed initializing registers.
+ */
+enum vxge_hw_status
+__vxge_hw_device_reg_addr_get(struct __vxge_hw_device *hldev)
+{
+       u64 val64;
+       u32 i;
+       enum vxge_hw_status status = VXGE_HW_OK;
+
+       hldev->legacy_reg = (struct vxge_hw_legacy_reg __iomem *)hldev->bar0;
+
+       hldev->toc_reg = __vxge_hw_device_toc_get(hldev->bar0);
+       if (hldev->toc_reg  == NULL) {
+               status = VXGE_HW_FAIL;
+               goto exit;
+       }
+
+       val64 = readq(&hldev->toc_reg->toc_common_pointer);
+       hldev->common_reg =
+       (struct vxge_hw_common_reg __iomem *)(hldev->bar0 + val64);
+
+       val64 = readq(&hldev->toc_reg->toc_mrpcim_pointer);
+       hldev->mrpcim_reg =
+               (struct vxge_hw_mrpcim_reg __iomem *)(hldev->bar0 + val64);
+
+       for (i = 0; i < VXGE_HW_TITAN_SRPCIM_REG_SPACES; i++) {
+               val64 = readq(&hldev->toc_reg->toc_srpcim_pointer[i]);
+               hldev->srpcim_reg[i] =
+                       (struct vxge_hw_srpcim_reg __iomem *)
+                               (hldev->bar0 + val64);
+       }
+
+       for (i = 0; i < VXGE_HW_TITAN_VPMGMT_REG_SPACES; i++) {
+               val64 = readq(&hldev->toc_reg->toc_vpmgmt_pointer[i]);
+               hldev->vpmgmt_reg[i] =
+               (struct vxge_hw_vpmgmt_reg __iomem *)(hldev->bar0 + val64);
+       }
+
+       for (i = 0; i < VXGE_HW_TITAN_VPATH_REG_SPACES; i++) {
+               val64 = readq(&hldev->toc_reg->toc_vpath_pointer[i]);
+               hldev->vpath_reg[i] =
+                       (struct vxge_hw_vpath_reg __iomem *)
+                               (hldev->bar0 + val64);
+       }
+
+       val64 = readq(&hldev->toc_reg->toc_kdfc);
+
+       switch (VXGE_HW_TOC_GET_KDFC_INITIAL_BIR(val64)) {
+       case 0:
+               hldev->kdfc = (u8 __iomem *)(hldev->bar0 +
+                       VXGE_HW_TOC_GET_KDFC_INITIAL_OFFSET(val64));
+               break;
+       case 2:
+               hldev->kdfc = (u8 __iomem *)(hldev->bar1 +
+                       VXGE_HW_TOC_GET_KDFC_INITIAL_OFFSET(val64));
+               break;
+       case 4:
+               hldev->kdfc = (u8 __iomem *)(hldev->bar2 +
+                       VXGE_HW_TOC_GET_KDFC_INITIAL_OFFSET(val64));
+               break;
+       default:
+               break;
+       }
+
+       status = __vxge_hw_device_vpath_reset_in_prog_check(
+                       (u64 __iomem *)&hldev->common_reg->vpath_rst_in_prog);
+exit:
+       return status;
+}
+
+/*
+ * __vxge_hw_device_id_get
+ * This routine returns sets the device id and revision numbers into the device
+ * structure
+ */
+void __vxge_hw_device_id_get(struct __vxge_hw_device *hldev)
+{
+       u64 val64;
+
+       val64 = readq(&hldev->common_reg->titan_asic_id);
+       hldev->device_id =
+               (u16)VXGE_HW_TITAN_ASIC_ID_GET_INITIAL_DEVICE_ID(val64);
+
+       hldev->major_revision =
+               (u8)VXGE_HW_TITAN_ASIC_ID_GET_INITIAL_MAJOR_REVISION(val64);
+
+       hldev->minor_revision =
+               (u8)VXGE_HW_TITAN_ASIC_ID_GET_INITIAL_MINOR_REVISION(val64);
+
+       return;
+}
+
+/*
+ * __vxge_hw_device_access_rights_get: Get Access Rights of the driver
+ * This routine returns the Access Rights of the driver
+ */
+static u32
+__vxge_hw_device_access_rights_get(u32 host_type, u32 func_id)
+{
+       u32 access_rights = VXGE_HW_DEVICE_ACCESS_RIGHT_VPATH;
+
+       switch (host_type) {
+       case VXGE_HW_NO_MR_NO_SR_NORMAL_FUNCTION:
+               if (func_id == 0) {
+                       access_rights |= VXGE_HW_DEVICE_ACCESS_RIGHT_MRPCIM |
+                                       VXGE_HW_DEVICE_ACCESS_RIGHT_SRPCIM;
+               }
+               break;
+       case VXGE_HW_MR_NO_SR_VH0_BASE_FUNCTION:
+               access_rights |= VXGE_HW_DEVICE_ACCESS_RIGHT_MRPCIM |
+                               VXGE_HW_DEVICE_ACCESS_RIGHT_SRPCIM;
+               break;
+       case VXGE_HW_NO_MR_SR_VH0_FUNCTION0:
+               access_rights |= VXGE_HW_DEVICE_ACCESS_RIGHT_MRPCIM |
+                               VXGE_HW_DEVICE_ACCESS_RIGHT_SRPCIM;
+               break;
+       case VXGE_HW_NO_MR_SR_VH0_VIRTUAL_FUNCTION:
+       case VXGE_HW_SR_VH_VIRTUAL_FUNCTION:
+       case VXGE_HW_MR_SR_VH0_INVALID_CONFIG:
+               break;
+       case VXGE_HW_SR_VH_FUNCTION0:
+       case VXGE_HW_VH_NORMAL_FUNCTION:
+               access_rights |= VXGE_HW_DEVICE_ACCESS_RIGHT_SRPCIM;
+               break;
+       }
+
+       return access_rights;
+}
+/*
+ * __vxge_hw_device_host_info_get
+ * This routine returns the host type assignments
+ */
+void __vxge_hw_device_host_info_get(struct __vxge_hw_device *hldev)
+{
+       u64 val64;
+       u32 i;
+
+       val64 = readq(&hldev->common_reg->host_type_assignments);
+
+       hldev->host_type =
+          (u32)VXGE_HW_HOST_TYPE_ASSIGNMENTS_GET_HOST_TYPE_ASSIGNMENTS(val64);
+
+       hldev->vpath_assignments = readq(&hldev->common_reg->vpath_assignments);
+
+       for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
+
+               if (!(hldev->vpath_assignments & vxge_mBIT(i)))
+                       continue;
+
+               hldev->func_id =
+                       __vxge_hw_vpath_func_id_get(i, hldev->vpmgmt_reg[i]);
+
+               hldev->access_rights = __vxge_hw_device_access_rights_get(
+                       hldev->host_type, hldev->func_id);
+
+               hldev->first_vp_id = i;
+               break;
+       }
+
+       return;
+}
+
+/*
+ * __vxge_hw_verify_pci_e_info - Validate the pci-e link parameters such as
+ * link width and signalling rate.
+ */
+static enum vxge_hw_status
+__vxge_hw_verify_pci_e_info(struct __vxge_hw_device *hldev)
+{
+       int exp_cap;
+       u16 lnk;
+
+       /* Get the negotiated link width and speed from PCI config space */
+       exp_cap = pci_find_capability(hldev->pdev, PCI_CAP_ID_EXP);
+       pci_read_config_word(hldev->pdev, exp_cap + PCI_EXP_LNKSTA, &lnk);
+
+       if ((lnk & PCI_EXP_LNKSTA_CLS) != 1)
+               return VXGE_HW_ERR_INVALID_PCI_INFO;
+
+       switch ((lnk & PCI_EXP_LNKSTA_NLW) >> 4) {
+       case PCIE_LNK_WIDTH_RESRV:
+       case PCIE_LNK_X1:
+       case PCIE_LNK_X2:
+       case PCIE_LNK_X4:
+       case PCIE_LNK_X8:
+               break;
+       default:
+               return VXGE_HW_ERR_INVALID_PCI_INFO;
+       }
+
+       return VXGE_HW_OK;
+}
+
+static enum vxge_hw_status
+__vxge_hw_device_is_privilaged(struct __vxge_hw_device *hldev)
+{
+       if ((hldev->host_type == VXGE_HW_NO_MR_NO_SR_NORMAL_FUNCTION ||
+       hldev->host_type == VXGE_HW_MR_NO_SR_VH0_BASE_FUNCTION ||
+       hldev->host_type == VXGE_HW_NO_MR_SR_VH0_FUNCTION0) &&
+       (hldev->func_id == 0))
+               return VXGE_HW_OK;
+       else
+               return VXGE_HW_ERR_PRIVILAGED_OPEARATION;
+}
+
+/*
+ * vxge_hw_wrr_rebalance - Rebalance the RX_WRR and KDFC_WRR calandars.
+ * Rebalance the RX_WRR and KDFC_WRR calandars.
+ */
+static enum
+vxge_hw_status vxge_hw_wrr_rebalance(struct __vxge_hw_device *hldev)
+{
+       u64 val64;
+       u32 wrr_states[VXGE_HW_WEIGHTED_RR_SERVICE_STATES];
+       u32 i, j, how_often = 1;
+       enum vxge_hw_status status = VXGE_HW_OK;
+
+       status = __vxge_hw_device_is_privilaged(hldev);
+       if (status != VXGE_HW_OK)
+               goto exit;
+
+       /* Reset the priorities assigned to the WRR arbitration
+       phases for the receive traffic */
+       for (i = 0; i < VXGE_HW_WRR_RING_COUNT; i++)
+               writeq(0, ((&hldev->mrpcim_reg->rx_w_round_robin_0) + i));
+
+       /* Reset the transmit FIFO servicing calendar for FIFOs */
+       for (i = 0; i < VXGE_HW_WRR_FIFO_COUNT; i++) {
+               writeq(0, ((&hldev->mrpcim_reg->kdfc_w_round_robin_0) + i));
+               writeq(0, ((&hldev->mrpcim_reg->kdfc_w_round_robin_20) + i));
+       }
+
+       /* Assign WRR priority  0 for all FIFOs */
+       for (i = 1; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
+               writeq(VXGE_HW_KDFC_FIFO_0_CTRL_WRR_NUMBER(0),
+                               ((&hldev->mrpcim_reg->kdfc_fifo_0_ctrl)  + i));
+
+               writeq(VXGE_HW_KDFC_FIFO_17_CTRL_WRR_NUMBER(0),
+                       ((&hldev->mrpcim_reg->kdfc_fifo_17_ctrl) + i));
+       }
+
+       /* Reset to service non-offload doorbells */
+       writeq(0, &hldev->mrpcim_reg->kdfc_entry_type_sel_0);
+       writeq(0, &hldev->mrpcim_reg->kdfc_entry_type_sel_1);
+
+       /* Set priority 0 to all receive queues */
+       writeq(0, &hldev->mrpcim_reg->rx_queue_priority_0);
+       writeq(0, &hldev->mrpcim_reg->rx_queue_priority_1);
+       writeq(0, &hldev->mrpcim_reg->rx_queue_priority_2);
+
+       /* Initialize all the slots as unused */
+       for (i = 0; i < VXGE_HW_WEIGHTED_RR_SERVICE_STATES; i++)
+               wrr_states[i] = -1;
+
+       /* Prepare the Fifo service states */
+       for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
+
+               if (!hldev->config.vp_config[i].min_bandwidth)
+                       continue;
+
+               how_often = VXGE_HW_VPATH_BANDWIDTH_MAX /
+                               hldev->config.vp_config[i].min_bandwidth;
+               if (how_often) {
+
+                       for (j = 0; j < VXGE_HW_WRR_FIFO_SERVICE_STATES;) {
+                               if (wrr_states[j] == -1) {
+                                       wrr_states[j] = i;
+                                       /* Make sure each fifo is serviced
+                                        * atleast once */
+                                       if (i == j)
+                                               j += VXGE_HW_MAX_VIRTUAL_PATHS;
+                                       else
+                                               j += how_often;
+                               } else
+                                       j++;
+                       }
+               }
+       }
+
+       /* Fill the unused slots with 0 */
+       for (j = 0; j < VXGE_HW_WEIGHTED_RR_SERVICE_STATES; j++) {
+               if (wrr_states[j] == -1)
+                       wrr_states[j] = 0;
+       }
+
+       /* Assign WRR priority number for FIFOs */
+       for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
+               writeq(VXGE_HW_KDFC_FIFO_0_CTRL_WRR_NUMBER(i),
+                               ((&hldev->mrpcim_reg->kdfc_fifo_0_ctrl) + i));
+
+               writeq(VXGE_HW_KDFC_FIFO_17_CTRL_WRR_NUMBER(i),
+                       ((&hldev->mrpcim_reg->kdfc_fifo_17_ctrl) + i));
+       }
+
+       /* Modify the servicing algorithm applied to the 3 types of doorbells.
+       i.e, none-offload, message and offload */
+       writeq(VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_0(0) |
+                               VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_1(0) |
+                               VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_2(0) |
+                               VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_3(0) |
+                               VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_4(1) |
+                               VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_5(0) |
+                               VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_6(0) |
+                               VXGE_HW_KDFC_ENTRY_TYPE_SEL_0_NUMBER_7(0),
+                               &hldev->mrpcim_reg->kdfc_entry_type_sel_0);
+
+       writeq(VXGE_HW_KDFC_ENTRY_TYPE_SEL_1_NUMBER_8(1),
+                               &hldev->mrpcim_reg->kdfc_entry_type_sel_1);
+
+       for (i = 0, j = 0; i < VXGE_HW_WRR_FIFO_COUNT; i++) {
+
+               val64 = VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_0(wrr_states[j++]);
+               val64 |= VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_1(wrr_states[j++]);
+               val64 |= VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_2(wrr_states[j++]);
+               val64 |= VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_3(wrr_states[j++]);
+               val64 |= VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_4(wrr_states[j++]);
+               val64 |= VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_5(wrr_states[j++]);
+               val64 |= VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_6(wrr_states[j++]);
+               val64 |= VXGE_HW_KDFC_W_ROUND_ROBIN_0_NUMBER_7(wrr_states[j++]);
+
+               writeq(val64, (&hldev->mrpcim_reg->kdfc_w_round_robin_0 + i));
+               writeq(val64, (&hldev->mrpcim_reg->kdfc_w_round_robin_20 + i));
+       }
+
+       /* Set up the priorities assigned to receive queues */
+       writeq(VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_0(0) |
+                       VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_1(1) |
+                       VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_2(2) |
+                       VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_3(3) |
+                       VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_4(4) |
+                       VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_5(5) |
+                       VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_6(6) |
+                       VXGE_HW_RX_QUEUE_PRIORITY_0_RX_Q_NUMBER_7(7),
+                       &hldev->mrpcim_reg->rx_queue_priority_0);
+
+       writeq(VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_8(8) |
+                       VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_9(9) |
+                       VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_10(10) |
+                       VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_11(11) |
+                       VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_12(12) |
+                       VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_13(13) |
+                       VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_14(14) |
+                       VXGE_HW_RX_QUEUE_PRIORITY_1_RX_Q_NUMBER_15(15),
+                       &hldev->mrpcim_reg->rx_queue_priority_1);
+
+       writeq(VXGE_HW_RX_QUEUE_PRIORITY_2_RX_Q_NUMBER_16(16),
+                               &hldev->mrpcim_reg->rx_queue_priority_2);
+
+       /* Initialize all the slots as unused */
+       for (i = 0; i < VXGE_HW_WEIGHTED_RR_SERVICE_STATES; i++)
+               wrr_states[i] = -1;
+
+       /* Prepare the Ring service states */
+       for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
+
+               if (!hldev->config.vp_config[i].min_bandwidth)
+                       continue;
+
+               how_often = VXGE_HW_VPATH_BANDWIDTH_MAX /
+                               hldev->config.vp_config[i].min_bandwidth;
+
+               if (how_often) {
+                       for (j = 0; j < VXGE_HW_WRR_RING_SERVICE_STATES;) {
+                               if (wrr_states[j] == -1) {
+                                       wrr_states[j] = i;
+                                       /* Make sure each ring is
+                                        * serviced atleast once */
+                                       if (i == j)
+                                               j += VXGE_HW_MAX_VIRTUAL_PATHS;
+                                       else
+                                               j += how_often;
+                               } else
+                                       j++;
+                       }
+               }
+       }
+
+       /* Fill the unused slots with 0 */
+       for (j = 0; j < VXGE_HW_WEIGHTED_RR_SERVICE_STATES; j++) {
+               if (wrr_states[j] == -1)
+                       wrr_states[j] = 0;
+       }
+
+       for (i = 0, j = 0; i < VXGE_HW_WRR_RING_COUNT; i++) {
+               val64 =  VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_0(
+                               wrr_states[j++]);
+               val64 |=  VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_1(
+                               wrr_states[j++]);
+               val64 |=  VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_2(
+                               wrr_states[j++]);
+               val64 |=  VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_3(
+                               wrr_states[j++]);
+               val64 |=  VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_4(
+                               wrr_states[j++]);
+               val64 |=  VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_5(
+                               wrr_states[j++]);
+               val64 |=  VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_6(
+                               wrr_states[j++]);
+               val64 |=  VXGE_HW_RX_W_ROUND_ROBIN_0_RX_W_PRIORITY_SS_7(
+                               wrr_states[j++]);
+
+               writeq(val64, ((&hldev->mrpcim_reg->rx_w_round_robin_0) + i));
+       }
+exit:
+       return status;
+}
+
+/*
+ * __vxge_hw_device_initialize
+ * Initialize Titan-V hardware.
+ */
+enum vxge_hw_status __vxge_hw_device_initialize(struct __vxge_hw_device *hldev)
+{
+       enum vxge_hw_status status = VXGE_HW_OK;
+
+       /* Validate the pci-e link width and speed */
+       status = __vxge_hw_verify_pci_e_info(hldev);
+       if (status != VXGE_HW_OK)
+               goto exit;
+
+       vxge_hw_wrr_rebalance(hldev);
+exit:
+       return status;
+}
+
+/**
+ * vxge_hw_device_hw_info_get - Get the hw information
+ * Returns the vpath mask that has the bits set for each vpath allocated
+ * for the driver, FW version information and the first mac addresse for
+ * each vpath
+ */
+enum vxge_hw_status __devinit
+vxge_hw_device_hw_info_get(void __iomem *bar0,
+                          struct vxge_hw_device_hw_info *hw_info)
+{
+       u32 i;
+       u64 val64;
+       struct vxge_hw_toc_reg __iomem *toc;
+       struct vxge_hw_mrpcim_reg __iomem *mrpcim_reg;
+       struct vxge_hw_common_reg __iomem *common_reg;
+       struct vxge_hw_vpath_reg __iomem *vpath_reg;
+       struct vxge_hw_vpmgmt_reg __iomem *vpmgmt_reg;
+       enum vxge_hw_status status;
+
+       memset(hw_info, 0, sizeof(struct vxge_hw_device_hw_info));
+
+       toc = __vxge_hw_device_toc_get(bar0);
+       if (toc == NULL) {
+               status = VXGE_HW_ERR_CRITICAL;
+               goto exit;
+       }
+
+       val64 = readq(&toc->toc_common_pointer);
+       common_reg = (struct vxge_hw_common_reg __iomem *)(bar0 + val64);
+
+       status = __vxge_hw_device_vpath_reset_in_prog_check(
+               (u64 __iomem *)&common_reg->vpath_rst_in_prog);
+       if (status != VXGE_HW_OK)
+               goto exit;
+
+       hw_info->vpath_mask = readq(&common_reg->vpath_assignments);
+
+       val64 = readq(&common_reg->host_type_assignments);
+
+       hw_info->host_type =
+          (u32)VXGE_HW_HOST_TYPE_ASSIGNMENTS_GET_HOST_TYPE_ASSIGNMENTS(val64);
+
+       for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
+
+               if (!((hw_info->vpath_mask) & vxge_mBIT(i)))
+                       continue;
+
+               val64 = readq(&toc->toc_vpmgmt_pointer[i]);
+
+               vpmgmt_reg = (struct vxge_hw_vpmgmt_reg __iomem *)
+                               (bar0 + val64);
+
+               hw_info->func_id = __vxge_hw_vpath_func_id_get(i, vpmgmt_reg);
+               if (__vxge_hw_device_access_rights_get(hw_info->host_type,
+                       hw_info->func_id) &
+                       VXGE_HW_DEVICE_ACCESS_RIGHT_MRPCIM) {
+
+                       val64 = readq(&toc->toc_mrpcim_pointer);
+
+                       mrpcim_reg = (struct vxge_hw_mrpcim_reg __iomem *)
+                                       (bar0 + val64);
+
+                       writeq(0, &mrpcim_reg->xgmac_gen_fw_memo_mask);
+                       wmb();
+               }
+
+               val64 = readq(&toc->toc_vpath_pointer[i]);
+
+               vpath_reg = (struct vxge_hw_vpath_reg __iomem *)(bar0 + val64);
+
+               hw_info->function_mode =
+                       __vxge_hw_vpath_pci_func_mode_get(i, vpath_reg);
+
+               status = __vxge_hw_vpath_fw_ver_get(i, vpath_reg, hw_info);
+               if (status != VXGE_HW_OK)
+                       goto exit;
+
+               status = __vxge_hw_vpath_card_info_get(i, vpath_reg, hw_info);
+               if (status != VXGE_HW_OK)
+                       goto exit;
+
+               break;
+       }
+
+       for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
+
+               if (!((hw_info->vpath_mask) & vxge_mBIT(i)))
+                       continue;
+
+               val64 = readq(&toc->toc_vpath_pointer[i]);
+               vpath_reg = (struct vxge_hw_vpath_reg __iomem *)(bar0 + val64);
+
+               status =  __vxge_hw_vpath_addr_get(i, vpath_reg,
+                               hw_info->mac_addrs[i],
+                               hw_info->mac_addr_masks[i]);
+               if (status != VXGE_HW_OK)
+                       goto exit;
+       }
+exit:
+       return status;
+}
+
+/*
+ * vxge_hw_device_initialize - Initialize Titan device.
+ * Initialize Titan device. Note that all the arguments of this public API
+ * are 'IN', including @hldev. Driver cooperates with
+ * OS to find new Titan device, locate its PCI and memory spaces.
+ *
+ * When done, the driver allocates sizeof(struct __vxge_hw_device) bytes for HW
+ * to enable the latter to perform Titan hardware initialization.
+ */
+enum vxge_hw_status __devinit
+vxge_hw_device_initialize(
+       struct __vxge_hw_device **devh,
+       struct vxge_hw_device_attr *attr,
+       struct vxge_hw_device_config *device_config)
+{
+       u32 i;
+       u32 nblocks = 0;
+       struct __vxge_hw_device *hldev = NULL;
+       enum vxge_hw_status status = VXGE_HW_OK;
+
+       status = __vxge_hw_device_config_check(device_config);
+       if (status != VXGE_HW_OK)
+               goto exit;
+
+       hldev = (struct __vxge_hw_device *)
+                       vmalloc(sizeof(struct __vxge_hw_device));
+       if (hldev == NULL) {
+               status = VXGE_HW_ERR_OUT_OF_MEMORY;
+               goto exit;
+       }
+
+       memset(hldev, 0, sizeof(struct __vxge_hw_device));
+       hldev->magic = VXGE_HW_DEVICE_MAGIC;
+
+       vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_ALL);
+
+       /* apply config */
+       memcpy(&hldev->config, device_config,
+               sizeof(struct vxge_hw_device_config));
+
+       hldev->bar0 = attr->bar0;
+       hldev->bar1 = attr->bar1;
+       hldev->bar2 = attr->bar2;
+       hldev->pdev = attr->pdev;
+
+       hldev->uld_callbacks.link_up = attr->uld_callbacks.link_up;
+       hldev->uld_callbacks.link_down = attr->uld_callbacks.link_down;
+       hldev->uld_callbacks.crit_err = attr->uld_callbacks.crit_err;
+
+       __vxge_hw_device_pci_e_init(hldev);
+
+       status = __vxge_hw_device_reg_addr_get(hldev);
+       if (status != VXGE_HW_OK)
+               goto exit;
+       __vxge_hw_device_id_get(hldev);
+
+       __vxge_hw_device_host_info_get(hldev);
+
+       /* Incrementing for stats blocks */
+       nblocks++;
+
+       for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
+
+               if (!(hldev->vpath_assignments & vxge_mBIT(i)))
+                       continue;
+
+               if (device_config->vp_config[i].ring.enable ==
+                       VXGE_HW_RING_ENABLE)
+                       nblocks += device_config->vp_config[i].ring.ring_blocks;
+
+               if (device_config->vp_config[i].fifo.enable ==
+                       VXGE_HW_FIFO_ENABLE)
+                       nblocks += device_config->vp_config[i].fifo.fifo_blocks;
+               nblocks++;
+       }
+
+       if (__vxge_hw_blockpool_create(hldev,
+               &hldev->block_pool,
+               device_config->dma_blockpool_initial + nblocks,
+               device_config->dma_blockpool_max + nblocks) != VXGE_HW_OK) {
+
+               vxge_hw_device_terminate(hldev);
+               status = VXGE_HW_ERR_OUT_OF_MEMORY;
+               goto exit;
+       }
+
+       status = __vxge_hw_device_initialize(hldev);
+
+       if (status != VXGE_HW_OK) {
+               vxge_hw_device_terminate(hldev);
+               goto exit;
+       }
+
+       *devh = hldev;
+exit:
+       return status;
+}
+
+/*
+ * vxge_hw_device_terminate - Terminate Titan device.
+ * Terminate HW device.
+ */
+void
+vxge_hw_device_terminate(struct __vxge_hw_device *hldev)
+{
+       vxge_assert(hldev->magic == VXGE_HW_DEVICE_MAGIC);
+
+       hldev->magic = VXGE_HW_DEVICE_DEAD;
+       __vxge_hw_blockpool_destroy(&hldev->block_pool);
+       vfree(hldev);
+}
+
+/*
+ * vxge_hw_device_stats_get - Get the device hw statistics.
+ * Returns the vpath h/w stats for the device.
+ */
+enum vxge_hw_status
+vxge_hw_device_stats_get(struct __vxge_hw_device *hldev,
+                       struct vxge_hw_device_stats_hw_info *hw_stats)
+{
+       u32 i;
+       enum vxge_hw_status status = VXGE_HW_OK;
+
+       for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
+
+               if (!(hldev->vpaths_deployed & vxge_mBIT(i)) ||
+                       (hldev->virtual_paths[i].vp_open ==
+                               VXGE_HW_VP_NOT_OPEN))
+                       continue;
+
+               memcpy(hldev->virtual_paths[i].hw_stats_sav,
+                               hldev->virtual_paths[i].hw_stats,
+                               sizeof(struct vxge_hw_vpath_stats_hw_info));
+
+               status = __vxge_hw_vpath_stats_get(
+                       &hldev->virtual_paths[i],
+                       hldev->virtual_paths[i].hw_stats);
+       }
+
+       memcpy(hw_stats, &hldev->stats.hw_dev_info_stats,
+                       sizeof(struct vxge_hw_device_stats_hw_info));
+
+       return status;
+}
+
+/*
+ * vxge_hw_driver_stats_get - Get the device sw statistics.
+ * Returns the vpath s/w stats for the device.
+ */
+enum vxge_hw_status vxge_hw_driver_stats_get(
+                       struct __vxge_hw_device *hldev,
+                       struct vxge_hw_device_stats_sw_info *sw_stats)
+{
+       enum vxge_hw_status status = VXGE_HW_OK;
+
+       memcpy(sw_stats, &hldev->stats.sw_dev_info_stats,
+               sizeof(struct vxge_hw_device_stats_sw_info));
+
+       return status;
+}
+
+/*
+ * vxge_hw_mrpcim_stats_access - Access the statistics from the given location
+ *                           and offset and perform an operation
+ * Get the statistics from the given location and offset.
+ */
+enum vxge_hw_status
+vxge_hw_mrpcim_stats_access(struct __vxge_hw_device *hldev,
+                           u32 operation, u32 location, u32 offset, u64 *stat)
+{
+       u64 val64;
+       enum vxge_hw_status status = VXGE_HW_OK;
+
+       status = __vxge_hw_device_is_privilaged(hldev);
+       if (status != VXGE_HW_OK)
+               goto exit;
+
+       val64 = VXGE_HW_XMAC_STATS_SYS_CMD_OP(operation) |
+               VXGE_HW_XMAC_STATS_SYS_CMD_STROBE |
+               VXGE_HW_XMAC_STATS_SYS_CMD_LOC_SEL(location) |
+               VXGE_HW_XMAC_STATS_SYS_CMD_OFFSET_SEL(offset);
+
+       status = __vxge_hw_pio_mem_write64(val64,
+                               &hldev->mrpcim_reg->xmac_stats_sys_cmd,
+                               VXGE_HW_XMAC_STATS_SYS_CMD_STROBE,
+                               hldev->config.device_poll_millis);
+
+       if ((status == VXGE_HW_OK) && (operation == VXGE_HW_STATS_OP_READ))
+               *stat = readq(&hldev->mrpcim_reg->xmac_stats_sys_data);
+       else
+               *stat = 0;
+exit:
+       return status;
+}
+
+/*
+ * vxge_hw_device_xmac_aggr_stats_get - Get the Statistics on aggregate port
+ * Get the Statistics on aggregate port
+ */
+enum vxge_hw_status
+vxge_hw_device_xmac_aggr_stats_get(struct __vxge_hw_device *hldev, u32 port,
+                                  struct vxge_hw_xmac_aggr_stats *aggr_stats)
+{
+       u64 *val64;
+       int i;
+       u32 offset = VXGE_HW_STATS_AGGRn_OFFSET;
+       enum vxge_hw_status status = VXGE_HW_OK;
+
+       val64 = (u64 *)aggr_stats;
+
+       status = __vxge_hw_device_is_privilaged(hldev);
+       if (status != VXGE_HW_OK)
+               goto exit;
+
+       for (i = 0; i < sizeof(struct vxge_hw_xmac_aggr_stats) / 8; i++) {
+               status = vxge_hw_mrpcim_stats_access(hldev,
+                                       VXGE_HW_STATS_OP_READ,
+                                       VXGE_HW_STATS_LOC_AGGR,
+                                       ((offset + (104 * port)) >> 3), val64);
+               if (status != VXGE_HW_OK)
+                       goto exit;
+
+               offset += 8;
+               val64++;
+       }
+exit:
+       return status;
+}
+
+/*
+ * vxge_hw_device_xmac_port_stats_get - Get the Statistics on a port
+ * Get the Statistics on port
+ */
+enum vxge_hw_status
+vxge_hw_device_xmac_port_stats_get(struct __vxge_hw_device *hldev, u32 port,
+                                  struct vxge_hw_xmac_port_stats *port_stats)
+{
+       u64 *val64;
+       enum vxge_hw_status status = VXGE_HW_OK;
+       int i;
+       u32 offset = 0x0;
+       val64 = (u64 *) port_stats;
+
+       status = __vxge_hw_device_is_privilaged(hldev);
+       if (status != VXGE_HW_OK)
+               goto exit;
+
+       for (i = 0; i < sizeof(struct vxge_hw_xmac_port_stats) / 8; i++) {
+               status = vxge_hw_mrpcim_stats_access(hldev,
+                                       VXGE_HW_STATS_OP_READ,
+                                       VXGE_HW_STATS_LOC_AGGR,
+                                       ((offset + (608 * port)) >> 3), val64);
+               if (status != VXGE_HW_OK)
+                       goto exit;
+
+               offset += 8;
+               val64++;
+       }
+
+exit:
+       return status;
+}
+
+/*
+ * vxge_hw_device_xmac_stats_get - Get the XMAC Statistics
+ * Get the XMAC Statistics
+ */
+enum vxge_hw_status
+vxge_hw_device_xmac_stats_get(struct __vxge_hw_device *hldev,
+                             struct vxge_hw_xmac_stats *xmac_stats)
+{
+       enum vxge_hw_status status = VXGE_HW_OK;
+       u32 i;
+
+       status = vxge_hw_device_xmac_aggr_stats_get(hldev,
+                                       0, &xmac_stats->aggr_stats[0]);
+
+       if (status != VXGE_HW_OK)
+               goto exit;
+
+       status = vxge_hw_device_xmac_aggr_stats_get(hldev,
+                               1, &xmac_stats->aggr_stats[1]);
+       if (status != VXGE_HW_OK)
+               goto exit;
+
+       for (i = 0; i <= VXGE_HW_MAC_MAX_MAC_PORT_ID; i++) {
+
+               status = vxge_hw_device_xmac_port_stats_get(hldev,
+                                       i, &xmac_stats->port_stats[i]);
+               if (status != VXGE_HW_OK)
+                       goto exit;
+       }
+
+       for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
+
+               if (!(hldev->vpaths_deployed & vxge_mBIT(i)))
+                       continue;
+
+               status = __vxge_hw_vpath_xmac_tx_stats_get(
+                                       &hldev->virtual_paths[i],
+                                       &xmac_stats->vpath_tx_stats[i]);
+               if (status != VXGE_HW_OK)
+                       goto exit;
+
+               status = __vxge_hw_vpath_xmac_rx_stats_get(
+                                       &hldev->virtual_paths[i],
+                                       &xmac_stats->vpath_rx_stats[i]);
+               if (status != VXGE_HW_OK)
+                       goto exit;
+       }
+exit:
+       return status;
+}
+
+/*
+ * vxge_hw_device_debug_set - Set the debug module, level and timestamp
+ * This routine is used to dynamically change the debug output
+ */
+void vxge_hw_device_debug_set(struct __vxge_hw_device *hldev,
+                             enum vxge_debug_level level, u32 mask)
+{
+       if (hldev == NULL)
+               return;
+
+#if defined(VXGE_DEBUG_TRACE_MASK) || \
+       defined(VXGE_DEBUG_ERR_MASK)
+       hldev->debug_module_mask = mask;
+       hldev->debug_level = level;
+#endif
+
+#if defined(VXGE_DEBUG_ERR_MASK)
+       hldev->level_err = level & VXGE_ERR;
+#endif
+
+#if defined(VXGE_DEBUG_TRACE_MASK)
+       hldev->level_trace = level & VXGE_TRACE;
+#endif
+}
+
+/*
+ * vxge_hw_device_error_level_get - Get the error level
+ * This routine returns the current error level set
+ */
+u32 vxge_hw_device_error_level_get(struct __vxge_hw_device *hldev)
+{
+#if defined(VXGE_DEBUG_ERR_MASK)
+       if (hldev == NULL)
+               return VXGE_ERR;
+       else
+               return hldev->level_err;
+#else
+       return 0;
+#endif
+}
+
+/*
+ * vxge_hw_device_trace_level_get - Get the trace level
+ * This routine returns the current trace level set
+ */
+u32 vxge_hw_device_trace_level_get(struct __vxge_hw_device *hldev)
+{
+#if defined(VXGE_DEBUG_TRACE_MASK)
+       if (hldev == NULL)
+               return VXGE_TRACE;
+       else
+               return hldev->level_trace;
+#else
+       return 0;
+#endif
+}
+/*
+ * vxge_hw_device_debug_mask_get - Get the debug mask
+ * This routine returns the current debug mask set
+ */
+u32 vxge_hw_device_debug_mask_get(struct __vxge_hw_device *hldev)
+{
+#if defined(VXGE_DEBUG_TRACE_MASK) || defined(VXGE_DEBUG_ERR_MASK)
+       if (hldev == NULL)
+               return 0;
+       return hldev->debug_module_mask;
+#else
+       return 0;
+#endif
+}
+
+/*
+ * vxge_hw_getpause_data -Pause frame frame generation and reception.
+ * Returns the Pause frame generation and reception capability of the NIC.
+ */
+enum vxge_hw_status vxge_hw_device_getpause_data(struct __vxge_hw_device *hldev,
+                                                u32 port, u32 *tx, u32 *rx)
+{
+       u64 val64;
+       enum vxge_hw_status status = VXGE_HW_OK;
+
+       if ((hldev == NULL) || (hldev->magic != VXGE_HW_DEVICE_MAGIC)) {
+               status = VXGE_HW_ERR_INVALID_DEVICE;
+               goto exit;
+       }
+
+       if (port > VXGE_HW_MAC_MAX_MAC_PORT_ID) {
+               status = VXGE_HW_ERR_INVALID_PORT;
+               goto exit;
+       }
+
+       if (!(hldev->access_rights & VXGE_HW_DEVICE_ACCESS_RIGHT_MRPCIM)) {
+               status = VXGE_HW_ERR_PRIVILAGED_OPEARATION;
+               goto exit;
+       }
+
+       val64 = readq(&hldev->mrpcim_reg->rxmac_pause_cfg_port[port]);
+       if (val64 & VXGE_HW_RXMAC_PAUSE_CFG_PORT_GEN_EN)
+               *tx = 1;
+       if (val64 & VXGE_HW_RXMAC_PAUSE_CFG_PORT_RCV_EN)
+               *rx = 1;
+exit:
+       return status;
+}
+
+/*
+ * vxge_hw_device_setpause_data -  set/reset pause frame generation.
+ * It can be used to set or reset Pause frame generation or reception
+ * support of the NIC.
+ */
+
+enum vxge_hw_status vxge_hw_device_setpause_data(struct __vxge_hw_device *hldev,
+                                                u32 port, u32 tx, u32 rx)
+{
+       u64 val64;
+       enum vxge_hw_status status = VXGE_HW_OK;
+
+       if ((hldev == NULL) || (hldev->magic != VXGE_HW_DEVICE_MAGIC)) {
+               status = VXGE_HW_ERR_INVALID_DEVICE;
+               goto exit;
+       }
+
+       if (port > VXGE_HW_MAC_MAX_MAC_PORT_ID) {
+               status = VXGE_HW_ERR_INVALID_PORT;
+               goto exit;
+       }
+
+       status = __vxge_hw_device_is_privilaged(hldev);
+       if (status != VXGE_HW_OK)
+               goto exit;
+
+       val64 = readq(&hldev->mrpcim_reg->rxmac_pause_cfg_port[port]);
+       if (tx)
+               val64 |= VXGE_HW_RXMAC_PAUSE_CFG_PORT_GEN_EN;
+       else
+               val64 &= ~VXGE_HW_RXMAC_PAUSE_CFG_PORT_GEN_EN;
+       if (rx)
+               val64 |= VXGE_HW_RXMAC_PAUSE_CFG_PORT_RCV_EN;
+       else
+               val64 &= ~VXGE_HW_RXMAC_PAUSE_CFG_PORT_RCV_EN;
+
+       writeq(val64, &hldev->mrpcim_reg->rxmac_pause_cfg_port[port]);
+exit:
+       return status;
+}
+
+u16 vxge_hw_device_link_width_get(struct __vxge_hw_device *hldev)
+{
+       int link_width, exp_cap;
+       u16 lnk;
+
+       exp_cap = pci_find_capability(hldev->pdev, PCI_CAP_ID_EXP);
+       pci_read_config_word(hldev->pdev, exp_cap + PCI_EXP_LNKSTA, &lnk);
+       link_width = (lnk & VXGE_HW_PCI_EXP_LNKCAP_LNK_WIDTH) >> 4;
+       return link_width;
+}
+
+/*
+ * __vxge_hw_ring_block_memblock_idx - Return the memblock index
+ * This function returns the index of memory block
+ */
+static inline u32
+__vxge_hw_ring_block_memblock_idx(u8 *block)
+{
+       return (u32)*((u64 *)(block + VXGE_HW_RING_MEMBLOCK_IDX_OFFSET));
+}
+
+/*
+ * __vxge_hw_ring_block_memblock_idx_set - Sets the memblock index
+ * This function sets index to a memory block
+ */
+static inline void
+__vxge_hw_ring_block_memblock_idx_set(u8 *block, u32 memblock_idx)
+{
+       *((u64 *)(block + VXGE_HW_RING_MEMBLOCK_IDX_OFFSET)) = memblock_idx;
+}
+
+/*
+ * __vxge_hw_ring_block_next_pointer_set - Sets the next block pointer
+ * in RxD block
+ * Sets the next block pointer in RxD block
+ */
+static inline void
+__vxge_hw_ring_block_next_pointer_set(u8 *block, dma_addr_t dma_next)
+{
+       *((u64 *)(block + VXGE_HW_RING_NEXT_BLOCK_POINTER_OFFSET)) = dma_next;
+}
+
+/*
+ * __vxge_hw_ring_first_block_address_get - Returns the dma address of the
+ *             first block
+ * Returns the dma address of the first RxD block
+ */
+u64 __vxge_hw_ring_first_block_address_get(struct __vxge_hw_ring *ring)
+{
+       struct vxge_hw_mempool_dma *dma_object;
+
+       dma_object = ring->mempool->memblocks_dma_arr;
+       vxge_assert(dma_object != NULL);
+
+       return dma_object->addr;
+}
+
+/*
+ * __vxge_hw_ring_item_dma_addr - Return the dma address of an item
+ * This function returns the dma address of a given item
+ */
+static dma_addr_t __vxge_hw_ring_item_dma_addr(struct vxge_hw_mempool *mempoolh,
+                                              void *item)
+{
+       u32 memblock_idx;
+       void *memblock;
+       struct vxge_hw_mempool_dma *memblock_dma_object;
+       ptrdiff_t dma_item_offset;
+
+       /* get owner memblock index */
+       memblock_idx = __vxge_hw_ring_block_memblock_idx(item);
+
+       /* get owner memblock by memblock index */
+       memblock = mempoolh->memblocks_arr[memblock_idx];
+
+       /* get memblock DMA object by memblock index */
+       memblock_dma_object = mempoolh->memblocks_dma_arr + memblock_idx;
+
+       /* calculate offset in the memblock of this item */
+       dma_item_offset = (u8 *)item - (u8 *)memblock;
+
+       return memblock_dma_object->addr + dma_item_offset;
+}
+
+/*
+ * __vxge_hw_ring_rxdblock_link - Link the RxD blocks
+ * This function returns the dma address of a given item
+ */
+static void __vxge_hw_ring_rxdblock_link(struct vxge_hw_mempool *mempoolh,
+                                        struct __vxge_hw_ring *ring, u32 from,
+                                        u32 to)
+{
+       u8 *to_item , *from_item;
+       dma_addr_t to_dma;
+
+       /* get "from" RxD block */
+       from_item = mempoolh->items_arr[from];
+       vxge_assert(from_item);
+
+       /* get "to" RxD block */
+       to_item = mempoolh->items_arr[to];
+       vxge_assert(to_item);
+
+       /* return address of the beginning of previous RxD block */
+       to_dma = __vxge_hw_ring_item_dma_addr(mempoolh, to_item);
+
+       /* set next pointer for this RxD block to point on
+        * previous item's DMA start address */
+       __vxge_hw_ring_block_next_pointer_set(from_item, to_dma);
+}
+
+/*
+ * __vxge_hw_ring_mempool_item_alloc - Allocate List blocks for RxD
+ * block callback
+ * This function is callback passed to __vxge_hw_mempool_create to create memory
+ * pool for RxD block
+ */
+static void
+__vxge_hw_ring_mempool_item_alloc(struct vxge_hw_mempool *mempoolh,
+                                 u32 memblock_index,
+                                 struct vxge_hw_mempool_dma *dma_object,
+                                 u32 index, u32 is_last)
+{
+       u32 i;
+       void *item = mempoolh->items_arr[index];
+       struct __vxge_hw_ring *ring =
+               (struct __vxge_hw_ring *)mempoolh->userdata;
+
+       /* format rxds array */
+       for (i = 0; i < ring->rxds_per_block; i++) {
+               void *rxdblock_priv;
+               void *uld_priv;
+               struct vxge_hw_ring_rxd_1 *rxdp;
+
+               u32 reserve_index = ring->channel.reserve_ptr -
+                               (index * ring->rxds_per_block + i + 1);
+               u32 memblock_item_idx;
+
+               ring->channel.reserve_arr[reserve_index] = ((u8 *)item) +
+                                               i * ring->rxd_size;
+
+               /* Note: memblock_item_idx is index of the item within
+                *       the memblock. For instance, in case of three RxD-blocks
+                *       per memblock this value can be 0, 1 or 2. */
+               rxdblock_priv = __vxge_hw_mempool_item_priv(mempoolh,
+                                       memblock_index, item,
+                                       &memblock_item_idx);
+
+               rxdp = (struct vxge_hw_ring_rxd_1 *)
+                               ring->channel.reserve_arr[reserve_index];
+
+               uld_priv = ((u8 *)rxdblock_priv + ring->rxd_priv_size * i);
+
+               /* pre-format Host_Control */
+               rxdp->host_control = (u64)(size_t)uld_priv;
+       }
+
+       __vxge_hw_ring_block_memblock_idx_set(item, memblock_index);
+
+       if (is_last) {
+               /* link last one with first one */
+               __vxge_hw_ring_rxdblock_link(mempoolh, ring, index, 0);
+       }
+
+       if (index > 0) {
+               /* link this RxD block with previous one */
+               __vxge_hw_ring_rxdblock_link(mempoolh, ring, index - 1, index);
+       }
+
+       return;
+}
+
+/*
+ * __vxge_hw_ring_initial_replenish - Initial replenish of RxDs
+ * This function replenishes the RxDs from reserve array to work array
+ */
+enum vxge_hw_status
+vxge_hw_ring_replenish(struct __vxge_hw_ring *ring, u16 min_flag)
+{
+       void *rxd;
+       int i = 0;
+       struct __vxge_hw_channel *channel;
+       enum vxge_hw_status status = VXGE_HW_OK;
+
+       channel = &ring->channel;
+
+       while (vxge_hw_channel_dtr_count(channel) > 0) {
+
+               status = vxge_hw_ring_rxd_reserve(ring, &rxd);
+
+               vxge_assert(status == VXGE_HW_OK);
+
+               if (ring->rxd_init) {
+                       status = ring->rxd_init(rxd, channel->userdata);
+                       if (status != VXGE_HW_OK) {
+                               vxge_hw_ring_rxd_free(ring, rxd);
+                               goto exit;
+                       }
+               }
+
+               vxge_hw_ring_rxd_post(ring, rxd);
+               if (min_flag) {
+                       i++;
+                       if (i == VXGE_HW_RING_MIN_BUFF_ALLOCATION)
+                               break;
+               }
+       }
+       status = VXGE_HW_OK;
+exit:
+       return status;
+}
+
+/*
+ * __vxge_hw_ring_create - Create a Ring
+ * This function creates Ring and initializes it.
+ *
+ */
+enum vxge_hw_status
+__vxge_hw_ring_create(struct __vxge_hw_vpath_handle *vp,
+                     struct vxge_hw_ring_attr *attr)
+{
+       enum vxge_hw_status status = VXGE_HW_OK;
+       struct __vxge_hw_ring *ring;
+       u32 ring_length;
+       struct vxge_hw_ring_config *config;
+       struct __vxge_hw_device *hldev;
+       u32 vp_id;
+       struct vxge_hw_mempool_cbs ring_mp_callback;
+
+       if ((vp == NULL) || (attr == NULL)) {
+               status = VXGE_HW_FAIL;
+               goto exit;
+       }
+
+       hldev = vp->vpath->hldev;
+       vp_id = vp->vpath->vp_id;
+
+       config = &hldev->config.vp_config[vp_id].ring;
+
+       ring_length = config->ring_blocks *
+                       vxge_hw_ring_rxds_per_block_get(config->buffer_mode);
+
+       ring = (struct __vxge_hw_ring *)__vxge_hw_channel_allocate(vp,
+                                               VXGE_HW_CHANNEL_TYPE_RING,
+                                               ring_length,
+                                               attr->per_rxd_space,
+                                               attr->userdata);
+
+       if (ring == NULL) {
+               status = VXGE_HW_ERR_OUT_OF_MEMORY;
+               goto exit;
+       }
+
+       vp->vpath->ringh = ring;
+       ring->vp_id = vp_id;
+       ring->vp_reg = vp->vpath->vp_reg;
+       ring->common_reg = hldev->common_reg;
+       ring->stats = &vp->vpath->sw_stats->ring_stats;
+       ring->config = config;
+       ring->callback = attr->callback;
+       ring->rxd_init = attr->rxd_init;
+       ring->rxd_term = attr->rxd_term;
+       ring->buffer_mode = config->buffer_mode;
+       ring->rxds_limit = config->rxds_limit;
+
+       ring->rxd_size = vxge_hw_ring_rxd_size_get(config->buffer_mode);
+       ring->rxd_priv_size =
+               sizeof(struct __vxge_hw_ring_rxd_priv) + attr->per_rxd_space;
+       ring->per_rxd_space = attr->per_rxd_space;
+
+       ring->rxd_priv_size =
+               ((ring->rxd_priv_size + VXGE_CACHE_LINE_SIZE - 1) /
+               VXGE_CACHE_LINE_SIZE) * VXGE_CACHE_LINE_SIZE;
+
+       /* how many RxDs can fit into one block. Depends on configured
+        * buffer_mode. */
+       ring->rxds_per_block =
+               vxge_hw_ring_rxds_per_block_get(config->buffer_mode);
+
+       /* calculate actual RxD block private size */
+       ring->rxdblock_priv_size = ring->rxd_priv_size * ring->rxds_per_block;
+       ring_mp_callback.item_func_alloc = __vxge_hw_ring_mempool_item_alloc;
+       ring->mempool = __vxge_hw_mempool_create(hldev,
+                               VXGE_HW_BLOCK_SIZE,
+                               VXGE_HW_BLOCK_SIZE,
+                               ring->rxdblock_priv_size,
+                               ring->config->ring_blocks,
+                               ring->config->ring_blocks,
+                               &ring_mp_callback,
+                               ring);
+
+       if (ring->mempool == NULL) {
+               __vxge_hw_ring_delete(vp);
+               return VXGE_HW_ERR_OUT_OF_MEMORY;
+       }
+
+       status = __vxge_hw_channel_initialize(&ring->channel);
+       if (status != VXGE_HW_OK) {
+               __vxge_hw_ring_delete(vp);
+               goto exit;
+       }
+
+       /* Note:
+        * Specifying rxd_init callback means two things:
+        * 1) rxds need to be initialized by driver at channel-open time;
+        * 2) rxds need to be posted at channel-open time
+        *    (that's what the initial_replenish() below does)
+        * Currently we don't have a case when the 1) is done without the 2).
+        */
+       if (ring->rxd_init) {
+               status = vxge_hw_ring_replenish(ring, 1);
+               if (status != VXGE_HW_OK) {
+                       __vxge_hw_ring_delete(vp);
+                       goto exit;
+               }
+       }
+
+       /* initial replenish will increment the counter in its post() routine,
+        * we have to reset it */
+       ring->stats->common_stats.usage_cnt = 0;
+exit:
+       return status;
+}
+
+/*
+ * __vxge_hw_ring_abort - Returns the RxD
+ * This function terminates the RxDs of ring
+ */
+enum vxge_hw_status __vxge_hw_ring_abort(struct __vxge_hw_ring *ring)
+{
+       void *rxdh;
+       struct __vxge_hw_channel *channel;
+
+       channel = &ring->channel;
+
+       for (;;) {
+               vxge_hw_channel_dtr_try_complete(channel, &rxdh);
+
+               if (rxdh == NULL)
+                       break;
+
+               vxge_hw_channel_dtr_complete(channel);
+
+               if (ring->rxd_term)
+                       ring->rxd_term(rxdh, VXGE_HW_RXD_STATE_POSTED,
+                               channel->userdata);
+
+               vxge_hw_channel_dtr_free(channel, rxdh);
+       }
+
+       return VXGE_HW_OK;
+}
+
+/*
+ * __vxge_hw_ring_reset - Resets the ring
+ * This function resets the ring during vpath reset operation
+ */
+enum vxge_hw_status __vxge_hw_ring_reset(struct __vxge_hw_ring *ring)
+{
+       enum vxge_hw_status status = VXGE_HW_OK;
+       struct __vxge_hw_channel *channel;
+
+       channel = &ring->channel;
+
+       __vxge_hw_ring_abort(ring);
+
+       status = __vxge_hw_channel_reset(channel);
+
+       if (status != VXGE_HW_OK)
+               goto exit;
+
+       if (ring->rxd_init) {
+               status = vxge_hw_ring_replenish(ring, 1);
+               if (status != VXGE_HW_OK)
+                       goto exit;
+       }
+exit:
+       return status;
+}
+
+/*
+ * __vxge_hw_ring_delete - Removes the ring
+ * This function freeup the memory pool and removes the ring
+ */
+enum vxge_hw_status __vxge_hw_ring_delete(struct __vxge_hw_vpath_handle *vp)
+{
+       struct __vxge_hw_ring *ring = vp->vpath->ringh;
+
+       __vxge_hw_ring_abort(ring);
+
+       if (ring->mempool)
+               __vxge_hw_mempool_destroy(ring->mempool);
+
+       vp->vpath->ringh = NULL;
+       __vxge_hw_channel_free(&ring->channel);
+
+       return VXGE_HW_OK;
+}
+
+/*
+ * __vxge_hw_mempool_grow
+ * Will resize mempool up to %num_allocate value.
+ */
+enum vxge_hw_status
+__vxge_hw_mempool_grow(struct vxge_hw_mempool *mempool, u32 num_allocate,
+                      u32 *num_allocated)
+{
+       u32 i, first_time = mempool->memblocks_allocated == 0 ? 1 : 0;
+       u32 n_items = mempool->items_per_memblock;
+       u32 start_block_idx = mempool->memblocks_allocated;
+       u32 end_block_idx = mempool->memblocks_allocated + num_allocate;
+       enum vxge_hw_status status = VXGE_HW_OK;
+
+       *num_allocated = 0;
+
+       if (end_block_idx > mempool->memblocks_max) {
+               status = VXGE_HW_ERR_OUT_OF_MEMORY;
+               goto exit;
+       }
+
+       for (i = start_block_idx; i < end_block_idx; i++) {
+               u32 j;
+               u32 is_last = ((end_block_idx - 1) == i);
+               struct vxge_hw_mempool_dma *dma_object =
+                       mempool->memblocks_dma_arr + i;
+               void *the_memblock;
+
+               /* allocate memblock's private part. Each DMA memblock
+                * has a space allocated for item's private usage upon
+                * mempool's user request. Each time mempool grows, it will
+                * allocate new memblock and its private part at once.
+                * This helps to minimize memory usage a lot. */
+               mempool->memblocks_priv_arr[i] =
+                               vmalloc(mempool->items_priv_size * n_items);
+               if (mempool->memblocks_priv_arr[i] == NULL) {
+                       status = VXGE_HW_ERR_OUT_OF_MEMORY;
+                       goto exit;
+               }
+
+               memset(mempool->memblocks_priv_arr[i], 0,
+                            mempool->items_priv_size * n_items);
+
+               /* allocate DMA-capable memblock */
+               mempool->memblocks_arr[i] =
+                       __vxge_hw_blockpool_malloc(mempool->devh,
+                               mempool->memblock_size, dma_object);
+               if (mempool->memblocks_arr[i] == NULL) {
+                       vfree(mempool->memblocks_priv_arr[i]);
+                       status = VXGE_HW_ERR_OUT_OF_MEMORY;
+                       goto exit;
+               }
+
+               (*num_allocated)++;
+               mempool->memblocks_allocated++;
+
+               memset(mempool->memblocks_arr[i], 0, mempool->memblock_size);
+
+               the_memblock = mempool->memblocks_arr[i];
+
+               /* fill the items hash array */
+               for (j = 0; j < n_items; j++) {
+                       u32 index = i * n_items + j;
+
+                       if (first_time && index >= mempool->items_initial)
+                               break;
+
+                       mempool->items_arr[index] =
+                               ((char *)the_memblock + j*mempool->item_size);
+
+                       /* let caller to do more job on each item */
+                       if (mempool->item_func_alloc != NULL)
+                               mempool->item_func_alloc(mempool, i,
+                                       dma_object, index, is_last);
+
+                       mempool->items_current = index + 1;
+               }
+
+               if (first_time && mempool->items_current ==
+                                       mempool->items_initial)
+                       break;
+       }
+exit:
+       return status;
+}
+
+/*
+ * vxge_hw_mempool_create
+ * This function will create memory pool object. Pool may grow but will
+ * never shrink. Pool consists of number of dynamically allocated blocks
+ * with size enough to hold %items_initial number of items. Memory is
+ * DMA-able but client must map/unmap before interoperating with the device.
+ */
+struct vxge_hw_mempool*
+__vxge_hw_mempool_create(
+       struct __vxge_hw_device *devh,
+       u32 memblock_size,
+       u32 item_size,
+       u32 items_priv_size,
+       u32 items_initial,
+       u32 items_max,
+       struct vxge_hw_mempool_cbs *mp_callback,
+       void *userdata)
+{
+       enum vxge_hw_status status = VXGE_HW_OK;
+       u32 memblocks_to_allocate;
+       struct vxge_hw_mempool *mempool = NULL;
+       u32 allocated;
+
+       if (memblock_size < item_size) {
+               status = VXGE_HW_FAIL;
+               goto exit;
+       }
+
+       mempool = (struct vxge_hw_mempool *)
+                       vmalloc(sizeof(struct vxge_hw_mempool));
+       if (mempool == NULL) {
+               status = VXGE_HW_ERR_OUT_OF_MEMORY;
+               goto exit;
+       }
+       memset(mempool, 0, sizeof(struct vxge_hw_mempool));
+
+       mempool->devh                   = devh;
+       mempool->memblock_size          = memblock_size;
+       mempool->items_max              = items_max;
+       mempool->items_initial          = items_initial;
+       mempool->item_size              = item_size;
+       mempool->items_priv_size        = items_priv_size;
+       mempool->item_func_alloc        = mp_callback->item_func_alloc;
+       mempool->userdata               = userdata;
+
+       mempool->memblocks_allocated = 0;
+
+       mempool->items_per_memblock = memblock_size / item_size;
+
+       mempool->memblocks_max = (items_max + mempool->items_per_memblock - 1) /
+                                       mempool->items_per_memblock;
+
+       /* allocate array of memblocks */
+       mempool->memblocks_arr =
+               (void **) vmalloc(sizeof(void *) * mempool->memblocks_max);
+       if (mempool->memblocks_arr == NULL) {
+               __vxge_hw_mempool_destroy(mempool);
+               status = VXGE_HW_ERR_OUT_OF_MEMORY;
+               mempool = NULL;
+               goto exit;
+       }
+       memset(mempool->memblocks_arr, 0,
+               sizeof(void *) * mempool->memblocks_max);
+
+       /* allocate array of private parts of items per memblocks */
+       mempool->memblocks_priv_arr =
+               (void **) vmalloc(sizeof(void *) * mempool->memblocks_max);
+       if (mempool->memblocks_priv_arr == NULL) {
+               __vxge_hw_mempool_destroy(mempool);
+               status = VXGE_HW_ERR_OUT_OF_MEMORY;
+               mempool = NULL;
+               goto exit;
+       }
+       memset(mempool->memblocks_priv_arr, 0,
+                   sizeof(void *) * mempool->memblocks_max);
+
+       /* allocate array of memblocks DMA objects */
+       mempool->memblocks_dma_arr = (struct vxge_hw_mempool_dma *)
+               vmalloc(sizeof(struct vxge_hw_mempool_dma) *
+                       mempool->memblocks_max);
+
+       if (mempool->memblocks_dma_arr == NULL) {
+               __vxge_hw_mempool_destroy(mempool);
+               status = VXGE_HW_ERR_OUT_OF_MEMORY;
+               mempool = NULL;
+               goto exit;
+       }
+       memset(mempool->memblocks_dma_arr, 0,
+                       sizeof(struct vxge_hw_mempool_dma) *
+                       mempool->memblocks_max);
+
+       /* allocate hash array of items */
+       mempool->items_arr =
+               (void **) vmalloc(sizeof(void *) * mempool->items_max);
+       if (mempool->items_arr == NULL) {
+               __vxge_hw_mempool_destroy(mempool);
+               status = VXGE_HW_ERR_OUT_OF_MEMORY;
+               mempool = NULL;
+               goto exit;
+       }
+       memset(mempool->items_arr, 0, sizeof(void *) * mempool->items_max);
+
+       /* calculate initial number of memblocks */
+       memblocks_to_allocate = (mempool->items_initial +
+                                mempool->items_per_memblock - 1) /
+                                               mempool->items_per_memblock;
+
+       /* pre-allocate the mempool */
+       status = __vxge_hw_mempool_grow(mempool, memblocks_to_allocate,
+                                       &allocated);
+       if (status != VXGE_HW_OK) {
+               __vxge_hw_mempool_destroy(mempool);
+               status = VXGE_HW_ERR_OUT_OF_MEMORY;
+               mempool = NULL;
+               goto exit;
+       }
+
+exit:
+       return mempool;
+}
+
+/*
+ * vxge_hw_mempool_destroy
+ */
+void __vxge_hw_mempool_destroy(struct vxge_hw_mempool *mempool)
+{
+       u32 i, j;
+       struct __vxge_hw_device *devh = mempool->devh;
+
+       for (i = 0; i < mempool->memblocks_allocated; i++) {
+               struct vxge_hw_mempool_dma *dma_object;
+
+               vxge_assert(mempool->memblocks_arr[i]);
+               vxge_assert(mempool->memblocks_dma_arr + i);
+
+               dma_object = mempool->memblocks_dma_arr + i;
+
+               for (j = 0; j < mempool->items_per_memblock; j++) {
+                       u32 index = i * mempool->items_per_memblock + j;
+
+                       /* to skip last partially filled(if any) memblock */
+                       if (index >= mempool->items_current)
+                               break;
+               }
+
+               vfree(mempool->memblocks_priv_arr[i]);
+
+               __vxge_hw_blockpool_free(devh, mempool->memblocks_arr[i],
+                               mempool->memblock_size, dma_object);
+       }
+
+       if (mempool->items_arr)
+               vfree(mempool->items_arr);
+
+       if (mempool->memblocks_dma_arr)
+               vfree(mempool->memblocks_dma_arr);
+
+       if (mempool->memblocks_priv_arr)
+               vfree(mempool->memblocks_priv_arr);
+
+       if (mempool->memblocks_arr)
+               vfree(mempool->memblocks_arr);
+
+       vfree(mempool);
+}
+
+/*
+ * __vxge_hw_device_fifo_config_check - Check fifo configuration.
+ * Check the fifo configuration
+ */
+enum vxge_hw_status
+__vxge_hw_device_fifo_config_check(struct vxge_hw_fifo_config *fifo_config)
+{
+       if ((fifo_config->fifo_blocks < VXGE_HW_MIN_FIFO_BLOCKS) ||
+            (fifo_config->fifo_blocks > VXGE_HW_MAX_FIFO_BLOCKS))
+               return VXGE_HW_BADCFG_FIFO_BLOCKS;
+
+       return VXGE_HW_OK;
+}
+
+/*
+ * __vxge_hw_device_vpath_config_check - Check vpath configuration.
+ * Check the vpath configuration
+ */
+enum vxge_hw_status
+__vxge_hw_device_vpath_config_check(struct vxge_hw_vp_config *vp_config)
+{
+       enum vxge_hw_status status;
+
+       if ((vp_config->min_bandwidth < VXGE_HW_VPATH_BANDWIDTH_MIN) ||
+               (vp_config->min_bandwidth >
+                                       VXGE_HW_VPATH_BANDWIDTH_MAX))
+               return VXGE_HW_BADCFG_VPATH_MIN_BANDWIDTH;
+
+       status = __vxge_hw_device_fifo_config_check(&vp_config->fifo);
+       if (status != VXGE_HW_OK)
+               return status;
+
+       if ((vp_config->mtu != VXGE_HW_VPATH_USE_FLASH_DEFAULT_INITIAL_MTU) &&
+               ((vp_config->mtu < VXGE_HW_VPATH_MIN_INITIAL_MTU) ||
+               (vp_config->mtu > VXGE_HW_VPATH_MAX_INITIAL_MTU)))
+               return VXGE_HW_BADCFG_VPATH_MTU;
+
+       if ((vp_config->rpa_strip_vlan_tag !=
+               VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_USE_FLASH_DEFAULT) &&
+               (vp_config->rpa_strip_vlan_tag !=
+               VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE) &&
+               (vp_config->rpa_strip_vlan_tag !=
+               VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_DISABLE))
+               return VXGE_HW_BADCFG_VPATH_RPA_STRIP_VLAN_TAG;
+
+       return VXGE_HW_OK;
+}
+
+/*
+ * __vxge_hw_device_config_check - Check device configuration.
+ * Check the device configuration
+ */
+enum vxge_hw_status
+__vxge_hw_device_config_check(struct vxge_hw_device_config *new_config)
+{
+       u32 i;
+       enum vxge_hw_status status;
+
+       if ((new_config->intr_mode != VXGE_HW_INTR_MODE_IRQLINE) &&
+          (new_config->intr_mode != VXGE_HW_INTR_MODE_MSIX) &&
+          (new_config->intr_mode != VXGE_HW_INTR_MODE_MSIX_ONE_SHOT) &&
+          (new_config->intr_mode != VXGE_HW_INTR_MODE_DEF))
+               return VXGE_HW_BADCFG_INTR_MODE;
+
+       if ((new_config->rts_mac_en != VXGE_HW_RTS_MAC_DISABLE) &&
+          (new_config->rts_mac_en != VXGE_HW_RTS_MAC_ENABLE))
+               return VXGE_HW_BADCFG_RTS_MAC_EN;
+
+       for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
+               status = __vxge_hw_device_vpath_config_check(
+                               &new_config->vp_config[i]);
+               if (status != VXGE_HW_OK)
+                       return status;
+       }
+
+       return VXGE_HW_OK;
+}
+
+/*
+ * vxge_hw_device_config_default_get - Initialize device config with defaults.
+ * Initialize Titan device config with default values.
+ */
+enum vxge_hw_status __devinit
+vxge_hw_device_config_default_get(struct vxge_hw_device_config *device_config)
+{
+       u32 i;
+
+       device_config->dma_blockpool_initial =
+                                       VXGE_HW_INITIAL_DMA_BLOCK_POOL_SIZE;
+       device_config->dma_blockpool_max = VXGE_HW_MAX_DMA_BLOCK_POOL_SIZE;
+       device_config->intr_mode = VXGE_HW_INTR_MODE_DEF;
+       device_config->rth_en = VXGE_HW_RTH_DEFAULT;
+       device_config->rth_it_type = VXGE_HW_RTH_IT_TYPE_DEFAULT;
+       device_config->device_poll_millis =  VXGE_HW_DEF_DEVICE_POLL_MILLIS;
+       device_config->rts_mac_en =  VXGE_HW_RTS_MAC_DEFAULT;
+
+       for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
+
+               device_config->vp_config[i].vp_id = i;
+
+               device_config->vp_config[i].min_bandwidth =
+                               VXGE_HW_VPATH_BANDWIDTH_DEFAULT;
+
+               device_config->vp_config[i].ring.enable = VXGE_HW_RING_DEFAULT;
+
+               device_config->vp_config[i].ring.ring_blocks =
+                               VXGE_HW_DEF_RING_BLOCKS;
+
+               device_config->vp_config[i].ring.buffer_mode =
+                               VXGE_HW_RING_RXD_BUFFER_MODE_DEFAULT;
+
+               device_config->vp_config[i].ring.scatter_mode =
+                               VXGE_HW_RING_SCATTER_MODE_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].ring.rxds_limit =
+                               VXGE_HW_DEF_RING_RXDS_LIMIT;
+
+               device_config->vp_config[i].fifo.enable = VXGE_HW_FIFO_ENABLE;
+
+               device_config->vp_config[i].fifo.fifo_blocks =
+                               VXGE_HW_MIN_FIFO_BLOCKS;
+
+               device_config->vp_config[i].fifo.max_frags =
+                               VXGE_HW_MAX_FIFO_FRAGS;
+
+               device_config->vp_config[i].fifo.memblock_size =
+                               VXGE_HW_DEF_FIFO_MEMBLOCK_SIZE;
+
+               device_config->vp_config[i].fifo.alignment_size =
+                               VXGE_HW_DEF_FIFO_ALIGNMENT_SIZE;
+
+               device_config->vp_config[i].fifo.intr =
+                               VXGE_HW_FIFO_QUEUE_INTR_DEFAULT;
+
+               device_config->vp_config[i].fifo.no_snoop_bits =
+                               VXGE_HW_FIFO_NO_SNOOP_DEFAULT;
+               device_config->vp_config[i].tti.intr_enable =
+                               VXGE_HW_TIM_INTR_DEFAULT;
+
+               device_config->vp_config[i].tti.btimer_val =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].tti.timer_ac_en =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].tti.timer_ci_en =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].tti.timer_ri_en =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].tti.rtimer_val =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].tti.util_sel =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].tti.ltimer_val =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].tti.urange_a =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].tti.uec_a =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].tti.urange_b =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].tti.uec_b =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].tti.urange_c =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].tti.uec_c =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].tti.uec_d =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].rti.intr_enable =
+                               VXGE_HW_TIM_INTR_DEFAULT;
+
+               device_config->vp_config[i].rti.btimer_val =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].rti.timer_ac_en =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].rti.timer_ci_en =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].rti.timer_ri_en =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].rti.rtimer_val =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].rti.util_sel =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].rti.ltimer_val =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].rti.urange_a =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].rti.uec_a =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].rti.urange_b =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].rti.uec_b =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].rti.urange_c =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].rti.uec_c =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].rti.uec_d =
+                               VXGE_HW_USE_FLASH_DEFAULT;
+
+               device_config->vp_config[i].mtu =
+                               VXGE_HW_VPATH_USE_FLASH_DEFAULT_INITIAL_MTU;
+
+               device_config->vp_config[i].rpa_strip_vlan_tag =
+                       VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_USE_FLASH_DEFAULT;
+       }
+
+       return VXGE_HW_OK;
+}
+
+/*
+ * _hw_legacy_swapper_set - Set the swapper bits for the legacy secion.
+ * Set the swapper bits appropriately for the lagacy section.
+ */
+enum vxge_hw_status
+__vxge_hw_legacy_swapper_set(struct vxge_hw_legacy_reg __iomem *legacy_reg)
+{
+       u64 val64;
+       enum vxge_hw_status status = VXGE_HW_OK;
+
+       val64 = readq(&legacy_reg->toc_swapper_fb);
+
+       wmb();
+
+       switch (val64) {
+
+       case VXGE_HW_SWAPPER_INITIAL_VALUE:
+               return status;
+
+       case VXGE_HW_SWAPPER_BYTE_SWAPPED_BIT_FLIPPED:
+               writeq(VXGE_HW_SWAPPER_READ_BYTE_SWAP_ENABLE,
+                       &legacy_reg->pifm_rd_swap_en);
+               writeq(VXGE_HW_SWAPPER_READ_BIT_FLAP_ENABLE,
+                       &legacy_reg->pifm_rd_flip_en);
+               writeq(VXGE_HW_SWAPPER_WRITE_BYTE_SWAP_ENABLE,
+                       &legacy_reg->pifm_wr_swap_en);
+               writeq(VXGE_HW_SWAPPER_WRITE_BIT_FLAP_ENABLE,
+                       &legacy_reg->pifm_wr_flip_en);
+               break;
+
+       case VXGE_HW_SWAPPER_BYTE_SWAPPED:
+               writeq(VXGE_HW_SWAPPER_READ_BYTE_SWAP_ENABLE,
+                       &legacy_reg->pifm_rd_swap_en);
+               writeq(VXGE_HW_SWAPPER_WRITE_BYTE_SWAP_ENABLE,
+                       &legacy_reg->pifm_wr_swap_en);
+               break;
+
+       case VXGE_HW_SWAPPER_BIT_FLIPPED:
+               writeq(VXGE_HW_SWAPPER_READ_BIT_FLAP_ENABLE,
+                       &legacy_reg->pifm_rd_flip_en);
+               writeq(VXGE_HW_SWAPPER_WRITE_BIT_FLAP_ENABLE,
+                       &legacy_reg->pifm_wr_flip_en);
+               break;
+       }
+
+       wmb();
+
+       val64 = readq(&legacy_reg->toc_swapper_fb);
+
+       if (val64 != VXGE_HW_SWAPPER_INITIAL_VALUE)
+               status = VXGE_HW_ERR_SWAPPER_CTRL;
+
+       return status;
+}
+
+/*
+ * __vxge_hw_vpath_swapper_set - Set the swapper bits for the vpath.
+ * Set the swapper bits appropriately for the vpath.
+ */
+enum vxge_hw_status
+__vxge_hw_vpath_swapper_set(struct vxge_hw_vpath_reg __iomem *vpath_reg)
+{
+#ifndef __BIG_ENDIAN
+       u64 val64;
+
+       val64 = readq(&vpath_reg->vpath_general_cfg1);
+       wmb();
+       val64 |= VXGE_HW_VPATH_GENERAL_CFG1_CTL_BYTE_SWAPEN;
+       writeq(val64, &vpath_reg->vpath_general_cfg1);
+       wmb();
+#endif
+       return VXGE_HW_OK;
+}
+
+/*
+ * __vxge_hw_kdfc_swapper_set - Set the swapper bits for the kdfc.
+ * Set the swapper bits appropriately for the vpath.
+ */
+enum vxge_hw_status
+__vxge_hw_kdfc_swapper_set(
+       struct vxge_hw_legacy_reg __iomem *legacy_reg,
+       struct vxge_hw_vpath_reg __iomem *vpath_reg)
+{
+       u64 val64;
+
+       val64 = readq(&legacy_reg->pifm_wr_swap_en);
+
+       if (val64 == VXGE_HW_SWAPPER_WRITE_BYTE_SWAP_ENABLE) {
+               val64 = readq(&vpath_reg->kdfcctl_cfg0);
+               wmb();
+
+               val64 |= VXGE_HW_KDFCCTL_CFG0_BYTE_SWAPEN_FIFO0 |
+                       VXGE_HW_KDFCCTL_CFG0_BYTE_SWAPEN_FIFO1  |
+                       VXGE_HW_KDFCCTL_CFG0_BYTE_SWAPEN_FIFO2;
+
+               writeq(val64, &vpath_reg->kdfcctl_cfg0);
+               wmb();
+       }
+
+       return VXGE_HW_OK;
+}
+
+/*
+ * vxge_hw_mgmt_device_config - Retrieve device configuration.
+ * Get device configuration. Permits to retrieve at run-time configuration
+ * values that were used to initialize and configure the device.
+ */
+enum vxge_hw_status
+vxge_hw_mgmt_device_config(struct __vxge_hw_device *hldev,
+                          struct vxge_hw_device_config *dev_config, int size)
+{
+
+       if ((hldev == NULL) || (hldev->magic != VXGE_HW_DEVICE_MAGIC))
+               return VXGE_HW_ERR_INVALID_DEVICE;
+
+       if (size != sizeof(struct vxge_hw_device_config))
+               return VXGE_HW_ERR_VERSION_CONFLICT;
+
+       memcpy(dev_config, &hldev->config,
+               sizeof(struct vxge_hw_device_config));
+
+       return VXGE_HW_OK;
+}
+
+/*
+ * vxge_hw_mgmt_reg_read - Read Titan register.
+ */
+enum vxge_hw_status
+vxge_hw_mgmt_reg_read(struct __vxge_hw_device *hldev,
+                     enum vxge_hw_mgmt_reg_type type,
+                     u32 index, u32 offset, u64 *value)
+{
+       enum vxge_hw_status status = VXGE_HW_OK;
+
+       if ((hldev == NULL) || (hldev->magic != VXGE_HW_DEVICE_MAGIC)) {
+               status = VXGE_HW_ERR_INVALID_DEVICE;
+               goto exit;
+       }
+
+       switch (type) {
+       case vxge_hw_mgmt_reg_type_legacy:
+               if (offset > sizeof(struct vxge_hw_legacy_reg) - 8) {
+                       status = VXGE_HW_ERR_INVALID_OFFSET;
+                       break;
+               }
+               *value = readq((void __iomem *)hldev->legacy_reg + offset);
+               break;
+       case vxge_hw_mgmt_reg_type_toc:
+               if (offset > sizeof(struct vxge_hw_toc_reg) - 8) {
+                       status = VXGE_HW_ERR_INVALID_OFFSET;
+                       break;
+               }
+               *value = readq((void __iomem *)hldev->toc_reg + offset);
+               break;
+       case vxge_hw_mgmt_reg_type_common:
+               if (offset > sizeof(struct vxge_hw_common_reg) - 8) {
+                       status = VXGE_HW_ERR_INVALID_OFFSET;
+                       break;
+               }
+               *value = readq((void __iomem *)hldev->common_reg + offset);
+               break;
+       case vxge_hw_mgmt_reg_type_mrpcim:
+               if (!(hldev->access_rights &
+                       VXGE_HW_DEVICE_ACCESS_RIGHT_MRPCIM)) {
+                       status = VXGE_HW_ERR_PRIVILAGED_OPEARATION;
+                       break;
+               }
+               if (offset > sizeof(struct vxge_hw_mrpcim_reg) - 8) {
+                       status = VXGE_HW_ERR_INVALID_OFFSET;
+                       break;
+               }
+               *value = readq((void __iomem *)hldev->mrpcim_reg + offset);
+               break;
+       case vxge_hw_mgmt_reg_type_srpcim:
+               if (!(hldev->access_rights &
+                       VXGE_HW_DEVICE_ACCESS_RIGHT_SRPCIM)) {
+                       status = VXGE_HW_ERR_PRIVILAGED_OPEARATION;
+                       break;
+               }
+               if (index > VXGE_HW_TITAN_SRPCIM_REG_SPACES - 1) {
+                       status = VXGE_HW_ERR_INVALID_INDEX;
+                       break;
+               }
+               if (offset > sizeof(struct vxge_hw_srpcim_reg) - 8) {
+                       status = VXGE_HW_ERR_INVALID_OFFSET;
+                       break;
+               }
+               *value = readq((void __iomem *)hldev->srpcim_reg[index] +
+                               offset);
+               break;
+       case vxge_hw_mgmt_reg_type_vpmgmt:
+               if ((index > VXGE_HW_TITAN_VPMGMT_REG_SPACES - 1) ||
+                       (!(hldev->vpath_assignments & vxge_mBIT(index)))) {
+                       status = VXGE_HW_ERR_INVALID_INDEX;
+                       break;
+               }
+               if (offset > sizeof(struct vxge_hw_vpmgmt_reg) - 8) {
+                       status = VXGE_HW_ERR_INVALID_OFFSET;
+                       break;
+               }
+               *value = readq((void __iomem *)hldev->vpmgmt_reg[index] +
+                               offset);
+               break;
+       case vxge_hw_mgmt_reg_type_vpath:
+               if ((index > VXGE_HW_TITAN_VPATH_REG_SPACES - 1) ||
+                       (!(hldev->vpath_assignments & vxge_mBIT(index)))) {
+                       status = VXGE_HW_ERR_INVALID_INDEX;
+                       break;
+               }
+               if (index > VXGE_HW_TITAN_VPATH_REG_SPACES - 1) {
+                       status = VXGE_HW_ERR_INVALID_INDEX;
+                       break;
+               }
+               if (offset > sizeof(struct vxge_hw_vpath_reg) - 8) {
+                       status = VXGE_HW_ERR_INVALID_OFFSET;
+                       break;
+               }
+               *value = readq((void __iomem *)hldev->vpath_reg[index] +
+                               offset);
+               break;
+       default:
+               status = VXGE_HW_ERR_INVALID_TYPE;
+               break;
+       }
+
+exit:
+       return status;
+}
+
+/*
+ * vxge_hw_mgmt_reg_Write - Write Titan register.
+ */
+enum vxge_hw_status
+vxge_hw_mgmt_reg_write(struct __vxge_hw_device *hldev,
+                     enum vxge_hw_mgmt_reg_type type,
+                     u32 index, u32 offset, u64 value)
+{
+       enum vxge_hw_status status = VXGE_HW_OK;
+
+       if ((hldev == NULL) || (hldev->magic != VXGE_HW_DEVICE_MAGIC)) {
+               status = VXGE_HW_ERR_INVALID_DEVICE;
+               goto exit;
+       }
+
+       switch (type) {
+       case vxge_hw_mgmt_reg_type_legacy:
+               if (offset > sizeof(struct vxge_hw_legacy_reg) - 8) {
+                       status = VXGE_HW_ERR_INVALID_OFFSET;
+                       break;
+               }
+               writeq(value, (void __iomem *)hldev->legacy_reg + offset);
+               break;
+       case vxge_hw_mgmt_reg_type_toc:
+               if (offset > sizeof(struct vxge_hw_toc_reg) - 8) {
+                       status = VXGE_HW_ERR_INVALID_OFFSET;
+                       break;
+               }
+               writeq(value, (void __iomem *)hldev->toc_reg + offset);
+               break;
+       case vxge_hw_mgmt_reg_type_common:
+               if (offset > sizeof(struct vxge_hw_common_reg) - 8) {
+                       status = VXGE_HW_ERR_INVALID_OFFSET;
+                       break;
+               }
+               writeq(value, (void __iomem *)hldev->common_reg + offset);
+               break;
+       case vxge_hw_mgmt_reg_type_mrpcim:
+               if (!(hldev->access_rights &
+                       VXGE_HW_DEVICE_ACCESS_RIGHT_MRPCIM)) {
+                       status = VXGE_HW_ERR_PRIVILAGED_OPEARATION;
+                       break;
+               }
+               if (offset > sizeof(struct vxge_hw_mrpcim_reg) - 8) {
+                       status = VXGE_HW_ERR_INVALID_OFFSET;
+                       break;
+               }
+               writeq(value, (void __iomem *)hldev->mrpcim_reg + offset);
+               break;
+       case vxge_hw_mgmt_reg_type_srpcim:
+               if (!(hldev->access_rights &
+                       VXGE_HW_DEVICE_ACCESS_RIGHT_SRPCIM)) {
+                       status = VXGE_HW_ERR_PRIVILAGED_OPEARATION;
+                       break;
+               }
+               if (index > VXGE_HW_TITAN_SRPCIM_REG_SPACES - 1) {
+                       status = VXGE_HW_ERR_INVALID_INDEX;
+                       break;
+               }
+               if (offset > sizeof(struct vxge_hw_srpcim_reg) - 8) {
+                       status = VXGE_HW_ERR_INVALID_OFFSET;
+                       break;
+               }
+               writeq(value, (void __iomem *)hldev->srpcim_reg[index] +
+                       offset);
+
+               break;
+       case vxge_hw_mgmt_reg_type_vpmgmt:
+               if ((index > VXGE_HW_TITAN_VPMGMT_REG_SPACES - 1) ||
+                       (!(hldev->vpath_assignments & vxge_mBIT(index)))) {
+                       status = VXGE_HW_ERR_INVALID_INDEX;
+                       break;
+               }
+               if (offset > sizeof(struct vxge_hw_vpmgmt_reg) - 8) {
+                       status = VXGE_HW_ERR_INVALID_OFFSET;
+                       break;
+               }
+               writeq(value, (void __iomem *)hldev->vpmgmt_reg[index] +
+                       offset);
+               break;
+       case vxge_hw_mgmt_reg_type_vpath:
+               if ((index > VXGE_HW_TITAN_VPATH_REG_SPACES-1) ||
+                       (!(hldev->vpath_assignments & vxge_mBIT(index)))) {
+                       status = VXGE_HW_ERR_INVALID_INDEX;
+                       break;
+               }
+               if (offset > sizeof(struct vxge_hw_vpath_reg) - 8) {
+                       status = VXGE_HW_ERR_INVALID_OFFSET;
+                       break;
+               }
+               writeq(value, (void __iomem *)hldev->vpath_reg[index] +
+                       offset);
+               break;
+       default:
+               status = VXGE_HW_ERR_INVALID_TYPE;
+               break;
+       }
+exit:
+       return status;
+}
+
+/*
+ * __vxge_hw_fifo_mempool_item_alloc - Allocate List blocks for TxD
+ * list callback
+ * This function is callback passed to __vxge_hw_mempool_create to create memory
+ * pool for TxD list
+ */
+static void
+__vxge_hw_fifo_mempool_item_alloc(
+       struct vxge_hw_mempool *mempoolh,
+       u32 memblock_index, struct vxge_hw_mempool_dma *dma_object,
+       u32 index, u32 is_last)
+{
+       u32 memblock_item_idx;
+       struct __vxge_hw_fifo_txdl_priv *txdl_priv;
+       struct vxge_hw_fifo_txd *txdp =
+               (struct vxge_hw_fifo_txd *)mempoolh->items_arr[index];
+       struct __vxge_hw_fifo *fifo =
+                       (struct __vxge_hw_fifo *)mempoolh->userdata;
+       void *memblock = mempoolh->memblocks_arr[memblock_index];
+
+       vxge_assert(txdp);
+
+       txdp->host_control = (u64) (size_t)
+       __vxge_hw_mempool_item_priv(mempoolh, memblock_index, txdp,
+                                       &memblock_item_idx);
+
+       txdl_priv = __vxge_hw_fifo_txdl_priv(fifo, txdp);
+
+       vxge_assert(txdl_priv);
+
+       fifo->channel.reserve_arr[fifo->channel.reserve_ptr - 1 - index] = txdp;
+
+       /* pre-format HW's TxDL's private */
+       txdl_priv->dma_offset = (char *)txdp - (char *)memblock;
+       txdl_priv->dma_addr = dma_object->addr + txdl_priv->dma_offset;
+       txdl_priv->dma_handle = dma_object->handle;
+       txdl_priv->memblock   = memblock;
+       txdl_priv->first_txdp = txdp;
+       txdl_priv->next_txdl_priv = NULL;
+       txdl_priv->alloc_frags = 0;
+
+       return;
+}
+
+/*
+ * __vxge_hw_fifo_create - Create a FIFO
+ * This function creates FIFO and initializes it.
+ */
+enum vxge_hw_status
+__vxge_hw_fifo_create(struct __vxge_hw_vpath_handle *vp,
+                     struct vxge_hw_fifo_attr *attr)
+{
+       enum vxge_hw_status status = VXGE_HW_OK;
+       struct __vxge_hw_fifo *fifo;
+       struct vxge_hw_fifo_config *config;
+       u32 txdl_size, txdl_per_memblock;
+       struct vxge_hw_mempool_cbs fifo_mp_callback;
+       struct __vxge_hw_virtualpath *vpath;
+
+       if ((vp == NULL) || (attr == NULL)) {
+               status = VXGE_HW_ERR_INVALID_HANDLE;
+               goto exit;
+       }
+       vpath = vp->vpath;
+       config = &vpath->hldev->config.vp_config[vpath->vp_id].fifo;
+
+       txdl_size = config->max_frags * sizeof(struct vxge_hw_fifo_txd);
+
+       txdl_per_memblock = config->memblock_size / txdl_size;
+
+       fifo = (struct __vxge_hw_fifo *)__vxge_hw_channel_allocate(vp,
+                                       VXGE_HW_CHANNEL_TYPE_FIFO,
+                                       config->fifo_blocks * txdl_per_memblock,
+                                       attr->per_txdl_space, attr->userdata);
+
+       if (fifo == NULL) {
+               status = VXGE_HW_ERR_OUT_OF_MEMORY;
+               goto exit;
+       }
+
+       vpath->fifoh = fifo;
+       fifo->nofl_db = vpath->nofl_db;
+
+       fifo->vp_id = vpath->vp_id;
+       fifo->vp_reg = vpath->vp_reg;
+       fifo->stats = &vpath->sw_stats->fifo_stats;
+
+       fifo->config = config;
+
+       /* apply "interrupts per txdl" attribute */
+       fifo->interrupt_type = VXGE_HW_FIFO_TXD_INT_TYPE_UTILZ;
+
+       if (fifo->config->intr)
+               fifo->interrupt_type = VXGE_HW_FIFO_TXD_INT_TYPE_PER_LIST;
+
+       fifo->no_snoop_bits = config->no_snoop_bits;
+
+       /*
+        * FIFO memory management strategy:
+        *
+        * TxDL split into three independent parts:
+        *      - set of TxD's
+        *      - TxD HW private part
+        *      - driver private part
+        *
+        * Adaptative memory allocation used. i.e. Memory allocated on
+        * demand with the size which will fit into one memory block.
+        * One memory block may contain more than one TxDL.
+        *
+        * During "reserve" operations more memory can be allocated on demand
+        * for example due to FIFO full condition.
+        *
+        * Pool of memory memblocks never shrinks except in __vxge_hw_fifo_close
+        * routine which will essentially stop the channel and free resources.
+        */
+
+       /* TxDL common private size == TxDL private  +  driver private */
+       fifo->priv_size =
+               sizeof(struct __vxge_hw_fifo_txdl_priv) + attr->per_txdl_space;
+       fifo->priv_size = ((fifo->priv_size  +  VXGE_CACHE_LINE_SIZE - 1) /
+                       VXGE_CACHE_LINE_SIZE) * VXGE_CACHE_LINE_SIZE;
+
+       fifo->per_txdl_space = attr->per_txdl_space;
+
+       /* recompute txdl size to be cacheline aligned */
+       fifo->txdl_size = txdl_size;
+       fifo->txdl_per_memblock = txdl_per_memblock;
+
+       fifo->txdl_term = attr->txdl_term;
+       fifo->callback = attr->callback;
+
+       if (fifo->txdl_per_memblock == 0) {
+               __vxge_hw_fifo_delete(vp);
+               status = VXGE_HW_ERR_INVALID_BLOCK_SIZE;
+               goto exit;
+       }
+
+       fifo_mp_callback.item_func_alloc = __vxge_hw_fifo_mempool_item_alloc;
+
+       fifo->mempool =
+               __vxge_hw_mempool_create(vpath->hldev,
+                       fifo->config->memblock_size,
+                       fifo->txdl_size,
+                       fifo->priv_size,
+                       (fifo->config->fifo_blocks * fifo->txdl_per_memblock),
+                       (fifo->config->fifo_blocks * fifo->txdl_per_memblock),
+                       &fifo_mp_callback,
+                       fifo);
+
+       if (fifo->mempool == NULL) {
+               __vxge_hw_fifo_delete(vp);
+               status = VXGE_HW_ERR_OUT_OF_MEMORY;
+               goto exit;
+       }
+
+       status = __vxge_hw_channel_initialize(&fifo->channel);
+       if (status != VXGE_HW_OK) {
+               __vxge_hw_fifo_delete(vp);
+               goto exit;
+       }
+
+       vxge_assert(fifo->channel.reserve_ptr);
+exit:
+       return status;
+}
+
+/*
+ * __vxge_hw_fifo_abort - Returns the TxD
+ * This function terminates the TxDs of fifo
+ */
+enum vxge_hw_status __vxge_hw_fifo_abort(struct __vxge_hw_fifo *fifo)
+{
+       void *txdlh;
+
+       for (;;) {
+               vxge_hw_channel_dtr_try_complete(&fifo->channel, &txdlh);
+
+               if (txdlh == NULL)
+                       break;
+
+               vxge_hw_channel_dtr_complete(&fifo->channel);
+
+               if (fifo->txdl_term) {
+                       fifo->txdl_term(txdlh,
+                       VXGE_HW_TXDL_STATE_POSTED,
+                       fifo->channel.userdata);
+               }
+
+               vxge_hw_channel_dtr_free(&fifo->channel, txdlh);
+       }
+
+       return VXGE_HW_OK;
+}
+
+/*
+ * __vxge_hw_fifo_reset - Resets the fifo
+ * This function resets the fifo during vpath reset operation
+ */
+enum vxge_hw_status __vxge_hw_fifo_reset(struct __vxge_hw_fifo *fifo)
+{
+       enum vxge_hw_status status = VXGE_HW_OK;
+
+       __vxge_hw_fifo_abort(fifo);
+       status = __vxge_hw_channel_reset(&fifo->channel);
+
+       return status;
+}
+
+/*
+ * __vxge_hw_fifo_delete - Removes the FIFO
+ * This function freeup the memory pool and removes the FIFO
+ */
+enum vxge_hw_status __vxge_hw_fifo_delete(struct __vxge_hw_vpath_handle *vp)
+{
+       struct __vxge_hw_fifo *fifo = vp->vpath->fifoh;
+
+       __vxge_hw_fifo_abort(fifo);
+
+       if (fifo->mempool)
+               __vxge_hw_mempool_destroy(fifo->mempool);
+
+       vp->vpath->fifoh = NULL;
+
+       __vxge_hw_channel_free(&fifo->channel);
+
+       return VXGE_HW_OK;
+}
+
+/*
+ * __vxge_hw_vpath_pci_read - Read the content of given address
+ *                          in pci config space.
+ * Read from the vpath pci config space.
+ */
+enum vxge_hw_status
+__vxge_hw_vpath_pci_read(struct __vxge_hw_virtualpath *vpath,
+                        u32 phy_func_0, u32 offset, u32 *val)
+{
+       u64 val64;
+       enum vxge_hw_status status = VXGE_HW_OK;
+       struct vxge_hw_vpath_reg __iomem *vp_reg = vpath->vp_reg;
+
+       val64 = VXGE_HW_PCI_CONFIG_ACCESS_CFG1_ADDRESS(offset);
+
+       if (phy_func_0)
+               val64 |= VXGE_HW_PCI_CONFIG_ACCESS_CFG1_SEL_FUNC0;
+
+       writeq(val64, &vp_reg->pci_config_access_cfg1);
+       wmb();
+       writeq(VXGE_HW_PCI_CONFIG_ACCESS_CFG2_REQ,
+                       &vp_reg->pci_config_access_cfg2);
+       wmb();
+
+       status = __vxge_hw_device_register_poll(
+                       &vp_reg->pci_config_access_cfg2,
+                       VXGE_HW_INTR_MASK_ALL, VXGE_HW_DEF_DEVICE_POLL_MILLIS);
+
+       if (status != VXGE_HW_OK)
+               goto exit;
+
+       val64 = readq(&vp_reg->pci_config_access_status);
+
+       if (val64 & VXGE_HW_PCI_CONFIG_ACCESS_STATUS_ACCESS_ERR) {
+               status = VXGE_HW_FAIL;
+               *val = 0;
+       } else
+               *val = (u32)vxge_bVALn(val64, 32, 32);
+exit:
+       return status;
+}
+
+/*
+ * __vxge_hw_vpath_func_id_get - Get the function id of the vpath.
+ * Returns the function number of the vpath.
+ */
+u32
+__vxge_hw_vpath_func_id_get(u32 vp_id,
+       struct vxge_hw_vpmgmt_reg __iomem *vpmgmt_reg)
+{
+       u64 val64;
+
+       val64 = readq(&vpmgmt_reg->vpath_to_func_map_cfg1);
+
+       return
+        (u32)VXGE_HW_VPATH_TO_FUNC_MAP_CFG1_GET_VPATH_TO_FUNC_MAP_CFG1(val64);
+}
+
+/*
+ * __vxge_hw_read_rts_ds - Program RTS steering critieria
+ */
+static inline void
+__vxge_hw_read_rts_ds(struct vxge_hw_vpath_reg __iomem *vpath_reg,
+                     u64 dta_struct_sel)
+{
+       writeq(0, &vpath_reg->rts_access_steer_ctrl);
+       wmb();
+       writeq(dta_struct_sel, &vpath_reg->rts_access_steer_data0);
+       writeq(0, &vpath_reg->rts_access_steer_data1);
+       wmb();
+       return;
+}
+
+
+/*
+ * __vxge_hw_vpath_card_info_get - Get the serial numbers,
+ * part number and product description.
+ */
+enum vxge_hw_status
+__vxge_hw_vpath_card_info_get(
+       u32 vp_id,
+       struct vxge_hw_vpath_reg __iomem *vpath_reg,
+       struct vxge_hw_device_hw_info *hw_info)
+{
+       u32 i, j;
+       u64 val64;
+       u64 data1 = 0ULL;
+       u64 data2 = 0ULL;
+       enum vxge_hw_status status = VXGE_HW_OK;
+       u8 *serial_number = hw_info->serial_number;
+       u8 *part_number = hw_info->part_number;
+       u8 *product_desc = hw_info->product_desc;
+
+       __vxge_hw_read_rts_ds(vpath_reg,
+               VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_SERIAL_NUMBER);
+
+       val64 = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(
+                       VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_READ_MEMO_ENTRY) |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(
+                       VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO) |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET(0);
+
+       status = __vxge_hw_pio_mem_write64(val64,
+                               &vpath_reg->rts_access_steer_ctrl,
+                               VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE,
+                               VXGE_HW_DEF_DEVICE_POLL_MILLIS);
+
+       if (status != VXGE_HW_OK)
+               return status;
+
+       val64 = readq(&vpath_reg->rts_access_steer_ctrl);
+
+       if (val64 & VXGE_HW_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS) {
+               data1 = readq(&vpath_reg->rts_access_steer_data0);
+               ((u64 *)serial_number)[0] = be64_to_cpu(data1);
+
+               data2 = readq(&vpath_reg->rts_access_steer_data1);
+               ((u64 *)serial_number)[1] = be64_to_cpu(data2);
+               status = VXGE_HW_OK;
+       } else
+               *serial_number = 0;
+
+       __vxge_hw_read_rts_ds(vpath_reg,
+                       VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PART_NUMBER);
+
+       val64 = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(
+                       VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_READ_MEMO_ENTRY) |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(
+                       VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO) |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET(0);
+
+       status = __vxge_hw_pio_mem_write64(val64,
+                               &vpath_reg->rts_access_steer_ctrl,
+                               VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE,
+                               VXGE_HW_DEF_DEVICE_POLL_MILLIS);
+
+       if (status != VXGE_HW_OK)
+               return status;
+
+       val64 = readq(&vpath_reg->rts_access_steer_ctrl);
+
+       if (val64 & VXGE_HW_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS) {
+
+               data1 = readq(&vpath_reg->rts_access_steer_data0);
+               ((u64 *)part_number)[0] = be64_to_cpu(data1);
+
+               data2 = readq(&vpath_reg->rts_access_steer_data1);
+               ((u64 *)part_number)[1] = be64_to_cpu(data2);
+
+               status = VXGE_HW_OK;
+
+       } else
+               *part_number = 0;
+
+       j = 0;
+
+       for (i = VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_DESC_0;
+            i <= VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_DESC_3; i++) {
+
+               __vxge_hw_read_rts_ds(vpath_reg, i);
+
+               val64 = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(
+                       VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_READ_MEMO_ENTRY) |
+                       VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(
+                       VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO) |
+                       VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE |
+                       VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET(0);
+
+               status = __vxge_hw_pio_mem_write64(val64,
+                               &vpath_reg->rts_access_steer_ctrl,
+                               VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE,
+                               VXGE_HW_DEF_DEVICE_POLL_MILLIS);
+
+               if (status != VXGE_HW_OK)
+                       return status;
+
+               val64 = readq(&vpath_reg->rts_access_steer_ctrl);
+
+               if (val64 & VXGE_HW_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS) {
+
+                       data1 = readq(&vpath_reg->rts_access_steer_data0);
+                       ((u64 *)product_desc)[j++] = be64_to_cpu(data1);
+
+                       data2 = readq(&vpath_reg->rts_access_steer_data1);
+                       ((u64 *)product_desc)[j++] = be64_to_cpu(data2);
+
+                       status = VXGE_HW_OK;
+               } else
+                       *product_desc = 0;
+       }
+
+       return status;
+}
+
+/*
+ * __vxge_hw_vpath_fw_ver_get - Get the fw version
+ * Returns FW Version
+ */
+enum vxge_hw_status
+__vxge_hw_vpath_fw_ver_get(
+       u32 vp_id,
+       struct vxge_hw_vpath_reg __iomem *vpath_reg,
+       struct vxge_hw_device_hw_info *hw_info)
+{
+       u64 val64;
+       u64 data1 = 0ULL;
+       u64 data2 = 0ULL;
+       struct vxge_hw_device_version *fw_version = &hw_info->fw_version;
+       struct vxge_hw_device_date *fw_date = &hw_info->fw_date;
+       struct vxge_hw_device_version *flash_version = &hw_info->flash_version;
+       struct vxge_hw_device_date *flash_date = &hw_info->flash_date;
+       enum vxge_hw_status status = VXGE_HW_OK;
+
+       val64 = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_READ_ENTRY) |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO) |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET(0);
+
+       status = __vxge_hw_pio_mem_write64(val64,
+                               &vpath_reg->rts_access_steer_ctrl,
+                               VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE,
+                               VXGE_HW_DEF_DEVICE_POLL_MILLIS);
+
+       if (status != VXGE_HW_OK)
+               goto exit;
+
+       val64 = readq(&vpath_reg->rts_access_steer_ctrl);
+
+       if (val64 & VXGE_HW_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS) {
+
+               data1 = readq(&vpath_reg->rts_access_steer_data0);
+               data2 = readq(&vpath_reg->rts_access_steer_data1);
+
+               fw_date->day =
+                       (u32)VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_DAY(
+                                               data1);
+               fw_date->month =
+                       (u32)VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_MONTH(
+                                               data1);
+               fw_date->year =
+                       (u32)VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_YEAR(
+                                               data1);
+
+               snprintf(fw_date->date, VXGE_HW_FW_STRLEN, "%2.2d/%2.2d/%4.4d",
+                       fw_date->month, fw_date->day, fw_date->year);
+
+               fw_version->major =
+                   (u32)VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_MAJOR(data1);
+               fw_version->minor =
+                   (u32)VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_MINOR(data1);
+               fw_version->build =
+                   (u32)VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_FW_VER_BUILD(data1);
+
+               snprintf(fw_version->version, VXGE_HW_FW_STRLEN, "%d.%d.%d",
+                   fw_version->major, fw_version->minor, fw_version->build);
+
+               flash_date->day =
+                 (u32)VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_DAY(data2);
+               flash_date->month =
+                (u32)VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_MONTH(data2);
+               flash_date->year =
+                (u32)VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_YEAR(data2);
+
+               snprintf(flash_date->date, VXGE_HW_FW_STRLEN,
+                       "%2.2d/%2.2d/%4.4d",
+                       flash_date->month, flash_date->day, flash_date->year);
+
+               flash_version->major =
+                (u32)VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_MAJOR(data2);
+               flash_version->minor =
+                (u32)VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_MINOR(data2);
+               flash_version->build =
+                (u32)VXGE_HW_RTS_ACCESS_STEER_DATA1_GET_FLASH_VER_BUILD(data2);
+
+               snprintf(flash_version->version, VXGE_HW_FW_STRLEN, "%d.%d.%d",
+                       flash_version->major, flash_version->minor,
+                       flash_version->build);
+
+               status = VXGE_HW_OK;
+
+       } else
+               status = VXGE_HW_FAIL;
+exit:
+       return status;
+}
+
+/*
+ * __vxge_hw_vpath_pci_func_mode_get - Get the pci mode
+ * Returns pci function mode
+ */
+u64
+__vxge_hw_vpath_pci_func_mode_get(
+       u32  vp_id,
+       struct vxge_hw_vpath_reg __iomem *vpath_reg)
+{
+       u64 val64;
+       u64 data1 = 0ULL;
+       enum vxge_hw_status status = VXGE_HW_OK;
+
+       __vxge_hw_read_rts_ds(vpath_reg,
+               VXGE_HW_RTS_ACCESS_STEER_DATA0_MEMO_ITEM_PCI_MODE);
+
+       val64 = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(
+                       VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_READ_MEMO_ENTRY) |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(
+                       VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO) |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET(0);
+
+       status = __vxge_hw_pio_mem_write64(val64,
+                               &vpath_reg->rts_access_steer_ctrl,
+                               VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE,
+                               VXGE_HW_DEF_DEVICE_POLL_MILLIS);
+
+       if (status != VXGE_HW_OK)
+               goto exit;
+
+       val64 = readq(&vpath_reg->rts_access_steer_ctrl);
+
+       if (val64 & VXGE_HW_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS) {
+               data1 = readq(&vpath_reg->rts_access_steer_data0);
+               status = VXGE_HW_OK;
+       } else {
+               data1 = 0;
+               status = VXGE_HW_FAIL;
+       }
+exit:
+       return data1;
+}
+
+/**
+ * vxge_hw_device_flick_link_led - Flick (blink) link LED.
+ * @hldev: HW device.
+ * @on_off: TRUE if flickering to be on, FALSE to be off
+ *
+ * Flicker the link LED.
+ */
+enum vxge_hw_status
+vxge_hw_device_flick_link_led(struct __vxge_hw_device *hldev,
+                              u64 on_off)
+{
+       u64 val64;
+       enum vxge_hw_status status = VXGE_HW_OK;
+       struct vxge_hw_vpath_reg __iomem *vp_reg;
+
+       if (hldev == NULL) {
+               status = VXGE_HW_ERR_INVALID_DEVICE;
+               goto exit;
+       }
+
+       vp_reg = hldev->vpath_reg[hldev->first_vp_id];
+
+       writeq(0, &vp_reg->rts_access_steer_ctrl);
+       wmb();
+       writeq(on_off, &vp_reg->rts_access_steer_data0);
+       writeq(0, &vp_reg->rts_access_steer_data1);
+       wmb();
+
+       val64 = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(
+                       VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_LED_CONTROL) |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(
+                       VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO) |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET(0);
+
+       status = __vxge_hw_pio_mem_write64(val64,
+                               &vp_reg->rts_access_steer_ctrl,
+                               VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE,
+                               VXGE_HW_DEF_DEVICE_POLL_MILLIS);
+exit:
+       return status;
+}
+
+/*
+ * __vxge_hw_vpath_rts_table_get - Get the entries from RTS access tables
+ */
+enum vxge_hw_status
+__vxge_hw_vpath_rts_table_get(
+       struct __vxge_hw_vpath_handle *vp,
+       u32 action, u32 rts_table, u32 offset, u64 *data1, u64 *data2)
+{
+       u64 val64;
+       struct __vxge_hw_virtualpath *vpath;
+       struct vxge_hw_vpath_reg __iomem *vp_reg;
+
+       enum vxge_hw_status status = VXGE_HW_OK;
+
+       if (vp == NULL) {
+               status = VXGE_HW_ERR_INVALID_HANDLE;
+               goto exit;
+       }
+
+       vpath = vp->vpath;
+       vp_reg = vpath->vp_reg;
+
+       val64 = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(action) |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(rts_table) |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET(offset);
+
+       if ((rts_table ==
+               VXGE_HW_RTS_ACS_STEER_CTRL_DATA_STRUCT_SEL_RTH_SOLO_IT) ||
+           (rts_table ==
+               VXGE_HW_RTS_ACS_STEER_CTRL_DATA_STRUCT_SEL_RTH_MULTI_IT) ||
+           (rts_table ==
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_RTH_MASK) ||
+           (rts_table ==
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_RTH_KEY)) {
+               val64 = val64 | VXGE_HW_RTS_ACCESS_STEER_CTRL_TABLE_SEL;
+       }
+
+       status = __vxge_hw_pio_mem_write64(val64,
+                               &vp_reg->rts_access_steer_ctrl,
+                               VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE,
+                               vpath->hldev->config.device_poll_millis);
+
+       if (status != VXGE_HW_OK)
+               goto exit;
+
+       val64 = readq(&vp_reg->rts_access_steer_ctrl);
+
+       if (val64 & VXGE_HW_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS) {
+
+               *data1 = readq(&vp_reg->rts_access_steer_data0);
+
+               if ((rts_table ==
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_DA) ||
+               (rts_table ==
+               VXGE_HW_RTS_ACS_STEER_CTRL_DATA_STRUCT_SEL_RTH_MULTI_IT)) {
+                       *data2 = readq(&vp_reg->rts_access_steer_data1);
+               }
+               status = VXGE_HW_OK;
+       } else
+               status = VXGE_HW_FAIL;
+exit:
+       return status;
+}
+
+/*
+ * __vxge_hw_vpath_rts_table_set - Set the entries of RTS access tables
+ */
+enum vxge_hw_status
+__vxge_hw_vpath_rts_table_set(
+       struct __vxge_hw_vpath_handle *vp, u32 action, u32 rts_table,
+       u32 offset, u64 data1, u64 data2)
+{
+       u64 val64;
+       struct __vxge_hw_virtualpath *vpath;
+       enum vxge_hw_status status = VXGE_HW_OK;
+       struct vxge_hw_vpath_reg __iomem *vp_reg;
+
+       if (vp == NULL) {
+               status = VXGE_HW_ERR_INVALID_HANDLE;
+               goto exit;
+       }
+
+       vpath = vp->vpath;
+       vp_reg = vpath->vp_reg;
+
+       writeq(data1, &vp_reg->rts_access_steer_data0);
+       wmb();
+
+       if ((rts_table == VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_DA) ||
+           (rts_table ==
+               VXGE_HW_RTS_ACS_STEER_CTRL_DATA_STRUCT_SEL_RTH_MULTI_IT)) {
+               writeq(data2, &vp_reg->rts_access_steer_data1);
+               wmb();
+       }
+
+       val64 = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(action) |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(rts_table) |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET(offset);
+
+       status = __vxge_hw_pio_mem_write64(val64,
+                               &vp_reg->rts_access_steer_ctrl,
+                               VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE,
+                               vpath->hldev->config.device_poll_millis);
+
+       if (status != VXGE_HW_OK)
+               goto exit;
+
+       val64 = readq(&vp_reg->rts_access_steer_ctrl);
+
+       if (val64 & VXGE_HW_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS)
+               status = VXGE_HW_OK;
+       else
+               status = VXGE_HW_FAIL;
+exit:
+       return status;
+}
+
+/*
+ * __vxge_hw_vpath_addr_get - Get the hw address entry for this vpath
+ *               from MAC address table.
+ */
+enum vxge_hw_status
+__vxge_hw_vpath_addr_get(
+       u32 vp_id, struct vxge_hw_vpath_reg __iomem *vpath_reg,
+       u8 (macaddr)[ETH_ALEN], u8 (macaddr_mask)[ETH_ALEN])
+{
+       u32 i;
+       u64 val64;
+       u64 data1 = 0ULL;
+       u64 data2 = 0ULL;
+       enum vxge_hw_status status = VXGE_HW_OK;
+
+       val64 = VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION(
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_LIST_FIRST_ENTRY) |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL(
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_DA) |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE |
+               VXGE_HW_RTS_ACCESS_STEER_CTRL_OFFSET(0);
+
+       status = __vxge_hw_pio_mem_write64(val64,
+                               &vpath_reg->rts_access_steer_ctrl,
+                               VXGE_HW_RTS_ACCESS_STEER_CTRL_STROBE,
+                               VXGE_HW_DEF_DEVICE_POLL_MILLIS);
+
+       if (status != VXGE_HW_OK)
+               goto exit;
+
+       val64 = readq(&vpath_reg->rts_access_steer_ctrl);
+
+       if (val64 & VXGE_HW_RTS_ACCESS_STEER_CTRL_RMACJ_STATUS) {
+
+               data1 = readq(&vpath_reg->rts_access_steer_data0);
+               data2 = readq(&vpath_reg->rts_access_steer_data1);
+