Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next
authorDavid S. Miller <davem@davemloft.net>
Sun, 21 Jan 2018 03:03:46 +0000 (22:03 -0500)
committerDavid S. Miller <davem@davemloft.net>
Sun, 21 Jan 2018 03:03:46 +0000 (22:03 -0500)
Alexei Starovoitov says:

====================
pull-request: bpf-next 2018-01-19

The following pull-request contains BPF updates for your *net-next* tree.

The main changes are:

1) bpf array map HW offload, from Jakub.

2) support for bpf_get_next_key() for LPM map, from Yonghong.

3) test_verifier now runs loaded programs, from Alexei.

4) xdp cpumap monitoring, from Jesper.

5) variety of tests, cleanups and small x64 JIT optimization, from Daniel.

6) user space can now retrieve HW JITed program, from Jiong.

Note there is a minor conflict between Russell's arm32 JIT fixes
and removal of bpf_jit_enable variable by Daniel which should
be resolved by keeping Russell's comment and removing that variable.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
1  2 
arch/arm/net/bpf_jit_32.c
arch/arm64/net/bpf_jit_comp.c
kernel/bpf/core.c
kernel/bpf/verifier.c
net/core/filter.c
tools/testing/selftests/bpf/test_verifier.c

index a5edea07b8d523d4e3cd4d3f038d594e89091f38,a15e7cdf8754bab47270cbc558033cec281723e5..41e2feb0cf4f920cc6c705736a7d6adbf7181ff7
  
  #include "bpf_jit_32.h"
  
- int bpf_jit_enable __read_mostly;
 +/*
 + * eBPF prog stack layout:
 + *
 + *                         high
 + * original ARM_SP =>     +-----+
 + *                        |     | callee saved registers
 + *                        +-----+ <= (BPF_FP + SCRATCH_SIZE)
 + *                        | ... | eBPF JIT scratch space
 + * eBPF fp register =>    +-----+
 + *   (BPF_FP)             | ... | eBPF prog stack
 + *                        +-----+
 + *                        |RSVD | JIT scratchpad
 + * current ARM_SP =>      +-----+ <= (BPF_FP - STACK_SIZE + SCRATCH_SIZE)
 + *                        |     |
 + *                        | ... | Function call stack
 + *                        |     |
 + *                        +-----+
 + *                          low
 + *
 + * The callee saved registers depends on whether frame pointers are enabled.
 + * With frame pointers (to be compliant with the ABI):
 + *
 + *                                high
 + * original ARM_SP =>     +------------------+ \
 + *                        |        pc        | |
 + * current ARM_FP =>      +------------------+ } callee saved registers
 + *                        |r4-r8,r10,fp,ip,lr| |
 + *                        +------------------+ /
 + *                                low
 + *
 + * Without frame pointers:
 + *
 + *                                high
 + * original ARM_SP =>     +------------------+
 + *                        | r4-r8,r10,fp,lr  | callee saved registers
 + * current ARM_FP =>      +------------------+
 + *                                low
 + *
 + * When popping registers off the stack at the end of a BPF function, we
 + * reference them via the current ARM_FP register.
 + */
 +#define CALLEE_MASK   (1 << ARM_R4 | 1 << ARM_R5 | 1 << ARM_R6 | \
 +                       1 << ARM_R7 | 1 << ARM_R8 | 1 << ARM_R10 | \
 +                       1 << ARM_FP)
 +#define CALLEE_PUSH_MASK (CALLEE_MASK | 1 << ARM_LR)
 +#define CALLEE_POP_MASK  (CALLEE_MASK | 1 << ARM_PC)
 +
  #define STACK_OFFSET(k)       (k)
  #define TMP_REG_1     (MAX_BPF_JIT_REG + 0)   /* TEMP Register 1 */
  #define TMP_REG_2     (MAX_BPF_JIT_REG + 1)   /* TEMP Register 2 */
Simple merge
Simple merge
Simple merge
Simple merge