amdgpu/dm: constify plane type.
authorDave Airlie <airlied@redhat.com>
Fri, 29 Sep 2017 00:32:23 +0000 (10:32 +1000)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 29 Sep 2017 17:01:02 +0000 (13:01 -0400)
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

index b541ade8a03f202a0336e8e8fff7e5aa19958a57..59e2e5d59562ecf06dafef14625548de0a3e3aa7 100644 (file)
@@ -361,7 +361,7 @@ struct amdgpu_mode_info {
        int                     num_dig; /* number of dig blocks */
        int                     disp_priority;
        const struct amdgpu_display_funcs *funcs;
-       enum drm_plane_type *plane_type;
+       const enum drm_plane_type *plane_type;
 };
 
 #define AMDGPU_MAX_BL_LEVEL 0xFF
index 89442cce73739a197de7d4f32131b3443b2dd67a..ef938521fec89f0d50e0f24db71b192274c55576 100644 (file)
@@ -71,7 +71,7 @@
 #include "i2caux_interface.h"
 
 
-static enum drm_plane_type dm_plane_type_default[AMDGPU_MAX_PLANES] = {
+static const enum drm_plane_type dm_plane_type_default[AMDGPU_MAX_PLANES] = {
        DRM_PLANE_TYPE_PRIMARY,
        DRM_PLANE_TYPE_PRIMARY,
        DRM_PLANE_TYPE_PRIMARY,
@@ -80,14 +80,14 @@ static enum drm_plane_type dm_plane_type_default[AMDGPU_MAX_PLANES] = {
        DRM_PLANE_TYPE_PRIMARY,
 };
 
-static enum drm_plane_type dm_plane_type_carizzo[AMDGPU_MAX_PLANES] = {
+static const enum drm_plane_type dm_plane_type_carizzo[AMDGPU_MAX_PLANES] = {
        DRM_PLANE_TYPE_PRIMARY,
        DRM_PLANE_TYPE_PRIMARY,
        DRM_PLANE_TYPE_PRIMARY,
        DRM_PLANE_TYPE_OVERLAY,/* YUV Capable Underlay */
 };
 
-static enum drm_plane_type dm_plane_type_stoney[AMDGPU_MAX_PLANES] = {
+static const enum drm_plane_type dm_plane_type_stoney[AMDGPU_MAX_PLANES] = {
        DRM_PLANE_TYPE_PRIMARY,
        DRM_PLANE_TYPE_PRIMARY,
        DRM_PLANE_TYPE_OVERLAY, /* YUV Capable Underlay */