net/mlx5e: Add a counter for congested UMRs
authorTariq Toukan <tariqt@mellanox.com>
Sun, 4 Mar 2018 12:25:00 +0000 (14:25 +0200)
committerSaeed Mahameed <saeedm@mellanox.com>
Thu, 28 Jun 2018 21:44:18 +0000 (14:44 -0700)
Add per-ring and global ethtool counters for congested UMR requests.
These events indicate congestion in UMR handlers in HW.

Such event is concluded when there's an outstanding UMR post,
yet the SW consumed at least two additional MPWQEs in the meanwhile.

Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
drivers/net/ethernet/mellanox/mlx5/core/en_rx.c
drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
drivers/net/ethernet/mellanox/mlx5/core/en_stats.h
drivers/net/ethernet/mellanox/mlx5/core/wq.h

index 733c5d2c99f2631edf8cc4e42a7b3b70d3761efc..6f20ce76c11cabe5136b9c1508257d8938309fb1 100644 (file)
@@ -601,6 +601,8 @@ bool mlx5e_post_rx_mpwqes(struct mlx5e_rq *rq)
 
        if (!rq->mpwqe.umr_in_progress)
                mlx5e_alloc_rx_mpwqe(rq, wq->head);
 
        if (!rq->mpwqe.umr_in_progress)
                mlx5e_alloc_rx_mpwqe(rq, wq->head);
+       else
+               rq->stats->congst_umr += mlx5_wq_ll_missing(wq) > 2;
 
        return false;
 }
 
        return false;
 }
index ec7784189dc28432fdca5f407d3416a25a64f32d..dd3b5a028a971d19905418a98d6730b74b243413 100644 (file)
@@ -83,6 +83,7 @@ static const struct counter_desc sw_stats_desc[] = {
        { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_empty) },
        { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_busy) },
        { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_waive) },
        { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_empty) },
        { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_busy) },
        { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_cache_waive) },
+       { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_congst_umr) },
        { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, ch_poll) },
        { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, ch_arm) },
        { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, ch_aff_change) },
        { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, ch_poll) },
        { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, ch_arm) },
        { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, ch_aff_change) },
@@ -152,6 +153,7 @@ void mlx5e_grp_sw_update_stats(struct mlx5e_priv *priv)
                s->rx_cache_empty += rq_stats->cache_empty;
                s->rx_cache_busy  += rq_stats->cache_busy;
                s->rx_cache_waive += rq_stats->cache_waive;
                s->rx_cache_empty += rq_stats->cache_empty;
                s->rx_cache_busy  += rq_stats->cache_busy;
                s->rx_cache_waive += rq_stats->cache_waive;
+               s->rx_congst_umr  += rq_stats->congst_umr;
                s->ch_poll        += ch_stats->poll;
                s->ch_arm         += ch_stats->arm;
                s->ch_aff_change  += ch_stats->aff_change;
                s->ch_poll        += ch_stats->poll;
                s->ch_arm         += ch_stats->arm;
                s->ch_aff_change  += ch_stats->aff_change;
@@ -1135,6 +1137,7 @@ static const struct counter_desc rq_stats_desc[] = {
        { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_empty) },
        { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_busy) },
        { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_waive) },
        { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_empty) },
        { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_busy) },
        { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, cache_waive) },
+       { MLX5E_DECLARE_RX_STAT(struct mlx5e_rq_stats, congst_umr) },
 };
 
 static const struct counter_desc sq_stats_desc[] = {
 };
 
 static const struct counter_desc sq_stats_desc[] = {
index 0cd08b9f46ffb0f5d6d785b296492badd33df83a..4e54cb86fecedc86ee0f1e6ecd8369c1d2e0caa3 100644 (file)
@@ -94,6 +94,7 @@ struct mlx5e_sw_stats {
        u64 rx_cache_empty;
        u64 rx_cache_busy;
        u64 rx_cache_waive;
        u64 rx_cache_empty;
        u64 rx_cache_busy;
        u64 rx_cache_waive;
+       u64 rx_congst_umr;
        u64 ch_poll;
        u64 ch_arm;
        u64 ch_aff_change;
        u64 ch_poll;
        u64 ch_arm;
        u64 ch_aff_change;
@@ -188,6 +189,7 @@ struct mlx5e_rq_stats {
        u64 cache_empty;
        u64 cache_busy;
        u64 cache_waive;
        u64 cache_empty;
        u64 cache_busy;
        u64 cache_waive;
+       u64 congst_umr;
 };
 
 struct mlx5e_sq_stats {
 };
 
 struct mlx5e_sq_stats {
index 0b47126815b636246009123d6b6dbf14133db28c..2bd4c3184eba21d866ea8df66699a41145e3ec10 100644 (file)
@@ -229,6 +229,11 @@ static inline int mlx5_wq_ll_is_empty(struct mlx5_wq_ll *wq)
        return !wq->cur_sz;
 }
 
        return !wq->cur_sz;
 }
 
+static inline int mlx5_wq_ll_missing(struct mlx5_wq_ll *wq)
+{
+       return wq->fbc.sz_m1 - wq->cur_sz;
+}
+
 static inline void *mlx5_wq_ll_get_wqe(struct mlx5_wq_ll *wq, u16 ix)
 {
        return mlx5_frag_buf_get_wqe(&wq->fbc, ix);
 static inline void *mlx5_wq_ll_get_wqe(struct mlx5_wq_ll *wq, u16 ix)
 {
        return mlx5_frag_buf_get_wqe(&wq->fbc, ix);