---------------------------
+What: eepro100 network driver
+When: January 2007
+Why: replaced by the e100 driver
+Who: Adrian Bunk <bunk@stusta.de>
+
+---------------------------
+
What: Legacy /proc/pci interface (PCI_LEGACY_PROC)
When: March 2006
Why: deprecated since 2.5.53 in favor of lspci(8)
struct mv643xx_eth_platform_data *eth_pd;
eth_pd = pd->dev.platform_data;
- eth_pd->port_serial_control =
- mv64x60_read(&bh, MV643XX_ETH_PORT_SERIAL_CONTROL_REG(pd->id) & ~1);
-
eth_pd->force_phy_addr = 1;
eth_pd->phy_addr = pd->id;
+ eth_pd->speed = SPEED_100;
+ eth_pd->duplex = DUPLEX_FULL;
eth_pd->tx_queue_size = 400;
eth_pd->rx_queue_size = 800;
}
#include <linux/mca-legacy.h>
#include <linux/ethtool.h>
#include <linux/bitops.h>
+#include <linux/jiffies.h>
#include <asm/uaccess.h>
#include <asm/processor.h>
s = jiffies; /* warning: only active with interrupts on !! */
while (!(cfg_cmd->cmd_status & STAT_COMPL)) {
- if (jiffies - s > 30*HZ/100)
+ if (time_after(jiffies, s + 30*HZ/100))
break;
}
s = jiffies;
while (!(ias_cmd->cmd_status & STAT_COMPL)) {
- if (jiffies - s > 30*HZ/100)
+ if (time_after(jiffies, s + 30*HZ/100))
break;
}
s = jiffies;
while (!(tdr_cmd->cmd_status & STAT_COMPL)) {
- if (jiffies - s > 30*HZ/100) {
+ if (time_after(jiffies, s + 30*HZ/100)) {
printk(KERN_WARNING "%s: %d Problems while running the TDR.\n", dev->name, __LINE__);
result = 1;
break;
elmc_id_attn586();
s = jiffies;
while (!(mc_cmd->cmd_status & STAT_COMPL)) {
- if (jiffies - s > 30*HZ/100)
+ if (time_after(jiffies, s + 30*HZ/100))
break;
}
if (!(mc_cmd->cmd_status & STAT_COMPL)) {
#include <linux/highmem.h>
#include <linux/eisa.h>
#include <linux/bitops.h>
+#include <linux/jiffies.h>
#include <asm/irq.h> /* For NR_IRQS only. */
#include <asm/io.h>
#include <asm/uaccess.h>
skb = dev_alloc_skb(PKT_BUF_SZ);
if (skb == NULL) {
static unsigned long last_jif;
- if ((jiffies - last_jif) > 10 * HZ) {
+ if (time_after(jiffies, last_jif + 10 * HZ)) {
printk(KERN_WARNING "%s: memory shortage\n", dev->name);
last_jif = jiffies;
}
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/skbuff.h>
-#include <linux/irq.h>
+#include <asm/irq.h>
/* Used for the temporal inet entries and routing */
#include <linux/socket.h>
#include <linux/bitops.h>
static int init_i596_mem(struct net_device *dev)
{
struct i596_private *lp = dev->priv;
-#if !defined(ENABLE_MVME16x_NET) && !defined(ENABLE_BVME6000_NET)
+#if !defined(ENABLE_MVME16x_NET) && !defined(ENABLE_BVME6000_NET) || defined(ENABLE_APRICOT)
short ioaddr = dev->base_addr;
#endif
unsigned long flags;
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
+#include <linux/jiffies.h>
#include <asm/system.h>
#include <asm/io.h>
outb(inb(ioaddr + NE_RESET), ioaddr + NE_RESET);
while ((inb(ioaddr + NE_EN0_ISR) & ENISR_RESET) == 0)
- if (jiffies - reset_start_time > 2*HZ/100) {
+ if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
printk(" not found (no reset ack).\n");
return -ENODEV;
}
/* This check _should_not_ be necessary, omit eventually. */
while ((inb(NE_BASE+NE_EN0_ISR) & ENISR_RESET) == 0)
- if (jiffies - reset_start_time > 2*HZ/100) {
+ if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
printk("%s: ne_reset_8390() did not complete.\n", dev->name);
break;
}
dma_start = jiffies;
while ((inb(NE_BASE + NE_EN0_ISR) & ENISR_RDC) == 0)
- if (jiffies - dma_start > 2*HZ/100) { /* 20ms */
+ if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */
printk("%s: timeout waiting for Tx RDC.\n", dev->name);
apne_reset_8390(dev);
NS8390_init(dev,1);
static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,
int bufnum);
-struct ArcProto rawmode_proto =
+static struct ArcProto rawmode_proto =
{
.suffix = 'r',
.mtu = XMTU,
"must specify the shmem and irq!\n");
return -ENODEV;
}
+ if (dev->dev_addr[0] == 0) {
+ BUGMSG(D_NORMAL, "You need to specify your card's station "
+ "ID!\n");
+ return -ENODEV;
+ }
/*
- * Grab the memory region at mem_start for BUFFER_SIZE bytes.
+ * Grab the memory region at mem_start for MIRROR_SIZE bytes.
* Later in arcrimi_found() the real size will be determined
* and this reserve will be released and the correct size
* will be taken.
*/
- if (!request_mem_region(dev->mem_start, BUFFER_SIZE, "arcnet (90xx)")) {
+ if (!request_mem_region(dev->mem_start, MIRROR_SIZE, "arcnet (90xx)")) {
BUGMSG(D_NORMAL, "Card memory already allocated\n");
return -ENODEV;
}
- if (dev->dev_addr[0] == 0) {
- release_mem_region(dev->mem_start, BUFFER_SIZE);
- BUGMSG(D_NORMAL, "You need to specify your card's station "
- "ID!\n");
- return -ENODEV;
- }
return arcrimi_found(dev);
}
+static int check_mirror(unsigned long addr, size_t size)
+{
+ void __iomem *p;
+ int res = -1;
+
+ if (!request_mem_region(addr, size, "arcnet (90xx)"))
+ return -1;
+
+ p = ioremap(addr, size);
+ if (p) {
+ if (readb(p) == TESTvalue)
+ res = 1;
+ else
+ res = 0;
+ iounmap(p);
+ }
+
+ release_mem_region(addr, size);
+ return res;
+}
/*
* Set up the struct net_device associated with this card. Called after
{
struct arcnet_local *lp;
unsigned long first_mirror, last_mirror, shmem;
+ void __iomem *p;
int mirror_size;
int err;
+ p = ioremap(dev->mem_start, MIRROR_SIZE);
+ if (!p) {
+ release_mem_region(dev->mem_start, MIRROR_SIZE);
+ BUGMSG(D_NORMAL, "Can't ioremap\n");
+ return -ENODEV;
+ }
+
/* reserve the irq */
if (request_irq(dev->irq, &arcnet_interrupt, 0, "arcnet (RIM I)", dev)) {
- release_mem_region(dev->mem_start, BUFFER_SIZE);
+ iounmap(p);
+ release_mem_region(dev->mem_start, MIRROR_SIZE);
BUGMSG(D_NORMAL, "Can't get IRQ %d!\n", dev->irq);
return -ENODEV;
}
shmem = dev->mem_start;
- isa_writeb(TESTvalue, shmem);
- isa_writeb(dev->dev_addr[0], shmem + 1); /* actually the node ID */
+ writeb(TESTvalue, p);
+ writeb(dev->dev_addr[0], p + 1); /* actually the node ID */
/* find the real shared memory start/end points, including mirrors */
* 2k (or there are no mirrors at all) but on some, it's 4k.
*/
mirror_size = MIRROR_SIZE;
- if (isa_readb(shmem) == TESTvalue
- && isa_readb(shmem - mirror_size) != TESTvalue
- && isa_readb(shmem - 2 * mirror_size) == TESTvalue)
- mirror_size *= 2;
+ if (readb(p) == TESTvalue
+ && check_mirror(shmem - MIRROR_SIZE, MIRROR_SIZE) == 0
+ && check_mirror(shmem - 2 * MIRROR_SIZE, MIRROR_SIZE) == 1)
+ mirror_size = 2 * MIRROR_SIZE;
- first_mirror = last_mirror = shmem;
- while (isa_readb(first_mirror) == TESTvalue)
+ first_mirror = shmem - mirror_size;
+ while (check_mirror(first_mirror, mirror_size) == 1)
first_mirror -= mirror_size;
first_mirror += mirror_size;
- while (isa_readb(last_mirror) == TESTvalue)
+ last_mirror = shmem + mirror_size;
+ while (check_mirror(last_mirror, mirror_size) == 1)
last_mirror += mirror_size;
last_mirror -= mirror_size;
* with the correct size. There is a VERY slim chance this could
* fail.
*/
- release_mem_region(shmem, BUFFER_SIZE);
+ iounmap(p);
+ release_mem_region(shmem, MIRROR_SIZE);
if (!request_mem_region(dev->mem_start,
dev->mem_end - dev->mem_start + 1,
"arcnet (90xx)")) {
#include <net/arp.h>
#include <linux/init.h>
#include <linux/arcdevice.h>
+#include <linux/jiffies.h>
/* "do nothing" functions for protocol drivers */
static void null_rx(struct net_device *dev, int bufnum,
static int null_prepare_tx(struct net_device *dev, struct archdr *pkt,
int length, int bufnum);
+static void arcnet_rx(struct net_device *dev, int bufnum);
/*
* one ArcProto per possible proto ID. None of the elements of
struct ArcProto *arc_proto_map[256], *arc_proto_default,
*arc_bcast_proto, *arc_raw_proto;
-struct ArcProto arc_proto_null =
+static struct ArcProto arc_proto_null =
{
.suffix = '?',
.mtu = XMTU,
EXPORT_SYMBOL(arc_proto_default);
EXPORT_SYMBOL(arc_bcast_proto);
EXPORT_SYMBOL(arc_raw_proto);
-EXPORT_SYMBOL(arc_proto_null);
EXPORT_SYMBOL(arcnet_unregister_proto);
EXPORT_SYMBOL(arcnet_debug);
EXPORT_SYMBOL(alloc_arcdev);
arcnet_debug = debug;
- printk(VERSION);
+ printk("arcnet loaded.\n");
#ifdef ALPHA_WARNING
BUGLVL(D_EXTRA) {
* Dump the contents of an ARCnet buffer
*/
#if (ARCNET_DEBUG_MAX & (D_RX | D_TX))
-void arcnet_dump_packet(struct net_device *dev, int bufnum, char *desc,
- int take_arcnet_lock)
+static void arcnet_dump_packet(struct net_device *dev, int bufnum,
+ char *desc, int take_arcnet_lock)
{
struct arcnet_local *lp = dev->priv;
int i, length;
}
-EXPORT_SYMBOL(arcnet_dump_packet);
+#else
+
+#define arcnet_dump_packet(dev, bufnum, desc,take_arcnet_lock) do { } while (0)
+
#endif
spin_unlock_irqrestore(&lp->lock, flags);
- if (jiffies - lp->last_timeout > 10*HZ) {
+ if (time_after(jiffies, lp->last_timeout + 10*HZ)) {
BUGMSG(D_EXTRA, "tx timed out%s (status=%Xh, intmask=%Xh, dest=%02Xh)\n",
msg, status, lp->intmask, lp->lasttrans_dest);
lp->last_timeout = jiffies;
* This is a generic packet receiver that calls arcnet??_rx depending on the
* protocol ID found.
*/
-void arcnet_rx(struct net_device *dev, int bufnum)
+static void arcnet_rx(struct net_device *dev, int bufnum)
{
struct arcnet_local *lp = dev->priv;
struct archdr pkt;
/* Internal function declarations */
-static int com90xx_found(int ioaddr, int airq, u_long shmem);
+static int com90xx_found(int ioaddr, int airq, u_long shmem, void __iomem *);
static void com90xx_command(struct net_device *dev, int command);
static int com90xx_status(struct net_device *dev);
static void com90xx_setmask(struct net_device *dev, int mask);
unsigned long airqmask;
int ports[(0x3f0 - 0x200) / 16 + 1] =
{0};
- u_long shmems[(0xFF800 - 0xA0000) / 2048 + 1] =
- {0};
+ unsigned long *shmems;
+ void __iomem **iomem;
int numports, numshmems, *port;
u_long *p;
+ int index;
if (!io && !irq && !shmem && !*device && com90xx_skip_probe)
return;
+ shmems = kzalloc(((0x10000-0xa0000) / 0x800) * sizeof(unsigned long),
+ GFP_KERNEL);
+ if (!shmems)
+ return;
+ iomem = kzalloc(((0x10000-0xa0000) / 0x800) * sizeof(void __iomem *),
+ GFP_KERNEL);
+ if (!iomem) {
+ kfree(shmems);
+ return;
+ }
+
BUGLVL(D_NORMAL) printk(VERSION);
/* set up the arrays where we'll store the possible probe addresses */
if (!numports) {
BUGMSG2(D_NORMAL, "S1: No ARCnet cards found.\n");
+ kfree(shmems);
+ kfree(iomem);
return;
}
/* Stage 2: we have now reset any possible ARCnet cards, so we can't
* 0xD1 byte in the right place, or are read-only.
*/
numprint = -1;
- for (p = &shmems[0]; p < shmems + numshmems; p++) {
- u_long ptr = *p;
+ for (index = 0, p = &shmems[0]; index < numshmems; p++, index++) {
+ void __iomem *base;
numprint++;
numprint %= 8;
}
BUGMSG2(D_INIT, "%lXh ", *p);
- if (!request_mem_region(*p, BUFFER_SIZE, "arcnet (90xx)")) {
+ if (!request_mem_region(*p, MIRROR_SIZE, "arcnet (90xx)")) {
BUGMSG2(D_INIT_REASONS, "(request_mem_region)\n");
BUGMSG2(D_INIT_REASONS, "Stage 3: ");
BUGLVL(D_INIT_REASONS) numprint = 0;
- *p-- = shmems[--numshmems];
- continue;
+ goto out;
+ }
+ base = ioremap(*p, MIRROR_SIZE);
+ if (!base) {
+ BUGMSG2(D_INIT_REASONS, "(ioremap)\n");
+ BUGMSG2(D_INIT_REASONS, "Stage 3: ");
+ BUGLVL(D_INIT_REASONS) numprint = 0;
+ goto out1;
}
- if (isa_readb(ptr) != TESTvalue) {
+ if (readb(base) != TESTvalue) {
BUGMSG2(D_INIT_REASONS, "(%02Xh != %02Xh)\n",
- isa_readb(ptr), TESTvalue);
+ readb(base), TESTvalue);
BUGMSG2(D_INIT_REASONS, "S3: ");
BUGLVL(D_INIT_REASONS) numprint = 0;
- release_mem_region(*p, BUFFER_SIZE);
- *p-- = shmems[--numshmems];
- continue;
+ goto out2;
}
/* By writing 0x42 to the TESTvalue location, we also make
* sure no "mirror" shmem areas show up - if they occur
* in another pass through this loop, they will be discarded
* because *cptr != TESTvalue.
*/
- isa_writeb(0x42, ptr);
- if (isa_readb(ptr) != 0x42) {
+ writeb(0x42, base);
+ if (readb(base) != 0x42) {
BUGMSG2(D_INIT_REASONS, "(read only)\n");
BUGMSG2(D_INIT_REASONS, "S3: ");
- release_mem_region(*p, BUFFER_SIZE);
- *p-- = shmems[--numshmems];
- continue;
+ goto out2;
}
BUGMSG2(D_INIT_REASONS, "\n");
BUGMSG2(D_INIT_REASONS, "S3: ");
BUGLVL(D_INIT_REASONS) numprint = 0;
+ iomem[index] = base;
+ continue;
+ out2:
+ iounmap(base);
+ out1:
+ release_mem_region(*p, MIRROR_SIZE);
+ out:
+ *p-- = shmems[--numshmems];
+ index--;
}
BUGMSG2(D_INIT, "\n");
BUGMSG2(D_NORMAL, "S3: No ARCnet cards found.\n");
for (port = &ports[0]; port < ports + numports; port++)
release_region(*port, ARCNET_TOTAL_SIZE);
+ kfree(shmems);
+ kfree(iomem);
return;
}
/* Stage 4: something of a dummy, to report the shmems that are
mdelay(RESETtime);
} else {
/* just one shmem and port, assume they match */
- isa_writeb(TESTvalue, shmems[0]);
+ writeb(TESTvalue, iomem[0]);
}
#else
inb(_RESET);
mdelay(RESETtime);
#endif
- for (p = &shmems[0]; p < shmems + numshmems; p++) {
- u_long ptr = *p;
+ for (index = 0; index < numshmems; index++) {
+ u_long ptr = shmems[index];
+ void __iomem *base = iomem[index];
- if (isa_readb(ptr) == TESTvalue) { /* found one */
+ if (readb(base) == TESTvalue) { /* found one */
BUGMSG2(D_INIT, "%lXh)\n", *p);
openparen = 0;
/* register the card */
- if (com90xx_found(*port, airq, *p) == 0)
+ if (com90xx_found(*port, airq, ptr, base) == 0)
found = 1;
numprint = -1;
/* remove shmem from the list */
- *p = shmems[--numshmems];
+ shmems[index] = shmems[--numshmems];
+ iomem[index] = iomem[numshmems];
break; /* go to the next I/O port */
} else {
- BUGMSG2(D_INIT_REASONS, "%Xh-", isa_readb(ptr));
+ BUGMSG2(D_INIT_REASONS, "%Xh-", readb(base));
}
}
BUGLVL(D_INIT_REASONS) printk("\n");
/* Now put back TESTvalue on all leftover shmems. */
- for (p = &shmems[0]; p < shmems + numshmems; p++) {
- isa_writeb(TESTvalue, *p);
- release_mem_region(*p, BUFFER_SIZE);
+ for (index = 0; index < numshmems; index++) {
+ writeb(TESTvalue, iomem[index]);
+ iounmap(iomem[index]);
+ release_mem_region(shmems[index], MIRROR_SIZE);
}
+ kfree(shmems);
+ kfree(iomem);
}
+static int check_mirror(unsigned long addr, size_t size)
+{
+ void __iomem *p;
+ int res = -1;
+
+ if (!request_mem_region(addr, size, "arcnet (90xx)"))
+ return -1;
+
+ p = ioremap(addr, size);
+ if (p) {
+ if (readb(p) == TESTvalue)
+ res = 1;
+ else
+ res = 0;
+ iounmap(p);
+ }
+
+ release_mem_region(addr, size);
+ return res;
+}
/* Set up the struct net_device associated with this card. Called after
* probing succeeds.
*/
-static int __init com90xx_found(int ioaddr, int airq, u_long shmem)
+static int __init com90xx_found(int ioaddr, int airq, u_long shmem, void __iomem *p)
{
struct net_device *dev = NULL;
struct arcnet_local *lp;
dev = alloc_arcdev(device);
if (!dev) {
BUGMSG2(D_NORMAL, "com90xx: Can't allocate device!\n");
- release_mem_region(shmem, BUFFER_SIZE);
+ iounmap(p);
+ release_mem_region(shmem, MIRROR_SIZE);
return -ENOMEM;
}
lp = dev->priv;
* 2k (or there are no mirrors at all) but on some, it's 4k.
*/
mirror_size = MIRROR_SIZE;
- if (isa_readb(shmem) == TESTvalue
- && isa_readb(shmem - mirror_size) != TESTvalue
- && isa_readb(shmem - 2 * mirror_size) == TESTvalue)
- mirror_size *= 2;
+ if (readb(p) == TESTvalue &&
+ check_mirror(shmem - MIRROR_SIZE, MIRROR_SIZE) == 0 &&
+ check_mirror(shmem - 2 * MIRROR_SIZE, MIRROR_SIZE) == 1)
+ mirror_size = 2 * MIRROR_SIZE;
- first_mirror = last_mirror = shmem;
- while (isa_readb(first_mirror) == TESTvalue)
+ first_mirror = shmem - mirror_size;
+ while (check_mirror(first_mirror, mirror_size) == 1)
first_mirror -= mirror_size;
first_mirror += mirror_size;
- while (isa_readb(last_mirror) == TESTvalue)
+ last_mirror = shmem + mirror_size;
+ while (check_mirror(last_mirror, mirror_size) == 1)
last_mirror += mirror_size;
last_mirror -= mirror_size;
dev->mem_start = first_mirror;
dev->mem_end = last_mirror + MIRROR_SIZE - 1;
- release_mem_region(shmem, BUFFER_SIZE);
+ iounmap(p);
+ release_mem_region(shmem, MIRROR_SIZE);
+
if (!request_mem_region(dev->mem_start, dev->mem_end - dev->mem_start + 1, "arcnet (90xx)"))
goto err_free_dev;
int bufnum);
-struct ArcProto rfc1051_proto =
+static struct ArcProto rfc1051_proto =
{
.suffix = 's',
.mtu = XMTU - RFC1051_HDR_SIZE,
int bufnum);
static int continue_tx(struct net_device *dev, int bufnum);
-struct ArcProto rfc1201_proto =
+static struct ArcProto rfc1201_proto =
{
.suffix = 'a',
.mtu = 1500, /* could be more, but some receivers can't handle it... */
#include <linux/device.h>
#include <linux/init.h>
#include <linux/bitops.h>
+#include <linux/jiffies.h>
#include <asm/system.h>
#include <asm/ecard.h>
dma_start = jiffies;
while ((readb (addr + EN0_ISR) & ENISR_RDC) == 0)
- if (jiffies - dma_start > 2*HZ/100) { /* 20ms */
+ if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */
printk(KERN_ERR "%s: timeout waiting for TX RDC\n",
dev->name);
etherh_reset (dev);
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/bitops.h>
+#include <linux/jiffies.h>
#include <asm/system.h>
#include <asm/io.h>
static int eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l)
{
- int starttime;
+ unsigned long starttime;
outb(0xff, ioaddr + TX_STATUS_REG);
outb(TX_START | 1, ioaddr + TRANSMIT_START_REG);
while( (inb(ioaddr + TX_STATUS_REG) & 0x80) == 0) {
- if( (jiffies - starttime) > TX_TIMEOUT) {
+ if( time_after(jiffies, starttime + TX_TIMEOUT)) {
return -1;
}
}
static int eth16i_receive_probe_packet(int ioaddr)
{
- int starttime;
+ unsigned long starttime;
starttime = jiffies;
while((inb(ioaddr + TX_STATUS_REG) & 0x20) == 0) {
- if( (jiffies - starttime) > TX_TIMEOUT) {
+ if( time_after(jiffies, starttime + TX_TIMEOUT)) {
if(eth16i_debug > 1)
printk(KERN_DEBUG "Timeout occurred waiting transmit packet received\n");
starttime = jiffies;
while((inb(ioaddr + RX_STATUS_REG) & 0x80) == 0) {
- if( (jiffies - starttime) > TX_TIMEOUT) {
+ if( time_after(jiffies, starttime + TX_TIMEOUT)) {
if(eth16i_debug > 1)
printk(KERN_DEBUG "Timeout occurred waiting receive packet\n");
return -1;
* 0.47: 26 Oct 2005: Add phyaddr 0 in phy scan.
* 0.48: 24 Dec 2005: Disable TSO, bugfix for pci_map_single
* 0.49: 10 Dec 2005: Fix tso for large buffers.
+ * 0.50: 20 Jan 2006: Add 8021pq tagging support.
+ * 0.51: 20 Jan 2006: Add 64bit consistent memory allocation for rings.
+ * 0.52: 20 Jan 2006: Add MSI/MSIX support.
*
* Known bugs:
* We suspect that on some hardware no TX done interrupts are generated.
* DEV_NEED_TIMERIRQ will not harm you on sane hardware, only generating a few
* superfluous timer interrupts from the nic.
*/
-#define FORCEDETH_VERSION "0.49"
+#define FORCEDETH_VERSION "0.52"
#define DRV_NAME "forcedeth"
#include <linux/module.h>
#define DEV_HAS_LARGEDESC 0x0004 /* device supports jumbo frames and needs packet format 2 */
#define DEV_HAS_HIGH_DMA 0x0008 /* device supports 64bit dma */
#define DEV_HAS_CHECKSUM 0x0010 /* device supports tx and rx checksum offloads */
+#define DEV_HAS_VLAN 0x0020 /* device supports vlan tagging and striping */
+#define DEV_HAS_MSI 0x0040 /* device supports MSI */
+#define DEV_HAS_MSI_X 0x0080 /* device supports MSI-X */
enum {
NvRegIrqStatus = 0x000,
#define NVREG_IRQ_TX_OK 0x0010
#define NVREG_IRQ_TIMER 0x0020
#define NVREG_IRQ_LINK 0x0040
-#define NVREG_IRQ_TX_ERROR 0x0080
-#define NVREG_IRQ_TX1 0x0100
+#define NVREG_IRQ_RX_FORCED 0x0080
+#define NVREG_IRQ_TX_FORCED 0x0100
#define NVREG_IRQMASK_THROUGHPUT 0x00df
#define NVREG_IRQMASK_CPU 0x0040
+#define NVREG_IRQ_TX_ALL (NVREG_IRQ_TX_ERR|NVREG_IRQ_TX_OK|NVREG_IRQ_TX_FORCED)
+#define NVREG_IRQ_RX_ALL (NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_RX_FORCED)
+#define NVREG_IRQ_OTHER (NVREG_IRQ_TIMER|NVREG_IRQ_LINK)
#define NVREG_IRQ_UNKNOWN (~(NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_TX_ERR| \
- NVREG_IRQ_TX_OK|NVREG_IRQ_TIMER|NVREG_IRQ_LINK|NVREG_IRQ_TX_ERROR| \
- NVREG_IRQ_TX1))
+ NVREG_IRQ_TX_OK|NVREG_IRQ_TIMER|NVREG_IRQ_LINK|NVREG_IRQ_RX_FORCED| \
+ NVREG_IRQ_TX_FORCED))
NvRegUnknownSetupReg6 = 0x008,
#define NVREG_UNKSETUP6_VAL 3
NvRegPollingInterval = 0x00c,
#define NVREG_POLL_DEFAULT_THROUGHPUT 970
#define NVREG_POLL_DEFAULT_CPU 13
+ NvRegMSIMap0 = 0x020,
+ NvRegMSIMap1 = 0x024,
+ NvRegMSIIrqMask = 0x030,
+#define NVREG_MSI_VECTOR_0_ENABLED 0x01
NvRegMisc1 = 0x080,
#define NVREG_MISC1_HD 0x02
#define NVREG_MISC1_FORCE 0x3b0f3c
#define NVREG_TXRXCTL_DESC_1 0
#define NVREG_TXRXCTL_DESC_2 0x02100
#define NVREG_TXRXCTL_DESC_3 0x02200
+#define NVREG_TXRXCTL_VLANSTRIP 0x00040
+#define NVREG_TXRXCTL_VLANINS 0x00080
+ NvRegTxRingPhysAddrHigh = 0x148,
+ NvRegRxRingPhysAddrHigh = 0x14C,
NvRegMIIStatus = 0x180,
#define NVREG_MIISTAT_ERROR 0x0001
#define NVREG_MIISTAT_LINKCHANGE 0x0008
#define NVREG_POWERSTATE_D1 0x0001
#define NVREG_POWERSTATE_D2 0x0002
#define NVREG_POWERSTATE_D3 0x0003
+ NvRegVlanControl = 0x300,
+#define NVREG_VLANCONTROL_ENABLE 0x2000
+ NvRegMSIXMap0 = 0x3e0,
+ NvRegMSIXMap1 = 0x3e4,
+ NvRegMSIXIrqStatus = 0x3f0,
};
/* Big endian: should work, but is untested */
struct ring_desc_ex {
u32 PacketBufferHigh;
u32 PacketBufferLow;
- u32 Reserved;
+ u32 TxVlan;
u32 FlagLen;
};
#define NV_TX2_CHECKSUM_L3 (1<<27)
#define NV_TX2_CHECKSUM_L4 (1<<26)
+#define NV_TX3_VLAN_TAG_PRESENT (1<<18)
+
#define NV_RX_DESCRIPTORVALID (1<<16)
#define NV_RX_MISSEDFRAME (1<<17)
#define NV_RX_SUBSTRACT1 (1<<18)
#define NV_RX2_ERROR (1<<30)
#define NV_RX2_AVAIL (1<<31)
+#define NV_RX3_VLAN_TAG_PRESENT (1<<16)
+#define NV_RX3_VLAN_TAG_MASK (0x0000FFFF)
+
/* Miscelaneous hardware related defines: */
#define NV_PCI_REGSZ 0x270
#define LPA_1000FULL 0x0800
#define LPA_1000HALF 0x0400
+/* MSI/MSI-X defines */
+#define NV_MSI_X_MAX_VECTORS 8
+#define NV_MSI_X_VECTORS_MASK 0x000f
+#define NV_MSI_CAPABLE 0x0010
+#define NV_MSI_X_CAPABLE 0x0020
+#define NV_MSI_ENABLED 0x0040
+#define NV_MSI_X_ENABLED 0x0080
+
+#define NV_MSI_X_VECTOR_ALL 0x0
+#define NV_MSI_X_VECTOR_RX 0x0
+#define NV_MSI_X_VECTOR_TX 0x1
+#define NV_MSI_X_VECTOR_OTHER 0x2
/*
* SMP locking:
u32 irqmask;
u32 desc_ver;
u32 txrxctl_bits;
+ u32 vlanctl_bits;
void __iomem *base;
unsigned int pkt_limit;
struct timer_list oom_kick;
struct timer_list nic_poll;
+ u32 nic_poll_irq;
/* media detection workaround.
* Locking: Within irq hander or disable_irq+spin_lock(&np->lock);
dma_addr_t tx_dma[TX_RING];
unsigned int tx_dma_len[TX_RING];
u32 tx_flags;
+
+ /* vlan fields */
+ struct vlan_group *vlangrp;
+
+ /* msi/msi-x fields */
+ u32 msi_flags;
+ struct msix_entry msi_x_entry[NV_MSI_X_MAX_VECTORS];
};
/*
*/
static int poll_interval = -1;
+/*
+ * Disable MSI interrupts
+ */
+static int disable_msi = 0;
+
+/*
+ * Disable MSIX interrupts
+ */
+static int disable_msix = 0;
+
static inline struct fe_priv *get_nvpriv(struct net_device *dev)
{
return netdev_priv(dev);
return 0;
}
+#define NV_SETUP_RX_RING 0x01
+#define NV_SETUP_TX_RING 0x02
+
+static void setup_hw_rings(struct net_device *dev, int rxtx_flags)
+{
+ struct fe_priv *np = get_nvpriv(dev);
+ u8 __iomem *base = get_hwbase(dev);
+
+ if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
+ if (rxtx_flags & NV_SETUP_RX_RING) {
+ writel((u32) cpu_to_le64(np->ring_addr), base + NvRegRxRingPhysAddr);
+ }
+ if (rxtx_flags & NV_SETUP_TX_RING) {
+ writel((u32) cpu_to_le64(np->ring_addr + RX_RING*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr);
+ }
+ } else {
+ if (rxtx_flags & NV_SETUP_RX_RING) {
+ writel((u32) cpu_to_le64(np->ring_addr), base + NvRegRxRingPhysAddr);
+ writel((u32) (cpu_to_le64(np->ring_addr) >> 32), base + NvRegRxRingPhysAddrHigh);
+ }
+ if (rxtx_flags & NV_SETUP_TX_RING) {
+ writel((u32) cpu_to_le64(np->ring_addr + RX_RING*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddr);
+ writel((u32) (cpu_to_le64(np->ring_addr + RX_RING*sizeof(struct ring_desc_ex)) >> 32), base + NvRegTxRingPhysAddrHigh);
+ }
+ }
+}
+
#define MII_READ (-1)
/* mii_rw: read/write a register on the PHY.
*
struct net_device *dev = (struct net_device *) data;
struct fe_priv *np = netdev_priv(dev);
- disable_irq(dev->irq);
+
+ if (!(np->msi_flags & NV_MSI_X_ENABLED) ||
+ ((np->msi_flags & NV_MSI_X_ENABLED) &&
+ ((np->msi_flags & NV_MSI_X_VECTORS_MASK) == 0x1))) {
+ disable_irq(dev->irq);
+ } else {
+ disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
+ }
if (nv_alloc_rx(dev)) {
spin_lock(&np->lock);
if (!np->in_shutdown)
mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
spin_unlock(&np->lock);
}
- enable_irq(dev->irq);
+ if (!(np->msi_flags & NV_MSI_X_ENABLED) ||
+ ((np->msi_flags & NV_MSI_X_ENABLED) &&
+ ((np->msi_flags & NV_MSI_X_VECTORS_MASK) == 0x1))) {
+ enable_irq(dev->irq);
+ } else {
+ enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
+ }
}
static void nv_init_rx(struct net_device *dev)
}
if (np->tx_skbuff[skbnr]) {
- dev_kfree_skb_irq(np->tx_skbuff[skbnr]);
+ dev_kfree_skb_any(np->tx_skbuff[skbnr]);
np->tx_skbuff[skbnr] = NULL;
return 1;
} else {
u32 bcnt;
u32 size = skb->len-skb->data_len;
u32 entries = (size >> NV_TX2_TSO_MAX_SHIFT) + ((size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0);
+ u32 tx_flags_vlan = 0;
/* add fragments to entries count */
for (i = 0; i < fragments; i++) {
#endif
tx_flags_extra = (skb->ip_summed == CHECKSUM_HW ? (NV_TX2_CHECKSUM_L3|NV_TX2_CHECKSUM_L4) : 0);
+ /* vlan tag */
+ if (np->vlangrp && vlan_tx_tag_present(skb)) {
+ tx_flags_vlan = NV_TX3_VLAN_TAG_PRESENT | vlan_tx_tag_get(skb);
+ }
+
/* set tx flags */
if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
np->tx_ring.orig[start_nr].FlagLen |= cpu_to_le32(tx_flags | tx_flags_extra);
} else {
+ np->tx_ring.ex[start_nr].TxVlan = cpu_to_le32(tx_flags_vlan);
np->tx_ring.ex[start_nr].FlagLen |= cpu_to_le32(tx_flags | tx_flags_extra);
}
{
struct fe_priv *np = netdev_priv(dev);
u8 __iomem *base = get_hwbase(dev);
+ u32 status;
+
+ if (np->msi_flags & NV_MSI_X_ENABLED)
+ status = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK;
+ else
+ status = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK;
- printk(KERN_INFO "%s: Got tx_timeout. irq: %08x\n", dev->name,
- readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK);
+ printk(KERN_INFO "%s: Got tx_timeout. irq: %08x\n", dev->name, status);
{
int i;
printk(KERN_DEBUG "%s: tx_timeout: dead entries!\n", dev->name);
nv_drain_tx(dev);
np->next_tx = np->nic_tx = 0;
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
- writel((u32) (np->ring_addr + RX_RING*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr);
- else
- writel((u32) (np->ring_addr + RX_RING*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddr);
+ setup_hw_rings(dev, NV_SETUP_TX_RING);
netif_wake_queue(dev);
}
{
struct fe_priv *np = netdev_priv(dev);
u32 Flags;
+ u32 vlanflags = 0;
+
for (;;) {
struct sk_buff *skb;
} else {
Flags = le32_to_cpu(np->rx_ring.ex[i].FlagLen);
len = nv_descr_getlength_ex(&np->rx_ring.ex[i], np->desc_ver);
+ vlanflags = le32_to_cpu(np->rx_ring.ex[i].PacketBufferLow);
}
dprintk(KERN_DEBUG "%s: nv_rx_process: looking at packet %d, Flags 0x%x.\n",
skb->protocol = eth_type_trans(skb, dev);
dprintk(KERN_DEBUG "%s: nv_rx_process: packet %d with %d bytes, proto %d accepted.\n",
dev->name, np->cur_rx, len, skb->protocol);
- netif_rx(skb);
+ if (np->vlangrp && (vlanflags & NV_RX3_VLAN_TAG_PRESENT)) {
+ vlan_hwaccel_rx(skb, np->vlangrp, vlanflags & NV_RX3_VLAN_TAG_MASK);
+ } else {
+ netif_rx(skb);
+ }
dev->last_rx = jiffies;
np->stats.rx_packets++;
np->stats.rx_bytes += len;
* guessed, there is probably a simpler approach.
* Changing the MTU is a rare event, it shouldn't matter.
*/
- disable_irq(dev->irq);
+ if (!(np->msi_flags & NV_MSI_X_ENABLED) ||
+ ((np->msi_flags & NV_MSI_X_ENABLED) &&
+ ((np->msi_flags & NV_MSI_X_VECTORS_MASK) == 0x1))) {
+ disable_irq(dev->irq);
+ } else {
+ disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
+ disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
+ disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
+ }
spin_lock_bh(&dev->xmit_lock);
spin_lock(&np->lock);
/* stop engines */
}
/* reinit nic view of the rx queue */
writel(np->rx_buf_sz, base + NvRegOffloadConfig);
- writel((u32) np->ring_addr, base + NvRegRxRingPhysAddr);
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
- writel((u32) (np->ring_addr + RX_RING*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr);
- else
- writel((u32) (np->ring_addr + RX_RING*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddr);
+ setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
writel( ((RX_RING-1) << NVREG_RINGSZ_RXSHIFT) + ((TX_RING-1) << NVREG_RINGSZ_TXSHIFT),
base + NvRegRingSizes);
pci_push(base);
nv_start_tx(dev);
spin_unlock(&np->lock);
spin_unlock_bh(&dev->xmit_lock);
- enable_irq(dev->irq);
+ if (!(np->msi_flags & NV_MSI_X_ENABLED) ||
+ ((np->msi_flags & NV_MSI_X_ENABLED) &&
+ ((np->msi_flags & NV_MSI_X_VECTORS_MASK) == 0x1))) {
+ enable_irq(dev->irq);
+ } else {
+ enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
+ enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
+ enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
+ }
}
return 0;
}
dprintk(KERN_DEBUG "%s: nv_nic_irq\n", dev->name);
for (i=0; ; i++) {
- events = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK;
- writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
+ if (!(np->msi_flags & NV_MSI_X_ENABLED)) {
+ events = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK;
+ writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
+ } else {
+ events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK;
+ writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus);
+ }
pci_push(base);
dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events);
if (!(events & np->irqmask))
if (i > max_interrupt_work) {
spin_lock(&np->lock);
/* disable interrupts on the nic */
- writel(0, base + NvRegIrqMask);
+ if (!(np->msi_flags & NV_MSI_X_ENABLED))
+ writel(0, base + NvRegIrqMask);
+ else
+ writel(np->irqmask, base + NvRegIrqMask);
pci_push(base);
- if (!np->in_shutdown)
+ if (!np->in_shutdown) {
+ np->nic_poll_irq = np->irqmask;
mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
+ }
printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq.\n", dev->name, i);
spin_unlock(&np->lock);
break;
return IRQ_RETVAL(i);
}
+static irqreturn_t nv_nic_irq_tx(int foo, void *data, struct pt_regs *regs)
+{
+ struct net_device *dev = (struct net_device *) data;
+ struct fe_priv *np = netdev_priv(dev);
+ u8 __iomem *base = get_hwbase(dev);
+ u32 events;
+ int i;
+
+ dprintk(KERN_DEBUG "%s: nv_nic_irq_tx\n", dev->name);
+
+ for (i=0; ; i++) {
+ events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_TX_ALL;
+ writel(NVREG_IRQ_TX_ALL, base + NvRegMSIXIrqStatus);
+ pci_push(base);
+ dprintk(KERN_DEBUG "%s: tx irq: %08x\n", dev->name, events);
+ if (!(events & np->irqmask))
+ break;
+
+ spin_lock(&np->lock);
+ nv_tx_done(dev);
+ spin_unlock(&np->lock);
+
+ if (events & (NVREG_IRQ_TX_ERR)) {
+ dprintk(KERN_DEBUG "%s: received irq with events 0x%x. Probably TX fail.\n",
+ dev->name, events);
+ }
+ if (i > max_interrupt_work) {
+ spin_lock(&np->lock);
+ /* disable interrupts on the nic */
+ writel(NVREG_IRQ_TX_ALL, base + NvRegIrqMask);
+ pci_push(base);
+
+ if (!np->in_shutdown) {
+ np->nic_poll_irq |= NVREG_IRQ_TX_ALL;
+ mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
+ }
+ printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_tx.\n", dev->name, i);
+ spin_unlock(&np->lock);
+ break;
+ }
+
+ }
+ dprintk(KERN_DEBUG "%s: nv_nic_irq_tx completed\n", dev->name);
+
+ return IRQ_RETVAL(i);
+}
+
+static irqreturn_t nv_nic_irq_rx(int foo, void *data, struct pt_regs *regs)
+{
+ struct net_device *dev = (struct net_device *) data;
+ struct fe_priv *np = netdev_priv(dev);
+ u8 __iomem *base = get_hwbase(dev);
+ u32 events;
+ int i;
+
+ dprintk(KERN_DEBUG "%s: nv_nic_irq_rx\n", dev->name);
+
+ for (i=0; ; i++) {
+ events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_RX_ALL;
+ writel(NVREG_IRQ_RX_ALL, base + NvRegMSIXIrqStatus);
+ pci_push(base);
+ dprintk(KERN_DEBUG "%s: rx irq: %08x\n", dev->name, events);
+ if (!(events & np->irqmask))
+ break;
+
+ nv_rx_process(dev);
+ if (nv_alloc_rx(dev)) {
+ spin_lock(&np->lock);
+ if (!np->in_shutdown)
+ mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
+ spin_unlock(&np->lock);
+ }
+
+ if (i > max_interrupt_work) {
+ spin_lock(&np->lock);
+ /* disable interrupts on the nic */
+ writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask);
+ pci_push(base);
+
+ if (!np->in_shutdown) {
+ np->nic_poll_irq |= NVREG_IRQ_RX_ALL;
+ mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
+ }
+ printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_rx.\n", dev->name, i);
+ spin_unlock(&np->lock);
+ break;
+ }
+
+ }
+ dprintk(KERN_DEBUG "%s: nv_nic_irq_rx completed\n", dev->name);
+
+ return IRQ_RETVAL(i);
+}
+
+static irqreturn_t nv_nic_irq_other(int foo, void *data, struct pt_regs *regs)
+{
+ struct net_device *dev = (struct net_device *) data;
+ struct fe_priv *np = netdev_priv(dev);
+ u8 __iomem *base = get_hwbase(dev);
+ u32 events;
+ int i;
+
+ dprintk(KERN_DEBUG "%s: nv_nic_irq_other\n", dev->name);
+
+ for (i=0; ; i++) {
+ events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_OTHER;
+ writel(NVREG_IRQ_OTHER, base + NvRegMSIXIrqStatus);
+ pci_push(base);
+ dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events);
+ if (!(events & np->irqmask))
+ break;
+
+ if (events & NVREG_IRQ_LINK) {
+ spin_lock(&np->lock);
+ nv_link_irq(dev);
+ spin_unlock(&np->lock);
+ }
+ if (np->need_linktimer && time_after(jiffies, np->link_timeout)) {
+ spin_lock(&np->lock);
+ nv_linkchange(dev);
+ spin_unlock(&np->lock);
+ np->link_timeout = jiffies + LINK_TIMEOUT;
+ }
+ if (events & (NVREG_IRQ_UNKNOWN)) {
+ printk(KERN_DEBUG "%s: received irq with unknown events 0x%x. Please report\n",
+ dev->name, events);
+ }
+ if (i > max_interrupt_work) {
+ spin_lock(&np->lock);
+ /* disable interrupts on the nic */
+ writel(NVREG_IRQ_OTHER, base + NvRegIrqMask);
+ pci_push(base);
+
+ if (!np->in_shutdown) {
+ np->nic_poll_irq |= NVREG_IRQ_OTHER;
+ mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
+ }
+ printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_other.\n", dev->name, i);
+ spin_unlock(&np->lock);
+ break;
+ }
+
+ }
+ dprintk(KERN_DEBUG "%s: nv_nic_irq_other completed\n", dev->name);
+
+ return IRQ_RETVAL(i);
+}
+
static void nv_do_nic_poll(unsigned long data)
{
struct net_device *dev = (struct net_device *) data;
struct fe_priv *np = netdev_priv(dev);
u8 __iomem *base = get_hwbase(dev);
+ u32 mask = 0;
- disable_irq(dev->irq);
- /* FIXME: Do we need synchronize_irq(dev->irq) here? */
/*
+ * First disable irq(s) and then
* reenable interrupts on the nic, we have to do this before calling
* nv_nic_irq because that may decide to do otherwise
*/
- writel(np->irqmask, base + NvRegIrqMask);
+
+ if (!(np->msi_flags & NV_MSI_X_ENABLED) ||
+ ((np->msi_flags & NV_MSI_X_ENABLED) &&
+ ((np->msi_flags & NV_MSI_X_VECTORS_MASK) == 0x1))) {
+ disable_irq(dev->irq);
+ mask = np->irqmask;
+ } else {
+ if (np->nic_poll_irq & NVREG_IRQ_RX_ALL) {
+ disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
+ mask |= NVREG_IRQ_RX_ALL;
+ }
+ if (np->nic_poll_irq & NVREG_IRQ_TX_ALL) {
+ disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
+ mask |= NVREG_IRQ_TX_ALL;
+ }
+ if (np->nic_poll_irq & NVREG_IRQ_OTHER) {
+ disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
+ mask |= NVREG_IRQ_OTHER;
+ }
+ }
+ np->nic_poll_irq = 0;
+
+ /* FIXME: Do we need synchronize_irq(dev->irq) here? */
+
+ writel(mask, base + NvRegIrqMask);
pci_push(base);
- nv_nic_irq((int) 0, (void *) data, (struct pt_regs *) NULL);
- enable_irq(dev->irq);
+
+ if (!(np->msi_flags & NV_MSI_X_ENABLED) ||
+ ((np->msi_flags & NV_MSI_X_ENABLED) &&
+ ((np->msi_flags & NV_MSI_X_VECTORS_MASK) == 0x1))) {
+ nv_nic_irq((int) 0, (void *) data, (struct pt_regs *) NULL);
+ enable_irq(dev->irq);
+ } else {
+ if (np->nic_poll_irq & NVREG_IRQ_RX_ALL) {
+ nv_nic_irq_rx((int) 0, (void *) data, (struct pt_regs *) NULL);
+ enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
+ }
+ if (np->nic_poll_irq & NVREG_IRQ_TX_ALL) {
+ nv_nic_irq_tx((int) 0, (void *) data, (struct pt_regs *) NULL);
+ enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
+ }
+ if (np->nic_poll_irq & NVREG_IRQ_OTHER) {
+ nv_nic_irq_other((int) 0, (void *) data, (struct pt_regs *) NULL);
+ enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
+ }
+ }
}
#ifdef CONFIG_NET_POLL_CONTROLLER
.get_perm_addr = ethtool_op_get_perm_addr,
};
+static void nv_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
+{
+ struct fe_priv *np = get_nvpriv(dev);
+
+ spin_lock_irq(&np->lock);
+
+ /* save vlan group */
+ np->vlangrp = grp;
+
+ if (grp) {
+ /* enable vlan on MAC */
+ np->txrxctl_bits |= NVREG_TXRXCTL_VLANSTRIP | NVREG_TXRXCTL_VLANINS;
+ } else {
+ /* disable vlan on MAC */
+ np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANSTRIP;
+ np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANINS;
+ }
+
+ writel(np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
+
+ spin_unlock_irq(&np->lock);
+};
+
+static void nv_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
+{
+ /* nothing to do */
+};
+
+static void set_msix_vector_map(struct net_device *dev, u32 vector, u32 irqmask)
+{
+ u8 __iomem *base = get_hwbase(dev);
+ int i;
+ u32 msixmap = 0;
+
+ /* Each interrupt bit can be mapped to a MSIX vector (4 bits).
+ * MSIXMap0 represents the first 8 interrupts and MSIXMap1 represents
+ * the remaining 8 interrupts.
+ */
+ for (i = 0; i < 8; i++) {
+ if ((irqmask >> i) & 0x1) {
+ msixmap |= vector << (i << 2);
+ }
+ }
+ writel(readl(base + NvRegMSIXMap0) | msixmap, base + NvRegMSIXMap0);
+
+ msixmap = 0;
+ for (i = 0; i < 8; i++) {
+ if ((irqmask >> (i + 8)) & 0x1) {
+ msixmap |= vector << (i << 2);
+ }
+ }
+ writel(readl(base + NvRegMSIXMap1) | msixmap, base + NvRegMSIXMap1);
+}
+
static int nv_open(struct net_device *dev)
{
struct fe_priv *np = netdev_priv(dev);
u8 __iomem *base = get_hwbase(dev);
- int ret, oom, i;
+ int ret = 1;
+ int oom, i;
dprintk(KERN_DEBUG "nv_open: begin\n");
nv_copy_mac_to_hw(dev);
/* 4) give hw rings */
- writel((u32) np->ring_addr, base + NvRegRxRingPhysAddr);
- if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
- writel((u32) (np->ring_addr + RX_RING*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr);
- else
- writel((u32) (np->ring_addr + RX_RING*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddr);
+ setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
writel( ((RX_RING-1) << NVREG_RINGSZ_RXSHIFT) + ((TX_RING-1) << NVREG_RINGSZ_TXSHIFT),
base + NvRegRingSizes);
writel(np->linkspeed, base + NvRegLinkSpeed);
writel(NVREG_UNKSETUP3_VAL1, base + NvRegUnknownSetupReg3);
writel(np->txrxctl_bits, base + NvRegTxRxControl);
+ writel(np->vlanctl_bits, base + NvRegVlanControl);
pci_push(base);
writel(NVREG_TXRXCTL_BIT1|np->txrxctl_bits, base + NvRegTxRxControl);
reg_delay(dev, NvRegUnknownSetupReg5, NVREG_UNKSETUP5_BIT31, NVREG_UNKSETUP5_BIT31,
writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
pci_push(base);
- ret = request_irq(dev->irq, &nv_nic_irq, SA_SHIRQ, dev->name, dev);
- if (ret)
- goto out_drain;
+ if (np->msi_flags & NV_MSI_X_CAPABLE) {
+ for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) {
+ np->msi_x_entry[i].entry = i;
+ }
+ if ((ret = pci_enable_msix(np->pci_dev, np->msi_x_entry, (np->msi_flags & NV_MSI_X_VECTORS_MASK))) == 0) {
+ np->msi_flags |= NV_MSI_X_ENABLED;
+ if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT) {
+ /* Request irq for rx handling */
+ if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector, &nv_nic_irq_rx, SA_SHIRQ, dev->name, dev) != 0) {
+ printk(KERN_INFO "forcedeth: request_irq failed for rx %d\n", ret);
+ pci_disable_msix(np->pci_dev);
+ np->msi_flags &= ~NV_MSI_X_ENABLED;
+ goto out_drain;
+ }
+ /* Request irq for tx handling */
+ if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector, &nv_nic_irq_tx, SA_SHIRQ, dev->name, dev) != 0) {
+ printk(KERN_INFO "forcedeth: request_irq failed for tx %d\n", ret);
+ pci_disable_msix(np->pci_dev);
+ np->msi_flags &= ~NV_MSI_X_ENABLED;
+ goto out_drain;
+ }
+ /* Request irq for link and timer handling */
+ if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector, &nv_nic_irq_other, SA_SHIRQ, dev->name, dev) != 0) {
+ printk(KERN_INFO "forcedeth: request_irq failed for link %d\n", ret);
+ pci_disable_msix(np->pci_dev);
+ np->msi_flags &= ~NV_MSI_X_ENABLED;
+ goto out_drain;
+ }
+
+ /* map interrupts to their respective vector */
+ writel(0, base + NvRegMSIXMap0);
+ writel(0, base + NvRegMSIXMap1);
+ set_msix_vector_map(dev, NV_MSI_X_VECTOR_RX, NVREG_IRQ_RX_ALL);
+ set_msix_vector_map(dev, NV_MSI_X_VECTOR_TX, NVREG_IRQ_TX_ALL);
+ set_msix_vector_map(dev, NV_MSI_X_VECTOR_OTHER, NVREG_IRQ_OTHER);
+ } else {
+ /* Request irq for all interrupts */
+ if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector, &nv_nic_irq, SA_SHIRQ, dev->name, dev) != 0) {
+ printk(KERN_INFO "forcedeth: request_irq failed %d\n", ret);
+ pci_disable_msix(np->pci_dev);
+ np->msi_flags &= ~NV_MSI_X_ENABLED;
+ goto out_drain;
+ }
+
+ /* map interrupts to vector 0 */
+ writel(0, base + NvRegMSIXMap0);
+ writel(0, base + NvRegMSIXMap1);
+ }
+ }
+ }
+ if (ret != 0 && np->msi_flags & NV_MSI_CAPABLE) {
+ if ((ret = pci_enable_msi(np->pci_dev)) == 0) {
+ np->msi_flags |= NV_MSI_ENABLED;
+ if (request_irq(np->pci_dev->irq, &nv_nic_irq, SA_SHIRQ, dev->name, dev) != 0) {
+ printk(KERN_INFO "forcedeth: request_irq failed %d\n", ret);
+ pci_disable_msi(np->pci_dev);
+ np->msi_flags &= ~NV_MSI_ENABLED;
+ goto out_drain;
+ }
+
+ /* map interrupts to vector 0 */
+ writel(0, base + NvRegMSIMap0);
+ writel(0, base + NvRegMSIMap1);
+ /* enable msi vector 0 */
+ writel(NVREG_MSI_VECTOR_0_ENABLED, base + NvRegMSIIrqMask);
+ }
+ }
+ if (ret != 0) {
+ if (request_irq(np->pci_dev->irq, &nv_nic_irq, SA_SHIRQ, dev->name, dev) != 0)
+ goto out_drain;
+ }
/* ask for interrupts */
writel(np->irqmask, base + NvRegIrqMask);
{
struct fe_priv *np = netdev_priv(dev);
u8 __iomem *base;
+ int i;
spin_lock_irq(&np->lock);
np->in_shutdown = 1;
/* disable interrupts on the nic or we will lock up */
base = get_hwbase(dev);
- writel(0, base + NvRegIrqMask);
+ if (np->msi_flags & NV_MSI_X_ENABLED) {
+ writel(np->irqmask, base + NvRegIrqMask);
+ } else {
+ if (np->msi_flags & NV_MSI_ENABLED)
+ writel(0, base + NvRegMSIIrqMask);
+ writel(0, base + NvRegIrqMask);
+ }
pci_push(base);
dprintk(KERN_INFO "%s: Irqmask is zero again\n", dev->name);
spin_unlock_irq(&np->lock);
- free_irq(dev->irq, dev);
+ if (np->msi_flags & NV_MSI_X_ENABLED) {
+ for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) {
+ free_irq(np->msi_x_entry[i].vector, dev);
+ }
+ pci_disable_msix(np->pci_dev);
+ np->msi_flags &= ~NV_MSI_X_ENABLED;
+ } else {
+ free_irq(np->pci_dev->irq, dev);
+ if (np->msi_flags & NV_MSI_ENABLED) {
+ pci_disable_msi(np->pci_dev);
+ np->msi_flags &= ~NV_MSI_ENABLED;
+ }
+ }
drain_ring(dev);
printk(KERN_INFO "forcedeth: 64-bit DMA failed, using 32-bit addressing for device %s.\n",
pci_name(pci_dev));
} else {
- dev->features |= NETIF_F_HIGHDMA;
+ if (pci_set_consistent_dma_mask(pci_dev, 0x0000007fffffffffULL)) {
+ printk(KERN_INFO "forcedeth: 64-bit DMA (consistent) failed for device %s.\n",
+ pci_name(pci_dev));
+ goto out_relreg;
+ } else {
+ dev->features |= NETIF_F_HIGHDMA;
+ printk(KERN_INFO "forcedeth: using HIGHDMA\n");
+ }
}
np->txrxctl_bits = NVREG_TXRXCTL_DESC_3;
} else if (id->driver_data & DEV_HAS_LARGEDESC) {
#endif
}
+ np->vlanctl_bits = 0;
+ if (id->driver_data & DEV_HAS_VLAN) {
+ np->vlanctl_bits = NVREG_VLANCONTROL_ENABLE;
+ dev->features |= NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX;
+ dev->vlan_rx_register = nv_vlan_rx_register;
+ dev->vlan_rx_kill_vid = nv_vlan_rx_kill_vid;
+ }
+
+ np->msi_flags = 0;
+ if ((id->driver_data & DEV_HAS_MSI) && !disable_msi) {
+ np->msi_flags |= NV_MSI_CAPABLE;
+ }
+ if ((id->driver_data & DEV_HAS_MSI_X) && !disable_msix) {
+ np->msi_flags |= NV_MSI_X_CAPABLE;
+ }
+
err = -ENOMEM;
np->base = ioremap(addr, NV_PCI_REGSZ);
if (!np->base)
} else {
np->tx_flags = NV_TX2_VALID;
}
- if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT)
+ if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT) {
np->irqmask = NVREG_IRQMASK_THROUGHPUT;
- else
+ if (np->msi_flags & NV_MSI_X_CAPABLE) /* set number of vectors */
+ np->msi_flags |= 0x0003;
+ } else {
np->irqmask = NVREG_IRQMASK_CPU;
+ if (np->msi_flags & NV_MSI_X_CAPABLE) /* set number of vectors */
+ np->msi_flags |= 0x0001;
+ }
if (id->driver_data & DEV_NEED_TIMERIRQ)
np->irqmask |= NVREG_IRQ_TIMER;
},
{ /* MCP55 Ethernet Controller */
PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_14),
- .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA,
+ .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X,
},
{ /* MCP55 Ethernet Controller */
PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_15),
- .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA,
+ .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X,
},
{0,},
};
MODULE_PARM_DESC(optimization_mode, "In throughput mode (0), every tx & rx packet will generate an interrupt. In CPU mode (1), interrupts are controlled by a timer.");
module_param(poll_interval, int, 0);
MODULE_PARM_DESC(poll_interval, "Interval determines how frequent timer interrupt is generated by [(time_in_micro_secs * 100) / (2^10)]. Min is 0 and Max is 65535.");
+module_param(disable_msi, int, 0);
+MODULE_PARM_DESC(disable_msi, "Disable MSI interrupts by setting to 1.");
+module_param(disable_msix, int, 0);
+MODULE_PARM_DESC(disable_msix, "Disable MSIX interrupts by setting to 1.");
MODULE_AUTHOR("Manfred Spraul <manfred@colorfullife.com>");
MODULE_DESCRIPTION("Reverse Engineered nForce ethernet driver");
/* autoprobe baud rate */
tstart = jiffies;
i = 0;
- while ((signed)(jiffies-tstart-HZ/3) < 0) {
+ while (time_before(jiffies, tstart + HZ/3)) {
if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
goto epptimeout;
if ((stat & (EPP_NRAEF|EPP_NRHF)) == EPP_NRHF) {
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/bitops.h>
+#include <linux/jiffies.h>
#include <asm/io.h>
printk("hp100: %s: start_xmit_bm: No TX PDL available.\n", dev->name);
#endif
/* not waited long enough since last tx? */
- if (jiffies - dev->trans_start < HZ)
+ if (time_before(jiffies, dev->trans_start + HZ))
return -EAGAIN;
if (hp100_check_lan(dev))
printk("hp100: %s: start_xmit: tx free mem = 0x%x\n", dev->name, i);
#endif
/* not waited long enough since last failed tx try? */
- if (jiffies - dev->trans_start < HZ) {
+ if (time_before(jiffies, dev->trans_start + HZ)) {
#ifdef HP100_DEBUG
printk("hp100: %s: trans_start timing problem\n",
dev->name);
hp100_outw(i, FRAGMENT_LEN); /* and first/only fragment length */
if (lp->mode == 2) { /* memory mapped */
- if (lp->mem_ptr_virt) { /* high pci memory was remapped */
- /* Note: The J2585B needs alignment to 32bits here! */
- memcpy_toio(lp->mem_ptr_virt, skb->data, (skb->len + 3) & ~3);
- if (!ok_flag)
- memset_io(lp->mem_ptr_virt, 0, HP100_MIN_PACKET_SIZE - skb->len);
- } else {
- /* Note: The J2585B needs alignment to 32bits here! */
- isa_memcpy_toio(lp->mem_ptr_phys, skb->data, (skb->len + 3) & ~3);
- if (!ok_flag)
- isa_memset_io(lp->mem_ptr_phys, 0, HP100_MIN_PACKET_SIZE - skb->len);
- }
+ /* Note: The J2585B needs alignment to 32bits here! */
+ memcpy_toio(lp->mem_ptr_virt, skb->data, (skb->len + 3) & ~3);
+ if (!ok_flag)
+ memset_io(lp->mem_ptr_virt, 0, HP100_MIN_PACKET_SIZE - skb->len);
} else { /* programmed i/o */
outsl(ioaddr + HP100_REG_DATA32, skb->data,
(skb->len + 3) >> 2);
/* First we get the header, which contains information about the */
/* actual length of the received packet. */
if (lp->mode == 2) { /* memory mapped mode */
- if (lp->mem_ptr_virt) /* if memory was remapped */
- header = readl(lp->mem_ptr_virt);
- else
- header = isa_readl(lp->mem_ptr_phys);
+ header = readl(lp->mem_ptr_virt);
} else /* programmed i/o */
header = hp100_inl(DATA32);
ptr = skb->data;
/* Now transfer the data from the card into that area */
- if (lp->mode == 2) {
- if (lp->mem_ptr_virt)
- memcpy_fromio(ptr, lp->mem_ptr_virt,pkt_len);
- /* Note alignment to 32bit transfers */
- else
- isa_memcpy_fromio(ptr, lp->mem_ptr_phys, pkt_len);
- } else /* io mapped */
+ if (lp->mode == 2)
+ memcpy_fromio(ptr, lp->mem_ptr_virt,pkt_len);
+ else /* io mapped */
insl(ioaddr + HP100_REG_DATA32, ptr, pkt_len >> 2);
skb->protocol = eth_type_trans(skb, dev);
static inline void emac_tx_enable(struct ocp_enet_private *dev)
{
- struct emac_regs *p = dev->emacp;
+ struct emac_regs __iomem *p = dev->emacp;
unsigned long flags;
u32 r;
static void emac_tx_disable(struct ocp_enet_private *dev)
{
- struct emac_regs *p = dev->emacp;
+ struct emac_regs __iomem *p = dev->emacp;
unsigned long flags;
u32 r;
static void emac_rx_enable(struct ocp_enet_private *dev)
{
- struct emac_regs *p = dev->emacp;
+ struct emac_regs __iomem *p = dev->emacp;
unsigned long flags;
u32 r;
static void emac_rx_disable(struct ocp_enet_private *dev)
{
- struct emac_regs *p = dev->emacp;
+ struct emac_regs __iomem *p = dev->emacp;
unsigned long flags;
u32 r;
static inline void emac_rx_disable_async(struct ocp_enet_private *dev)
{
- struct emac_regs *p = dev->emacp;
+ struct emac_regs __iomem *p = dev->emacp;
unsigned long flags;
u32 r;
static int emac_reset(struct ocp_enet_private *dev)
{
- struct emac_regs *p = dev->emacp;
+ struct emac_regs __iomem *p = dev->emacp;
unsigned long flags;
int n = 20;
static void emac_hash_mc(struct ocp_enet_private *dev)
{
- struct emac_regs *p = dev->emacp;
+ struct emac_regs __iomem *p = dev->emacp;
u16 gaht[4] = { 0 };
struct dev_mc_list *dmi;
/* BHs disabled */
static int emac_configure(struct ocp_enet_private *dev)
{
- struct emac_regs *p = dev->emacp;
+ struct emac_regs __iomem *p = dev->emacp;
struct net_device *ndev = dev->ndev;
int gige;
u32 r;
static int __emac_mdio_read(struct ocp_enet_private *dev, u8 id, u8 reg)
{
- struct emac_regs *p = dev->emacp;
+ struct emac_regs __iomem *p = dev->emacp;
u32 r;
int n;
static void __emac_mdio_write(struct ocp_enet_private *dev, u8 id, u8 reg,
u16 val)
{
- struct emac_regs *p = dev->emacp;
+ struct emac_regs __iomem *p = dev->emacp;
int n;
DBG2("%d: mdio_write(%02x,%02x,%04x)" NL, dev->def->index, id, reg,
static void emac_set_multicast_list(struct net_device *ndev)
{
struct ocp_enet_private *dev = ndev->priv;
- struct emac_regs *p = dev->emacp;
+ struct emac_regs __iomem *p = dev->emacp;
u32 rmr = emac_iff2rmr(ndev);
DBG("%d: multicast %08x" NL, dev->def->index, rmr);
}
static inline int emac_alloc_rx_skb(struct ocp_enet_private *dev, int slot,
- int flags)
+ gfp_t flags)
{
struct sk_buff *skb = alloc_skb(dev->rx_skb_size, flags);
if (unlikely(!skb))
static inline int emac_xmit_finish(struct ocp_enet_private *dev, int len)
{
- struct emac_regs *p = dev->emacp;
+ struct emac_regs __iomem *p = dev->emacp;
struct net_device *ndev = dev->ndev;
/* Send the packet out */
static irqreturn_t emac_irq(int irq, void *dev_instance, struct pt_regs *regs)
{
struct ocp_enet_private *dev = dev_instance;
- struct emac_regs *p = dev->emacp;
+ struct emac_regs __iomem *p = dev->emacp;
struct ibm_emac_error_stats *st = &dev->estats;
u32 isr = in_be32(&p->isr);
DBG("%d: remove" NL, dev->def->index);
- ocp_set_drvdata(ocpdev, 0);
+ ocp_set_drvdata(ocpdev, NULL);
unregister_netdev(dev->ndev);
tah_fini(dev->tah_dev);
rgmii_fini(dev->rgmii_dev, dev->rgmii_input);
zmii_fini(dev->zmii_dev, dev->zmii_input);
- emac_dbg_register(dev->def->index, 0);
+ emac_dbg_register(dev->def->index, NULL);
mal_unregister_commac(dev->mal, &dev->commac);
- iounmap((void *)dev->emacp);
+ iounmap(dev->emacp);
kfree(dev->ndev);
}
goto out4;
/* Map EMAC regs */
- dev->emacp =
- (struct emac_regs *)ioremap(dev->def->paddr,
- sizeof(struct emac_regs));
+ dev->emacp = ioremap(dev->def->paddr, sizeof(struct emac_regs));
if (!dev->emacp) {
printk(KERN_ERR "emac%d: could not ioremap device registers!\n",
dev->def->index);
return 0;
out6:
- iounmap((void *)dev->emacp);
+ iounmap(dev->emacp);
out5:
tah_fini(dev->tah_dev);
out4:
struct ocp_enet_private {
struct net_device *ndev; /* 0 */
- struct emac_regs *emacp;
+ struct emac_regs __iomem *emacp;
struct mal_descriptor *tx_desc;
int tx_cnt;
static void emac_mac_dump(int idx, struct ocp_enet_private *dev)
{
- struct emac_regs *p = dev->emacp;
+ struct emac_regs __iomem *p = dev->emacp;
printk("** EMAC%d registers **\n"
"MR0 = 0x%08x MR1 = 0x%08x TMR0 = 0x%08x TMR1 = 0x%08x\n"
/* RGMII device */
struct ibm_ocp_rgmii {
- struct rgmii_regs *base;
+ struct rgmii_regs __iomem *base;
int users; /* number of EMACs using this RGMII bridge */
};
static int __init zmii_init(struct ocp_device *ocpdev, int input, int *mode)
{
struct ibm_ocp_zmii *dev = ocp_get_drvdata(ocpdev);
- struct zmii_regs *p;
+ struct zmii_regs __iomem *p;
ZMII_DBG("%d: init(%d, %d)" NL, ocpdev->def->index, input, *mode);
}
dev->mode = PHY_MODE_NA;
- p = (struct zmii_regs *)ioremap(ocpdev->def->paddr,
- sizeof(struct zmii_regs));
+ p = ioremap(ocpdev->def->paddr, sizeof(struct zmii_regs));
if (!p) {
printk(KERN_ERR
"zmii%d: could not ioremap device registers!\n",
if (!--dev->users) {
/* Free everything if this is the last user */
ocp_set_drvdata(ocpdev, NULL);
- iounmap((void *)dev->base);
+ iounmap(dev->base);
kfree(dev);
}
}
/* ZMII device */
struct ibm_ocp_zmii {
- struct zmii_regs *base;
+ struct zmii_regs __iomem *base;
int mode; /* subset of PHY_MODE_XXXX */
int users; /* number of EMACs using this ZMII bridge */
u32 fer_save; /* FER value left by firmware */
return 0;
out_unregister:
- driver_unregister(&mac_sonic_driver);
+ platform_driver_unregister(&mac_sonic_driver);
return -ENOMEM;
}
#define PHY_WAIT_MICRO_SECONDS 10
/* Static function declarations */
-static int eth_port_link_is_up(unsigned int eth_port_num);
static void eth_port_uc_addr_get(struct net_device *dev,
unsigned char *MacAddr);
static void eth_port_set_multicast_list(struct net_device *);
+static void mv643xx_eth_port_enable_tx(unsigned int port_num,
+ unsigned int channels);
+static void mv643xx_eth_port_enable_rx(unsigned int port_num,
+ unsigned int channels);
+static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num);
+static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num);
static int mv643xx_eth_open(struct net_device *);
static int mv643xx_eth_stop(struct net_device *);
static int mv643xx_eth_change_mtu(struct net_device *, int);
#ifdef MV643XX_NAPI
static int mv643xx_poll(struct net_device *dev, int *budget);
#endif
+static int ethernet_phy_get(unsigned int eth_port_num);
static void ethernet_phy_set(unsigned int eth_port_num, int phy_addr);
static int ethernet_phy_detect(unsigned int eth_port_num);
+static int mv643xx_mdio_read(struct net_device *dev, int phy_id, int location);
+static void mv643xx_mdio_write(struct net_device *dev, int phy_id, int location, int val);
+static int mv643xx_eth_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
static struct ethtool_ops mv643xx_ethtool_ops;
static char mv643xx_driver_name[] = "mv643xx_eth";
if (test_and_set_bit(0, &mp->rx_task_busy))
panic("%s: Error in test_set_bit / clear_bit", dev->name);
- while (mp->rx_ring_skbs < (mp->rx_ring_size - 5)) {
+ while (mp->rx_desc_count < (mp->rx_ring_size - 5)) {
skb = dev_alloc_skb(RX_SKB_SIZE + DMA_ALIGN);
if (!skb)
break;
- mp->rx_ring_skbs++;
+ mp->rx_desc_count++;
unaligned = (u32)skb->data & (DMA_ALIGN - 1);
if (unaligned)
skb_reserve(skb, DMA_ALIGN - unaligned);
* If RX ring is empty of SKB, set a timer to try allocating
* again in a later time .
*/
- if ((mp->rx_ring_skbs == 0) && (mp->rx_timer_flag == 0)) {
+ if ((mp->rx_desc_count == 0) && (mp->rx_timer_flag == 0)) {
printk(KERN_INFO "%s: Rx ring is empty\n", dev->name);
/* After 100mSec */
mp->timeout.expires = jiffies + (HZ / 10);
unsigned int port_num = mp->port_num;
eth_port_init_mac_tables(port_num);
- memcpy(mp->port_mac_addr, dev->dev_addr, 6);
- eth_port_uc_addr_set(port_num, mp->port_mac_addr);
+ eth_port_uc_addr_set(port_num, dev->dev_addr);
}
/*
static void mv643xx_eth_set_rx_mode(struct net_device *dev)
{
struct mv643xx_private *mp = netdev_priv(dev);
+ u32 config_reg;
+ config_reg = mv_read(MV643XX_ETH_PORT_CONFIG_REG(mp->port_num));
if (dev->flags & IFF_PROMISC)
- mp->port_config |= (u32) MV643XX_ETH_UNICAST_PROMISCUOUS_MODE;
+ config_reg |= (u32) MV643XX_ETH_UNICAST_PROMISCUOUS_MODE;
else
- mp->port_config &= ~(u32) MV643XX_ETH_UNICAST_PROMISCUOUS_MODE;
-
- mv_write(MV643XX_ETH_PORT_CONFIG_REG(mp->port_num), mp->port_config);
+ config_reg &= ~(u32) MV643XX_ETH_UNICAST_PROMISCUOUS_MODE;
+ mv_write(MV643XX_ETH_PORT_CONFIG_REG(mp->port_num), config_reg);
eth_port_set_multicast_list(dev);
}
netif_device_detach(dev);
eth_port_reset(mp->port_num);
- eth_port_start(mp);
+ eth_port_start(dev);
netif_device_attach(dev);
}
#else
while (eth_port_receive(mp, &pkt_info) == ETH_OK) {
#endif
- mp->rx_ring_skbs--;
+ mp->rx_desc_count--;
received_packets++;
/* Update statistics. Note byte count includes 4 byte CRC count */
return received_packets;
}
+/* Set the mv643xx port configuration register for the speed/duplex mode. */
+static void mv643xx_eth_update_pscr(struct net_device *dev,
+ struct ethtool_cmd *ecmd)
+{
+ struct mv643xx_private *mp = netdev_priv(dev);
+ int port_num = mp->port_num;
+ u32 o_pscr, n_pscr;
+ unsigned int channels;
+
+ o_pscr = mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num));
+ n_pscr = o_pscr;
+
+ /* clear speed, duplex and rx buffer size fields */
+ n_pscr &= ~(MV643XX_ETH_SET_MII_SPEED_TO_100 |
+ MV643XX_ETH_SET_GMII_SPEED_TO_1000 |
+ MV643XX_ETH_SET_FULL_DUPLEX_MODE |
+ MV643XX_ETH_MAX_RX_PACKET_MASK);
+
+ if (ecmd->duplex == DUPLEX_FULL)
+ n_pscr |= MV643XX_ETH_SET_FULL_DUPLEX_MODE;
+
+ if (ecmd->speed == SPEED_1000)
+ n_pscr |= MV643XX_ETH_SET_GMII_SPEED_TO_1000 |
+ MV643XX_ETH_MAX_RX_PACKET_9700BYTE;
+ else {
+ if (ecmd->speed == SPEED_100)
+ n_pscr |= MV643XX_ETH_SET_MII_SPEED_TO_100;
+ n_pscr |= MV643XX_ETH_MAX_RX_PACKET_1522BYTE;
+ }
+
+ if (n_pscr != o_pscr) {
+ if ((o_pscr & MV643XX_ETH_SERIAL_PORT_ENABLE) == 0)
+ mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
+ n_pscr);
+ else {
+ channels = mv643xx_eth_port_disable_tx(port_num);
+
+ o_pscr &= ~MV643XX_ETH_SERIAL_PORT_ENABLE;
+ mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
+ o_pscr);
+ mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
+ n_pscr);
+ mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
+ n_pscr);
+ if (channels)
+ mv643xx_eth_port_enable_tx(port_num, channels);
+ }
+ }
+}
+
/*
* mv643xx_eth_int_handler
*
/* UDP change : We may need this */
if ((eth_int_cause_ext & 0x0000ffff) &&
(mv643xx_eth_free_tx_queue(dev, eth_int_cause_ext) == 0) &&
- (mp->tx_ring_size > mp->tx_ring_skbs + MAX_DESCS_PER_SKB))
+ (mp->tx_ring_size > mp->tx_desc_count + MAX_DESCS_PER_SKB))
netif_wake_queue(dev);
#ifdef MV643XX_NAPI
} else {
}
/* PHY status changed */
if (eth_int_cause_ext & (BIT16 | BIT20)) {
- if (eth_port_link_is_up(port_num)) {
- netif_carrier_on(dev);
- netif_wake_queue(dev);
- /* Start TX queue */
- mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG
- (port_num), 1);
- } else {
- netif_carrier_off(dev);
+ struct ethtool_cmd cmd;
+
+ if (mii_link_ok(&mp->mii)) {
+ mii_ethtool_gset(&mp->mii, &cmd);
+ mv643xx_eth_update_pscr(dev, &cmd);
+ if (!netif_carrier_ok(dev)) {
+ netif_carrier_on(dev);
+ if (mp->tx_ring_size > mp->tx_desc_count +
+ MAX_DESCS_PER_SKB) {
+ netif_wake_queue(dev);
+ /* Start TX queue */
+ mv643xx_eth_port_enable_tx(port_num, mp->port_tx_queue_command);
+ }
+ }
+ } else if (netif_carrier_ok(dev)) {
netif_stop_queue(dev);
+ netif_carrier_off(dev);
}
}
mp->rx_desc_area_size = rx_desc_num * sizeof(struct eth_rx_desc);
- /* Add the queue to the list of RX queues of this port */
- mp->port_rx_queue_command |= 1;
+ /* Enable queue 0 for this port */
+ mp->port_rx_queue_command = 1;
}
/*
mp->tx_desc_area_size = tx_desc_num * sizeof(struct eth_tx_desc);
- /* Add the queue to the list of Tx queues of this port */
- mp->port_tx_queue_command |= 1;
+ /* Enable queue 0 for this port */
+ mp->port_tx_queue_command = 1;
+}
+
+static int mv643xx_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
+{
+ struct mv643xx_private *mp = netdev_priv(dev);
+ int err;
+
+ spin_lock_irq(&mp->lock);
+ err = mii_ethtool_sset(&mp->mii, cmd);
+ spin_unlock_irq(&mp->lock);
+
+ return err;
+}
+
+static int mv643xx_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
+{
+ struct mv643xx_private *mp = netdev_priv(dev);
+ int err;
+
+ spin_lock_irq(&mp->lock);
+ err = mii_ethtool_gset(&mp->mii, cmd);
+ spin_unlock_irq(&mp->lock);
+
+ /* The PHY may support 1000baseT_Half, but the mv643xx does not */
+ cmd->supported &= ~SUPPORTED_1000baseT_Half;
+ cmd->advertising &= ~ADVERTISED_1000baseT_Half;
+
+ return err;
}
/*
return -EAGAIN;
}
- /* Stop RX Queues */
- mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num), 0x0000ff00);
-
- /* Set the MAC Address */
- memcpy(mp->port_mac_addr, dev->dev_addr, 6);
-
eth_port_init(mp);
INIT_WORK(&mp->rx_task, (void (*)(void *))mv643xx_eth_rx_task, dev);
}
/* Allocate TX ring */
- mp->tx_ring_skbs = 0;
+ mp->tx_desc_count = 0;
size = mp->tx_ring_size * sizeof(struct eth_tx_desc);
mp->tx_desc_area_size = size;
ether_init_tx_desc_ring(mp);
/* Allocate RX ring */
- mp->rx_ring_skbs = 0;
+ mp->rx_desc_count = 0;
size = mp->rx_ring_size * sizeof(struct eth_rx_desc);
mp->rx_desc_area_size = size;
mv643xx_eth_rx_task(dev); /* Fill RX ring with skb's */
- eth_port_start(mp);
+ /* Clear any pending ethernet port interrupts */
+ mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num), 0);
+ mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num), 0);
+
+ eth_port_start(dev);
/* Interrupt Coalescing */
mp->tx_int_coal =
eth_port_set_tx_coal(port_num, 133000000, MV643XX_TX_COAL);
- /* Clear any pending ethernet port interrupts */
- mv_write(MV643XX_ETH_INTERRUPT_CAUSE_REG(port_num), 0);
- mv_write(MV643XX_ETH_INTERRUPT_CAUSE_EXTEND_REG(port_num), 0);
-
/* Unmask phy and link status changes interrupts */
mv_write(MV643XX_ETH_INTERRUPT_EXTEND_MASK_REG(port_num),
INT_UNMASK_ALL_EXT);
/* Unmask RX buffer and TX end interrupt */
mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), INT_UNMASK_ALL);
+
return 0;
out_free_tx_skb:
struct sk_buff *skb;
/* Stop Tx Queues */
- mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num), 0x0000ff00);
+ mv643xx_eth_port_disable_tx(port_num);
/* Free outstanding skb's on TX rings */
- for (curr = 0; mp->tx_ring_skbs && curr < mp->tx_ring_size; curr++) {
+ for (curr = 0; mp->tx_desc_count && curr < mp->tx_ring_size; curr++) {
skb = mp->tx_skb[curr];
if (skb) {
- mp->tx_ring_skbs -= skb_shinfo(skb)->nr_frags;
+ mp->tx_desc_count -= skb_shinfo(skb)->nr_frags;
dev_kfree_skb(skb);
- mp->tx_ring_skbs--;
+ mp->tx_desc_count--;
}
}
- if (mp->tx_ring_skbs)
+ if (mp->tx_desc_count)
printk("%s: Error on Tx descriptor free - could not free %d"
- " descriptors\n", dev->name, mp->tx_ring_skbs);
+ " descriptors\n", dev->name, mp->tx_desc_count);
/* Free TX ring */
if (mp->tx_sram_size)
int curr;
/* Stop RX Queues */
- mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num), 0x0000ff00);
+ mv643xx_eth_port_disable_rx(port_num);
/* Free preallocated skb's on RX rings */
- for (curr = 0; mp->rx_ring_skbs && curr < mp->rx_ring_size; curr++) {
+ for (curr = 0; mp->rx_desc_count && curr < mp->rx_ring_size; curr++) {
if (mp->rx_skb[curr]) {
dev_kfree_skb(mp->rx_skb[curr]);
- mp->rx_ring_skbs--;
+ mp->rx_desc_count--;
}
}
- if (mp->rx_ring_skbs)
+ if (mp->rx_desc_count)
printk(KERN_ERR
"%s: Error in freeing Rx Ring. %d skb's still"
" stuck in RX Ring - ignoring them\n", dev->name,
- mp->rx_ring_skbs);
+ mp->rx_desc_count);
/* Free RX ring */
if (mp->rx_sram_size)
iounmap(mp->p_rx_desc_area);
}
if (netif_queue_stopped(dev) &&
- mp->tx_ring_size > mp->tx_ring_skbs + MAX_DESCS_PER_SKB)
+ mp->tx_ring_size >
+ mp->tx_desc_count + MAX_DESCS_PER_SKB)
netif_wake_queue(dev);
}
}
/* This is a hard error, log it. */
- if ((mp->tx_ring_size - mp->tx_ring_skbs) <=
+ if ((mp->tx_ring_size - mp->tx_desc_count) <=
(skb_shinfo(skb)->nr_frags + 1)) {
netif_stop_queue(dev);
printk(KERN_ERR
/* Check if TX queue can handle another skb. If not, then
* signal higher layers to stop requesting TX
*/
- if (mp->tx_ring_size <= (mp->tx_ring_skbs + MAX_DESCS_PER_SKB))
+ if (mp->tx_ring_size <= (mp->tx_desc_count + MAX_DESCS_PER_SKB))
/*
* Stop getting skb's from upper layers.
* Getting skb's from upper layers will be enabled again after
}
#endif
+static void mv643xx_init_ethtool_cmd(struct net_device *dev, int phy_address,
+ int speed, int duplex,
+ struct ethtool_cmd *cmd)
+{
+ struct mv643xx_private *mp = netdev_priv(dev);
+
+ memset(cmd, 0, sizeof(*cmd));
+
+ cmd->port = PORT_MII;
+ cmd->transceiver = XCVR_INTERNAL;
+ cmd->phy_address = phy_address;
+
+ if (speed == 0) {
+ cmd->autoneg = AUTONEG_ENABLE;
+ /* mii lib checks, but doesn't use speed on AUTONEG_ENABLE */
+ cmd->speed = SPEED_100;
+ cmd->advertising = ADVERTISED_10baseT_Half |
+ ADVERTISED_10baseT_Full |
+ ADVERTISED_100baseT_Half |
+ ADVERTISED_100baseT_Full;
+ if (mp->mii.supports_gmii)
+ cmd->advertising |= ADVERTISED_1000baseT_Full;
+ } else {
+ cmd->autoneg = AUTONEG_DISABLE;
+ cmd->speed = speed;
+ cmd->duplex = duplex;
+ }
+}
+
/*/
* mv643xx_eth_probe
*
u8 *p;
struct resource *res;
int err;
+ struct ethtool_cmd cmd;
+ int duplex = DUPLEX_HALF;
+ int speed = 0; /* default to auto-negotiation */
dev = alloc_etherdev(sizeof(struct mv643xx_private));
if (!dev)
dev->tx_queue_len = mp->tx_ring_size;
dev->base_addr = 0;
dev->change_mtu = mv643xx_eth_change_mtu;
+ dev->do_ioctl = mv643xx_eth_do_ioctl;
SET_ETHTOOL_OPS(dev, &mv643xx_ethtool_ops);
#ifdef MV643XX_CHECKSUM_OFFLOAD_TX
/* set default config values */
eth_port_uc_addr_get(dev, dev->dev_addr);
- mp->port_config = MV643XX_ETH_PORT_CONFIG_DEFAULT_VALUE;
- mp->port_config_extend = MV643XX_ETH_PORT_CONFIG_EXTEND_DEFAULT_VALUE;
- mp->port_sdma_config = MV643XX_ETH_PORT_SDMA_CONFIG_DEFAULT_VALUE;
- mp->port_serial_control = MV643XX_ETH_PORT_SERIAL_CONTROL_DEFAULT_VALUE;
mp->rx_ring_size = MV643XX_ETH_PORT_DEFAULT_RECEIVE_QUEUE_SIZE;
mp->tx_ring_size = MV643XX_ETH_PORT_DEFAULT_TRANSMIT_QUEUE_SIZE;
pd = pdev->dev.platform_data;
if (pd) {
- if (pd->mac_addr != NULL)
+ if (pd->mac_addr)
memcpy(dev->dev_addr, pd->mac_addr, 6);
if (pd->phy_addr || pd->force_phy_addr)
ethernet_phy_set(port_num, pd->phy_addr);
- if (pd->port_config || pd->force_port_config)
- mp->port_config = pd->port_config;
-
- if (pd->port_config_extend || pd->force_port_config_extend)
- mp->port_config_extend = pd->port_config_extend;
-
- if (pd->port_sdma_config || pd->force_port_sdma_config)
- mp->port_sdma_config = pd->port_sdma_config;
-
- if (pd->port_serial_control || pd->force_port_serial_control)
- mp->port_serial_control = pd->port_serial_control;
-
if (pd->rx_queue_size)
mp->rx_ring_size = pd->rx_queue_size;
mp->rx_sram_size = pd->rx_sram_size;
mp->rx_sram_addr = pd->rx_sram_addr;
}
+
+ duplex = pd->duplex;
+ speed = pd->speed;
}
+ /* Hook up MII support for ethtool */
+ mp->mii.dev = dev;
+ mp->mii.mdio_read = mv643xx_mdio_read;
+ mp->mii.mdio_write = mv643xx_mdio_write;
+ mp->mii.phy_id = ethernet_phy_get(port_num);
+ mp->mii.phy_id_mask = 0x3f;
+ mp->mii.reg_num_mask = 0x1f;
+
err = ethernet_phy_detect(port_num);
if (err) {
pr_debug("MV643xx ethernet port %d: "
"No PHY detected at addr %d\n",
port_num, ethernet_phy_get(port_num));
- return err;
+ goto out;
}
+ ethernet_phy_reset(port_num);
+ mp->mii.supports_gmii = mii_check_gmii_support(&mp->mii);
+ mv643xx_init_ethtool_cmd(dev, mp->mii.phy_id, speed, duplex, &cmd);
+ mv643xx_eth_update_pscr(dev, &cmd);
+ mv643xx_set_settings(dev, &cmd);
+
err = register_netdev(dev);
if (err)
goto out;
* Prior to calling the initialization routine eth_port_init() the user
* must set the following fields under mv643xx_private struct:
* port_num User Ethernet port number.
- * port_mac_addr[6] User defined port MAC address.
* port_config User port configuration value.
* port_config_extend User port config extend value.
* port_sdma_config User port SDMA config value.
* return_info Tx/Rx user resource return information.
*/
-/* defines */
-/* SDMA command macros */
-#define ETH_ENABLE_TX_QUEUE(eth_port) \
- mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(eth_port), 1)
-
-/* locals */
-
/* PHY routines */
static int ethernet_phy_get(unsigned int eth_port_num);
static void ethernet_phy_set(unsigned int eth_port_num, int phy_addr);
/* Ethernet Port routines */
-static int eth_port_uc_addr(unsigned int eth_port_num, unsigned char uc_nibble,
- int option);
+static void eth_port_set_filter_table_entry(int table, unsigned char entry);
/*
* eth_port_init - Initialize the Ethernet port driver
*/
static void eth_port_init(struct mv643xx_private *mp)
{
- mp->port_rx_queue_command = 0;
- mp->port_tx_queue_command = 0;
-
mp->rx_resource_err = 0;
mp->tx_resource_err = 0;
eth_port_reset(mp->port_num);
eth_port_init_mac_tables(mp->port_num);
-
- ethernet_phy_reset(mp->port_num);
}
/*
* and ether_init_rx_desc_ring for Rx queues).
*
* INPUT:
- * struct mv643xx_private *mp Ethernet port control struct
+ * dev - a pointer to the required interface
*
* OUTPUT:
* Ethernet port is ready to receive and transmit.
* RETURN:
* None.
*/
-static void eth_port_start(struct mv643xx_private *mp)
+static void eth_port_start(struct net_device *dev)
{
+ struct mv643xx_private *mp = netdev_priv(dev);
unsigned int port_num = mp->port_num;
int tx_curr_desc, rx_curr_desc;
+ u32 pscr;
+ struct ethtool_cmd ethtool_cmd;
/* Assignment of Tx CTRP of given queue */
tx_curr_desc = mp->tx_curr_desc_q;
(u32)((struct eth_rx_desc *)mp->rx_desc_dma + rx_curr_desc));
/* Add the assigned Ethernet address to the port's address table */
- eth_port_uc_addr_set(port_num, mp->port_mac_addr);
+ eth_port_uc_addr_set(port_num, dev->dev_addr);
/* Assign port configuration and command. */
- mv_write(MV643XX_ETH_PORT_CONFIG_REG(port_num), mp->port_config);
+ mv_write(MV643XX_ETH_PORT_CONFIG_REG(port_num),
+ MV643XX_ETH_PORT_CONFIG_DEFAULT_VALUE);
mv_write(MV643XX_ETH_PORT_CONFIG_EXTEND_REG(port_num),
- mp->port_config_extend);
+ MV643XX_ETH_PORT_CONFIG_EXTEND_DEFAULT_VALUE);
+ pscr = mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num));
- /* Increase the Rx side buffer size if supporting GigE */
- if (mp->port_serial_control & MV643XX_ETH_SET_GMII_SPEED_TO_1000)
- mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
- (mp->port_serial_control & 0xfff1ffff) | (0x5 << 17));
- else
- mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
- mp->port_serial_control);
+ pscr &= ~(MV643XX_ETH_SERIAL_PORT_ENABLE | MV643XX_ETH_FORCE_LINK_PASS);
+ mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), pscr);
+
+ pscr |= MV643XX_ETH_DISABLE_AUTO_NEG_FOR_FLOW_CTRL |
+ MV643XX_ETH_DISABLE_AUTO_NEG_SPEED_GMII |
+ MV643XX_ETH_DISABLE_AUTO_NEG_FOR_DUPLX |
+ MV643XX_ETH_DO_NOT_FORCE_LINK_FAIL |
+ MV643XX_ETH_SERIAL_PORT_CONTROL_RESERVED;
- mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num),
- mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num)) |
- MV643XX_ETH_SERIAL_PORT_ENABLE);
+ mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), pscr);
+
+ pscr |= MV643XX_ETH_SERIAL_PORT_ENABLE;
+ mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), pscr);
/* Assign port SDMA configuration */
mv_write(MV643XX_ETH_SDMA_CONFIG_REG(port_num),
- mp->port_sdma_config);
+ MV643XX_ETH_PORT_SDMA_CONFIG_DEFAULT_VALUE);
/* Enable port Rx. */
- mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num),
- mp->port_rx_queue_command);
+ mv643xx_eth_port_enable_rx(port_num, mp->port_rx_queue_command);
/* Disable port bandwidth limits by clearing MTU register */
mv_write(MV643XX_ETH_MAXIMUM_TRANSMIT_UNIT(port_num), 0);
+
+ /* save phy settings across reset */
+ mv643xx_get_settings(dev, ðtool_cmd);
+ ethernet_phy_reset(mp->port_num);
+ mv643xx_set_settings(dev, ðtool_cmd);
}
/*
* char * p_addr Address to be set
*
* OUTPUT:
- * Set MAC address low and high registers. also calls eth_port_uc_addr()
- * To set the unicast table with the proper information.
+ * Set MAC address low and high registers. also calls
+ * eth_port_set_filter_table_entry() to set the unicast
+ * table with the proper information.
*
* RETURN:
* N/A.
{
unsigned int mac_h;
unsigned int mac_l;
+ int table;
mac_l = (p_addr[4] << 8) | (p_addr[5]);
mac_h = (p_addr[0] << 24) | (p_addr[1] << 16) | (p_addr[2] << 8) |
mv_write(MV643XX_ETH_MAC_ADDR_HIGH(eth_port_num), mac_h);
/* Accept frames of this address */
- eth_port_uc_addr(eth_port_num, p_addr[5], ACCEPT_MAC_ADDR);
-
- return;
+ table = MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE(eth_port_num);
+ eth_port_set_filter_table_entry(table, p_addr[5] & 0x0f);
}
/*
p_addr[5] = mac_l & 0xff;
}
-/*
- * eth_port_uc_addr - This function Set the port unicast address table
- *
- * DESCRIPTION:
- * This function locates the proper entry in the Unicast table for the
- * specified MAC nibble and sets its properties according to function
- * parameters.
- *
- * INPUT:
- * unsigned int eth_port_num Port number.
- * unsigned char uc_nibble Unicast MAC Address last nibble.
- * int option 0 = Add, 1 = remove address.
- *
- * OUTPUT:
- * This function add/removes MAC addresses from the port unicast address
- * table.
- *
- * RETURN:
- * true is output succeeded.
- * false if option parameter is invalid.
- *
- */
-static int eth_port_uc_addr(unsigned int eth_port_num, unsigned char uc_nibble,
- int option)
-{
- unsigned int unicast_reg;
- unsigned int tbl_offset;
- unsigned int reg_offset;
-
- /* Locate the Unicast table entry */
- uc_nibble = (0xf & uc_nibble);
- tbl_offset = (uc_nibble / 4) * 4; /* Register offset from unicast table base */
- reg_offset = uc_nibble % 4; /* Entry offset within the above register */
-
- switch (option) {
- case REJECT_MAC_ADDR:
- /* Clear accepts frame bit at given unicast DA table entry */
- unicast_reg = mv_read((MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num) + tbl_offset));
-
- unicast_reg &= (0x0E << (8 * reg_offset));
-
- mv_write((MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num) + tbl_offset), unicast_reg);
- break;
-
- case ACCEPT_MAC_ADDR:
- /* Set accepts frame bit at unicast DA filter table entry */
- unicast_reg =
- mv_read((MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num) + tbl_offset));
-
- unicast_reg |= (0x01 << (8 * reg_offset));
-
- mv_write((MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num) + tbl_offset), unicast_reg);
-
- break;
-
- default:
- return 0;
- }
-
- return 1;
-}
-
/*
* The entries in each table are indexed by a hash of a packet's MAC
* address. One bit in each entry determines whether the packet is
/* Clear DA filter unicast table (Ex_dFUT) */
for (table_index = 0; table_index <= 0xC; table_index += 4)
- mv_write((MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE
- (eth_port_num) + table_index), 0);
+ mv_write(MV643XX_ETH_DA_FILTER_UNICAST_TABLE_BASE
+ (eth_port_num) + table_index, 0);
for (table_index = 0; table_index <= 0xFC; table_index += 4) {
/* Clear DA filter special multicast table (Ex_dFSMT) */
eth_port_read_smi_reg(eth_port_num, 0, &phy_reg_data);
phy_reg_data |= 0x8000; /* Set bit 15 to reset the PHY */
eth_port_write_smi_reg(eth_port_num, 0, phy_reg_data);
+
+ /* wait for PHY to come out of reset */
+ do {
+ udelay(1);
+ eth_port_read_smi_reg(eth_port_num, 0, &phy_reg_data);
+ } while (phy_reg_data & 0x8000);
+}
+
+static void mv643xx_eth_port_enable_tx(unsigned int port_num,
+ unsigned int channels)
+{
+ mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num), channels);
+}
+
+static void mv643xx_eth_port_enable_rx(unsigned int port_num,
+ unsigned int channels)
+{
+ mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num), channels);
+}
+
+static unsigned int mv643xx_eth_port_disable_tx(unsigned int port_num)
+{
+ u32 channels;
+
+ /* Stop Tx port activity. Check port Tx activity. */
+ channels = mv_read(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num))
+ & 0xFF;
+ if (channels) {
+ /* Issue stop command for active channels only */
+ mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num),
+ (channels << 8));
+
+ /* Wait for all Tx activity to terminate. */
+ /* Check port cause register that all Tx queues are stopped */
+ while (mv_read(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num))
+ & 0xFF)
+ udelay(PHY_WAIT_MICRO_SECONDS);
+
+ /* Wait for Tx FIFO to empty */
+ while (mv_read(MV643XX_ETH_PORT_STATUS_REG(port_num)) &
+ ETH_PORT_TX_FIFO_EMPTY)
+ udelay(PHY_WAIT_MICRO_SECONDS);
+ }
+
+ return channels;
+}
+
+static unsigned int mv643xx_eth_port_disable_rx(unsigned int port_num)
+{
+ u32 channels;
+
+ /* Stop Rx port activity. Check port Rx activity. */
+ channels = mv_read(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num)
+ & 0xFF);
+ if (channels) {
+ /* Issue stop command for active channels only */
+ mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num),
+ (channels << 8));
+
+ /* Wait for all Rx activity to terminate. */
+ /* Check port cause register that all Rx queues are stopped */
+ while (mv_read(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num))
+ & 0xFF)
+ udelay(PHY_WAIT_MICRO_SECONDS);
+ }
+
+ return channels;
}
/*
{
unsigned int reg_data;
- /* Stop Tx port activity. Check port Tx activity. */
- reg_data = mv_read(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num));
-
- if (reg_data & 0xFF) {
- /* Issue stop command for active channels only */
- mv_write(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num),
- (reg_data << 8));
-
- /* Wait for all Tx activity to terminate. */
- /* Check port cause register that all Tx queues are stopped */
- while (mv_read(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(port_num))
- & 0xFF)
- udelay(10);
- }
-
- /* Stop Rx port activity. Check port Rx activity. */
- reg_data = mv_read(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num));
-
- if (reg_data & 0xFF) {
- /* Issue stop command for active channels only */
- mv_write(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num),
- (reg_data << 8));
-
- /* Wait for all Rx activity to terminate. */
- /* Check port cause register that all Rx queues are stopped */
- while (mv_read(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port_num))
- & 0xFF)
- udelay(10);
- }
+ mv643xx_eth_port_disable_tx(port_num);
+ mv643xx_eth_port_disable_rx(port_num);
/* Clear all MIB counters */
eth_clear_mib_counters(port_num);
/* Reset the Enable bit in the Configuration Register */
reg_data = mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num));
- reg_data &= ~MV643XX_ETH_SERIAL_PORT_ENABLE;
+ reg_data &= ~(MV643XX_ETH_SERIAL_PORT_ENABLE |
+ MV643XX_ETH_DO_NOT_FORCE_LINK_FAIL |
+ MV643XX_ETH_FORCE_LINK_PASS);
mv_write(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num), reg_data);
}
-static int eth_port_autoneg_supported(unsigned int eth_port_num)
-{
- unsigned int phy_reg_data0;
-
- eth_port_read_smi_reg(eth_port_num, 0, &phy_reg_data0);
-
- return phy_reg_data0 & 0x1000;
-}
-
-static int eth_port_link_is_up(unsigned int eth_port_num)
-{
- unsigned int phy_reg_data1;
-
- eth_port_read_smi_reg(eth_port_num, 1, &phy_reg_data1);
-
- if (eth_port_autoneg_supported(eth_port_num)) {
- if (phy_reg_data1 & 0x20) /* auto-neg complete */
- return 1;
- } else if (phy_reg_data1 & 0x4) /* link up */
- return 1;
-
- return 0;
-}
-
/*
* eth_port_read_smi_reg - Read PHY registers
*
spin_unlock_irqrestore(&mv643xx_eth_phy_lock, flags);
}
+/*
+ * Wrappers for MII support library.
+ */
+static int mv643xx_mdio_read(struct net_device *dev, int phy_id, int location)
+{
+ int val;
+ struct mv643xx_private *mp = netdev_priv(dev);
+
+ eth_port_read_smi_reg(mp->port_num, location, &val);
+ return val;
+}
+
+static void mv643xx_mdio_write(struct net_device *dev, int phy_id, int location, int val)
+{
+ struct mv643xx_private *mp = netdev_priv(dev);
+ eth_port_write_smi_reg(mp->port_num, location, val);
+}
+
/*
* eth_port_send - Send an Ethernet packet
*
return ETH_ERROR;
}
- mp->tx_ring_skbs++;
- BUG_ON(mp->tx_ring_skbs > mp->tx_ring_size);
+ mp->tx_desc_count++;
+ BUG_ON(mp->tx_desc_count > mp->tx_ring_size);
/* Get the Tx Desc ring indexes */
tx_desc_curr = mp->tx_curr_desc_q;
first_descriptor->cmd_sts = mp->tx_first_command;
wmb();
- ETH_ENABLE_TX_QUEUE(mp->port_num);
+ mv643xx_eth_port_enable_tx(mp->port_num, mp->port_tx_queue_command);
/*
* Finish Tx packet. Update first desc in case of Tx resource
if (mp->tx_resource_err)
return ETH_QUEUE_FULL;
- mp->tx_ring_skbs++;
- BUG_ON(mp->tx_ring_skbs > mp->tx_ring_size);
+ mp->tx_desc_count++;
+ BUG_ON(mp->tx_desc_count > mp->tx_ring_size);
/* Get the Tx Desc ring indexes */
tx_desc_curr = mp->tx_curr_desc_q;
ETH_BUFFER_OWNED_BY_DMA | ETH_TX_ENABLE_INTERRUPT;
wmb();
- ETH_ENABLE_TX_QUEUE(mp->port_num);
+ mv643xx_eth_port_enable_tx(mp->port_num, mp->port_tx_queue_command);
/* Finish Tx packet. Update first desc in case of Tx resource error */
tx_desc_curr = (tx_desc_curr + 1) % mp->tx_ring_size;
/* Any Tx return cancels the Tx resource error status */
mp->tx_resource_err = 0;
- BUG_ON(mp->tx_ring_skbs == 0);
- mp->tx_ring_skbs--;
+ BUG_ON(mp->tx_desc_count == 0);
+ mp->tx_desc_count--;
out:
spin_unlock_irqrestore(&mp->lock, flags);
#define MV643XX_STATS_LEN \
sizeof(mv643xx_gstrings_stats) / sizeof(struct mv643xx_stats)
-static int
-mv643xx_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
-{
- struct mv643xx_private *mp = netdev->priv;
- int port_num = mp->port_num;
- int autoneg = eth_port_autoneg_supported(port_num);
- int mode_10_bit;
- int auto_duplex;
- int half_duplex = 0;
- int full_duplex = 0;
- int auto_speed;
- int speed_10 = 0;
- int speed_100 = 0;
- int speed_1000 = 0;
-
- u32 pcs = mv_read(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(port_num));
- u32 psr = mv_read(MV643XX_ETH_PORT_STATUS_REG(port_num));
-
- mode_10_bit = psr & MV643XX_ETH_PORT_STATUS_MODE_10_BIT;
-
- if (mode_10_bit) {
- ecmd->supported = SUPPORTED_10baseT_Half;
- } else {
- ecmd->supported = (SUPPORTED_10baseT_Half |
- SUPPORTED_10baseT_Full |
- SUPPORTED_100baseT_Half |
- SUPPORTED_100baseT_Full |
- SUPPORTED_1000baseT_Full |
- (autoneg ? SUPPORTED_Autoneg : 0) |
- SUPPORTED_TP);
-
- auto_duplex = !(pcs & MV643XX_ETH_DISABLE_AUTO_NEG_FOR_DUPLX);
- auto_speed = !(pcs & MV643XX_ETH_DISABLE_AUTO_NEG_SPEED_GMII);
-
- ecmd->advertising = ADVERTISED_TP;
-
- if (autoneg) {
- ecmd->advertising |= ADVERTISED_Autoneg;
-
- if (auto_duplex) {
- half_duplex = 1;
- full_duplex = 1;
- } else {
- if (pcs & MV643XX_ETH_SET_FULL_DUPLEX_MODE)
- full_duplex = 1;
- else
- half_duplex = 1;
- }
-
- if (auto_speed) {
- speed_10 = 1;
- speed_100 = 1;
- speed_1000 = 1;
- } else {
- if (pcs & MV643XX_ETH_SET_GMII_SPEED_TO_1000)
- speed_1000 = 1;
- else if (pcs & MV643XX_ETH_SET_MII_SPEED_TO_100)
- speed_100 = 1;
- else
- speed_10 = 1;
- }
-
- if (speed_10 & half_duplex)
- ecmd->advertising |= ADVERTISED_10baseT_Half;
- if (speed_10 & full_duplex)
- ecmd->advertising |= ADVERTISED_10baseT_Full;
- if (speed_100 & half_duplex)
- ecmd->advertising |= ADVERTISED_100baseT_Half;
- if (speed_100 & full_duplex)
- ecmd->advertising |= ADVERTISED_100baseT_Full;
- if (speed_1000)
- ecmd->advertising |= ADVERTISED_1000baseT_Full;
- }
- }
-
- ecmd->port = PORT_TP;
- ecmd->phy_address = ethernet_phy_get(port_num);
-
- ecmd->transceiver = XCVR_EXTERNAL;
-
- if (netif_carrier_ok(netdev)) {
- if (mode_10_bit)
- ecmd->speed = SPEED_10;
- else {
- if (psr & MV643XX_ETH_PORT_STATUS_GMII_1000)
- ecmd->speed = SPEED_1000;
- else if (psr & MV643XX_ETH_PORT_STATUS_MII_100)
- ecmd->speed = SPEED_100;
- else
- ecmd->speed = SPEED_10;
- }
-
- if (psr & MV643XX_ETH_PORT_STATUS_FULL_DUPLEX)
- ecmd->duplex = DUPLEX_FULL;
- else
- ecmd->duplex = DUPLEX_HALF;
- } else {
- ecmd->speed = -1;
- ecmd->duplex = -1;
- }
-
- ecmd->autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE;
- return 0;
-}
-
static void mv643xx_get_drvinfo(struct net_device *netdev,
struct ethtool_drvinfo *drvinfo)
{
}
}
+static u32 mv643xx_eth_get_link(struct net_device *dev)
+{
+ struct mv643xx_private *mp = netdev_priv(dev);
+
+ return mii_link_ok(&mp->mii);
+}
+
+static int mv643xx_eth_nway_restart(struct net_device *dev)
+{
+ struct mv643xx_private *mp = netdev_priv(dev);
+
+ return mii_nway_restart(&mp->mii);
+}
+
+static int mv643xx_eth_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
+{
+ struct mv643xx_private *mp = netdev_priv(dev);
+
+ return generic_mii_ioctl(&mp->mii, if_mii(ifr), cmd, NULL);
+}
+
static struct ethtool_ops mv643xx_ethtool_ops = {
.get_settings = mv643xx_get_settings,
+ .set_settings = mv643xx_set_settings,
.get_drvinfo = mv643xx_get_drvinfo,
- .get_link = ethtool_op_get_link,
+ .get_link = mv643xx_eth_get_link,
.get_sg = ethtool_op_get_sg,
.set_sg = ethtool_op_set_sg,
.get_strings = mv643xx_get_strings,
.get_stats_count = mv643xx_get_stats_count,
.get_ethtool_stats = mv643xx_get_ethtool_stats,
+ .get_strings = mv643xx_get_strings,
+ .get_stats_count = mv643xx_get_stats_count,
+ .get_ethtool_stats = mv643xx_get_ethtool_stats,
+ .nway_reset = mv643xx_eth_nway_restart,
};
/************* End ethtool support *************************/
#include <linux/kernel.h>
#include <linux/spinlock.h>
#include <linux/workqueue.h>
+#include <linux/mii.h>
#include <linux/mv643xx.h>
*
*/
-/* MAC accepet/reject macros */
-#define ACCEPT_MAC_ADDR 0
-#define REJECT_MAC_ADDR 1
-
/* Buffer offset from buffer pointer */
#define RX_BUF_OFFSET 0x2
struct mv643xx_private {
int port_num; /* User Ethernet port number */
- u8 port_mac_addr[6]; /* User defined port MAC address.*/
- u32 port_config; /* User port configuration value*/
- u32 port_config_extend; /* User port config extend value*/
- u32 port_sdma_config; /* User port SDMA config value */
- u32 port_serial_control; /* User port serial control value */
u32 port_tx_queue_command; /* Port active Tx queues summary*/
u32 port_rx_queue_command; /* Port active Rx queues summary*/
spinlock_t lock;
/* Size of Tx Ring per queue */
unsigned int tx_ring_size;
- /* Ammont of SKBs outstanding on Tx queue */
- unsigned int tx_ring_skbs;
+ /* Number of tx descriptors in use */
+ unsigned int tx_desc_count;
/* Size of Rx Ring per queue */
unsigned int rx_ring_size;
- /* Ammount of SKBs allocated to Rx Ring per queue */
- unsigned int rx_ring_skbs;
+ /* Number of rx descriptors in use */
+ unsigned int rx_desc_count;
/*
* rx_task used to fill RX ring out of bottom half context
u32 rx_int_coal;
u32 tx_int_coal;
+ struct mii_if_info mii;
};
/* ethernet.h API list */
/* Port operation control routines */
static void eth_port_init(struct mv643xx_private *mp);
static void eth_port_reset(unsigned int eth_port_num);
-static void eth_port_start(struct mv643xx_private *mp);
+static void eth_port_start(struct net_device *dev);
/* Port MAC address routines */
static void eth_port_uc_addr_set(unsigned int eth_port_num,
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
+#include <linux/jiffies.h>
#include <asm/system.h>
#include <asm/io.h>
/* This check _should_not_ be necessary, omit eventually. */
while ((inb_p(NE_BASE+EN0_ISR) & ENISR_RESET) == 0)
- if (jiffies - reset_start_time > 2*HZ/100) {
+ if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
printk(KERN_WARNING "%s: ne_reset_8390() did not complete.\n", dev->name);
break;
}
#endif
while ((inb_p(NE_BASE + EN0_ISR) & ENISR_RDC) == 0)
- if (jiffies - dma_start > 2*HZ/100) { /* 20ms */
+ if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */
printk(KERN_WARNING "%s: timeout waiting for Tx RDC.\n", dev->name);
ne_reset_8390(dev);
NS8390_init(dev,1);
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
+#include <linux/jiffies.h>
#include <asm/system.h>
#include <asm/io.h>
outb(inb(ioaddr + NE_RESET), ioaddr + NE_RESET);
while ((inb_p(ioaddr + EN0_ISR) & ENISR_RESET) == 0)
- if (jiffies - reset_start_time > 2*HZ/100) {
+ if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
if (bad_card) {
printk(" (warning: no reset ack)");
break;
/* This check _should_not_ be necessary, omit eventually. */
while ((inb_p(NE_BASE+EN0_ISR) & ENISR_RESET) == 0)
- if (jiffies - reset_start_time > 2*HZ/100) {
+ if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
printk(KERN_WARNING "%s: ne_reset_8390() did not complete.\n", dev->name);
break;
}
#endif
while ((inb_p(nic_base + EN0_ISR) & ENISR_RDC) == 0)
- if (jiffies - dma_start > 2*HZ/100) { /* 20ms */
+ if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */
printk(KERN_WARNING "%s: timeout waiting for Tx RDC.\n", dev->name);
ne_reset_8390(dev);
NS8390_init(dev,1);
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/bitops.h>
+#include <linux/jiffies.h>
#include <asm/system.h>
#include <asm/io.h>
outb(inb(base_addr + NE_RESET), base_addr + NE_RESET);
while ((inb_p(base_addr + EN0_ISR) & ENISR_RESET) == 0)
- if (jiffies - reset_start_time > 2*HZ/100) {
+ if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
printk(" not found (no reset ack).\n");
retval = -ENODEV;
goto out;
/* This check _should_not_ be necessary, omit eventually. */
while ((inb_p(NE_BASE+EN0_ISR) & ENISR_RESET) == 0)
- if (jiffies - reset_start_time > 2*HZ/100) {
+ if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
printk("%s: ne_reset_8390() did not complete.\n",
dev->name);
break;
#endif
while ((inb_p(nic_base + EN0_ISR) & ENISR_RDC) == 0)
- if (jiffies - dma_start > 2*HZ/100) { /* 20ms */
+ if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */
printk("%s: timeout waiting for Tx RDC.\n", dev->name);
ne_reset_8390(dev);
NS8390_init(dev,1);
#include <linux/timer.h>
#include <linux/if_vlan.h>
#include <linux/rtnetlink.h>
+#include <linux/jiffies.h>
#include <asm/io.h>
#include <asm/uaccess.h>
{
struct ns83820 *dev = PRIV(ndev);
int timed_out = 0;
- long start;
+ unsigned long start;
u32 status;
int loops = 0;
break;
if (status & fail)
break;
- if ((jiffies - start) >= HZ) {
+ if (time_after_eq(jiffies, start + HZ)) {
timed_out = 1;
break;
}
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/init.h>
+#include <linux/jiffies.h>
#include <asm/board.h>
#include <asm/io.h>
#endif
while ((ei_ibp(base + EN0_ISR) & ENISR_RDC) == 0) {
- if (jiffies - start > OAKNET_WAIT) {
+ if (time_after(jiffies, start + OAKNET_WAIT)) {
printk("%s: timeout waiting for Tx RDC.\n", dev->name);
oaknet_reset_8390(dev);
NS8390_init(dev, TRUE);
#include <linux/if_arp.h>
#include <linux/ioport.h>
#include <linux/bitops.h>
+#include <linux/jiffies.h>
#include <pcmcia/cs_types.h>
#include <pcmcia/cs.h>
media = inw(ioaddr+WN4_MEDIA) & 0xc810;
/* Ignore collisions unless we've had no irq's recently */
- if (jiffies - lp->last_irq < HZ) {
+ if (time_before(jiffies, lp->last_irq + HZ)) {
media &= ~0x0010;
} else {
/* Try harder to detect carrier errors */
#include <linux/ppp_channel.h>
#include <linux/spinlock.h>
#include <linux/init.h>
+#include <linux/jiffies.h>
#include <asm/uaccess.h>
#include <asm/string.h>
* character if necessary.
*/
if (islcp || flag_time == 0
- || jiffies - ap->last_xmit >= flag_time)
+ || time_after_eq(jiffies, ap->last_xmit + flag_time))
*buf++ = PPP_FLAG;
ap->last_xmit = jiffies;
fcs = PPP_INITFCS;
static char s2io_driver_name[] = "Neterion";
static char s2io_driver_version[] = DRV_VERSION;
-int rxd_size[4] = {32,48,48,64};
-int rxd_count[4] = {127,85,85,63};
+static int rxd_size[4] = {32,48,48,64};
+static int rxd_count[4] = {127,85,85,63};
static inline int RXD_IS_UP2DT(RxD_t *rxdp)
{
}
}
-int fill_rxd_3buf(nic_t *nic, RxD_t *rxdp, struct sk_buff *skb)
+static int fill_rxd_3buf(nic_t *nic, RxD_t *rxdp, struct sk_buff *skb)
{
struct net_device *dev = nic->dev;
struct sk_buff *frag_list;
* void.
*/
-void s2io_reset(nic_t * sp)
+static void s2io_reset(nic_t * sp)
{
XENA_dev_config_t __iomem *bar0 = sp->bar0;
u64 val64;
* SUCCESS on success and FAILURE on failure.
*/
-int s2io_set_swapper(nic_t * sp)
+static int s2io_set_swapper(nic_t * sp)
{
struct net_device *dev = sp->dev;
XENA_dev_config_t __iomem *bar0 = sp->bar0;
return ret;
}
-void restore_xmsi_data(nic_t *nic)
+static void restore_xmsi_data(nic_t *nic)
{
XENA_dev_config_t __iomem *bar0 = nic->bar0;
u64 val64;
return 0;
}
-int s2io_enable_msi_x(nic_t *nic)
+static int s2io_enable_msi_x(nic_t *nic)
{
XENA_dev_config_t __iomem *bar0 = nic->bar0;
u64 tx_mat, rx_mat;
* as defined in errno.h file on failure.
*/
-int s2io_set_mac_addr(struct net_device *dev, u8 * addr)
+static int s2io_set_mac_addr(struct net_device *dev, u8 * addr)
{
nic_t *sp = dev->priv;
XENA_dev_config_t __iomem *bar0 = sp->bar0;
* void.
*/
-void s2io_link(nic_t * sp, int link)
+static void s2io_link(nic_t * sp, int link)
{
struct net_device *dev = (struct net_device *) sp->dev;
* returns the revision ID of the device.
*/
-int get_xena_rev_id(struct pci_dev *pdev)
+static int get_xena_rev_id(struct pci_dev *pdev)
{
u8 id = 0;
int ret;
* Description: This function is the cleanup routine for the driver. It unregist * ers the driver.
*/
-void s2io_closer(void)
+static void s2io_closer(void)
{
pci_unregister_driver(&s2io_driver);
DBG_PRINT(INIT_DBG, "cleanup done\n");
#define INTR_DBG 4
/* Global variable that defines the present debug level of the driver. */
-int debug_level = ERR_DBG; /* Default level. */
+static int debug_level = ERR_DBG;
/* DEBUG message print. */
#define DBG_PRINT(dbg_level, args...) if(!(debug_level<dbg_level)) printk(args)
#define MAX_RX_RINGS 8
/* FIFO mappings for all possible number of fifos configured */
-int fifo_map[][MAX_TX_FIFOS] = {
+static int fifo_map[][MAX_TX_FIFOS] = {
{0, 0, 0, 0, 0, 0, 0, 0},
{0, 0, 0, 0, 1, 1, 1, 1},
{0, 0, 0, 1, 1, 1, 2, 2},
static void alarm_intr_handler(struct s2io_nic *sp);
static int s2io_starter(void);
-void s2io_closer(void);
static void s2io_tx_watchdog(struct net_device *dev);
static void s2io_tasklet(unsigned long dev_addr);
static void s2io_set_multicast(struct net_device *dev);
static int rx_osm_handler(ring_info_t *ring_data, RxD_t * rxdp);
-void s2io_link(nic_t * sp, int link);
-void s2io_reset(nic_t * sp);
+static void s2io_link(nic_t * sp, int link);
#if defined(CONFIG_S2IO_NAPI)
static int s2io_poll(struct net_device *dev, int *budget);
#endif
static void s2io_init_pci(nic_t * sp);
-int s2io_set_mac_addr(struct net_device *dev, u8 * addr);
+static int s2io_set_mac_addr(struct net_device *dev, u8 * addr);
static void s2io_alarm_handle(unsigned long data);
static int s2io_enable_msi(nic_t *nic);
static irqreturn_t s2io_msi_handle(int irq, void *dev_id, struct pt_regs *regs);
s2io_msix_ring_handle(int irq, void *dev_id, struct pt_regs *regs);
static irqreturn_t
s2io_msix_fifo_handle(int irq, void *dev_id, struct pt_regs *regs);
-int s2io_enable_msi_x(nic_t *nic);
static irqreturn_t s2io_isr(int irq, void *dev_id, struct pt_regs *regs);
static int verify_xena_quiescence(nic_t *sp, u64 val64, int flag);
static struct ethtool_ops netdev_ethtool_ops;
static void s2io_set_link(unsigned long data);
-int s2io_set_swapper(nic_t * sp);
+static int s2io_set_swapper(nic_t * sp);
static void s2io_card_down(nic_t *nic);
static int s2io_card_up(nic_t *nic);
-int get_xena_rev_id(struct pci_dev *pdev);
-void restore_xmsi_data(nic_t *nic);
+static int get_xena_rev_id(struct pci_dev *pdev);
+static void restore_xmsi_data(nic_t *nic);
#endif /* _S2IO_H */
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/bitops.h>
+#include <linux/jiffies.h>
#include <asm/system.h>
#include <asm/io.h>
int ioaddr = dev->base_addr;
int status = inw(SEEQ_STATUS);
int transmit_ptr = 0;
- int tmp;
+ unsigned long tmp;
if (net_debug>4) {
printk("%s: send 0x%04x\n",dev->name,length);
/* drain FIFO */
tmp = jiffies;
- while ( (((status=inw(SEEQ_STATUS)) & SEEQSTAT_FIFO_EMPTY) == 0) && (jiffies - tmp < HZ))
+ while ( (((status=inw(SEEQ_STATUS)) & SEEQSTAT_FIFO_EMPTY) == 0) && time_before(jiffies, tmp + HZ))
mb();
/* doit ! */
#include <linux/if_arp.h>
#include <linux/init.h>
#include <linux/if_shaper.h>
+#include <linux/jiffies.h>
#include <net/dst.h>
#include <net/arp.h>
/*
* Queue over time. Spill packet.
*/
- if(SHAPERCB(skb)->shapeclock-jiffies > SHAPER_LATENCY) {
+ if(time_after(SHAPERCB(skb)->shapeclock,jiffies + SHAPER_LATENCY)) {
dev_kfree_skb(skb);
shaper->stats.tx_dropped++;
} else
SK_U32 PortNumber,
int Flags);
-extern int SkAddrXmacMcClear(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- int Flags);
-
-extern int SkAddrGmacMcClear(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- int Flags);
-
extern int SkAddrMcAdd(
SK_AC *pAC,
SK_IOC IoC,
SK_MAC_ADDR *pMc,
int Flags);
-extern int SkAddrXmacMcAdd(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- SK_MAC_ADDR *pMc,
- int Flags);
-
-extern int SkAddrGmacMcAdd(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- SK_MAC_ADDR *pMc,
- int Flags);
-
extern int SkAddrMcUpdate(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber);
-extern int SkAddrXmacMcUpdate(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber);
-
-extern int SkAddrGmacMcUpdate(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber);
-
extern int SkAddrOverride(
SK_AC *pAC,
SK_IOC IoC,
SK_U32 PortNumber,
int NewPromMode);
-extern int SkAddrXmacPromiscuousChange(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- int NewPromMode);
-
-extern int SkAddrGmacPromiscuousChange(
- SK_AC *pAC,
- SK_IOC IoC,
- SK_U32 PortNumber,
- int NewPromMode);
-
#ifndef SK_SLIM
extern int SkAddrSwap(
SK_AC *pAC,
unsigned Checksum2,
int NetNumber);
-extern void SkCsGetSendInfo(
- SK_AC *pAc,
- void *pIpHeader,
- SKCS_PACKET_INFO *pPacketInfo,
- int NetNumber);
-
extern void SkCsSetReceiveFlags(
SK_AC *pAc,
unsigned ReceiveFlags,
/*
* public functions in skgeinit.c
*/
-extern void SkGePollRxD(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- SK_BOOL PollRxD);
-
extern void SkGePollTxD(
SK_AC *pAC,
SK_IOC IoC,
int Led,
int Mode);
-extern void SkGeInitRamIface(
- SK_AC *pAC,
- SK_IOC IoC);
-
extern int SkGeInitAssignRamToQueues(
SK_AC *pAC,
int ActivePort,
SK_IOC IoC,
int Port);
-extern void SkMacClearRst(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
extern void SkXmInitMac(
SK_AC *pAC,
SK_IOC IoC,
SK_IOC IoC,
int Port);
-extern void SkMacFlushRxFifo(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
extern void SkMacIrq(
SK_AC *pAC,
SK_IOC IoC,
int Port,
SK_U16 IStatus);
-extern void SkMacSetRxTxEn(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- int Para);
-
extern int SkMacRxTxEnable(
SK_AC *pAC,
SK_IOC IoC,
int StartNum,
int StopNum);
-extern void SkXmInitDupMd(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
-extern void SkXmInitPauseMd(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
extern void SkXmAutoNegLipaXmac(
SK_AC *pAC,
SK_IOC IoC,
int Port,
SK_BOOL StartTest);
-extern int SkGmEnterLowPowerMode(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port,
- SK_U8 Mode);
-
-extern int SkGmLeaveLowPowerMode(
- SK_AC *pAC,
- SK_IOC IoC,
- int Port);
-
#ifdef SK_DIAG
extern void SkGePhyRead(
SK_AC *pAC,
/*
* public functions in skgeinit.c
*/
-extern void SkGePollRxD();
extern void SkGePollTxD();
extern void SkGeYellowLED();
extern int SkGeCfgSync();
extern void SkGeDeInit();
extern int SkGeInitPort();
extern void SkGeXmitLED();
-extern void SkGeInitRamIface();
extern int SkGeInitAssignRamToQueues();
/*
extern void SkMacRxTxDisable();
extern void SkMacSoftRst();
extern void SkMacHardRst();
-extern void SkMacClearRst();
extern void SkMacInitPhy();
extern int SkMacRxTxEnable();
extern void SkMacPromiscMode();
extern void SkMacHashing();
extern void SkMacIrqDisable();
extern void SkMacFlushTxFifo();
-extern void SkMacFlushRxFifo();
extern void SkMacIrq();
extern int SkMacAutoNegDone();
extern void SkMacAutoNegLipaPhy();
-extern void SkMacSetRxTxEn();
extern void SkXmInitMac();
extern void SkXmPhyRead();
extern void SkXmPhyWrite();
extern void SkGmPhyRead();
extern void SkGmPhyWrite();
extern void SkXmClrExactAddr();
-extern void SkXmInitDupMd();
-extern void SkXmInitPauseMd();
extern void SkXmAutoNegLipaXmac();
extern int SkXmUpdateStats();
extern int SkGmUpdateStats();
extern int SkXmOverflowStatus();
extern int SkGmOverflowStatus();
extern int SkGmCableDiagStatus();
-extern int SkGmEnterLowPowerMode();
-extern int SkGmLeaveLowPowerMode();
#ifdef SK_DIAG
extern void SkGePhyRead();
* Function prototypes
*/
extern int SkPnmiInit(SK_AC *pAC, SK_IOC IoC, int Level);
-extern int SkPnmiGetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void* pBuf,
- unsigned int* pLen, SK_U32 Instance, SK_U32 NetIndex);
-extern int SkPnmiPreSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id,
- void* pBuf, unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
extern int SkPnmiSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void* pBuf,
unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
extern int SkPnmiGetStruct(SK_AC *pAC, SK_IOC IoC, void* pBuf,
extern void SkGeSirqIsr(SK_AC *pAC, SK_IOC IoC, SK_U32 Istatus);
extern int SkGeSirqEvent(SK_AC *pAC, SK_IOC IoC, SK_U32 Event, SK_EVPARA Para);
-extern void SkHWLinkUp(SK_AC *pAC, SK_IOC IoC, int Port);
extern void SkHWLinkDown(SK_AC *pAC, SK_IOC IoC, int Port);
#endif /* _INC_SKGESIRQ_H_ */
} SK_I2C;
extern int SkI2cInit(SK_AC *pAC, SK_IOC IoC, int Level);
-extern int SkI2cWrite(SK_AC *pAC, SK_IOC IoC, SK_U32 Data, int Dev, int Size,
- int Reg, int Burst);
-extern int SkI2cReadSensor(SK_AC *pAC, SK_IOC IoC, SK_SENSOR *pSen);
#ifdef SK_DIAG
extern SK_U32 SkI2cRead(SK_AC *pAC, SK_IOC IoC, int Dev, int Size, int Reg,
int Burst);
int addr);
#endif /* SKDIAG */
-extern int VpdSetupPara(
- SK_AC *pAC,
- const char *key,
- const char *buf,
- int len,
- int type,
- int op);
-
extern SK_VPD_STATUS *VpdStat(
SK_AC *pAC,
SK_IOC IoC);
SK_AC *pAC,
SK_IOC IoC);
-extern void VpdErrLog(
- SK_AC *pAC,
- SK_IOC IoC,
- char *msg);
-
#ifdef SKDIAG
extern int VpdReadBlock(
SK_AC *pAC,
#endif /* SKDIAG */
#else /* SK_KR_PROTO */
extern SK_U32 VpdReadDWord();
-extern int VpdSetupPara();
extern SK_VPD_STATUS *VpdStat();
extern int VpdKeys();
extern int VpdRead();
extern int VpdWrite();
extern int VpdDelete();
extern int VpdUpdate();
-extern void VpdErrLog();
#endif /* SK_KR_PROTO */
#endif /* __INC_SKVPD_H_ */
static int Next0[SK_MAX_MACS] = {0};
#endif /* DEBUG */
+static int SkAddrGmacMcAdd(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber,
+ SK_MAC_ADDR *pMc, int Flags);
+static int SkAddrGmacMcClear(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber,
+ int Flags);
+static int SkAddrGmacMcUpdate(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber);
+static int SkAddrGmacPromiscuousChange(SK_AC *pAC, SK_IOC IoC,
+ SK_U32 PortNumber, int NewPromMode);
+static int SkAddrXmacMcAdd(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber,
+ SK_MAC_ADDR *pMc, int Flags);
+static int SkAddrXmacMcClear(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber,
+ int Flags);
+static int SkAddrXmacMcUpdate(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber);
+static int SkAddrXmacPromiscuousChange(SK_AC *pAC, SK_IOC IoC,
+ SK_U32 PortNumber, int NewPromMode);
+
/* functions ******************************************************************/
/******************************************************************************
* SK_ADDR_SUCCESS
* SK_ADDR_ILLEGAL_PORT
*/
-int SkAddrXmacMcClear(
+static int SkAddrXmacMcClear(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* I/O context */
SK_U32 PortNumber, /* Index of affected port */
* SK_ADDR_SUCCESS
* SK_ADDR_ILLEGAL_PORT
*/
-int SkAddrGmacMcClear(
+static int SkAddrGmacMcClear(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* I/O context */
SK_U32 PortNumber, /* Index of affected port */
* Returns:
* Hash value of multicast address.
*/
-SK_U32 SkXmacMcHash(
+static SK_U32 SkXmacMcHash(
unsigned char *pMc) /* Multicast address */
{
SK_U32 Idx;
* Returns:
* Hash value of multicast address.
*/
-SK_U32 SkGmacMcHash(
+static SK_U32 SkGmacMcHash(
unsigned char *pMc) /* Multicast address */
{
SK_U32 Data;
* SK_MC_ILLEGAL_ADDRESS
* SK_MC_RLMT_OVERFLOW
*/
-int SkAddrXmacMcAdd(
+static int SkAddrXmacMcAdd(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* I/O context */
SK_U32 PortNumber, /* Port Number */
* SK_MC_FILTERING_INEXACT
* SK_MC_ILLEGAL_ADDRESS
*/
-int SkAddrGmacMcAdd(
+static int SkAddrGmacMcAdd(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* I/O context */
SK_U32 PortNumber, /* Port Number */
* SK_MC_FILTERING_INEXACT
* SK_ADDR_ILLEGAL_PORT
*/
-int SkAddrXmacMcUpdate(
+static int SkAddrXmacMcUpdate(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* I/O context */
SK_U32 PortNumber) /* Port Number */
* SK_MC_FILTERING_INEXACT
* SK_ADDR_ILLEGAL_PORT
*/
-int SkAddrGmacMcUpdate(
+static int SkAddrGmacMcUpdate(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* I/O context */
SK_U32 PortNumber) /* Port Number */
* SK_ADDR_SUCCESS
* SK_ADDR_ILLEGAL_PORT
*/
-int SkAddrXmacPromiscuousChange(
+static int SkAddrXmacPromiscuousChange(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* I/O context */
SK_U32 PortNumber, /* port whose promiscuous mode changes */
* SK_ADDR_SUCCESS
* SK_ADDR_ILLEGAL_PORT
*/
-int SkAddrGmacPromiscuousChange(
+static int SkAddrGmacPromiscuousChange(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* I/O context */
SK_U32 PortNumber, /* port whose promiscuous mode changes */
#endif
};
-/******************************************************************************
- *
- * SkGePollRxD() - Enable / Disable Descriptor Polling of RxD Ring
- *
- * Description:
- * Enable or disable the descriptor polling of the receive descriptor
- * ring (RxD) for port 'Port'.
- * The new configuration is *not* saved over any SkGeStopPort() and
- * SkGeInitPort() calls.
- *
- * Returns:
- * nothing
- */
-void SkGePollRxD(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-SK_BOOL PollRxD) /* SK_TRUE (enable pol.), SK_FALSE (disable pol.) */
-{
- SK_GEPORT *pPrt;
-
- pPrt = &pAC->GIni.GP[Port];
-
- SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), (PollRxD) ?
- CSR_ENA_POL : CSR_DIS_POL);
-} /* SkGePollRxD */
-
-
/******************************************************************************
*
* SkGePollTxD() - Enable / Disable Descriptor Polling of TxD Rings
* Returns:
* nothing
*/
-void SkGeInitRamIface(
+static void SkGeInitRamIface(
SK_AC *pAC, /* adapter context */
SK_IOC IoC) /* IO context */
{
} /* SkGeInit0*/
-#ifdef SK_PCI_RESET
-
-/******************************************************************************
- *
- * SkGePciReset() - Reset PCI interface
- *
- * Description:
- * o Read PCI configuration.
- * o Change power state to 3.
- * o Change power state to 0.
- * o Restore PCI configuration.
- *
- * Returns:
- * 0: Success.
- * 1: Power state could not be changed to 3.
- */
-static int SkGePciReset(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC) /* IO context */
-{
- int i;
- SK_U16 PmCtlSts;
- SK_U32 Bp1;
- SK_U32 Bp2;
- SK_U16 PciCmd;
- SK_U8 Cls;
- SK_U8 Lat;
- SK_U8 ConfigSpace[PCI_CFG_SIZE];
-
- /*
- * Note: Switching to D3 state is like a software reset.
- * Switching from D3 to D0 is a hardware reset.
- * We have to save and restore the configuration space.
- */
- for (i = 0; i < PCI_CFG_SIZE; i++) {
- SkPciReadCfgDWord(pAC, i*4, &ConfigSpace[i]);
- }
-
- /* We know the RAM Interface Arbiter is enabled. */
- SkPciWriteCfgWord(pAC, PCI_PM_CTL_STS, PCI_PM_STATE_D3);
- SkPciReadCfgWord(pAC, PCI_PM_CTL_STS, &PmCtlSts);
-
- if ((PmCtlSts & PCI_PM_STATE_MSK) != PCI_PM_STATE_D3) {
- return(1);
- }
-
- /* Return to D0 state. */
- SkPciWriteCfgWord(pAC, PCI_PM_CTL_STS, PCI_PM_STATE_D0);
-
- /* Check for D0 state. */
- SkPciReadCfgWord(pAC, PCI_PM_CTL_STS, &PmCtlSts);
-
- if ((PmCtlSts & PCI_PM_STATE_MSK) != PCI_PM_STATE_D0) {
- return(1);
- }
-
- /* Check PCI Config Registers. */
- SkPciReadCfgWord(pAC, PCI_COMMAND, &PciCmd);
- SkPciReadCfgByte(pAC, PCI_CACHE_LSZ, &Cls);
- SkPciReadCfgDWord(pAC, PCI_BASE_1ST, &Bp1);
- SkPciReadCfgDWord(pAC, PCI_BASE_2ND, &Bp2);
- SkPciReadCfgByte(pAC, PCI_LAT_TIM, &Lat);
-
- if (PciCmd != 0 || Cls != (SK_U8)0 || Lat != (SK_U8)0 ||
- (Bp1 & 0xfffffff0L) != 0 || Bp2 != 1) {
- return(1);
- }
-
- /* Restore PCI Config Space. */
- for (i = 0; i < PCI_CFG_SIZE; i++) {
- SkPciWriteCfgDWord(pAC, i*4, ConfigSpace[i]);
- }
-
- return(0);
-} /* SkGePciReset */
-
-#endif /* SK_PCI_RESET */
/******************************************************************************
*
/* save CLK_RUN bits (YUKON-Lite) */
SK_IN16(IoC, B0_CTST, &CtrlStat);
-#ifdef SK_PCI_RESET
- (void)SkGePciReset(pAC, IoC);
-#endif /* SK_PCI_RESET */
-
/* do the SW-reset */
SK_OUT8(IoC, B0_CTST, CS_RST_SET);
int i;
SK_U16 Word;
-#ifdef SK_PHY_LP_MODE
- SK_U8 Byte;
- SK_U16 PmCtlSts;
-#endif /* SK_PHY_LP_MODE */
-
#if (!defined(SK_SLIM) && !defined(VCPU))
/* ensure I2C is ready */
SkI2cWaitIrq(pAC, IoC);
}
}
-#ifdef SK_PHY_LP_MODE
- /*
- * for power saving purposes within mobile environments
- * we set the PHY to coma mode and switch to D3 power state.
- */
- if (pAC->GIni.GIYukonLite &&
- pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) {
-
- /* for all ports switch PHY to coma mode */
- for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
-
- SkGmEnterLowPowerMode(pAC, IoC, i, PHY_PM_DEEP_SLEEP);
- }
-
- if (pAC->GIni.GIVauxAvail) {
- /* switch power to VAUX */
- Byte = PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_ON | PC_VCC_OFF;
-
- SK_OUT8(IoC, B0_POWER_CTRL, Byte);
- }
-
- /* switch to D3 state */
- SK_IN16(IoC, PCI_C(PCI_PM_CTL_STS), &PmCtlSts);
-
- PmCtlSts |= PCI_PM_STATE_D3;
-
- SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
-
- SK_OUT16(IoC, PCI_C(PCI_PM_CTL_STS), PmCtlSts);
- }
-#endif /* SK_PHY_LP_MODE */
-
/* Reset all bits in the PCI STATUS register */
/*
* Note: PCI Cfg cycles cannot be used, because they are not
sizeof(SK_PNMI_CONF),
SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyType),
SK_PNMI_RO, MacPrivateConf, 0},
-#ifdef SK_PHY_LP_MODE
- {OID_SKGE_PHY_LP_MODE,
- SK_PNMI_MAC_ENTRIES,
- sizeof(SK_PNMI_CONF),
- SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyMode),
- SK_PNMI_RW, MacPrivateConf, 0},
-#endif
{OID_SKGE_LINK_CAP,
SK_PNMI_MAC_ENTRIES,
sizeof(SK_PNMI_CONF),
* Public Function prototypes
*/
int SkPnmiInit(SK_AC *pAC, SK_IOC IoC, int level);
-int SkPnmiGetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void *pBuf,
- unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
-int SkPnmiPreSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void *pBuf,
- unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
int SkPnmiSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void *pBuf,
unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
int SkPnmiGetStruct(SK_AC *pAC, SK_IOC IoC, void *pBuf,
* exist (e.g. port instance 3 on a two port
* adapter.
*/
-int SkPnmiGetVar(
+static int SkPnmiGetVar(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
SK_U32 Id, /* Object ID that is to be processed */
* exist (e.g. port instance 3 on a two port
* adapter.
*/
-int SkPnmiPreSetVar(
+static int SkPnmiPreSetVar(
SK_AC *pAC, /* Pointer to adapter context */
SK_IOC IoC, /* IO context handle */
SK_U32 Id, /* Object ID that is to be processed */
case OID_SKGE_SPEED_CAP:
case OID_SKGE_SPEED_MODE:
case OID_SKGE_SPEED_STATUS:
-#ifdef SK_PHY_LP_MODE
- case OID_SKGE_PHY_LP_MODE:
-#endif
if (*pLen < (Limit - LogPortIndex) * sizeof(SK_U8)) {
*pLen = (Limit - LogPortIndex) * sizeof(SK_U8);
Offset += sizeof(SK_U32);
break;
-#ifdef SK_PHY_LP_MODE
- case OID_SKGE_PHY_LP_MODE:
- if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
- if (LogPortIndex == 0) {
- continue;
- }
- else {
- /* Get value for physical ports */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
- Val8 = (SK_U8) pAC->GIni.GP[PhysPortIndex].PPhyPowerState;
- *pBufPtr = Val8;
- }
- }
- else { /* DualNetMode */
-
- Val8 = (SK_U8) pAC->GIni.GP[PhysPortIndex].PPhyPowerState;
- *pBufPtr = Val8;
- }
- Offset += sizeof(SK_U8);
- break;
-#endif
-
case OID_SKGE_LINK_CAP:
if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
if (LogPortIndex == 0) {
}
break;
-#ifdef SK_PHY_LP_MODE
- case OID_SKGE_PHY_LP_MODE:
- if (*pLen < Limit - LogPortIndex) {
-
- *pLen = Limit - LogPortIndex;
- return (SK_PNMI_ERR_TOO_SHORT);
- }
- break;
-#endif
-
case OID_SKGE_MTU:
if (*pLen < sizeof(SK_U32)) {
Offset += sizeof(SK_U32);
break;
-#ifdef SK_PHY_LP_MODE
- case OID_SKGE_PHY_LP_MODE:
- /* The preset ends here */
- if (Action == SK_PNMI_PRESET) {
-
- return (SK_PNMI_ERR_OK);
- }
-
- if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
- if (LogPortIndex == 0) {
- Offset = 0;
- continue;
- }
- else {
- /* Set value for physical ports */
- PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
-
- switch (*(pBuf + Offset)) {
- case 0:
- /* If LowPowerMode is active, we can leave it. */
- if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
-
- Val32 = SkGmLeaveLowPowerMode(pAC, IoC, PhysPortIndex);
-
- if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState < 3) {
-
- SkDrvInitAdapter(pAC);
- }
- break;
- }
- else {
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- case 1:
- case 2:
- case 3:
- case 4:
- /* If no LowPowerMode is active, we can enter it. */
- if (!pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
-
- if ((*(pBuf + Offset)) < 3) {
-
- SkDrvDeInitAdapter(pAC);
- }
-
- Val32 = SkGmEnterLowPowerMode(pAC, IoC, PhysPortIndex, *pBuf);
- break;
- }
- else {
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
- default:
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
- }
- }
- else { /* DualNetMode */
-
- switch (*(pBuf + Offset)) {
- case 0:
- /* If we are in a LowPowerMode, we can leave it. */
- if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
-
- Val32 = SkGmLeaveLowPowerMode(pAC, IoC, PhysPortIndex);
-
- if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState < 3) {
-
- SkDrvInitAdapter(pAC);
- }
- break;
- }
- else {
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- case 1:
- case 2:
- case 3:
- case 4:
- /* If we are not already in LowPowerMode, we can enter it. */
- if (!pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
-
- if ((*(pBuf + Offset)) < 3) {
-
- SkDrvDeInitAdapter(pAC);
- }
- else {
-
- Val32 = SkGmEnterLowPowerMode(pAC, IoC, PhysPortIndex, *pBuf);
- }
- break;
- }
- else {
- *pLen = 0;
- return (SK_PNMI_ERR_GENERAL);
- }
-
- default:
- *pLen = 0;
- return (SK_PNMI_ERR_BAD_VALUE);
- }
- }
- Offset += sizeof(SK_U8);
- break;
-#endif
-
default:
SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_ERR,
("MacPrivateConf: Unknown OID should be handled before set"));
*
* Returns: N/A
*/
-void SkHWLinkUp(
+static void SkHWLinkUp(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
* we ignore those
*/
pPrt->HalfDupTimerActive = SK_TRUE;
-#ifdef XXX
- Len = sizeof(SK_U64);
- SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
- &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, 0),
- pAC->Rlmt.Port[0].Net->NetNumber);
-
- pPrt->LastOctets = Octets;
-#endif /* XXX */
/* Snap statistic counters */
(void)SkXmUpdateStats(pAC, IoC, 0);
pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) &&
!pPrt->HalfDupTimerActive) {
pPrt->HalfDupTimerActive = SK_TRUE;
-#ifdef XXX
- Len = sizeof(SK_U64);
- SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
- &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, 1),
- pAC->Rlmt.Port[1].Net->NetNumber);
-
- pPrt->LastOctets = Octets;
-#endif /* XXX */
/* Snap statistic counters */
(void)SkXmUpdateStats(pAC, IoC, 1);
pPrt->HalfDupTimerActive = SK_FALSE;
if (pPrt->PLinkModeStatus == SK_LMODE_STAT_HALF ||
pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) {
-#ifdef XXX
- Len = sizeof(SK_U64);
- SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
- &Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, Port),
- pAC->Rlmt.Port[Port].Net->NetNumber);
-#endif /* XXX */
/* Snap statistic counters */
(void)SkXmUpdateStats(pAC, IoC, Port);
* 1: error, transfer does not complete, I2C transfer
* killed, wait loop terminated.
*/
-int SkI2cWait(
+static int SkI2cWait(
SK_AC *pAC, /* Adapter Context */
SK_IOC IoC, /* I/O Context */
int Event) /* complete event to wait for (I2C_READ or I2C_WRITE) */
* returns 0: success
* 1: error
*/
-int SkI2cWrite(
+static int SkI2cWrite(
SK_AC *pAC, /* Adapter Context */
SK_IOC IoC, /* I/O Context */
SK_U32 I2cData, /* I2C Data to write */
* 1 if the read is completed
* 0 if the read must be continued (I2C Bus still allocated)
*/
-int SkI2cReadSensor(
+static int SkI2cReadSensor(
SK_AC *pAC, /* Adapter Context */
SK_IOC IoC, /* I/O Context */
SK_SENSOR *pSen) /* Sensor to be read */
#include "h/lm80.h"
#include "h/skdrv2nd.h" /* Adapter Control- and Driver specific Def. */
-#ifdef SK_DIAG
-#define BREAK_OR_WAIT(pAC,IoC,Event) SkI2cWait(pAC,IoC,Event)
-#else /* nSK_DIAG */
#define BREAK_OR_WAIT(pAC,IoC,Event) break
-#endif /* nSK_DIAG */
-
-#ifdef SK_DIAG
-/*
- * read the register 'Reg' from the device 'Dev'
- *
- * return read error -1
- * success the read value
- */
-int SkLm80RcvReg(
-SK_IOC IoC, /* Adapter Context */
-int Dev, /* I2C device address */
-int Reg) /* register to read */
-{
- int Val = 0;
- int TempExt;
-
- /* Signal device number */
- if (SkI2cSndDev(IoC, Dev, I2C_WRITE)) {
- return(-1);
- }
-
- if (SkI2cSndByte(IoC, Reg)) {
- return(-1);
- }
-
- /* repeat start */
- if (SkI2cSndDev(IoC, Dev, I2C_READ)) {
- return(-1);
- }
-
- switch (Reg) {
- case LM80_TEMP_IN:
- Val = (int)SkI2cRcvByte(IoC, 1);
-
- /* First: correct the value: it might be negative */
- if ((Val & 0x80) != 0) {
- /* Value is negative */
- Val = Val - 256;
- }
- Val = Val * SK_LM80_TEMP_LSB;
- SkI2cStop(IoC);
-
- TempExt = (int)SkLm80RcvReg(IoC, LM80_ADDR, LM80_TEMP_CTRL);
-
- if (Val > 0) {
- Val += ((TempExt >> 7) * SK_LM80_TEMPEXT_LSB);
- }
- else {
- Val -= ((TempExt >> 7) * SK_LM80_TEMPEXT_LSB);
- }
- return(Val);
- break;
- case LM80_VT0_IN:
- case LM80_VT1_IN:
- case LM80_VT2_IN:
- case LM80_VT3_IN:
- Val = (int)SkI2cRcvByte(IoC, 1) * SK_LM80_VT_LSB;
- break;
-
- default:
- Val = (int)SkI2cRcvByte(IoC, 1);
- break;
- }
-
- SkI2cStop(IoC);
- return(Val);
-}
-#endif /* SK_DIAG */
/*
* read a sensors value (LM80 specific)
SK_MAC_ADDR SkRlmtMcAddr = {{0x01, 0x00, 0x5A, 0x52, 0x4C, 0x4D}};
SK_MAC_ADDR BridgeMcAddr = {{0x01, 0x80, 0xC2, 0x00, 0x00, 0x00}};
-SK_MAC_ADDR BcAddr = {{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}};
/* local variables ************************************************************/
#endif /* SKDIAG */
-#if 0
-
-/*
- Write the dword 'data' at address 'addr' into the VPD EEPROM, and
- verify that the data is written.
-
- Needed Time:
-
-. MIN MAX
-. -------------------------------------------------------------------
-. write 1.8 ms 3.6 ms
-. internal write cyles 0.7 ms 7.0 ms
-. -------------------------------------------------------------------
-. over all program time 2.5 ms 10.6 ms
-. read 1.3 ms 2.6 ms
-. -------------------------------------------------------------------
-. over all 3.8 ms 13.2 ms
-.
-
-
- Returns 0: success
- 1: error, I2C transfer does not terminate
- 2: error, data verify error
-
- */
-static int VpdWriteDWord(
-SK_AC *pAC, /* pAC pointer */
-SK_IOC IoC, /* IO Context */
-int addr, /* VPD address */
-SK_U32 data) /* VPD data to write */
-{
- /* start VPD write */
- /* Don't swap here, it's a data stream of bytes */
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
- ("VPD write dword at addr 0x%x, data = 0x%x\n",addr,data));
- VPD_OUT32(pAC, IoC, PCI_VPD_DAT_REG, (SK_U32)data);
- /* But do it here */
- addr |= VPD_WRITE;
-
- VPD_OUT16(pAC, IoC, PCI_VPD_ADR_REG, (SK_U16)(addr | VPD_WRITE));
-
- /* this may take up to 10,6 ms */
- if (VpdWait(pAC, IoC, VPD_WRITE)) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("Write Timed Out\n"));
- return(1);
- };
-
- /* verify data */
- if (VpdReadDWord(pAC, IoC, addr) != data) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
- ("Data Verify Error\n"));
- return(2);
- }
- return(0);
-} /* VpdWriteDWord */
-
-#endif /* 0 */
-
/*
* Read one Stream of 'len' bytes of VPD data, starting at 'addr' from
* or to the I2C EEPROM.
* 6: fatal VPD error
*
*/
-int VpdSetupPara(
+static int VpdSetupPara(
SK_AC *pAC, /* common data base */
const char *key, /* keyword to insert */
const char *buf, /* buffer with the keyword value */
return(0);
}
-
-
-/*
- * Read the contents of the VPD EEPROM and copy it to the VPD buffer
- * if not already done. If the keyword "VF" is not present it will be
- * created and the error log message will be stored to this keyword.
- * If "VF" is not present the error log message will be stored to the
- * keyword "VL". "VL" will created or overwritten if "VF" is present.
- * The VPD read/write area is saved to the VPD EEPROM.
- *
- * returns nothing, errors will be ignored.
- */
-void VpdErrLog(
-SK_AC *pAC, /* common data base */
-SK_IOC IoC, /* IO Context */
-char *msg) /* error log message */
-{
- SK_VPD_PARA *v, vf; /* VF */
- int len;
-
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX,
- ("VPD error log msg %s\n", msg));
- if ((pAC->vpd.v.vpd_status & VPD_VALID) == 0) {
- if (VpdInit(pAC, IoC) != 0) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
- ("VPD init error\n"));
- return;
- }
- }
-
- len = strlen(msg);
- if (len > VPD_MAX_LEN) {
- /* cut it */
- len = VPD_MAX_LEN;
- }
- if ((v = vpd_find_para(pAC, VPD_VF, &vf)) != NULL) {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, ("overwrite VL\n"));
- (void)VpdSetupPara(pAC, VPD_VL, msg, len, VPD_RW_KEY, OWR_KEY);
- }
- else {
- SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, ("write VF\n"));
- (void)VpdSetupPara(pAC, VPD_VF, msg, len, VPD_RW_KEY, ADD_KEY);
- }
-
- (void)VpdUpdate(pAC, IoC);
-}
-
#endif
#ifdef GENESIS
-BCOM_HACK BcomRegA1Hack[] = {
+static BCOM_HACK BcomRegA1Hack[] = {
{ 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1104 }, { 0x17, 0x0013 },
{ 0x15, 0x0404 }, { 0x17, 0x8006 }, { 0x15, 0x0132 }, { 0x17, 0x8006 },
{ 0x15, 0x0232 }, { 0x17, 0x800D }, { 0x15, 0x000F }, { 0x18, 0x0420 },
{ 0, 0 }
};
-BCOM_HACK BcomRegC0Hack[] = {
+static BCOM_HACK BcomRegC0Hack[] = {
{ 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1204 }, { 0x17, 0x0013 },
{ 0x15, 0x0A04 }, { 0x18, 0x0420 },
{ 0, 0 }
* Returns:
* nothing
*/
-void SkMacFlushRxFifo(
+static void SkMacFlushRxFifo(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
} /* SkMacHardRst */
-/******************************************************************************
- *
- * SkMacClearRst() - Clear the MAC reset
- *
- * Description: calls a clear MAC reset routine dep. on board type
- *
- * Returns:
- * nothing
- */
-void SkMacClearRst(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (MAC_1 + n) */
-{
-
-#ifdef GENESIS
- if (pAC->GIni.GIGenesis) {
-
- SkXmClearRst(pAC, IoC, Port);
- }
-#endif /* GENESIS */
-
-#ifdef YUKON
- if (pAC->GIni.GIYukon) {
-
- SkGmClearRst(pAC, IoC, Port);
- }
-#endif /* YUKON */
-
-} /* SkMacClearRst */
-
-
#ifdef GENESIS
/******************************************************************************
*
* Returns:
* nothing
*/
-void SkXmInitDupMd(
+static void SkXmInitDupMd(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
* Returns:
* nothing
*/
-void SkXmInitPauseMd(
+static void SkXmInitPauseMd(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
} /* SkXmInitPhyBcom */
#endif /* GENESIS */
-
#ifdef YUKON
-#ifndef SK_SLIM
-/******************************************************************************
- *
- * SkGmEnterLowPowerMode()
- *
- * Description:
- * This function sets the Marvell Alaska PHY to the low power mode
- * given by parameter mode.
- * The following low power modes are available:
- *
- * - Coma Mode (Deep Sleep):
- * Power consumption: ~15 - 30 mW
- * The PHY cannot wake up on its own.
- *
- * - IEEE 22.2.4.1.5 compatible power down mode
- * Power consumption: ~240 mW
- * The PHY cannot wake up on its own.
- *
- * - energy detect mode
- * Power consumption: ~160 mW
- * The PHY can wake up on its own by detecting activity
- * on the CAT 5 cable.
- *
- * - energy detect plus mode
- * Power consumption: ~150 mW
- * The PHY can wake up on its own by detecting activity
- * on the CAT 5 cable.
- * Connected devices can be woken up by sending normal link
- * pulses every one second.
- *
- * Note:
- *
- * Returns:
- * 0: ok
- * 1: error
- */
-int SkGmEnterLowPowerMode(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (e.g. MAC_1) */
-SK_U8 Mode) /* low power mode */
-{
- SK_U16 Word;
- SK_U32 DWord;
- SK_U8 LastMode;
- int Ret = 0;
-
- if (pAC->GIni.GIYukonLite &&
- pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) {
-
- /* save current power mode */
- LastMode = pAC->GIni.GP[Port].PPhyPowerState;
- pAC->GIni.GP[Port].PPhyPowerState = Mode;
-
- switch (Mode) {
- /* coma mode (deep sleep) */
- case PHY_PM_DEEP_SLEEP:
- /* setup General Purpose Control Register */
- GM_OUT16(IoC, 0, GM_GP_CTRL, GM_GPCR_FL_PASS |
- GM_GPCR_SPEED_100 | GM_GPCR_AU_ALL_DIS);
-
- /* apply COMA mode workaround */
- SkGmPhyWrite(pAC, IoC, Port, 29, 0x001f);
- SkGmPhyWrite(pAC, IoC, Port, 30, 0xfff3);
-
- SK_IN32(IoC, PCI_C(PCI_OUR_REG_1), &DWord);
-
- SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
-
- /* Set PHY to Coma Mode */
- SK_OUT32(IoC, PCI_C(PCI_OUR_REG_1), DWord | PCI_PHY_COMA);
-
- SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
-
- break;
-
- /* IEEE 22.2.4.1.5 compatible power down mode */
- case PHY_PM_IEEE_POWER_DOWN:
- /*
- * - disable MAC 125 MHz clock
- * - allow MAC power down
- */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
- Word |= PHY_M_PC_DIS_125CLK;
- Word &= ~PHY_M_PC_MAC_POW_UP;
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
-
- /*
- * register changes must be followed by a software
- * reset to take effect
- */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
- Word |= PHY_CT_RESET;
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
-
- /* switch IEEE compatible power down mode on */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
- Word |= PHY_CT_PDOWN;
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
- break;
-
- /* energy detect and energy detect plus mode */
- case PHY_PM_ENERGY_DETECT:
- case PHY_PM_ENERGY_DETECT_PLUS:
- /*
- * - disable MAC 125 MHz clock
- */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
- Word |= PHY_M_PC_DIS_125CLK;
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
-
- /* activate energy detect mode 1 */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
-
- /* energy detect mode */
- if (Mode == PHY_PM_ENERGY_DETECT) {
- Word |= PHY_M_PC_EN_DET;
- }
- /* energy detect plus mode */
- else {
- Word |= PHY_M_PC_EN_DET_PLUS;
- }
-
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
-
- /*
- * reinitialize the PHY to force a software reset
- * which is necessary after the register settings
- * for the energy detect modes.
- * Furthermore reinitialisation prevents that the
- * PHY is running out of a stable state.
- */
- SkGmInitPhyMarv(pAC, IoC, Port, SK_FALSE);
- break;
-
- /* don't change current power mode */
- default:
- pAC->GIni.GP[Port].PPhyPowerState = LastMode;
- Ret = 1;
- break;
- }
- }
- /* low power modes are not supported by this chip */
- else {
- Ret = 1;
- }
-
- return(Ret);
-
-} /* SkGmEnterLowPowerMode */
-
-/******************************************************************************
- *
- * SkGmLeaveLowPowerMode()
- *
- * Description:
- * Leave the current low power mode and switch to normal mode
- *
- * Note:
- *
- * Returns:
- * 0: ok
- * 1: error
- */
-int SkGmLeaveLowPowerMode(
-SK_AC *pAC, /* adapter context */
-SK_IOC IoC, /* IO context */
-int Port) /* Port Index (e.g. MAC_1) */
-{
- SK_U32 DWord;
- SK_U16 Word;
- SK_U8 LastMode;
- int Ret = 0;
-
- if (pAC->GIni.GIYukonLite &&
- pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) {
-
- /* save current power mode */
- LastMode = pAC->GIni.GP[Port].PPhyPowerState;
- pAC->GIni.GP[Port].PPhyPowerState = PHY_PM_OPERATIONAL_MODE;
-
- switch (LastMode) {
- /* coma mode (deep sleep) */
- case PHY_PM_DEEP_SLEEP:
- SK_IN32(IoC, PCI_C(PCI_OUR_REG_1), &DWord);
-
- SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
-
- /* Release PHY from Coma Mode */
- SK_OUT32(IoC, PCI_C(PCI_OUR_REG_1), DWord & ~PCI_PHY_COMA);
-
- SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
-
- SK_IN32(IoC, B2_GP_IO, &DWord);
-
- /* set to output */
- DWord |= (GP_DIR_9 | GP_IO_9);
-
- /* set PHY reset */
- SK_OUT32(IoC, B2_GP_IO, DWord);
-
- DWord &= ~GP_IO_9; /* clear PHY reset (active high) */
-
- /* clear PHY reset */
- SK_OUT32(IoC, B2_GP_IO, DWord);
- break;
-
- /* IEEE 22.2.4.1.5 compatible power down mode */
- case PHY_PM_IEEE_POWER_DOWN:
- /*
- * - enable MAC 125 MHz clock
- * - set MAC power up
- */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
- Word &= ~PHY_M_PC_DIS_125CLK;
- Word |= PHY_M_PC_MAC_POW_UP;
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
-
- /*
- * register changes must be followed by a software
- * reset to take effect
- */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
- Word |= PHY_CT_RESET;
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
-
- /* switch IEEE compatible power down mode off */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
- Word &= ~PHY_CT_PDOWN;
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
- break;
-
- /* energy detect and energy detect plus mode */
- case PHY_PM_ENERGY_DETECT:
- case PHY_PM_ENERGY_DETECT_PLUS:
- /*
- * - enable MAC 125 MHz clock
- */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
- Word &= ~PHY_M_PC_DIS_125CLK;
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
-
- /* disable energy detect mode */
- SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
- Word &= ~PHY_M_PC_EN_DET_MSK;
- SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
-
- /*
- * reinitialize the PHY to force a software reset
- * which is necessary after the register settings
- * for the energy detect modes.
- * Furthermore reinitialisation prevents that the
- * PHY is running out of a stable state.
- */
- SkGmInitPhyMarv(pAC, IoC, Port, SK_FALSE);
- break;
-
- /* don't change current power mode */
- default:
- pAC->GIni.GP[Port].PPhyPowerState = LastMode;
- Ret = 1;
- break;
- }
- }
- /* low power modes are not supported by this chip */
- else {
- Ret = 1;
- }
-
- return(Ret);
-
-} /* SkGmLeaveLowPowerMode */
-#endif /* !SK_SLIM */
-
-
/******************************************************************************
*
* SkGmInitPhyMarv() - Initialize the Marvell Phy registers
} /* SkMacAutoNegDone */
-#ifdef GENESIS
-/******************************************************************************
- *
- * SkXmSetRxTxEn() - Special Set Rx/Tx Enable and some features in XMAC
- *
- * Description:
- * sets MAC or PHY LoopBack and Duplex Mode in the MMU Command Reg.
- * enables Rx/Tx
- *
- * Returns: N/A
- */
-static void SkXmSetRxTxEn(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-int Para) /* Parameter to set: MAC or PHY LoopBack, Duplex Mode */
-{
- SK_U16 Word;
-
- XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
-
- switch (Para & (SK_MAC_LOOPB_ON | SK_MAC_LOOPB_OFF)) {
- case SK_MAC_LOOPB_ON:
- Word |= XM_MMU_MAC_LB;
- break;
- case SK_MAC_LOOPB_OFF:
- Word &= ~XM_MMU_MAC_LB;
- break;
- }
-
- switch (Para & (SK_PHY_LOOPB_ON | SK_PHY_LOOPB_OFF)) {
- case SK_PHY_LOOPB_ON:
- Word |= XM_MMU_GMII_LOOP;
- break;
- case SK_PHY_LOOPB_OFF:
- Word &= ~XM_MMU_GMII_LOOP;
- break;
- }
-
- switch (Para & (SK_PHY_FULLD_ON | SK_PHY_FULLD_OFF)) {
- case SK_PHY_FULLD_ON:
- Word |= XM_MMU_GMII_FD;
- break;
- case SK_PHY_FULLD_OFF:
- Word &= ~XM_MMU_GMII_FD;
- break;
- }
-
- XM_OUT16(IoC, Port, XM_MMU_CMD, Word | XM_MMU_ENA_RX | XM_MMU_ENA_TX);
-
- /* dummy read to ensure writing */
- XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
-
-} /* SkXmSetRxTxEn */
-#endif /* GENESIS */
-
-
-#ifdef YUKON
-/******************************************************************************
- *
- * SkGmSetRxTxEn() - Special Set Rx/Tx Enable and some features in GMAC
- *
- * Description:
- * sets MAC LoopBack and Duplex Mode in the General Purpose Control Reg.
- * enables Rx/Tx
- *
- * Returns: N/A
- */
-static void SkGmSetRxTxEn(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-int Para) /* Parameter to set: MAC LoopBack, Duplex Mode */
-{
- SK_U16 Ctrl;
-
- GM_IN16(IoC, Port, GM_GP_CTRL, &Ctrl);
-
- switch (Para & (SK_MAC_LOOPB_ON | SK_MAC_LOOPB_OFF)) {
- case SK_MAC_LOOPB_ON:
- Ctrl |= GM_GPCR_LOOP_ENA;
- break;
- case SK_MAC_LOOPB_OFF:
- Ctrl &= ~GM_GPCR_LOOP_ENA;
- break;
- }
-
- switch (Para & (SK_PHY_FULLD_ON | SK_PHY_FULLD_OFF)) {
- case SK_PHY_FULLD_ON:
- Ctrl |= GM_GPCR_DUP_FULL;
- break;
- case SK_PHY_FULLD_OFF:
- Ctrl &= ~GM_GPCR_DUP_FULL;
- break;
- }
-
- GM_OUT16(IoC, Port, GM_GP_CTRL, (SK_U16)(Ctrl | GM_GPCR_RX_ENA |
- GM_GPCR_TX_ENA));
-
- /* dummy read to ensure writing */
- GM_IN16(IoC, Port, GM_GP_CTRL, &Ctrl);
-
-} /* SkGmSetRxTxEn */
-#endif /* YUKON */
-
-
-#ifndef SK_SLIM
-/******************************************************************************
- *
- * SkMacSetRxTxEn() - Special Set Rx/Tx Enable and parameters
- *
- * Description: calls the Special Set Rx/Tx Enable routines dep. on board type
- *
- * Returns: N/A
- */
-void SkMacSetRxTxEn(
-SK_AC *pAC, /* Adapter Context */
-SK_IOC IoC, /* IO context */
-int Port, /* Port Index (MAC_1 + n) */
-int Para)
-{
-#ifdef GENESIS
- if (pAC->GIni.GIGenesis) {
-
- SkXmSetRxTxEn(pAC, IoC, Port, Para);
- }
-#endif /* GENESIS */
-
-#ifdef YUKON
- if (pAC->GIni.GIYukon) {
-
- SkGmSetRxTxEn(pAC, IoC, Port, Para);
- }
-#endif /* YUKON */
-
-} /* SkMacSetRxTxEn */
-#endif /* !SK_SLIM */
-
-
/******************************************************************************
*
* SkMacRxTxEnable() - Enable Rx/Tx activity if port is up
* Returns:
* nothing
*/
-void SkXmIrq(
+static void SkXmIrq(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
* Returns:
* nothing
*/
-void SkGmIrq(
+static void SkGmIrq(
SK_AC *pAC, /* adapter context */
SK_IOC IoC, /* IO context */
int Port) /* Port Index (MAC_1 + n) */
return 0;
}
+#ifdef CONFIG_PM
+static int starfire_suspend(struct pci_dev *pdev, pm_message_t state)
+{
+ struct net_device *dev = pci_get_drvdata(pdev);
+
+ if (netif_running(dev)) {
+ netif_device_detach(dev);
+ netdev_close(dev);
+ }
+
+ pci_save_state(pdev);
+ pci_set_power_state(pdev, pci_choose_state(pdev,state));
+
+ return 0;
+}
+
+static int starfire_resume(struct pci_dev *pdev)
+{
+ struct net_device *dev = pci_get_drvdata(pdev);
+
+ pci_set_power_state(pdev, PCI_D0);
+ pci_restore_state(pdev);
+
+ if (netif_running(dev)) {
+ netdev_open(dev);
+ netif_device_attach(dev);
+ }
+
+ return 0;
+}
+#endif /* CONFIG_PM */
+
static void __devexit starfire_remove_one (struct pci_dev *pdev)
{
.name = DRV_NAME,
.probe = starfire_init_one,
.remove = __devexit_p(starfire_remove_one),
+#ifdef CONFIG_PM
+ .suspend = starfire_suspend,
+ .resume = starfire_resume,
+#endif /* CONFIG_PM */
.id_table = starfire_pci_tbl,
};
np->phys[0] = 1; /* Default setting */
np->mii_preamble_required++;
+ /*
+ * It seems some phys doesn't deal well with address 0 being accessed
+ * first, so leave address zero to the end of the loop (32 & 31).
+ */
for (phy = 1; phy <= 32 && phy_idx < MII_CNT; phy++) {
- int mii_status = mdio_read(dev, phy, MII_BMSR);
int phyx = phy & 0x1f;
+ int mii_status = mdio_read(dev, phyx, MII_BMSR);
if (mii_status != 0xffff && mii_status != 0x0000) {
np->phys[phy_idx++] = phyx;
np->mii_if.advertising = mdio_read(dev, phyx, MII_ADVERTISE);
#include <linux/spinlock.h>
#include <linux/version.h>
#include <linux/bitops.h>
+#include <linux/jiffies.h>
#include <net/checksum.h>
while (!((readw(streamer_mmio + SISR)) & SISR_SRB_REPLY)) {
msleep_interruptible(100);
- if (jiffies - t > 40 * HZ) {
+ if (time_after(jiffies, t + 40 * HZ)) {
printk(KERN_ERR
"IBM PCI tokenring card not responding\n");
release_region(dev->base_addr, STREAMER_IO_SPACE);
#include <linux/pci.h>
#include <linux/spinlock.h>
#include <linux/bitops.h>
+#include <linux/jiffies.h>
#include <net/checksum.h>
t=jiffies;
while((readl(olympic_mmio+BCTL)) & BCTL_SOFTRESET) {
schedule();
- if(jiffies-t > 40*HZ) {
+ if(time_after(jiffies, t + 40*HZ)) {
printk(KERN_ERR "IBM PCI tokenring card not responding.\n");
return -ENODEV;
}
t=jiffies;
while (!readl(olympic_mmio+CLKCTL) & CLKCTL_PAUSE) {
schedule() ;
- if(jiffies-t > 2*HZ) {
+ if(time_after(jiffies, t + 2*HZ)) {
printk(KERN_ERR "IBM Cardbus tokenring adapter not responsing.\n") ;
return -ENODEV;
}
t=jiffies;
while(!((readl(olympic_mmio+SISR_RR)) & SISR_SRB_REPLY)) {
schedule();
- if(jiffies-t > 15*HZ) {
+ if(time_after(jiffies, t + 15*HZ)) {
printk(KERN_ERR "IBM PCI tokenring card not responding.\n");
return -ENODEV;
}
olympic_priv->srb_queued=0;
break;
}
- if ((jiffies-t) > 10*HZ) {
+ if (time_after(jiffies, t + 10*HZ)) {
printk(KERN_WARNING "%s: SRB timed out. \n",dev->name) ;
olympic_priv->srb_queued=0;
break ;
unsigned copying_skb, buflen;
skb = de->rx_skb[rx_tail].skb;
- if (!skb)
- BUG();
+ BUG_ON(!skb);
rmb();
status = le32_to_cpu(de->rx_ring[rx_tail].opts1);
if (status & DescOwn)
break;
skb = de->tx_skb[tx_tail].skb;
- if (!skb)
- BUG();
+ BUG_ON(!skb);
if (unlikely(skb == DE_DUMMY_SKB))
goto next;
de->tx_head = NEXT_TX(entry);
- if (TX_BUFFS_AVAIL(de) < 0)
- BUG();
+ BUG_ON(TX_BUFFS_AVAIL(de) < 0);
if (TX_BUFFS_AVAIL(de) == 0)
netif_stop_queue(dev);
unsigned media = de->media_type;
u32 macmode = dr32(MacMode);
- if (de_is_running(de))
- BUG();
+ BUG_ON(de_is_running(de));
if (de->de21040)
dw32(CSR11, FULL_DUPLEX_MAGIC);
return;
}
- if (!(status & LinkFail))
- BUG();
+ BUG_ON(!(status & LinkFail));
if (netif_carrier_ok(de->dev)) {
de_link_down(de);
struct net_device *dev = pci_get_drvdata(pdev);
struct de_private *de = dev->priv;
- if (!dev)
- BUG();
+ BUG_ON(!dev);
unregister_netdev(dev);
kfree(de->ee_data);
iounmap(de->regs);
#include <linux/kernel.h>
#include <linux/pci.h>
+#include <linux/jiffies.h>
#include "tulip.h"
*/
if (tulip_media_cap[dev->if_port] & MediaIsMII)
return;
- if (! tp->nwayset || jiffies - dev->trans_start > 1*HZ) {
+ if (! tp->nwayset || time_after(jiffies, dev->trans_start + 1*HZ)) {
tp->csr6 = 0x00420000 | (tp->csr6 & 0x0000fdff);
iowrite32(tp->csr6, ioaddr + CSR6);
iowrite32(0x30, ioaddr + CSR12);
/* no more hardware accesses behind this line. */
- if (np->csr6) BUG();
+ BUG_ON(np->csr6);
if (ioread32(ioaddr + IntrEnable)) BUG();
/* pci_power_off(pdev, -1); */
#include <asm/uaccess.h>
#include <asm/io.h>
+#ifdef CONFIG_NET_POLL_CONTROLLER
+#include <asm/irq.h>
+#endif
#ifdef DEBUG
#define enter(x) printk("Enter: %s, %s line %i\n",x,__FILE__,__LINE__)
enter("setup_descriptors");
- if (card->rx_buffer == NULL)
- BUG();
- if (card->tx_buffer == NULL)
- BUG();
+ BUG_ON(card->rx_buffer == NULL);
+ BUG_ON(card->tx_buffer == NULL);
/* Receive descriptors */
memset(card->rx_buffer, 0, 128); /* clear the descriptors */
#include <linux/ioport.h>
#include <net/arp.h>
+#include <asm/irq.h>
#include <asm/io.h>
#include <asm/dma.h>
#include <asm/byteorder.h>
#include <linux/init.h>
#include <net/arp.h>
+#include <asm/irq.h>
#include <asm/io.h>
#include <asm/dma.h>
#include <asm/byteorder.h>
depends on NETDEVICES
config NET_RADIO
- bool "Wireless LAN drivers (non-hamradio) & Wireless Extensions"
+ bool "Wireless LAN drivers (non-hamradio)"
+ select WIRELESS_EXT
---help---
Support for wireless LANs and everything having to do with radio,
but not with amateur radio or FM broadcasting.
config AIRO
tristate "Cisco/Aironet 34X/35X/4500/4800 ISA and PCI cards"
- depends on NET_RADIO && ISA_DMA_API && CRYPTO && (PCI || BROKEN)
+ depends on NET_RADIO && ISA_DMA_API && (PCI || BROKEN)
+ select CRYPTO
---help---
This is the standard Linux driver to support Cisco/Aironet ISA and
PCI 802.11 wireless cards.
config AIRO_CS
tristate "Cisco/Aironet 34X/35X/4500/4800 PCMCIA cards"
depends on NET_RADIO && PCMCIA && (BROKEN || !M32R)
+ select CRYPTO
---help---
This is the standard Linux driver to support Cisco/Aironet PCMCIA
802.11 wireless cards. This driver is the same as the Aironet
#include <linux/in.h>
#include <linux/bitops.h>
#include <linux/scatterlist.h>
+#include <linux/crypto.h>
#include <asm/io.h>
#include <asm/system.h>
#include <linux/delay.h>
#endif
-/* Support Cisco MIC feature */
-#define MICSUPPORT
-
-#if defined(MICSUPPORT) && !defined(CONFIG_CRYPTO)
-#warning MIC support requires Crypto API
-#undef MICSUPPORT
-#endif
-
/* Hack to do some power saving */
#define POWER_ON_DOWN
static int writerids(struct net_device *dev, aironet_ioctl *comp);
static int flashcard(struct net_device *dev, aironet_ioctl *comp);
#endif /* CISCO_EXT */
-#ifdef MICSUPPORT
static void micinit(struct airo_info *ai);
static int micsetup(struct airo_info *ai);
static int encapsulate(struct airo_info *ai, etherHead *pPacket, MICBuffer *buffer, int len);
static u8 airo_rssi_to_dbm (tdsRssiEntry *rssi_rid, u8 rssi);
static u8 airo_dbm_to_pct (tdsRssiEntry *rssi_rid, u8 dbm);
-#include <linux/crypto.h>
-#endif
-
struct airo_info {
struct net_device_stats stats;
struct net_device *dev;
unsigned long scan_timestamp; /* Time started to scan */
struct iw_spy_data spy_data;
struct iw_public_data wireless_data;
-#ifdef MICSUPPORT
/* MIC stuff */
struct crypto_tfm *tfm;
mic_module mod[2];
mic_statistics micstats;
-#endif
HostRxDesc rxfids[MPI_MAX_FIDS]; // rx/tx/config MPI350 descriptors
HostTxDesc txfids[MPI_MAX_FIDS];
HostRidDesc config_desc;
static int flashputbuf(struct airo_info *ai);
static int flashrestart(struct airo_info *ai,struct net_device *dev);
-#ifdef MICSUPPORT
/***********************************************************************
* MIC ROUTINES *
***********************************************************************
digest[2] = (val>>8) & 0xFF;
digest[3] = val & 0xFF;
}
-#endif
static int readBSSListRid(struct airo_info *ai, int first,
BSSListRid *list) {
* Firmware automaticly puts 802 header on so
* we don't need to account for it in the length
*/
-#ifdef MICSUPPORT
if (test_bit(FLAG_MIC_CAPABLE, &ai->flags) && ai->micstats.enabled &&
(ntohs(((u16 *)buffer)[6]) != 0x888E)) {
MICBuffer pMic;
memcpy (sendbuf, &pMic, sizeof(pMic));
sendbuf += sizeof(pMic);
memcpy (sendbuf, buffer, len - sizeof(etherHead));
- } else
-#endif
- {
+ } else {
*payloadLen = cpu_to_le16(len - sizeof(etherHead));
dev->trans_start = jiffies;
ai->shared, ai->shared_dma);
}
}
-#ifdef MICSUPPORT
crypto_free_tfm(ai->tfm);
-#endif
del_airo_dev( dev );
free_netdev( dev );
}
ai->thr_pid = kernel_thread(airo_thread, dev, CLONE_FS | CLONE_FILES);
if (ai->thr_pid < 0)
goto err_out_free;
-#ifdef MICSUPPORT
ai->tfm = NULL;
-#endif
rc = add_airo_dev( dev );
if (rc)
goto err_out_thr;
airo_read_wireless_stats(ai);
else if (test_bit(JOB_PROMISC, &ai->flags))
airo_set_promisc(ai);
-#ifdef MICSUPPORT
else if (test_bit(JOB_MIC, &ai->flags))
micinit(ai);
-#endif
else if (test_bit(JOB_EVENT, &ai->flags))
airo_send_event(dev);
else if (test_bit(JOB_AUTOWEP, &ai->flags))
if ( status & EV_MIC ) {
OUT4500( apriv, EVACK, EV_MIC );
-#ifdef MICSUPPORT
if (test_bit(FLAG_MIC_CAPABLE, &apriv->flags)) {
set_bit(JOB_MIC, &apriv->flags);
wake_up_interruptible(&apriv->thr_wait);
}
-#endif
}
if ( status & EV_LINK ) {
union iwreq_data wrqu;
}
bap_read (apriv, buffer + hdrlen/2, len, BAP0);
} else {
-#ifdef MICSUPPORT
MICBuffer micbuf;
-#endif
bap_read (apriv, buffer, ETH_ALEN*2, BAP0);
-#ifdef MICSUPPORT
if (apriv->micstats.enabled) {
bap_read (apriv,(u16*)&micbuf,sizeof(micbuf),BAP0);
if (ntohs(micbuf.typelen) > 0x05DC)
skb_trim (skb, len + hdrlen);
}
}
-#endif
bap_read(apriv,buffer+ETH_ALEN,len,BAP0);
-#ifdef MICSUPPORT
if (decapsulate(apriv,&micbuf,(etherHead*)buffer,len)) {
badmic:
dev_kfree_skb_irq (skb);
-#else
- if (0) {
-#endif
badrx:
OUT4500( apriv, EVACK, EV_RX);
goto exitrx;
int len = 0;
struct sk_buff *skb;
char *buffer;
-#ifdef MICSUPPORT
int off = 0;
MICBuffer micbuf;
-#endif
memcpy_fromio(&rxd, ai->rxfids[0].card_ram_off, sizeof(rxd));
/* Make sure we got something */
goto badrx;
}
buffer = skb_put(skb,len);
-#ifdef MICSUPPORT
memcpy(buffer, ai->rxfids[0].virtual_host_addr, ETH_ALEN * 2);
if (ai->micstats.enabled) {
memcpy(&micbuf,
dev_kfree_skb_irq (skb);
goto badrx;
}
-#else
- memcpy(buffer, ai->rxfids[0].virtual_host_addr, len);
-#endif
#ifdef WIRELESS_SPY
if (ai->spy_data.spy_number > 0) {
char *sa;
ai->config.authType = AUTH_OPEN;
ai->config.modulation = MOD_CCK;
-#ifdef MICSUPPORT
if ((cap_rid.len>=sizeof(cap_rid)) && (cap_rid.extSoftCap&1) &&
(micsetup(ai) == SUCCESS)) {
ai->config.opmode |= MODE_MIC;
set_bit(FLAG_MIC_CAPABLE, &ai->flags);
}
-#endif
/* Save off the MAC */
for( i = 0; i < ETH_ALEN; i++ ) {
}
len -= ETH_ALEN * 2;
-#ifdef MICSUPPORT
if (test_bit(FLAG_MIC_CAPABLE, &ai->flags) && ai->micstats.enabled &&
(ntohs(((u16 *)pPacket)[6]) != 0x888E)) {
if (encapsulate(ai,(etherHead *)pPacket,&pMic,len) != SUCCESS)
return ERROR;
miclen = sizeof(pMic);
}
-#endif
-
// packet is destination[6], source[6], payload[len-12]
// write the payload length and dst/src/payload
if (bap_setup(ai, txFid, 0x0036, BAP1) != SUCCESS) return ERROR;
Cmd cmd;
Resp rsp;
APListRid APList_rid;
- static const unsigned char bcast[ETH_ALEN] = { 255, 255, 255, 255, 255, 255 };
+ static const u8 any[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
+ static const u8 off[ETH_ALEN] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
if (awrq->sa_family != ARPHRD_ETHER)
return -EINVAL;
- else if (!memcmp(bcast, awrq->sa_data, ETH_ALEN)) {
+ else if (!memcmp(any, awrq->sa_data, ETH_ALEN) ||
+ !memcmp(off, awrq->sa_data, ETH_ALEN)) {
memset(&cmd, 0, sizeof(cmd));
cmd.cmd=CMD_LOSE_SYNC;
if (down_interruptible(&local->sem))
return 0;
}
+/*------------------------------------------------------------------*/
+/*
+ * Wireless Handler : set extended Encryption parameters
+ */
+static int airo_set_encodeext(struct net_device *dev,
+ struct iw_request_info *info,
+ union iwreq_data *wrqu,
+ char *extra)
+{
+ struct airo_info *local = dev->priv;
+ struct iw_point *encoding = &wrqu->encoding;
+ struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
+ CapabilityRid cap_rid; /* Card capability info */
+ int perm = ( encoding->flags & IW_ENCODE_TEMP ? 0 : 1 );
+ u16 currentAuthType = local->config.authType;
+ int idx, key_len, alg = ext->alg; /* Check encryption mode */
+ wep_key_t key;
+
+ /* Is WEP supported ? */
+ readCapabilityRid(local, &cap_rid, 1);
+ /* Older firmware doesn't support this...
+ if(!(cap_rid.softCap & 2)) {
+ return -EOPNOTSUPP;
+ } */
+ readConfigRid(local, 1);
+
+ /* Determine and validate the key index */
+ idx = encoding->flags & IW_ENCODE_INDEX;
+ if (idx) {
+ if (idx < 1 || idx > ((cap_rid.softCap & 0x80) ? 4:1))
+ return -EINVAL;
+ idx--;
+ } else
+ idx = get_wep_key(local, 0xffff);
+
+ if (encoding->flags & IW_ENCODE_DISABLED)
+ alg = IW_ENCODE_ALG_NONE;
+
+ /* Just setting the transmit key? */
+ if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
+ set_wep_key(local, idx, NULL, 0, perm, 1);
+ } else {
+ /* Set the requested key first */
+ memset(key.key, 0, MAX_KEY_SIZE);
+ switch (alg) {
+ case IW_ENCODE_ALG_NONE:
+ key.len = 0;
+ break;
+ case IW_ENCODE_ALG_WEP:
+ if (ext->key_len > MIN_KEY_SIZE) {
+ key.len = MAX_KEY_SIZE;
+ } else if (ext->key_len > 0) {
+ key.len = MIN_KEY_SIZE;
+ } else {
+ return -EINVAL;
+ }
+ key_len = min (ext->key_len, key.len);
+ memcpy(key.key, ext->key, key_len);
+ break;
+ default:
+ return -EINVAL;
+ }
+ /* Send the key to the card */
+ set_wep_key(local, idx, key.key, key.len, perm, 1);
+ }
+
+ /* Read the flags */
+ if(encoding->flags & IW_ENCODE_DISABLED)
+ local->config.authType = AUTH_OPEN; // disable encryption
+ if(encoding->flags & IW_ENCODE_RESTRICTED)
+ local->config.authType = AUTH_SHAREDKEY; // Only Both
+ if(encoding->flags & IW_ENCODE_OPEN)
+ local->config.authType = AUTH_ENCRYPT; // Only Wep
+ /* Commit the changes to flags if needed */
+ if (local->config.authType != currentAuthType)
+ set_bit (FLAG_COMMIT, &local->flags);
+
+ return -EINPROGRESS;
+}
+
+
+/*------------------------------------------------------------------*/
+/*
+ * Wireless Handler : get extended Encryption parameters
+ */
+static int airo_get_encodeext(struct net_device *dev,
+ struct iw_request_info *info,
+ union iwreq_data *wrqu,
+ char *extra)
+{
+ struct airo_info *local = dev->priv;
+ struct iw_point *encoding = &wrqu->encoding;
+ struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
+ CapabilityRid cap_rid; /* Card capability info */
+ int idx, max_key_len;
+
+ /* Is it supported ? */
+ readCapabilityRid(local, &cap_rid, 1);
+ if(!(cap_rid.softCap & 2)) {
+ return -EOPNOTSUPP;
+ }
+ readConfigRid(local, 1);
+
+ max_key_len = encoding->length - sizeof(*ext);
+ if (max_key_len < 0)
+ return -EINVAL;
+
+ idx = encoding->flags & IW_ENCODE_INDEX;
+ if (idx) {
+ if (idx < 1 || idx > ((cap_rid.softCap & 0x80) ? 4:1))
+ return -EINVAL;
+ idx--;
+ } else
+ idx = get_wep_key(local, 0xffff);
+
+ encoding->flags = idx + 1;
+ memset(ext, 0, sizeof(*ext));
+
+ /* Check encryption mode */
+ switch(local->config.authType) {
+ case AUTH_ENCRYPT:
+ encoding->flags = IW_ENCODE_ALG_WEP | IW_ENCODE_ENABLED;
+ break;
+ case AUTH_SHAREDKEY:
+ encoding->flags = IW_ENCODE_ALG_WEP | IW_ENCODE_ENABLED;
+ break;
+ default:
+ case AUTH_OPEN:
+ encoding->flags = IW_ENCODE_ALG_NONE | IW_ENCODE_DISABLED;
+ break;
+ }
+ /* We can't return the key, so set the proper flag and return zero */
+ encoding->flags |= IW_ENCODE_NOKEY;
+ memset(extra, 0, 16);
+
+ /* Copy the key to the user buffer */
+ ext->key_len = get_wep_key(local, idx);
+ if (ext->key_len > 16) {
+ ext->key_len=0;
+ }
+
+ return 0;
+}
+
+
+/*------------------------------------------------------------------*/
+/*
+ * Wireless Handler : set extended authentication parameters
+ */
+static int airo_set_auth(struct net_device *dev,
+ struct iw_request_info *info,
+ union iwreq_data *wrqu, char *extra)
+{
+ struct airo_info *local = dev->priv;
+ struct iw_param *param = &wrqu->param;
+ u16 currentAuthType = local->config.authType;
+
+ switch (param->flags & IW_AUTH_INDEX) {
+ case IW_AUTH_WPA_VERSION:
+ case IW_AUTH_CIPHER_PAIRWISE:
+ case IW_AUTH_CIPHER_GROUP:
+ case IW_AUTH_KEY_MGMT:
+ case IW_AUTH_RX_UNENCRYPTED_EAPOL:
+ case IW_AUTH_PRIVACY_INVOKED:
+ /*
+ * airo does not use these parameters
+ */
+ break;
+
+ case IW_AUTH_DROP_UNENCRYPTED:
+ if (param->value) {
+ /* Only change auth type if unencrypted */
+ if (currentAuthType == AUTH_OPEN)
+ local->config.authType = AUTH_ENCRYPT;
+ } else {
+ local->config.authType = AUTH_OPEN;
+ }
+
+ /* Commit the changes to flags if needed */
+ if (local->config.authType != currentAuthType)
+ set_bit (FLAG_COMMIT, &local->flags);
+ break;
+
+ case IW_AUTH_80211_AUTH_ALG: {
+ /* FIXME: What about AUTH_OPEN? This API seems to
+ * disallow setting our auth to AUTH_OPEN.
+ */
+ if (param->value & IW_AUTH_ALG_SHARED_KEY) {
+ local->config.authType = AUTH_SHAREDKEY;
+ } else if (param->value & IW_AUTH_ALG_OPEN_SYSTEM) {
+ local->config.authType = AUTH_ENCRYPT;
+ } else
+ return -EINVAL;
+ break;
+
+ /* Commit the changes to flags if needed */
+ if (local->config.authType != currentAuthType)
+ set_bit (FLAG_COMMIT, &local->flags);
+ }
+
+ case IW_AUTH_WPA_ENABLED:
+ /* Silently accept disable of WPA */
+ if (param->value > 0)
+ return -EOPNOTSUPP;
+ break;
+
+ default:
+ return -EOPNOTSUPP;
+ }
+ return -EINPROGRESS;
+}
+
+
+/*------------------------------------------------------------------*/
+/*
+ * Wireless Handler : get extended authentication parameters
+ */
+static int airo_get_auth(struct net_device *dev,
+ struct iw_request_info *info,
+ union iwreq_data *wrqu, char *extra)
+{
+ struct airo_info *local = dev->priv;
+ struct iw_param *param = &wrqu->param;
+ u16 currentAuthType = local->config.authType;
+
+ switch (param->flags & IW_AUTH_INDEX) {
+ case IW_AUTH_DROP_UNENCRYPTED:
+ switch (currentAuthType) {
+ case AUTH_SHAREDKEY:
+ case AUTH_ENCRYPT:
+ param->value = 1;
+ break;
+ default:
+ param->value = 0;
+ break;
+ }
+ break;
+
+ case IW_AUTH_80211_AUTH_ALG:
+ switch (currentAuthType) {
+ case AUTH_SHAREDKEY:
+ param->value = IW_AUTH_ALG_SHARED_KEY;
+ break;
+ case AUTH_ENCRYPT:
+ default:
+ param->value = IW_AUTH_ALG_OPEN_SYSTEM;
+ break;
+ }
+ break;
+
+ case IW_AUTH_WPA_ENABLED:
+ param->value = 0;
+ break;
+
+ default:
+ return -EOPNOTSUPP;
+ }
+ return 0;
+}
+
+
/*------------------------------------------------------------------*/
/*
* Wireless Handler : set Tx-Power
(iw_handler) airo_get_encode, /* SIOCGIWENCODE */
(iw_handler) airo_set_power, /* SIOCSIWPOWER */
(iw_handler) airo_get_power, /* SIOCGIWPOWER */
+ (iw_handler) NULL, /* -- hole -- */
+ (iw_handler) NULL, /* -- hole -- */
+ (iw_handler) NULL, /* SIOCSIWGENIE */
+ (iw_handler) NULL, /* SIOCGIWGENIE */
+ (iw_handler) airo_set_auth, /* SIOCSIWAUTH */
+ (iw_handler) airo_get_auth, /* SIOCGIWAUTH */
+ (iw_handler) airo_set_encodeext, /* SIOCSIWENCODEEXT */
+ (iw_handler) airo_get_encodeext, /* SIOCGIWENCODEEXT */
+ (iw_handler) NULL, /* SIOCSIWPMKSA */
};
/* Note : don't describe AIROIDIFC and AIROOLDIDIFC in here.
case AIROGSTAT: ridcode = RID_STATUS; break;
case AIROGSTATSD32: ridcode = RID_STATSDELTA; break;
case AIROGSTATSC32: ridcode = RID_STATS; break;
-#ifdef MICSUPPORT
case AIROGMICSTATS:
if (copy_to_user(comp->data, &ai->micstats,
min((int)comp->len,(int)sizeof(ai->micstats))))
return -EFAULT;
return 0;
-#endif
case AIRORRID: ridcode = comp->ridnum; break;
default:
return -EINVAL;
static int writerids(struct net_device *dev, aironet_ioctl *comp) {
struct airo_info *ai = dev->priv;
int ridcode;
-#ifdef MICSUPPORT
int enabled;
-#endif
Resp rsp;
static int (* writer)(struct airo_info *, u16 rid, const void *, int, int);
unsigned char *iobuf;
PC4500_readrid(ai,RID_STATSDELTACLEAR,iobuf,RIDSIZE, 1);
-#ifdef MICSUPPORT
enabled = ai->micstats.enabled;
memset(&ai->micstats,0,sizeof(ai->micstats));
ai->micstats.enabled = enabled;
-#endif
if (copy_to_user(comp->data, iobuf,
min((int)comp->len, (int)RIDSIZE))) {
#include "ipw2100.h"
-#define IPW2100_VERSION "1.1.3"
+#define IPW2100_VERSION "git-1.1.4"
#define DRV_NAME "ipw2100"
#define DRV_VERSION IPW2100_VERSION
return err;
}
+static const struct ieee80211_geo ipw_geos[] = {
+ { /* Restricted */
+ "---",
+ .bg_channels = 14,
+ .bg = {{2412, 1}, {2417, 2}, {2422, 3},
+ {2427, 4}, {2432, 5}, {2437, 6},
+ {2442, 7}, {2447, 8}, {2452, 9},
+ {2457, 10}, {2462, 11}, {2467, 12},
+ {2472, 13}, {2484, 14}},
+ },
+};
+
static int ipw2100_up(struct ipw2100_priv *priv, int deferred)
{
unsigned long flags;
goto exit;
}
+ /* Initialize the geo */
+ if (ieee80211_set_geo(priv->ieee, &ipw_geos[0])) {
+ printk(KERN_WARNING DRV_NAME "Could not set geo\n");
+ return 0;
+ }
+ priv->ieee->freq_band = IEEE80211_24GHZ_BAND;
+
lock = LOCK_NONE;
if (ipw2100_set_ordinal(priv, IPW_ORD_PERS_DB_LOCK, &lock, &ord_len)) {
printk(KERN_ERR DRV_NAME
struct net_device *dev = priv->net_dev;
const char *p = buf;
- (void) dev; /* kill unused-var warning for debug-only code */
+ (void)dev; /* kill unused-var warning for debug-only code */
if (count < 1)
return count;
unsigned long val;
char *p = buffer;
- (void) dev; /* kill unused-var warning for debug-only code */
+ (void)dev; /* kill unused-var warning for debug-only code */
IPW_DEBUG_INFO("enter\n");
.host_command_length = 4
};
int err = 0;
+ u32 tmp = tx_power;
if (tx_power != IPW_TX_POWER_DEFAULT)
- tx_power = (tx_power - IPW_TX_POWER_MIN_DBM) * 16 /
- (IPW_TX_POWER_MAX_DBM - IPW_TX_POWER_MIN_DBM);
+ tmp = (tx_power - IPW_TX_POWER_MIN_DBM) * 16 /
+ (IPW_TX_POWER_MAX_DBM - IPW_TX_POWER_MIN_DBM);
- cmd.host_command_parameters[0] = tx_power;
+ cmd.host_command_parameters[0] = tmp;
if (priv->ieee->iw_mode == IW_MODE_ADHOC)
err = ipw2100_hw_send_command(priv, &cmd);
SEC_LEVEL_0, 0, 1);
} else {
auth_mode = IPW_AUTH_OPEN;
- if ((priv->ieee->sec.flags & SEC_AUTH_MODE) &&
- (priv->ieee->sec.auth_mode == WLAN_AUTH_SHARED_KEY))
- auth_mode = IPW_AUTH_SHARED;
+ if (priv->ieee->sec.flags & SEC_AUTH_MODE) {
+ if (priv->ieee->sec.auth_mode == WLAN_AUTH_SHARED_KEY)
+ auth_mode = IPW_AUTH_SHARED;
+ else if (priv->ieee->sec.auth_mode == WLAN_AUTH_LEAP)
+ auth_mode = IPW_AUTH_LEAP_CISCO_ID;
+ }
sec_level = SEC_LEVEL_0;
if (priv->ieee->sec.flags & SEC_LEVEL)
} else if (value & IW_AUTH_ALG_OPEN_SYSTEM) {
sec.auth_mode = WLAN_AUTH_OPEN;
ieee->open_wep = 1;
+ } else if (value & IW_AUTH_ALG_LEAP) {
+ sec.auth_mode = WLAN_AUTH_LEAP;
+ ieee->open_wep = 1;
} else
return -EINVAL;
return ret;
}
-void ipw2100_wpa_assoc_frame(struct ipw2100_priv *priv,
- char *wpa_ie, int wpa_ie_len)
+static void ipw2100_wpa_assoc_frame(struct ipw2100_priv *priv,
+ char *wpa_ie, int wpa_ie_len)
{
struct ipw2100_wpa_assoc_frame frame;
#define IPW_WEP104_CIPHER (1<<5)
#define IPW_CKIP_CIPHER (1<<6)
-#define IPW_AUTH_OPEN 0
-#define IPW_AUTH_SHARED 1
+#define IPW_AUTH_OPEN 0
+#define IPW_AUTH_SHARED 1
+#define IPW_AUTH_LEAP 2
+#define IPW_AUTH_LEAP_CISCO_ID 0x80
struct statistic {
int value;
#include "ipw2200.h"
#include <linux/version.h>
-#define IPW2200_VERSION "git-1.0.8"
+#define IPW2200_VERSION "git-1.0.10"
#define DRV_DESCRIPTION "Intel(R) PRO/Wireless 2200/2915 Network Driver"
#define DRV_COPYRIGHT "Copyright(c) 2003-2005 Intel Corporation"
#define DRV_VERSION IPW2200_VERSION
static int auto_create = 1;
static int led = 0;
static int disable = 0;
-static int hwcrypto = 1;
+static int bt_coexist = 0;
+static int hwcrypto = 0;
+static int roaming = 1;
static const char ipw_modes[] = {
'a', 'b', 'g', '?'
};
return total;
}
+/* alias for 32-bit indirect read (for SRAM/reg above 4K), with debug wrapper */
static u32 _ipw_read_reg32(struct ipw_priv *priv, u32 reg);
#define ipw_read_reg32(a, b) _ipw_read_reg32(a, b)
+/* alias for 8-bit indirect read (for SRAM/reg above 4K), with debug wrapper */
static u8 _ipw_read_reg8(struct ipw_priv *ipw, u32 reg);
#define ipw_read_reg8(a, b) _ipw_read_reg8(a, b)
+/* 8-bit indirect write (for SRAM/reg above 4K), with debug wrapper */
static void _ipw_write_reg8(struct ipw_priv *priv, u32 reg, u8 value);
static inline void ipw_write_reg8(struct ipw_priv *a, u32 b, u8 c)
{
_ipw_write_reg8(a, b, c);
}
+/* 16-bit indirect write (for SRAM/reg above 4K), with debug wrapper */
static void _ipw_write_reg16(struct ipw_priv *priv, u32 reg, u16 value);
static inline void ipw_write_reg16(struct ipw_priv *a, u32 b, u16 c)
{
_ipw_write_reg16(a, b, c);
}
+/* 32-bit indirect write (for SRAM/reg above 4K), with debug wrapper */
static void _ipw_write_reg32(struct ipw_priv *priv, u32 reg, u32 value);
static inline void ipw_write_reg32(struct ipw_priv *a, u32 b, u32 c)
{
_ipw_write_reg32(a, b, c);
}
+/* 8-bit direct write (low 4K) */
#define _ipw_write8(ipw, ofs, val) writeb((val), (ipw)->hw_base + (ofs))
+
+/* 8-bit direct write (for low 4K of SRAM/regs), with debug wrapper */
#define ipw_write8(ipw, ofs, val) \
IPW_DEBUG_IO("%s %d: write_direct8(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(ofs), (u32)(val)); \
_ipw_write8(ipw, ofs, val)
+/* 16-bit direct write (low 4K) */
#define _ipw_write16(ipw, ofs, val) writew((val), (ipw)->hw_base + (ofs))
+
+/* 16-bit direct write (for low 4K of SRAM/regs), with debug wrapper */
#define ipw_write16(ipw, ofs, val) \
IPW_DEBUG_IO("%s %d: write_direct16(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(ofs), (u32)(val)); \
_ipw_write16(ipw, ofs, val)
+/* 32-bit direct write (low 4K) */
#define _ipw_write32(ipw, ofs, val) writel((val), (ipw)->hw_base + (ofs))
+
+/* 32-bit direct write (for low 4K of SRAM/regs), with debug wrapper */
#define ipw_write32(ipw, ofs, val) \
IPW_DEBUG_IO("%s %d: write_direct32(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(ofs), (u32)(val)); \
_ipw_write32(ipw, ofs, val)
+/* 8-bit direct read (low 4K) */
#define _ipw_read8(ipw, ofs) readb((ipw)->hw_base + (ofs))
+
+/* 8-bit direct read (low 4K), with debug wrapper */
static inline u8 __ipw_read8(char *f, u32 l, struct ipw_priv *ipw, u32 ofs)
{
IPW_DEBUG_IO("%s %d: read_direct8(0x%08X)\n", f, l, (u32) (ofs));
return _ipw_read8(ipw, ofs);
}
+/* alias to 8-bit direct read (low 4K of SRAM/regs), with debug wrapper */
#define ipw_read8(ipw, ofs) __ipw_read8(__FILE__, __LINE__, ipw, ofs)
+/* 16-bit direct read (low 4K) */
#define _ipw_read16(ipw, ofs) readw((ipw)->hw_base + (ofs))
+
+/* 16-bit direct read (low 4K), with debug wrapper */
static inline u16 __ipw_read16(char *f, u32 l, struct ipw_priv *ipw, u32 ofs)
{
IPW_DEBUG_IO("%s %d: read_direct16(0x%08X)\n", f, l, (u32) (ofs));
return _ipw_read16(ipw, ofs);
}
+/* alias to 16-bit direct read (low 4K of SRAM/regs), with debug wrapper */
#define ipw_read16(ipw, ofs) __ipw_read16(__FILE__, __LINE__, ipw, ofs)
+/* 32-bit direct read (low 4K) */
#define _ipw_read32(ipw, ofs) readl((ipw)->hw_base + (ofs))
+
+/* 32-bit direct read (low 4K), with debug wrapper */
static inline u32 __ipw_read32(char *f, u32 l, struct ipw_priv *ipw, u32 ofs)
{
IPW_DEBUG_IO("%s %d: read_direct32(0x%08X)\n", f, l, (u32) (ofs));
return _ipw_read32(ipw, ofs);
}
+/* alias to 32-bit direct read (low 4K of SRAM/regs), with debug wrapper */
#define ipw_read32(ipw, ofs) __ipw_read32(__FILE__, __LINE__, ipw, ofs)
+/* multi-byte read (above 4K), with debug wrapper */
static void _ipw_read_indirect(struct ipw_priv *, u32, u8 *, int);
static inline void __ipw_read_indirect(const char *f, int l,
struct ipw_priv *a, u32 b, u8 * c, int d)
_ipw_read_indirect(a, b, c, d);
}
+/* alias to multi-byte read (SRAM/regs above 4K), with debug wrapper */
#define ipw_read_indirect(a, b, c, d) __ipw_read_indirect(__FILE__, __LINE__, a, b, c, d)
+/* alias to multi-byte read (SRAM/regs above 4K), with debug wrapper */
static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 * data,
int num);
#define ipw_write_indirect(a, b, c, d) \
IPW_DEBUG_IO("%s %d: write_indirect(0x%08X) %d bytes\n", __FILE__, __LINE__, (u32)(b), d); \
_ipw_write_indirect(a, b, c, d)
-/* indirect write s */
+/* 32-bit indirect write (above 4K) */
static void _ipw_write_reg32(struct ipw_priv *priv, u32 reg, u32 value)
{
IPW_DEBUG_IO(" %p : reg = 0x%8X : value = 0x%8X\n", priv, reg, value);
_ipw_write32(priv, IPW_INDIRECT_DATA, value);
}
+/* 8-bit indirect write (above 4K) */
static void _ipw_write_reg8(struct ipw_priv *priv, u32 reg, u8 value)
{
+ u32 aligned_addr = reg & IPW_INDIRECT_ADDR_MASK; /* dword align */
+ u32 dif_len = reg - aligned_addr;
+
IPW_DEBUG_IO(" reg = 0x%8X : value = 0x%8X\n", reg, value);
- _ipw_write32(priv, IPW_INDIRECT_ADDR, reg & IPW_INDIRECT_ADDR_MASK);
- _ipw_write8(priv, IPW_INDIRECT_DATA, value);
+ _ipw_write32(priv, IPW_INDIRECT_ADDR, aligned_addr);
+ _ipw_write8(priv, IPW_INDIRECT_DATA + dif_len, value);
}
+/* 16-bit indirect write (above 4K) */
static void _ipw_write_reg16(struct ipw_priv *priv, u32 reg, u16 value)
{
+ u32 aligned_addr = reg & IPW_INDIRECT_ADDR_MASK; /* dword align */
+ u32 dif_len = (reg - aligned_addr) & (~0x1ul);
+
IPW_DEBUG_IO(" reg = 0x%8X : value = 0x%8X\n", reg, value);
- _ipw_write32(priv, IPW_INDIRECT_ADDR, reg & IPW_INDIRECT_ADDR_MASK);
- _ipw_write16(priv, IPW_INDIRECT_DATA, value);
+ _ipw_write32(priv, IPW_INDIRECT_ADDR, aligned_addr);
+ _ipw_write16(priv, IPW_INDIRECT_DATA + dif_len, value);
}
-/* indirect read s */
-
+/* 8-bit indirect read (above 4K) */
static u8 _ipw_read_reg8(struct ipw_priv *priv, u32 reg)
{
u32 word;
return (word >> ((reg & 0x3) * 8)) & 0xff;
}
+/* 32-bit indirect read (above 4K) */
static u32 _ipw_read_reg32(struct ipw_priv *priv, u32 reg)
{
u32 value;
return value;
}
-/* iterative/auto-increment 32 bit reads and writes */
+/* General purpose, no alignment requirement, iterative (multi-byte) read, */
+/* for area above 1st 4K of SRAM/reg space */
static void _ipw_read_indirect(struct ipw_priv *priv, u32 addr, u8 * buf,
int num)
{
- u32 aligned_addr = addr & IPW_INDIRECT_ADDR_MASK;
+ u32 aligned_addr = addr & IPW_INDIRECT_ADDR_MASK; /* dword align */
u32 dif_len = addr - aligned_addr;
u32 i;
return;
}
- /* Read the first nibble byte by byte */
+ /* Read the first dword (or portion) byte by byte */
if (unlikely(dif_len)) {
_ipw_write32(priv, IPW_INDIRECT_ADDR, aligned_addr);
/* Start reading at aligned_addr + dif_len */
aligned_addr += 4;
}
+ /* Read all of the middle dwords as dwords, with auto-increment */
_ipw_write32(priv, IPW_AUTOINC_ADDR, aligned_addr);
for (; num >= 4; buf += 4, aligned_addr += 4, num -= 4)
*(u32 *) buf = _ipw_read32(priv, IPW_AUTOINC_DATA);
- /* Copy the last nibble */
+ /* Read the last dword (or portion) byte by byte */
if (unlikely(num)) {
_ipw_write32(priv, IPW_INDIRECT_ADDR, aligned_addr);
for (i = 0; num > 0; i++, num--)
}
}
+/* General purpose, no alignment requirement, iterative (multi-byte) write, */
+/* for area above 1st 4K of SRAM/reg space */
static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 * buf,
int num)
{
- u32 aligned_addr = addr & IPW_INDIRECT_ADDR_MASK;
+ u32 aligned_addr = addr & IPW_INDIRECT_ADDR_MASK; /* dword align */
u32 dif_len = addr - aligned_addr;
u32 i;
return;
}
- /* Write the first nibble byte by byte */
+ /* Write the first dword (or portion) byte by byte */
if (unlikely(dif_len)) {
_ipw_write32(priv, IPW_INDIRECT_ADDR, aligned_addr);
- /* Start reading at aligned_addr + dif_len */
+ /* Start writing at aligned_addr + dif_len */
for (i = dif_len; ((i < 4) && (num > 0)); i++, num--, buf++)
_ipw_write8(priv, IPW_INDIRECT_DATA + i, *buf);
aligned_addr += 4;
}
+ /* Write all of the middle dwords as dwords, with auto-increment */
_ipw_write32(priv, IPW_AUTOINC_ADDR, aligned_addr);
for (; num >= 4; buf += 4, aligned_addr += 4, num -= 4)
_ipw_write32(priv, IPW_AUTOINC_DATA, *(u32 *) buf);
- /* Copy the last nibble */
+ /* Write the last dword (or portion) byte by byte */
if (unlikely(num)) {
_ipw_write32(priv, IPW_INDIRECT_ADDR, aligned_addr);
for (i = 0; num > 0; i++, num--, buf++)
}
}
+/* General purpose, no alignment requirement, iterative (multi-byte) write, */
+/* for 1st 4K of SRAM/regs space */
static void ipw_write_direct(struct ipw_priv *priv, u32 addr, void *buf,
int num)
{
memcpy_toio((priv->hw_base + addr), buf, num);
}
+/* Set bit(s) in low 4K of SRAM/regs */
static inline void ipw_set_bit(struct ipw_priv *priv, u32 reg, u32 mask)
{
ipw_write32(priv, reg, ipw_read32(priv, reg) | mask);
}
+/* Clear bit(s) in low 4K of SRAM/regs */
static inline void ipw_clear_bit(struct ipw_priv *priv, u32 reg, u32 mask)
{
ipw_write32(priv, reg, ipw_read32(priv, reg) & ~mask);
}
-u32 ipw_register_toggle(u32 reg)
+static u32 ipw_register_toggle(u32 reg)
{
reg &= ~IPW_START_STANDBY;
if (reg & IPW_GATE_ODMA)
* - On radio OFF, turn off any LEDs started during radio on
*
*/
-#define LD_TIME_LINK_ON 300
-#define LD_TIME_LINK_OFF 2700
-#define LD_TIME_ACT_ON 250
+#define LD_TIME_LINK_ON msecs_to_jiffies(300)
+#define LD_TIME_LINK_OFF msecs_to_jiffies(2700)
+#define LD_TIME_ACT_ON msecs_to_jiffies(250)
-void ipw_led_link_on(struct ipw_priv *priv)
+static void ipw_led_link_on(struct ipw_priv *priv)
{
unsigned long flags;
u32 led;
static void ipw_bg_led_link_on(void *data)
{
struct ipw_priv *priv = data;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ipw_led_link_on(data);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
}
-void ipw_led_link_off(struct ipw_priv *priv)
+static void ipw_led_link_off(struct ipw_priv *priv)
{
unsigned long flags;
u32 led;
static void ipw_bg_led_link_off(void *data)
{
struct ipw_priv *priv = data;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ipw_led_link_off(data);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
}
static void __ipw_led_activity_on(struct ipw_priv *priv)
}
}
+#if 0
void ipw_led_activity_on(struct ipw_priv *priv)
{
unsigned long flags;
__ipw_led_activity_on(priv);
spin_unlock_irqrestore(&priv->lock, flags);
}
+#endif /* 0 */
-void ipw_led_activity_off(struct ipw_priv *priv)
+static void ipw_led_activity_off(struct ipw_priv *priv)
{
unsigned long flags;
u32 led;
static void ipw_bg_led_activity_off(void *data)
{
struct ipw_priv *priv = data;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ipw_led_activity_off(data);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
}
-void ipw_led_band_on(struct ipw_priv *priv)
+static void ipw_led_band_on(struct ipw_priv *priv)
{
unsigned long flags;
u32 led;
spin_unlock_irqrestore(&priv->lock, flags);
}
-void ipw_led_band_off(struct ipw_priv *priv)
+static void ipw_led_band_off(struct ipw_priv *priv)
{
unsigned long flags;
u32 led;
spin_unlock_irqrestore(&priv->lock, flags);
}
-void ipw_led_radio_on(struct ipw_priv *priv)
+static void ipw_led_radio_on(struct ipw_priv *priv)
{
ipw_led_link_on(priv);
}
-void ipw_led_radio_off(struct ipw_priv *priv)
+static void ipw_led_radio_off(struct ipw_priv *priv)
{
ipw_led_activity_off(priv);
ipw_led_link_off(priv);
}
-void ipw_led_link_up(struct ipw_priv *priv)
+static void ipw_led_link_up(struct ipw_priv *priv)
{
/* Set the Link Led on for all nic types */
ipw_led_link_on(priv);
}
-void ipw_led_link_down(struct ipw_priv *priv)
+static void ipw_led_link_down(struct ipw_priv *priv)
{
ipw_led_activity_off(priv);
ipw_led_link_off(priv);
ipw_led_radio_off(priv);
}
-void ipw_led_init(struct ipw_priv *priv)
+static void ipw_led_init(struct ipw_priv *priv)
{
priv->nic_type = priv->eeprom[EEPROM_NIC_TYPE];
}
}
-void ipw_led_shutdown(struct ipw_priv *priv)
+static void ipw_led_shutdown(struct ipw_priv *priv)
{
ipw_led_activity_off(priv);
ipw_led_link_off(priv);
static inline u32 ipw_get_event_log_len(struct ipw_priv *priv)
{
+ /* length = 1st dword in log */
return ipw_read_reg32(priv, ipw_read32(priv, IPW_EVENT_LOG));
}
}
#define HOST_COMPLETE_TIMEOUT HZ
-static int ipw_send_cmd(struct ipw_priv *priv, struct host_cmd *cmd)
+
+static int __ipw_send_cmd(struct ipw_priv *priv, struct host_cmd *cmd)
{
int rc = 0;
unsigned long flags;
IPW_DEBUG_HC("%s command (#%d) %d bytes: 0x%08X\n",
get_cmd_string(cmd->cmd), cmd->cmd, cmd->len,
priv->status);
- printk_buf(IPW_DL_HOST_COMMAND, (u8 *) cmd->param, cmd->len);
- rc = ipw_queue_tx_hcmd(priv, cmd->cmd, &cmd->param, cmd->len, 0);
+#ifndef DEBUG_CMD_WEP_KEY
+ if (cmd->cmd == IPW_CMD_WEP_KEY)
+ IPW_DEBUG_HC("WEP_KEY command masked out for secure.\n");
+ else
+#endif
+ printk_buf(IPW_DL_HOST_COMMAND, (u8 *) cmd->param, cmd->len);
+
+ rc = ipw_queue_tx_hcmd(priv, cmd->cmd, cmd->param, cmd->len, 0);
if (rc) {
priv->status &= ~STATUS_HCMD_ACTIVE;
IPW_ERROR("Failed to send %s: Reason %d\n",
return rc;
}
-static int ipw_send_host_complete(struct ipw_priv *priv)
+static int ipw_send_cmd_simple(struct ipw_priv *priv, u8 command)
{
struct host_cmd cmd = {
- .cmd = IPW_CMD_HOST_COMPLETE,
- .len = 0
+ .cmd = command,
};
+ return __ipw_send_cmd(priv, &cmd);
+}
+
+static int ipw_send_cmd_pdu(struct ipw_priv *priv, u8 command, u8 len,
+ void *data)
+{
+ struct host_cmd cmd = {
+ .cmd = command,
+ .len = len,
+ .param = data,
+ };
+
+ return __ipw_send_cmd(priv, &cmd);
+}
+
+static int ipw_send_host_complete(struct ipw_priv *priv)
+{
if (!priv) {
IPW_ERROR("Invalid args\n");
return -1;
}
- return ipw_send_cmd(priv, &cmd);
+ return ipw_send_cmd_simple(priv, IPW_CMD_HOST_COMPLETE);
}
static int ipw_send_system_config(struct ipw_priv *priv,
struct ipw_sys_config *config)
{
- struct host_cmd cmd = {
- .cmd = IPW_CMD_SYSTEM_CONFIG,
- .len = sizeof(*config)
- };
-
if (!priv || !config) {
IPW_ERROR("Invalid args\n");
return -1;
}
- memcpy(cmd.param, config, sizeof(*config));
- return ipw_send_cmd(priv, &cmd);
+ return ipw_send_cmd_pdu(priv, IPW_CMD_SYSTEM_CONFIG, sizeof(*config),
+ config);
}
static int ipw_send_ssid(struct ipw_priv *priv, u8 * ssid, int len)
{
- struct host_cmd cmd = {
- .cmd = IPW_CMD_SSID,
- .len = min(len, IW_ESSID_MAX_SIZE)
- };
-
if (!priv || !ssid) {
IPW_ERROR("Invalid args\n");
return -1;
}
- memcpy(cmd.param, ssid, cmd.len);
- return ipw_send_cmd(priv, &cmd);
+ return ipw_send_cmd_pdu(priv, IPW_CMD_SSID, min(len, IW_ESSID_MAX_SIZE),
+ ssid);
}
static int ipw_send_adapter_address(struct ipw_priv *priv, u8 * mac)
{
- struct host_cmd cmd = {
- .cmd = IPW_CMD_ADAPTER_ADDRESS,
- .len = ETH_ALEN
- };
-
if (!priv || !mac) {
IPW_ERROR("Invalid args\n");
return -1;
IPW_DEBUG_INFO("%s: Setting MAC to " MAC_FMT "\n",
priv->net_dev->name, MAC_ARG(mac));
- memcpy(cmd.param, mac, ETH_ALEN);
- return ipw_send_cmd(priv, &cmd);
+ return ipw_send_cmd_pdu(priv, IPW_CMD_ADAPTER_ADDRESS, ETH_ALEN, mac);
}
/*
static void ipw_bg_adapter_restart(void *data)
{
struct ipw_priv *priv = data;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ipw_adapter_restart(data);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
}
#define IPW_SCAN_CHECK_WATCHDOG (5 * HZ)
struct ipw_priv *priv = data;
if (priv->status & (STATUS_SCANNING | STATUS_SCAN_ABORTING)) {
IPW_DEBUG_SCAN("Scan completion watchdog resetting "
- "adapter (%dms).\n",
- IPW_SCAN_CHECK_WATCHDOG / 100);
+ "adapter after (%dms).\n",
+ jiffies_to_msecs(IPW_SCAN_CHECK_WATCHDOG));
queue_work(priv->workqueue, &priv->adapter_restart);
}
}
static void ipw_bg_scan_check(void *data)
{
struct ipw_priv *priv = data;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ipw_scan_check(data);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
}
static int ipw_send_scan_request_ext(struct ipw_priv *priv,
struct ipw_scan_request_ext *request)
{
- struct host_cmd cmd = {
- .cmd = IPW_CMD_SCAN_REQUEST_EXT,
- .len = sizeof(*request)
- };
-
- memcpy(cmd.param, request, sizeof(*request));
- return ipw_send_cmd(priv, &cmd);
+ return ipw_send_cmd_pdu(priv, IPW_CMD_SCAN_REQUEST_EXT,
+ sizeof(*request), request);
}
static int ipw_send_scan_abort(struct ipw_priv *priv)
{
- struct host_cmd cmd = {
- .cmd = IPW_CMD_SCAN_ABORT,
- .len = 0
- };
-
if (!priv) {
IPW_ERROR("Invalid args\n");
return -1;
}
- return ipw_send_cmd(priv, &cmd);
+ return ipw_send_cmd_simple(priv, IPW_CMD_SCAN_ABORT);
}
static int ipw_set_sensitivity(struct ipw_priv *priv, u16 sens)
{
- struct host_cmd cmd = {
- .cmd = IPW_CMD_SENSITIVITY_CALIB,
- .len = sizeof(struct ipw_sensitivity_calib)
+ struct ipw_sensitivity_calib calib = {
+ .beacon_rssi_raw = sens,
};
- struct ipw_sensitivity_calib *calib = (struct ipw_sensitivity_calib *)
- &cmd.param;
- calib->beacon_rssi_raw = sens;
- return ipw_send_cmd(priv, &cmd);
+
+ return ipw_send_cmd_pdu(priv, IPW_CMD_SENSITIVITY_CALIB, sizeof(calib),
+ &calib);
}
static int ipw_send_associate(struct ipw_priv *priv,
struct ipw_associate *associate)
{
- struct host_cmd cmd = {
- .cmd = IPW_CMD_ASSOCIATE,
- .len = sizeof(*associate)
- };
-
struct ipw_associate tmp_associate;
+
+ if (!priv || !associate) {
+ IPW_ERROR("Invalid args\n");
+ return -1;
+ }
+
memcpy(&tmp_associate, associate, sizeof(*associate));
tmp_associate.policy_support =
cpu_to_le16(tmp_associate.policy_support);
cpu_to_le16(tmp_associate.beacon_interval);
tmp_associate.atim_window = cpu_to_le16(tmp_associate.atim_window);
- if (!priv || !associate) {
- IPW_ERROR("Invalid args\n");
- return -1;
- }
-
- memcpy(cmd.param, &tmp_associate, sizeof(*associate));
- return ipw_send_cmd(priv, &cmd);
+ return ipw_send_cmd_pdu(priv, IPW_CMD_ASSOCIATE, sizeof(tmp_associate),
+ &tmp_associate);
}
static int ipw_send_supported_rates(struct ipw_priv *priv,
struct ipw_supported_rates *rates)
{
- struct host_cmd cmd = {
- .cmd = IPW_CMD_SUPPORTED_RATES,
- .len = sizeof(*rates)
- };
-
if (!priv || !rates) {
IPW_ERROR("Invalid args\n");
return -1;
}
- memcpy(cmd.param, rates, sizeof(*rates));
- return ipw_send_cmd(priv, &cmd);
+ return ipw_send_cmd_pdu(priv, IPW_CMD_SUPPORTED_RATES, sizeof(*rates),
+ rates);
}
static int ipw_set_random_seed(struct ipw_priv *priv)
{
- struct host_cmd cmd = {
- .cmd = IPW_CMD_SEED_NUMBER,
- .len = sizeof(u32)
- };
+ u32 val;
if (!priv) {
IPW_ERROR("Invalid args\n");
return -1;
}
- get_random_bytes(&cmd.param, sizeof(u32));
+ get_random_bytes(&val, sizeof(val));
- return ipw_send_cmd(priv, &cmd);
+ return ipw_send_cmd_pdu(priv, IPW_CMD_SEED_NUMBER, sizeof(val), &val);
}
static int ipw_send_card_disable(struct ipw_priv *priv, u32 phy_off)
{
- struct host_cmd cmd = {
- .cmd = IPW_CMD_CARD_DISABLE,
- .len = sizeof(u32)
- };
-
if (!priv) {
IPW_ERROR("Invalid args\n");
return -1;
}
- *((u32 *) & cmd.param) = phy_off;
-
- return ipw_send_cmd(priv, &cmd);
+ return ipw_send_cmd_pdu(priv, IPW_CMD_CARD_DISABLE, sizeof(phy_off),
+ &phy_off);
}
static int ipw_send_tx_power(struct ipw_priv *priv, struct ipw_tx_power *power)
{
- struct host_cmd cmd = {
- .cmd = IPW_CMD_TX_POWER,
- .len = sizeof(*power)
- };
-
if (!priv || !power) {
IPW_ERROR("Invalid args\n");
return -1;
}
- memcpy(cmd.param, power, sizeof(*power));
- return ipw_send_cmd(priv, &cmd);
+ return ipw_send_cmd_pdu(priv, IPW_CMD_TX_POWER, sizeof(*power), power);
}
static int ipw_set_tx_power(struct ipw_priv *priv)
struct ipw_rts_threshold rts_threshold = {
.rts_threshold = rts,
};
- struct host_cmd cmd = {
- .cmd = IPW_CMD_RTS_THRESHOLD,
- .len = sizeof(rts_threshold)
- };
if (!priv) {
IPW_ERROR("Invalid args\n");
return -1;
}
- memcpy(cmd.param, &rts_threshold, sizeof(rts_threshold));
- return ipw_send_cmd(priv, &cmd);
+ return ipw_send_cmd_pdu(priv, IPW_CMD_RTS_THRESHOLD,
+ sizeof(rts_threshold), &rts_threshold);
}
static int ipw_send_frag_threshold(struct ipw_priv *priv, u16 frag)
struct ipw_frag_threshold frag_threshold = {
.frag_threshold = frag,
};
- struct host_cmd cmd = {
- .cmd = IPW_CMD_FRAG_THRESHOLD,
- .len = sizeof(frag_threshold)
- };
if (!priv) {
IPW_ERROR("Invalid args\n");
return -1;
}
- memcpy(cmd.param, &frag_threshold, sizeof(frag_threshold));
- return ipw_send_cmd(priv, &cmd);
+ return ipw_send_cmd_pdu(priv, IPW_CMD_FRAG_THRESHOLD,
+ sizeof(frag_threshold), &frag_threshold);
}
static int ipw_send_power_mode(struct ipw_priv *priv, u32 mode)
{
- struct host_cmd cmd = {
- .cmd = IPW_CMD_POWER_MODE,
- .len = sizeof(u32)
- };
- u32 *param = (u32 *) (&cmd.param);
+ u32 param;
if (!priv) {
IPW_ERROR("Invalid args\n");
* level */
switch (mode) {
case IPW_POWER_BATTERY:
- *param = IPW_POWER_INDEX_3;
+ param = IPW_POWER_INDEX_3;
break;
case IPW_POWER_AC:
- *param = IPW_POWER_MODE_CAM;
+ param = IPW_POWER_MODE_CAM;
break;
default:
- *param = mode;
+ param = mode;
break;
}
- return ipw_send_cmd(priv, &cmd);
+ return ipw_send_cmd_pdu(priv, IPW_CMD_POWER_MODE, sizeof(param),
+ ¶m);
}
static int ipw_send_retry_limit(struct ipw_priv *priv, u8 slimit, u8 llimit)
.short_retry_limit = slimit,
.long_retry_limit = llimit
};
- struct host_cmd cmd = {
- .cmd = IPW_CMD_RETRY_LIMIT,
- .len = sizeof(retry_limit)
- };
if (!priv) {
IPW_ERROR("Invalid args\n");
return -1;
}
- memcpy(cmd.param, &retry_limit, sizeof(retry_limit));
- return ipw_send_cmd(priv, &cmd);
+ return ipw_send_cmd_pdu(priv, IPW_CMD_RETRY_LIMIT, sizeof(retry_limit),
+ &retry_limit);
}
/*
/*
If the data looks correct, then copy it to our private
copy. Otherwise let the firmware know to perform the operation
- on it's own
+ on its own.
*/
if (priv->eeprom[EEPROM_VERSION] != 0) {
IPW_DEBUG_INFO("Writing EEPROM data into SRAM\n");
static int ipw_fw_dma_wait(struct ipw_priv *priv)
{
- u32 current_index = 0;
+ u32 current_index = 0, previous_index;
u32 watchdog = 0;
IPW_DEBUG_FW(">> : \n");
current_index = ipw_fw_dma_command_block_index(priv);
- IPW_DEBUG_FW_INFO("sram_desc.last_cb_index:0x%8X\n",
+ IPW_DEBUG_FW_INFO("sram_desc.last_cb_index:0x%08X\n",
(int)priv->sram_desc.last_cb_index);
while (current_index < priv->sram_desc.last_cb_index) {
udelay(50);
+ previous_index = current_index;
current_index = ipw_fw_dma_command_block_index(priv);
- watchdog++;
-
- if (watchdog > 400) {
+ if (previous_index < current_index) {
+ watchdog = 0;
+ continue;
+ }
+ if (++watchdog > 400) {
IPW_DEBUG_FW_INFO("Timeout\n");
ipw_fw_dma_dump_command_block(priv);
ipw_fw_dma_abort(priv);
return ipw_read32(priv, 0x90) == 0xd55555d5;
}
+/* timeout in msec, attempted in 10-msec quanta */
static int ipw_poll_bit(struct ipw_priv *priv, u32 addr, u32 mask,
int timeout)
{
/* stop master. typical delay - 0 */
ipw_set_bit(priv, IPW_RESET_REG, IPW_RESET_REG_STOP_MASTER);
+ /* timeout is in msec, polled in 10-msec quanta */
rc = ipw_poll_bit(priv, IPW_RESET_REG,
IPW_RESET_REG_MASTER_DISABLED, 100);
if (rc < 0) {
- IPW_ERROR("stop master failed in 10ms\n");
+ IPW_ERROR("wait for stop master failed after 100ms\n");
return -1;
}
mdelay(1);
/* enable ucode store */
- ipw_write_reg8(priv, DINO_CONTROL_REG, 0x0);
- ipw_write_reg8(priv, DINO_CONTROL_REG, DINO_ENABLE_CS);
+ ipw_write_reg8(priv, IPW_BASEBAND_CONTROL_STATUS, 0x0);
+ ipw_write_reg8(priv, IPW_BASEBAND_CONTROL_STATUS, DINO_ENABLE_CS);
mdelay(1);
/* write ucode */
rc = ipw_poll_bit(priv, IPW_RESET_REG,
IPW_RESET_REG_MASTER_DISABLED, 500);
if (rc < 0) {
- IPW_ERROR("wait for reg master disabled failed\n");
+ IPW_ERROR("wait for reg master disabled failed after 500ms\n");
return rc;
}
const struct firmware *firmware = NULL;
const struct firmware *ucode = NULL;
#endif
+ char *ucode_name;
+ char *fw_name;
int rc = 0, retries = 3;
-#ifdef CONFIG_PM
- if (!fw_loaded) {
-#endif
- rc = ipw_get_fw(priv, &bootfw, IPW_FW_NAME("boot"));
- if (rc)
- goto error;
-
- switch (priv->ieee->iw_mode) {
- case IW_MODE_ADHOC:
- rc = ipw_get_fw(priv, &ucode,
- IPW_FW_NAME("ibss_ucode"));
- if (rc)
- goto error;
-
- rc = ipw_get_fw(priv, &firmware, IPW_FW_NAME("ibss"));
- break;
-
+ switch (priv->ieee->iw_mode) {
+ case IW_MODE_ADHOC:
+ ucode_name = IPW_FW_NAME("ibss_ucode");
+ fw_name = IPW_FW_NAME("ibss");
+ break;
#ifdef CONFIG_IPW2200_MONITOR
- case IW_MODE_MONITOR:
- rc = ipw_get_fw(priv, &ucode,
- IPW_FW_NAME("sniffer_ucode"));
- if (rc)
- goto error;
-
- rc = ipw_get_fw(priv, &firmware,
- IPW_FW_NAME("sniffer"));
- break;
+ case IW_MODE_MONITOR:
+ ucode_name = IPW_FW_NAME("sniffer_ucode");
+ fw_name = IPW_FW_NAME("sniffer");
+ break;
#endif
- case IW_MODE_INFRA:
- rc = ipw_get_fw(priv, &ucode, IPW_FW_NAME("bss_ucode"));
- if (rc)
- goto error;
-
- rc = ipw_get_fw(priv, &firmware, IPW_FW_NAME("bss"));
- break;
-
- default:
- rc = -EINVAL;
- }
-
- if (rc)
- goto error;
-
-#ifdef CONFIG_PM
- fw_loaded = 1;
+ case IW_MODE_INFRA:
+ ucode_name = IPW_FW_NAME("bss_ucode");
+ fw_name = IPW_FW_NAME("bss");
+ break;
+ default:
+ rc = -EINVAL;
}
-#endif
+
+ if (rc < 0)
+ goto error;
if (!priv->rxq)
priv->rxq = ipw_rx_queue_alloc(priv);
ipw_stop_nic(priv);
rc = ipw_reset_nic(priv);
- if (rc) {
+ if (rc < 0) {
IPW_ERROR("Unable to reset NIC\n");
goto error;
}
ipw_zero_memory(priv, IPW_NIC_SRAM_LOWER_BOUND,
IPW_NIC_SRAM_UPPER_BOUND - IPW_NIC_SRAM_LOWER_BOUND);
+#ifdef CONFIG_PM
+ if (!fw_loaded) {
+#endif
+ rc = ipw_get_fw(priv, &bootfw, IPW_FW_NAME("boot"));
+ if (rc < 0)
+ goto error;
+#ifdef CONFIG_PM
+ }
+#endif
/* DMA the initial boot firmware into the device */
rc = ipw_load_firmware(priv, bootfw->data + sizeof(struct fw_header),
bootfw->size - sizeof(struct fw_header));
/* kick start the device */
ipw_start_nic(priv);
- /* wait for the device to finish it's initial startup sequence */
+ /* wait for the device to finish its initial startup sequence */
rc = ipw_poll_bit(priv, IPW_INTA_RW,
IPW_INTA_BIT_FW_INITIALIZATION_DONE, 500);
if (rc < 0) {
/* ack fw init done interrupt */
ipw_write32(priv, IPW_INTA_RW, IPW_INTA_BIT_FW_INITIALIZATION_DONE);
+#ifdef CONFIG_PM
+ if (!fw_loaded) {
+#endif
+ rc = ipw_get_fw(priv, &ucode, ucode_name);
+ if (rc < 0)
+ goto error;
+#ifdef CONFIG_PM
+ }
+#endif
+
/* DMA the ucode into the device */
rc = ipw_load_ucode(priv, ucode->data + sizeof(struct fw_header),
ucode->size - sizeof(struct fw_header));
/* stop nic */
ipw_stop_nic(priv);
+#ifdef CONFIG_PM
+ if (!fw_loaded) {
+#endif
+ rc = ipw_get_fw(priv, &firmware, fw_name);
+ if (rc < 0)
+ goto error;
+#ifdef CONFIG_PM
+ }
+#endif
+
/* DMA bss firmware into the device */
rc = ipw_load_firmware(priv, firmware->data +
sizeof(struct fw_header),
IPW_ERROR("Unable to load firmware: %d\n", rc);
goto error;
}
+#ifdef CONFIG_PM
+ fw_loaded = 1;
+#endif
ipw_write32(priv, IPW_EEPROM_LOAD_DISABLE, 0);
rc = ipw_queue_reset(priv);
- if (rc) {
+ if (rc < 0) {
IPW_ERROR("Unable to initialize queues\n");
goto error;
}
rc = ipw_poll_bit(priv, IPW_INTA_RW,
IPW_INTA_BIT_FW_INITIALIZATION_DONE, 500);
if (rc < 0) {
- IPW_ERROR("device failed to start after 500ms\n");
+ IPW_ERROR("device failed to start within 500ms\n");
goto error;
}
IPW_DEBUG_INFO("device response after %dms\n", rc);
static void ipw_bg_disassociate(void *data)
{
struct ipw_priv *priv = data;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ipw_disassociate(data);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
}
static void ipw_system_config(void *data)
static void ipw_bg_gather_stats(void *data)
{
struct ipw_priv *priv = data;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ipw_gather_stats(data);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
}
/* Missed beacon behavior:
return;
}
- if (missed_count > priv->roaming_threshold &&
- missed_count <= priv->disassociate_threshold) {
+ if (roaming &&
+ (missed_count > priv->roaming_threshold &&
+ missed_count <= priv->disassociate_threshold)) {
/* If we are not already roaming, set the ROAM
* bit in the status and kick off a scan.
* This can happen several times before we reach
}
IPW_DEBUG_NOTIF("Missed beacon: %d\n", missed_count);
-
}
/**
static void ipw_bg_rx_queue_replenish(void *data)
{
struct ipw_priv *priv = data;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ipw_rx_queue_replenish(data);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
}
/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
- * If an SKB has been detached, the POOL needs to have it's SKB set to NULL
+ * If an SKB has been detached, the POOL needs to have its SKB set to NULL
* This free routine walks the list of POOL entries and if SKB is set to
* non NULL it is unmapped and freed
*/
if (priv->ieee->scan_age != 0 &&
time_after(jiffies, network->last_scanned + priv->ieee->scan_age)) {
IPW_DEBUG_MERGE("Network '%s (" MAC_FMT ")' excluded "
- "because of age: %lums.\n",
+ "because of age: %ums.\n",
escape_essid(network->ssid, network->ssid_len),
MAC_ARG(network->bssid),
- 1000 * (jiffies - network->last_scanned) / HZ);
+ jiffies_to_msecs(jiffies -
+ network->last_scanned));
return 0;
}
return;
}
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if ((priv->ieee->iw_mode == IW_MODE_ADHOC)) {
IPW_DEBUG_MERGE("remove network %s\n",
escape_essid(priv->essid,
ipw_disassociate(priv);
priv->assoc_network = match.network;
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return;
}
}
if (network->last_associate &&
time_after(network->last_associate + (HZ * 3UL), jiffies)) {
IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded "
- "because of storming (%lus since last "
+ "because of storming (%ums since last "
"assoc attempt).\n",
escape_essid(network->ssid, network->ssid_len),
MAC_ARG(network->bssid),
- (jiffies - network->last_associate) / HZ);
+ jiffies_to_msecs(jiffies -
+ network->last_associate));
return 0;
}
if (priv->ieee->scan_age != 0 &&
time_after(jiffies, network->last_scanned + priv->ieee->scan_age)) {
IPW_DEBUG_ASSOC("Network '%s (" MAC_FMT ")' excluded "
- "because of age: %lums.\n",
+ "because of age: %ums.\n",
escape_essid(network->ssid, network->ssid_len),
MAC_ARG(network->bssid),
- 1000 * (jiffies - network->last_scanned) / HZ);
+ jiffies_to_msecs(jiffies -
+ network->last_scanned));
return 0;
}
static void ipw_send_tgi_tx_key(struct ipw_priv *priv, int type, int index)
{
- struct ipw_tgi_tx_key *key;
- struct host_cmd cmd = {
- .cmd = IPW_CMD_TGI_TX_KEY,
- .len = sizeof(*key)
- };
+ struct ipw_tgi_tx_key key;
if (!(priv->ieee->sec.flags & (1 << index)))
return;
- key = (struct ipw_tgi_tx_key *)&cmd.param;
- key->key_id = index;
- memcpy(key->key, priv->ieee->sec.keys[index], SCM_TEMPORAL_KEY_LENGTH);
- key->security_type = type;
- key->station_index = 0; /* always 0 for BSS */
- key->flags = 0;
+ key.key_id = index;
+ memcpy(key.key, priv->ieee->sec.keys[index], SCM_TEMPORAL_KEY_LENGTH);
+ key.security_type = type;
+ key.station_index = 0; /* always 0 for BSS */
+ key.flags = 0;
/* 0 for new key; previous value of counter (after fatal error) */
- key->tx_counter[0] = 0;
- key->tx_counter[1] = 0;
+ key.tx_counter[0] = 0;
+ key.tx_counter[1] = 0;
- ipw_send_cmd(priv, &cmd);
+ ipw_send_cmd_pdu(priv, IPW_CMD_TGI_TX_KEY, sizeof(key), &key);
}
static void ipw_send_wep_keys(struct ipw_priv *priv, int type)
{
- struct ipw_wep_key *key;
+ struct ipw_wep_key key;
int i;
- struct host_cmd cmd = {
- .cmd = IPW_CMD_WEP_KEY,
- .len = sizeof(*key)
- };
- key = (struct ipw_wep_key *)&cmd.param;
- key->cmd_id = DINO_CMD_WEP_KEY;
- key->seq_num = 0;
+ key.cmd_id = DINO_CMD_WEP_KEY;
+ key.seq_num = 0;
/* Note: AES keys cannot be set for multiple times.
* Only set it at the first time. */
for (i = 0; i < 4; i++) {
- key->key_index = i | type;
+ key.key_index = i | type;
if (!(priv->ieee->sec.flags & (1 << i))) {
- key->key_size = 0;
+ key.key_size = 0;
continue;
}
- key->key_size = priv->ieee->sec.key_sizes[i];
- memcpy(key->key, priv->ieee->sec.keys[i], key->key_size);
+ key.key_size = priv->ieee->sec.key_sizes[i];
+ memcpy(key.key, priv->ieee->sec.keys[i], key.key_size);
- ipw_send_cmd(priv, &cmd);
+ ipw_send_cmd_pdu(priv, IPW_CMD_WEP_KEY, sizeof(key), &key);
}
}
static void ipw_bg_adhoc_check(void *data)
{
struct ipw_priv *priv = data;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ipw_adhoc_check(data);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
}
#ifdef CONFIG_IPW2200_DEBUG
(priv->status & STATUS_EXIT_PENDING))
return 0;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (priv->status & STATUS_SCANNING) {
IPW_DEBUG_HC("Concurrent scan requested. Ignoring.\n");
queue_delayed_work(priv->workqueue, &priv->scan_check,
IPW_SCAN_CHECK_WATCHDOG);
done:
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return err;
}
static void ipw_bg_abort_scan(void *data)
{
struct ipw_priv *priv = data;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ipw_abort_scan(data);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
}
static int ipw_wpa_enable(struct ipw_priv *priv, int value)
} else if (value & IW_AUTH_ALG_OPEN_SYSTEM) {
sec.auth_mode = WLAN_AUTH_OPEN;
ieee->open_wep = 1;
+ } else if (value & IW_AUTH_ALG_LEAP) {
+ sec.auth_mode = WLAN_AUTH_LEAP;
+ ieee->open_wep = 1;
} else
return -EINVAL;
return ret;
}
-void ipw_wpa_assoc_frame(struct ipw_priv *priv, char *wpa_ie, int wpa_ie_len)
+static void ipw_wpa_assoc_frame(struct ipw_priv *priv, char *wpa_ie,
+ int wpa_ie_len)
{
/* make sure WPA is enabled */
ipw_wpa_enable(priv, 1);
static int ipw_set_rsn_capa(struct ipw_priv *priv,
char *capabilities, int length)
{
- struct host_cmd cmd = {
- .cmd = IPW_CMD_RSN_CAPABILITIES,
- .len = length,
- };
-
IPW_DEBUG_HC("HOST_CMD_RSN_CAPABILITIES\n");
- memcpy(cmd.param, capabilities, length);
- return ipw_send_cmd(priv, &cmd);
+ return ipw_send_cmd_pdu(priv, IPW_CMD_RSN_CAPABILITIES, length,
+ capabilities);
}
/*
(wrqu->data.length && extra == NULL))
return -EINVAL;
- //down(&priv->sem);
+ //mutex_lock(&priv->mutex);
//if (!ieee->wpa_enabled) {
// err = -EOPNOTSUPP;
ipw_wpa_assoc_frame(priv, ieee->wpa_ie, ieee->wpa_ie_len);
out:
- //up(&priv->sem);
+ //mutex_unlock(&priv->mutex);
return err;
}
struct ieee80211_device *ieee = priv->ieee;
int err = 0;
- //down(&priv->sem);
+ //mutex_lock(&priv->mutex);
//if (!ieee->wpa_enabled) {
// err = -EOPNOTSUPP;
memcpy(extra, ieee->wpa_ie, ieee->wpa_ie_len);
out:
- //up(&priv->sem);
+ //mutex_unlock(&priv->mutex);
return err;
}
if (priv == NULL)
return;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (priv->status & STATUS_ASSOCIATED)
ipw_qos_activate(priv, &(priv->assoc_network->qos_data));
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
}
static int ipw_handle_probe_response(struct net_device *dev,
static int ipw_send_qos_params_command(struct ipw_priv *priv, struct ieee80211_qos_parameters
*qos_param)
{
- struct host_cmd cmd = {
- .cmd = IPW_CMD_QOS_PARAMETERS,
- .len = (sizeof(struct ieee80211_qos_parameters) * 3)
- };
-
- memcpy(cmd.param, qos_param, sizeof(*qos_param) * 3);
- return ipw_send_cmd(priv, &cmd);
+ return ipw_send_cmd_pdu(priv, IPW_CMD_QOS_PARAMETERS,
+ sizeof(*qos_param) * 3, qos_param);
}
static int ipw_send_qos_info_command(struct ipw_priv *priv, struct ieee80211_qos_information_element
*qos_param)
{
- struct host_cmd cmd = {
- .cmd = IPW_CMD_WME_INFO,
- .len = sizeof(*qos_param)
- };
-
- memcpy(cmd.param, qos_param, sizeof(*qos_param));
- return ipw_send_cmd(priv, &cmd);
+ return ipw_send_cmd_pdu(priv, IPW_CMD_WME_INFO, sizeof(*qos_param),
+ qos_param);
}
#endif /* CONFIG_IPW_QOS */
memset(&priv->assoc_request, 0, sizeof(priv->assoc_request));
priv->assoc_request.channel = network->channel;
+ priv->assoc_request.auth_key = 0;
+
if ((priv->capability & CAP_PRIVACY_ON) &&
- (priv->capability & CAP_SHARED_KEY)) {
+ (priv->ieee->sec.auth_mode == WLAN_AUTH_SHARED_KEY)) {
priv->assoc_request.auth_type = AUTH_SHARED_KEY;
priv->assoc_request.auth_key = priv->ieee->sec.active_key;
- if ((priv->capability & CAP_PRIVACY_ON) &&
- (priv->ieee->sec.level == SEC_LEVEL_1) &&
+ if ((priv->ieee->sec.level == SEC_LEVEL_1) &&
!(priv->ieee->host_encrypt || priv->ieee->host_decrypt))
ipw_send_wep_keys(priv, DCW_WEP_KEY_SEC_TYPE_WEP);
- } else {
+
+ } else if ((priv->capability & CAP_PRIVACY_ON) &&
+ (priv->ieee->sec.auth_mode == WLAN_AUTH_LEAP))
+ priv->assoc_request.auth_type = AUTH_LEAP;
+ else
priv->assoc_request.auth_type = AUTH_OPEN;
- priv->assoc_request.auth_key = 0;
- }
if (priv->ieee->wpa_ie_len) {
priv->assoc_request.policy_support = 0x02; /* RSN active */
static void ipw_bg_roam(void *data)
{
struct ipw_priv *priv = data;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ipw_roam(data);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
}
static int ipw_associate(void *data)
static void ipw_bg_associate(void *data)
{
struct ipw_priv *priv = data;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ipw_associate(data);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
}
static void ipw_rebuild_decrypted_skb(struct ipw_priv *priv,
union iwreq_data *wrqu, char *extra)
{
struct ipw_priv *priv = ieee80211_priv(dev);
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (priv->status & STATUS_RF_KILL_MASK)
strcpy(wrqu->name, "radio off");
else if (!(priv->status & STATUS_ASSOCIATED))
snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11%c",
ipw_modes[priv->assoc_request.ieee_mode]);
IPW_DEBUG_WX("Name: %s\n", wrqu->name);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
if (fwrq->m == 0) {
IPW_DEBUG_WX("SET Freq/Channel -> any\n");
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ret = ipw_set_channel(priv, 0);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return ret;
}
/* if setting by freq convert to channel */
}
IPW_DEBUG_WX("SET Freq/Channel -> %d \n", fwrq->m);
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ret = ipw_set_channel(priv, channel);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return ret;
}
/* If we are associated, trying to associate, or have a statically
* configured CHANNEL then return that; otherwise return ANY */
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (priv->config & CFG_STATIC_CHANNEL ||
priv->status & (STATUS_ASSOCIATING | STATUS_ASSOCIATED))
wrqu->freq.m = priv->channel;
else
wrqu->freq.m = 0;
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
IPW_DEBUG_WX("GET Freq/Channel -> %d \n", priv->channel);
return 0;
}
if (wrqu->mode == priv->ieee->iw_mode)
return 0;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ipw_sw_reset(priv, 0);
priv->ieee->iw_mode = wrqu->mode;
queue_work(priv->workqueue, &priv->adapter_restart);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return err;
}
union iwreq_data *wrqu, char *extra)
{
struct ipw_priv *priv = ieee80211_priv(dev);
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
wrqu->mode = priv->ieee->iw_mode;
IPW_DEBUG_WX("Get MODE -> %d\n", wrqu->mode);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
range->avg_qual.level = 0; /* FIXME to real average level */
range->avg_qual.noise = 0;
range->avg_qual.updated = 7; /* Updated all three */
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
range->num_bitrates = min(priv->rates.num_rates, (u8) IW_MAX_BITRATES);
for (i = 0; i < range->num_bitrates; i++)
/* Set the Wireless Extension versions */
range->we_version_compiled = WIRELESS_EXT;
- range->we_version_source = 16;
+ range->we_version_source = 18;
i = 0;
if (priv->ieee->mode & (IEEE_B | IEEE_G)) {
range->num_channels = i;
range->num_frequency = i;
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
/* Event capability (kernel + driver) */
range->event_capa[0] = (IW_EVENT_CAPA_K_0 |
IW_EVENT_CAPA_MASK(SIOCGIWAP));
range->event_capa[1] = IW_EVENT_CAPA_K_1;
+ range->enc_capa = IW_ENC_CAPA_WPA | IW_ENC_CAPA_WPA2 |
+ IW_ENC_CAPA_CIPHER_TKIP | IW_ENC_CAPA_CIPHER_CCMP;
+
IPW_DEBUG_WX("GET Range\n");
return 0;
}
if (wrqu->ap_addr.sa_family != ARPHRD_ETHER)
return -EINVAL;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (!memcmp(any, wrqu->ap_addr.sa_data, ETH_ALEN) ||
!memcmp(off, wrqu->ap_addr.sa_data, ETH_ALEN)) {
/* we disable mandatory BSSID association */
IPW_DEBUG_ASSOC("Attempting to associate with new "
"parameters.\n");
ipw_associate(priv);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
priv->config |= CFG_STATIC_BSSID;
if (!memcmp(priv->bssid, wrqu->ap_addr.sa_data, ETH_ALEN)) {
IPW_DEBUG_WX("BSSID set to current BSSID.\n");
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
if (!ipw_disassociate(priv))
ipw_associate(priv);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
struct ipw_priv *priv = ieee80211_priv(dev);
/* If we are associated, trying to associate, or have a statically
* configured BSSID then return that; otherwise return ANY */
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (priv->config & CFG_STATIC_BSSID ||
priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)) {
wrqu->ap_addr.sa_family = ARPHRD_ETHER;
IPW_DEBUG_WX("Getting WAP BSSID: " MAC_FMT "\n",
MAC_ARG(wrqu->ap_addr.sa_data));
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
struct ipw_priv *priv = ieee80211_priv(dev);
char *essid = ""; /* ANY */
int length = 0;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (wrqu->essid.flags && wrqu->essid.length) {
length = wrqu->essid.length - 1;
essid = extra;
priv->config &= ~CFG_STATIC_ESSID;
ipw_associate(priv);
}
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
if (priv->essid_len == length && !memcmp(priv->essid, extra, length)) {
IPW_DEBUG_WX("ESSID set to current ESSID.\n");
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
if (!ipw_disassociate(priv))
ipw_associate(priv);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
/* If we are associated, trying to associate, or have a statically
* configured ESSID then return that; otherwise return ANY */
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (priv->config & CFG_STATIC_ESSID ||
priv->status & (STATUS_ASSOCIATED | STATUS_ASSOCIATING)) {
IPW_DEBUG_WX("Getting essid: '%s'\n",
wrqu->essid.length = 0;
wrqu->essid.flags = 0; /* active */
}
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
IPW_DEBUG_WX("Setting nick to '%s'\n", extra);
if (wrqu->data.length > IW_ESSID_MAX_SIZE)
return -E2BIG;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
wrqu->data.length = min((size_t) wrqu->data.length, sizeof(priv->nick));
memset(priv->nick, 0, sizeof(priv->nick));
memcpy(priv->nick, extra, wrqu->data.length);
IPW_DEBUG_TRACE("<<\n");
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
{
struct ipw_priv *priv = ieee80211_priv(dev);
IPW_DEBUG_WX("Getting nick\n");
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
wrqu->data.length = strlen(priv->nick) + 1;
memcpy(extra, priv->nick, wrqu->data.length);
wrqu->data.flags = 1; /* active */
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
apply:
IPW_DEBUG_WX("Setting rate mask to 0x%08X [%s]\n",
mask, fixed ? "fixed" : "sub-rates");
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (mask == IEEE80211_DEFAULT_RATES_MASK) {
priv->config &= ~CFG_FIXED_RATE;
ipw_set_fixed_rate(priv, priv->ieee->mode);
if (priv->rates_mask == mask) {
IPW_DEBUG_WX("Mask set to current mask.\n");
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
if (!ipw_disassociate(priv))
ipw_associate(priv);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
union iwreq_data *wrqu, char *extra)
{
struct ipw_priv *priv = ieee80211_priv(dev);
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
wrqu->bitrate.value = priv->last_rate;
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
IPW_DEBUG_WX("GET Rate -> %d \n", wrqu->bitrate.value);
return 0;
}
union iwreq_data *wrqu, char *extra)
{
struct ipw_priv *priv = ieee80211_priv(dev);
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (wrqu->rts.disabled)
priv->rts_threshold = DEFAULT_RTS_THRESHOLD;
else {
if (wrqu->rts.value < MIN_RTS_THRESHOLD ||
wrqu->rts.value > MAX_RTS_THRESHOLD) {
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return -EINVAL;
}
priv->rts_threshold = wrqu->rts.value;
}
ipw_send_rts_threshold(priv, priv->rts_threshold);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
IPW_DEBUG_WX("SET RTS Threshold -> %d \n", priv->rts_threshold);
return 0;
}
union iwreq_data *wrqu, char *extra)
{
struct ipw_priv *priv = ieee80211_priv(dev);
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
wrqu->rts.value = priv->rts_threshold;
wrqu->rts.fixed = 0; /* no auto select */
wrqu->rts.disabled = (wrqu->rts.value == DEFAULT_RTS_THRESHOLD);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
IPW_DEBUG_WX("GET RTS Threshold -> %d \n", wrqu->rts.value);
return 0;
}
struct ipw_priv *priv = ieee80211_priv(dev);
int err = 0;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (ipw_radio_kill_sw(priv, wrqu->power.disabled)) {
err = -EINPROGRESS;
goto out;
priv->tx_power = wrqu->power.value;
err = ipw_set_tx_power(priv);
out:
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return err;
}
union iwreq_data *wrqu, char *extra)
{
struct ipw_priv *priv = ieee80211_priv(dev);
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
wrqu->power.value = priv->tx_power;
wrqu->power.fixed = 1;
wrqu->power.flags = IW_TXPOW_DBM;
wrqu->power.disabled = (priv->status & STATUS_RF_KILL_MASK) ? 1 : 0;
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
IPW_DEBUG_WX("GET TX Power -> %s %d \n",
wrqu->power.disabled ? "OFF" : "ON", wrqu->power.value);
union iwreq_data *wrqu, char *extra)
{
struct ipw_priv *priv = ieee80211_priv(dev);
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (wrqu->frag.disabled)
priv->ieee->fts = DEFAULT_FTS;
else {
if (wrqu->frag.value < MIN_FRAG_THRESHOLD ||
wrqu->frag.value > MAX_FRAG_THRESHOLD) {
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return -EINVAL;
}
}
ipw_send_frag_threshold(priv, wrqu->frag.value);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
IPW_DEBUG_WX("SET Frag Threshold -> %d \n", wrqu->frag.value);
return 0;
}
union iwreq_data *wrqu, char *extra)
{
struct ipw_priv *priv = ieee80211_priv(dev);
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
wrqu->frag.value = priv->ieee->fts;
wrqu->frag.fixed = 0; /* no auto select */
wrqu->frag.disabled = (wrqu->frag.value == DEFAULT_FTS);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
IPW_DEBUG_WX("GET Frag Threshold -> %d \n", wrqu->frag.value);
return 0;
if (wrqu->retry.value < 0 || wrqu->retry.value > 255)
return -EINVAL;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (wrqu->retry.flags & IW_RETRY_MIN)
priv->short_retry_limit = (u8) wrqu->retry.value;
else if (wrqu->retry.flags & IW_RETRY_MAX)
ipw_send_retry_limit(priv, priv->short_retry_limit,
priv->long_retry_limit);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
IPW_DEBUG_WX("SET retry limit -> short:%d long:%d\n",
priv->short_retry_limit, priv->long_retry_limit);
return 0;
{
struct ipw_priv *priv = ieee80211_priv(dev);
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
wrqu->retry.disabled = 0;
if ((wrqu->retry.flags & IW_RETRY_TYPE) == IW_RETRY_LIFETIME) {
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return -EINVAL;
}
wrqu->retry.flags = IW_RETRY_LIMIT;
wrqu->retry.value = priv->short_retry_limit;
}
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
IPW_DEBUG_WX("GET retry -> %d \n", wrqu->retry.value);
(priv->status & STATUS_EXIT_PENDING))
return 0;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (priv->status & STATUS_RF_KILL_MASK) {
IPW_DEBUG_HC("Aborting scan due to RF kill activation\n");
priv->status |= STATUS_SCANNING;
done:
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return err;
}
int ret;
u32 cap = priv->capability;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ret = ieee80211_wx_set_encode(priv->ieee, info, wrqu, key);
/* In IBSS mode, we need to notify the firmware to update
priv->status & STATUS_ASSOCIATED)
ipw_disassociate(priv);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return ret;
}
{
struct ipw_priv *priv = ieee80211_priv(dev);
int err;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (wrqu->power.disabled) {
priv->power_mode = IPW_POWER_LEVEL(priv->power_mode);
err = ipw_send_power_mode(priv, IPW_POWER_MODE_CAM);
if (err) {
IPW_DEBUG_WX("failed setting power mode.\n");
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return err;
}
IPW_DEBUG_WX("SET Power Management Mode -> off\n");
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
default: /* Otherwise we don't support it */
IPW_DEBUG_WX("SET PM Mode: %X not supported.\n",
wrqu->power.flags);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return -EOPNOTSUPP;
}
err = ipw_send_power_mode(priv, IPW_POWER_LEVEL(priv->power_mode));
if (err) {
IPW_DEBUG_WX("failed setting power mode.\n");
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return err;
}
IPW_DEBUG_WX("SET Power Management Mode -> 0x%02X\n", priv->power_mode);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
union iwreq_data *wrqu, char *extra)
{
struct ipw_priv *priv = ieee80211_priv(dev);
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (!(priv->power_mode & IPW_POWER_ENABLED))
wrqu->power.disabled = 1;
else
wrqu->power.disabled = 0;
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
IPW_DEBUG_WX("GET Power Management Mode -> %02X\n", priv->power_mode);
return 0;
struct ipw_priv *priv = ieee80211_priv(dev);
int mode = *(int *)extra;
int err;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if ((mode < 1) || (mode > IPW_POWER_LIMIT)) {
mode = IPW_POWER_AC;
priv->power_mode = mode;
if (err) {
IPW_DEBUG_WX("failed setting power mode.\n");
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return err;
}
}
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
IPW_WARNING("Attempt to set invalid wireless mode: %d\n", mode);
return -EINVAL;
}
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (priv->adapter == IPW_2915ABG) {
priv->ieee->abg_true = 1;
if (mode & IEEE_A) {
if (mode & IEEE_A) {
IPW_WARNING("Attempt to set 2200BG into "
"802.11a mode\n");
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return -EINVAL;
}
IPW_DEBUG_WX("PRIV SET MODE: %c%c%c\n",
mode & IEEE_A ? 'a' : '.',
mode & IEEE_B ? 'b' : '.', mode & IEEE_G ? 'g' : '.');
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
union iwreq_data *wrqu, char *extra)
{
struct ipw_priv *priv = ieee80211_priv(dev);
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
switch (priv->ieee->mode) {
case IEEE_A:
strncpy(extra, "802.11a (1)", MAX_WX_STRING);
IPW_DEBUG_WX("PRIV GET MODE: %s\n", extra);
wrqu->data.length = strlen(extra) + 1;
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
{
struct ipw_priv *priv = ieee80211_priv(dev);
int mode = *(int *)extra;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
/* Switching from SHORT -> LONG requires a disassociation */
if (mode == 1) {
if (!(priv->config & CFG_PREAMBLE_LONG)) {
priv->config &= ~CFG_PREAMBLE_LONG;
goto done;
}
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return -EINVAL;
done:
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
union iwreq_data *wrqu, char *extra)
{
struct ipw_priv *priv = ieee80211_priv(dev);
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (priv->config & CFG_PREAMBLE_LONG)
snprintf(wrqu->name, IFNAMSIZ, "long (1)");
else
snprintf(wrqu->name, IFNAMSIZ, "auto (0)");
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
struct ipw_priv *priv = ieee80211_priv(dev);
int *parms = (int *)extra;
int enable = (parms[0] > 0);
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
IPW_DEBUG_WX("SET MONITOR: %d %d\n", enable, parms[1]);
if (enable) {
if (priv->ieee->iw_mode != IW_MODE_MONITOR) {
ipw_set_channel(priv, parms[1]);
} else {
if (priv->ieee->iw_mode != IW_MODE_MONITOR) {
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
priv->net_dev->type = ARPHRD_ETHER;
queue_work(priv->workqueue, &priv->adapter_restart);
}
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
IPW_DEBUG_WX("SW_RESET\n");
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ret = ipw_sw_reset(priv, 0);
if (!ret) {
* module parameter, so take appropriate action */
ipw_radio_kill_sw(priv, priv->status & STATUS_RF_KILL_SW);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
ieee80211_wx_set_encode(priv->ieee, info, &wrqu_sec, NULL);
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (!(priv->status & STATUS_RF_KILL_MASK)) {
/* Configuration likely changed -- force [re]association */
ipw_associate(priv);
}
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
static void init_sys_config(struct ipw_sys_config *sys_config)
{
memset(sys_config, 0, sizeof(struct ipw_sys_config));
- sys_config->bt_coexistence = 1; /* We may need to look into prvStaBtConfig */
+ sys_config->bt_coexistence = 0;
sys_config->answer_broadcast_ssid_probe = 0;
sys_config->accept_all_data_frames = 0;
sys_config->accept_non_directed_frames = 1;
struct ipw_priv *priv = ieee80211_priv(dev);
IPW_DEBUG_INFO("dev->open\n");
/* we should be verifying the device is ready to be opened */
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (!(priv->status & STATUS_RF_KILL_MASK) &&
(priv->status & STATUS_ASSOCIATED))
netif_start_queue(dev);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
struct sockaddr *addr = p;
if (!is_valid_ether_addr(addr->sa_data))
return -EADDRNOTAVAIL;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
priv->config |= CFG_CUSTOM_MAC;
memcpy(priv->mac_addr, addr->sa_data, ETH_ALEN);
printk(KERN_INFO "%s: Setting MAC to " MAC_FMT "\n",
priv->net_dev->name, MAC_ARG(priv->mac_addr));
queue_work(priv->workqueue, &priv->adapter_restart);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
if (eeprom->offset + eeprom->len > IPW_EEPROM_IMAGE_SIZE)
return -EINVAL;
- down(&p->sem);
+ mutex_lock(&p->mutex);
memcpy(bytes, &p->eeprom[eeprom->offset], eeprom->len);
- up(&p->sem);
+ mutex_unlock(&p->mutex);
return 0;
}
if (eeprom->offset + eeprom->len > IPW_EEPROM_IMAGE_SIZE)
return -EINVAL;
- down(&p->sem);
+ mutex_lock(&p->mutex);
memcpy(&p->eeprom[eeprom->offset], bytes, eeprom->len);
for (i = IPW_EEPROM_DATA;
i < IPW_EEPROM_DATA + IPW_EEPROM_IMAGE_SIZE; i++)
ipw_write8(p, i, p->eeprom[i]);
- up(&p->sem);
+ mutex_unlock(&p->mutex);
return 0;
}
static void ipw_bg_rf_kill(void *data)
{
struct ipw_priv *priv = data;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ipw_rf_kill(data);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
}
-void ipw_link_up(struct ipw_priv *priv)
+static void ipw_link_up(struct ipw_priv *priv)
{
priv->last_seq_num = -1;
priv->last_frag_num = -1;
static void ipw_bg_link_up(void *data)
{
struct ipw_priv *priv = data;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ipw_link_up(data);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
}
-void ipw_link_down(struct ipw_priv *priv)
+static void ipw_link_down(struct ipw_priv *priv)
{
ipw_led_link_down(priv);
netif_carrier_off(priv->net_dev);
static void ipw_bg_link_down(void *data)
{
struct ipw_priv *priv = data;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ipw_link_down(data);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
}
static int ipw_setup_deferred_work(struct ipw_priv *priv)
/* set basic system config settings */
init_sys_config(&priv->sys_config);
+
+ /* Support Bluetooth if we have BT h/w on board, and user wants to.
+ * Does not support BT priority yet (don't abort or defer our Tx) */
+ if (bt_coexist) {
+ unsigned char bt_caps = priv->eeprom[EEPROM_SKU_CAPABILITY];
+
+ if (bt_caps & EEPROM_SKU_CAP_BT_CHANNEL_SIG)
+ priv->sys_config.bt_coexistence
+ |= CFG_BT_COEXISTENCE_SIGNAL_CHNL;
+ if (bt_caps & EEPROM_SKU_CAP_BT_OOB)
+ priv->sys_config.bt_coexistence
+ |= CFG_BT_COEXISTENCE_OOB;
+ }
+
if (priv->ieee->iw_mode == IW_MODE_ADHOC)
priv->sys_config.answer_broadcast_ssid_probe = 1;
else
static void ipw_bg_up(void *data)
{
struct ipw_priv *priv = data;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ipw_up(data);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
}
static void ipw_deinit(struct ipw_priv *priv)
static void ipw_bg_down(void *data)
{
struct ipw_priv *priv = data;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
ipw_down(data);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
}
/* Called by register_netdev() */
static int ipw_net_init(struct net_device *dev)
{
struct ipw_priv *priv = ieee80211_priv(dev);
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
if (ipw_up(priv)) {
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return -EIO;
}
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
return 0;
}
for (i = 0; i < IPW_IBSS_MAC_HASH_SIZE; i++)
INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
- init_MUTEX(&priv->sem);
+ mutex_init(&priv->mutex);
if (pci_enable_device(pdev)) {
err = -ENODEV;
goto out_free_ieee80211;
SET_MODULE_OWNER(net_dev);
SET_NETDEV_DEV(net_dev, &pdev->dev);
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
priv->ieee->hard_start_xmit = ipw_net_hard_start_xmit;
priv->ieee->set_security = shim__set_security;
err = sysfs_create_group(&pdev->dev.kobj, &ipw_attribute_group);
if (err) {
IPW_ERROR("failed to create sysfs device attributes\n");
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
goto out_release_irq;
}
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
err = register_netdev(net_dev);
if (err) {
IPW_ERROR("failed to register network device\n");
if (!priv)
return;
- down(&priv->sem);
+ mutex_lock(&priv->mutex);
priv->status |= STATUS_EXIT_PENDING;
ipw_down(priv);
sysfs_remove_group(&pdev->dev.kobj, &ipw_attribute_group);
- up(&priv->sem);
+ mutex_unlock(&priv->mutex);
unregister_netdev(priv->net_dev);
MODULE_PARM_DESC(mode, "network mode (0=BSS,1=IBSS)");
#endif
+module_param(bt_coexist, int, 0444);
+MODULE_PARM_DESC(bt_coexist, "enable bluetooth coexistence (default off)");
+
module_param(hwcrypto, int, 0444);
-MODULE_PARM_DESC(hwcrypto, "enable hardware crypto (default on)");
+MODULE_PARM_DESC(hwcrypto, "enable hardware crypto (default off)");
module_param(cmdlog, int, 0444);
MODULE_PARM_DESC(cmdlog,
"allocate a ring buffer for logging firmware commands");
+module_param(roaming, int, 0444);
+MODULE_PARM_DESC(roaming, "enable roaming support (default on)");
+
module_exit(ipw_exit);
module_init(ipw_init);
#include <linux/moduleparam.h>
#include <linux/config.h>
#include <linux/init.h>
+#include <linux/mutex.h>
#include <linux/pci.h>
#include <linux/netdevice.h>
#include <linux/firmware.h>
#include <linux/wireless.h>
#include <linux/dma-mapping.h>
+#include <linux/jiffies.h>
#include <asm/io.h>
#include <net/ieee80211.h>
u16 dwell_time[IPW_SCAN_TYPES];
} __attribute__ ((packed));
-extern inline u8 ipw_get_scan_type(struct ipw_scan_request_ext *scan, u8 index)
+static inline u8 ipw_get_scan_type(struct ipw_scan_request_ext *scan, u8 index)
{
if (index % 2)
return scan->scan_type[index / 2] & 0x0F;
return (scan->scan_type[index / 2] & 0xF0) >> 4;
}
-extern inline void ipw_set_scan_type(struct ipw_scan_request_ext *scan,
+static inline void ipw_set_scan_type(struct ipw_scan_request_ext *scan,
u8 index, u8 scan_type)
{
if (index % 2)
struct ieee80211_device *ieee;
spinlock_t lock;
- struct semaphore sem;
+ struct mutex mutex;
/* basic pci-network driver stuff */
struct pci_dev *pci_dev;
* Register bit definitions
*/
-/* Dino control registers bits */
-
-#define DINO_ENABLE_SYSTEM 0x80
-#define DINO_ENABLE_CS 0x40
-#define DINO_RXFIFO_DATA 0x01
-#define DINO_CONTROL_REG 0x00200000
-
#define IPW_INTA_RW 0x00000008
#define IPW_INTA_MASK_R 0x0000000C
#define IPW_INDIRECT_ADDR 0x00000010
#define IPW_DOMAIN_0_END 0x1000
#define CLX_MEM_BAR_SIZE 0x1000
+/* Dino/baseband control registers bits */
+
+#define DINO_ENABLE_SYSTEM 0x80 /* 1 = baseband processor on, 0 = reset */
+#define DINO_ENABLE_CS 0x40 /* 1 = enable ucode load */
+#define DINO_RXFIFO_DATA 0x01 /* 1 = data available */
#define IPW_BASEBAND_CONTROL_STATUS 0X00200000
#define IPW_BASEBAND_TX_FIFO_WRITE 0X00200004
#define IPW_BASEBAND_RX_FIFO_READ 0X00200004
#define EEPROM_BSS_CHANNELS_BG (GET_EEPROM_ADDR(0x2c,LSB)) /* 2 bytes */
#define EEPROM_HW_VERSION (GET_EEPROM_ADDR(0x72,LSB)) /* 2 bytes */
-/* NIC type as found in the one byte EEPROM_NIC_TYPE offset*/
+/* NIC type as found in the one byte EEPROM_NIC_TYPE offset */
#define EEPROM_NIC_TYPE_0 0
#define EEPROM_NIC_TYPE_1 1
#define EEPROM_NIC_TYPE_2 2
#define EEPROM_NIC_TYPE_3 3
#define EEPROM_NIC_TYPE_4 4
+/* Bluetooth Coexistence capabilities as found in EEPROM_SKU_CAPABILITY */
+#define EEPROM_SKU_CAP_BT_CHANNEL_SIG 0x01 /* we can tell BT our channel # */
+#define EEPROM_SKU_CAP_BT_PRIORITY 0x02 /* BT can take priority over us */
+#define EEPROM_SKU_CAP_BT_OOB 0x04 /* we can signal BT out-of-band */
+
#define FW_MEM_REG_LOWER_BOUND 0x00300000
#define FW_MEM_REG_EEPROM_ACCESS (FW_MEM_REG_LOWER_BOUND + 0x40)
#define IPW_EVENT_REG (FW_MEM_REG_LOWER_BOUND + 0x04)
IPW_FW_ERROR_FATAL_ERROR
};
-#define AUTH_OPEN 0
-#define AUTH_SHARED_KEY 1
-#define AUTH_IGNORE 3
+#define AUTH_OPEN 0
+#define AUTH_SHARED_KEY 1
+#define AUTH_LEAP 2
+#define AUTH_IGNORE 3
#define HC_ASSOCIATE 0
#define HC_REASSOCIATE 1
u8 cmd;
u8 len;
u16 reserved;
- u32 param[TFD_CMD_IMMEDIATE_PAYLOAD_LENGTH];
+ u32 *param;
} __attribute__ ((packed));
struct ipw_cmd_log {
struct host_cmd cmd;
};
-#define CFG_BT_COEXISTENCE_MIN 0x00
-#define CFG_BT_COEXISTENCE_DEFER 0x02
-#define CFG_BT_COEXISTENCE_KILL 0x04
-#define CFG_BT_COEXISTENCE_WME_OVER_BT 0x08
-#define CFG_BT_COEXISTENCE_OOB 0x10
-#define CFG_BT_COEXISTENCE_MAX 0xFF
-#define CFG_BT_COEXISTENCE_DEF 0x80 /* read Bt from EEPROM */
-
-#define CFG_CTS_TO_ITSELF_ENABLED_MIN 0x0
-#define CFG_CTS_TO_ITSELF_ENABLED_MAX 0x1
+/* SysConfig command parameters ... */
+/* bt_coexistence param */
+#define CFG_BT_COEXISTENCE_SIGNAL_CHNL 0x01 /* tell BT our chnl # */
+#define CFG_BT_COEXISTENCE_DEFER 0x02 /* defer our Tx if BT traffic */
+#define CFG_BT_COEXISTENCE_KILL 0x04 /* kill our Tx if BT traffic */
+#define CFG_BT_COEXISTENCE_WME_OVER_BT 0x08 /* multimedia extensions */
+#define CFG_BT_COEXISTENCE_OOB 0x10 /* signal BT via out-of-band */
+
+/* clear-to-send to self param */
+#define CFG_CTS_TO_ITSELF_ENABLED_MIN 0x00
+#define CFG_CTS_TO_ITSELF_ENABLED_MAX 0x01
#define CFG_CTS_TO_ITSELF_ENABLED_DEF CFG_CTS_TO_ITSELF_ENABLED_MIN
-#define CFG_SYS_ANTENNA_BOTH 0x000
-#define CFG_SYS_ANTENNA_A 0x001
-#define CFG_SYS_ANTENNA_B 0x003
+/* Antenna diversity param (h/w can select best antenna, based on signal) */
+#define CFG_SYS_ANTENNA_BOTH 0x00 /* NIC selects best antenna */
+#define CFG_SYS_ANTENNA_A 0x01 /* force antenna A */
+#define CFG_SYS_ANTENNA_B 0x03 /* force antenna B */
/*
* The definitions below were lifted off the ipw2100 driver, which only
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/bitops.h>
-#ifdef CONFIG_NET_RADIO
#include <linux/wireless.h>
#include <net/iw_handler.h>
-#endif
#include <pcmcia/cs_types.h>
#include <pcmcia/cs.h>
#include <linux/ip.h>
#include <linux/tcp.h>
#include <linux/time.h>
-
+#include <linux/jiffies.h>
/************************************************************************/
/* Useful structures and definitions */
del_timer(&strip_info->idle_timer);
- if (jiffies - strip_info->pps_timer > HZ) {
+ if (time_after(jiffies, strip_info->pps_timer + HZ)) {
unsigned long t = jiffies - strip_info->pps_timer;
unsigned long rx_pps_count = (strip_info->rx_pps_count * HZ * 8 + t / 2) / t;
unsigned long tx_pps_count = (strip_info->tx_pps_count * HZ * 8 + t / 2) / t;
* characteristics of the hardware. Applications such as mobile IP may
* take advantage of it.
*
- * You will need to enable the CONFIG_NET_RADIO define in the kernel
- * configuration to enable the wireless extensions (this is the one
- * giving access to the radio network device choice).
- *
- * It might also be a good idea as well to fetch the wireless tools to
+ * It might be a good idea as well to fetch the wireless tools to
* configure the device and play a bit.
*/
* caracteristics of the hardware in a standard way and support for
* applications for taking advantage of it (like Mobile IP).
*
- * You will need to enable the CONFIG_NET_RADIO define in the kernel
- * configuration to enable the wireless extensions (this is the one
- * giving access to the radio network device choice).
- *
- * It might also be a good idea as well to fetch the wireless tools to
+ * It might be a good idea as well to fetch the wireless tools to
* configure the device and play a bit.
*/
#include <linux/ioport.h>
#include <linux/fcntl.h>
#include <linux/ethtool.h>
-
-#ifdef CONFIG_NET_RADIO
#include <linux/wireless.h> /* Wireless extensions */
#include <net/iw_handler.h> /* New driver API */
-#endif
/* Pcmcia headers that we need */
#include <pcmcia/cs_types.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/zorro.h>
+#include <linux/jiffies.h>
#include <asm/system.h>
#include <asm/irq.h>
z_writeb(z_readb(ioaddr + NE_RESET), ioaddr + NE_RESET);
while ((z_readb(ioaddr + NE_EN0_ISR) & ENISR_RESET) == 0)
- if (jiffies - reset_start_time > 2*HZ/100) {
+ if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
printk(KERN_WARNING " not found (no reset ack).\n");
return -ENODEV;
}
/* This check _should_not_ be necessary, omit eventually. */
while ((z_readb(NE_BASE+NE_EN0_ISR) & ENISR_RESET) == 0)
- if (jiffies - reset_start_time > 2*HZ/100) {
+ if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
printk(KERN_WARNING "%s: ne_reset_8390() did not complete.\n",
dev->name);
break;
dma_start = jiffies;
while ((z_readb(NE_BASE + NE_EN0_ISR) & ENISR_RDC) == 0)
- if (jiffies - dma_start > 2*HZ/100) { /* 20ms */
+ if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */
printk(KERN_ERR "%s: timeout waiting for Tx RDC.\n",
dev->name);
zorro8390_reset_8390(dev);
extern struct ArcProto *arc_proto_map[256], *arc_proto_default,
*arc_bcast_proto, *arc_raw_proto;
-extern struct ArcProto arc_proto_null;
/*
#define arcnet_dump_skb(dev,skb,desc) ;
#endif
-#if (ARCNET_DEBUG_MAX & D_RX) || (ARCNET_DEBUG_MAX & D_TX)
-void arcnet_dump_packet(struct net_device *dev, int bufnum, char *desc,
- int take_arcnet_lock);
-#else
-#define arcnet_dump_packet(dev, bufnum, desc,take_arcnet_lock) ;
-#endif
-
void arcnet_unregister_proto(struct ArcProto *proto);
irqreturn_t arcnet_interrupt(int irq, void *dev_id, struct pt_regs *regs);
struct net_device *alloc_arcdev(char *name);
-void arcnet_rx(struct net_device *dev, int bufnum);
#endif /* __KERNEL__ */
#endif /* _LINUX_ARCDEVICE_H */
#define MV643XX_ETH_FORCE_BP_MODE_NO_JAM 0
#define MV643XX_ETH_FORCE_BP_MODE_JAM_TX (1<<7)
#define MV643XX_ETH_FORCE_BP_MODE_JAM_TX_ON_RX_ERR (1<<8)
+#define MV643XX_ETH_SERIAL_PORT_CONTROL_RESERVED (1<<9)
#define MV643XX_ETH_FORCE_LINK_FAIL 0
#define MV643XX_ETH_DO_NOT_FORCE_LINK_FAIL (1<<10)
#define MV643XX_ETH_RETRANSMIT_16_ATTEMPTS 0
#define MV643XX_ETH_SET_MII_SPEED_TO_10 0
#define MV643XX_ETH_SET_MII_SPEED_TO_100 (1<<24)
+#define MV643XX_ETH_MAX_RX_PACKET_MASK (0x7<<17)
+
#define MV643XX_ETH_PORT_SERIAL_CONTROL_DEFAULT_VALUE \
MV643XX_ETH_DO_NOT_FORCE_LINK_PASS | \
MV643XX_ETH_ENABLE_AUTO_NEG_FOR_DUPLX | \
#define MV643XX_ETH_NAME "mv643xx_eth"
struct mv643xx_eth_platform_data {
- /*
- * Non-values for mac_addr, phy_addr, port_config, etc.
- * override the default value. Setting the corresponding
- * force_* field, causes the default value to be overridden
- * even when zero.
- */
- unsigned int force_phy_addr:1;
- unsigned int force_port_config:1;
- unsigned int force_port_config_extend:1;
- unsigned int force_port_sdma_config:1;
- unsigned int force_port_serial_control:1;
- int phy_addr;
char *mac_addr; /* pointer to mac address */
- u32 port_config;
- u32 port_config_extend;
- u32 port_sdma_config;
- u32 port_serial_control;
+ u16 force_phy_addr; /* force override if phy_addr == 0 */
+ u16 phy_addr;
+
+ /* If speed is 0, then speed and duplex are autonegotiated. */
+ int speed; /* 0, SPEED_10, SPEED_100, SPEED_1000 */
+ int duplex; /* DUPLEX_HALF or DUPLEX_FULL */
+
+ /* non-zero values of the following fields override defaults */
u32 tx_queue_size;
u32 rx_queue_size;
u32 tx_sram_addr;
/* Authentication algorithms */
#define WLAN_AUTH_OPEN 0
#define WLAN_AUTH_SHARED_KEY 1
+#define WLAN_AUTH_LEAP 2
#define WLAN_AUTH_CHALLENGE_LEN 128
WLAN_REASON_CIPHER_SUITE_REJECTED = 24,
};
+/* Action categories - 802.11h */
+enum ieee80211_actioncategories {
+ WLAN_ACTION_SPECTRUM_MGMT = 0,
+ /* Reserved 1-127 */
+ /* Error 128-255 */
+};
+
+/* Action details - 802.11h */
+enum ieee80211_actiondetails {
+ WLAN_ACTION_CATEGORY_MEASURE_REQUEST = 0,
+ WLAN_ACTION_CATEGORY_MEASURE_REPORT = 1,
+ WLAN_ACTION_CATEGORY_TPC_REQUEST = 2,
+ WLAN_ACTION_CATEGORY_TPC_REPORT = 3,
+ WLAN_ACTION_CATEGORY_CHANNEL_SWITCH = 4,
+ /* 5 - 255 Reserved */
+};
+
#define IEEE80211_STATMASK_SIGNAL (1<<0)
#define IEEE80211_STATMASK_RSSI (1<<1)
#define IEEE80211_STATMASK_NOISE (1<<2)
u8 mask;
u8 freq;
u16 len;
+ u64 tsf;
+ u32 beacon_time;
};
/* IEEE 802.11 requires that STA supports concurrent reception of at least
struct ieee80211_info_element info_element[0];
} __attribute__ ((packed));
+struct ieee80211_channel_switch {
+ u8 id;
+ u8 len;
+ u8 mode;
+ u8 channel;
+ u8 count;
+} __attribute__ ((packed));
+
+struct ieee80211_action {
+ struct ieee80211_hdr_3addr header;
+ u8 category;
+ u8 action;
+ union {
+ struct ieee80211_action_exchange {
+ u8 token;
+ struct ieee80211_info_element info_element[0];
+ } exchange;
+ struct ieee80211_channel_switch channel_switch;
+
+ } format;
+} __attribute__ ((packed));
+
struct ieee80211_disassoc {
struct ieee80211_hdr_3addr header;
__le16 reason;
/* QoS structure */
#define NETWORK_HAS_QOS_PARAMETERS (1<<3)
#define NETWORK_HAS_QOS_INFORMATION (1<<4)
-#define NETWORK_HAS_QOS_MASK (NETWORK_HAS_QOS_PARAMETERS | NETWORK_HAS_QOS_INFORMATION)
+#define NETWORK_HAS_QOS_MASK (NETWORK_HAS_QOS_PARAMETERS | \
+ NETWORK_HAS_QOS_INFORMATION)
+
+/* 802.11h */
+#define NETWORK_HAS_POWER_CONSTRAINT (1<<5)
+#define NETWORK_HAS_CSA (1<<6)
+#define NETWORK_HAS_QUIET (1<<7)
+#define NETWORK_HAS_IBSS_DFS (1<<8)
+#define NETWORK_HAS_TPC_REPORT (1<<9)
#define QOS_QUEUE_NUM 4
#define QOS_OUI_LEN 3
/*******************************************************/
+enum { /* ieee80211_basic_report.map */
+ IEEE80211_BASIC_MAP_BSS = (1 << 0),
+ IEEE80211_BASIC_MAP_OFDM = (1 << 1),
+ IEEE80211_BASIC_MAP_UNIDENTIFIED = (1 << 2),
+ IEEE80211_BASIC_MAP_RADAR = (1 << 3),
+ IEEE80211_BASIC_MAP_UNMEASURED = (1 << 4),
+ /* Bits 5-7 are reserved */
+
+};
+struct ieee80211_basic_report {
+ u8 channel;
+ __le64 start_time;
+ __le16 duration;
+ u8 map;
+} __attribute__ ((packed));
+
+enum { /* ieee80211_measurement_request.mode */
+ /* Bit 0 is reserved */
+ IEEE80211_MEASUREMENT_ENABLE = (1 << 1),
+ IEEE80211_MEASUREMENT_REQUEST = (1 << 2),
+ IEEE80211_MEASUREMENT_REPORT = (1 << 3),
+ /* Bits 4-7 are reserved */
+};
+
+enum {
+ IEEE80211_REPORT_BASIC = 0, /* required */
+ IEEE80211_REPORT_CCA = 1, /* optional */
+ IEEE80211_REPORT_RPI = 2, /* optional */
+ /* 3-255 reserved */
+};
+
+struct ieee80211_measurement_params {
+ u8 channel;
+ __le64 start_time;
+ __le16 duration;
+} __attribute__ ((packed));
+
+struct ieee80211_measurement_request {
+ struct ieee80211_info_element ie;
+ u8 token;
+ u8 mode;
+ u8 type;
+ struct ieee80211_measurement_params params[0];
+} __attribute__ ((packed));
+
+struct ieee80211_measurement_report {
+ struct ieee80211_info_element ie;
+ u8 token;
+ u8 mode;
+ u8 type;
+ union {
+ struct ieee80211_basic_report basic[0];
+ } u;
+} __attribute__ ((packed));
+
+struct ieee80211_tpc_report {
+ u8 transmit_power;
+ u8 link_margin;
+} __attribute__ ((packed));
+
+struct ieee80211_channel_map {
+ u8 channel;
+ u8 map;
+} __attribute__ ((packed));
+
+struct ieee80211_ibss_dfs {
+ struct ieee80211_info_element ie;
+ u8 owner[ETH_ALEN];
+ u8 recovery_interval;
+ struct ieee80211_channel_map channel_map[0];
+};
+
+struct ieee80211_csa {
+ u8 mode;
+ u8 channel;
+ u8 count;
+} __attribute__ ((packed));
+
+struct ieee80211_quiet {
+ u8 count;
+ u8 period;
+ u8 duration;
+ u8 offset;
+} __attribute__ ((packed));
+
struct ieee80211_network {
/* These entries are used to identify a unique network */
u8 bssid[ETH_ALEN];
u8 rates_ex_len;
unsigned long last_scanned;
u8 mode;
- u8 flags;
+ u32 flags;
u32 last_associate;
u32 time_stamp[2];
u16 beacon_interval;
u8 rsn_ie[MAX_WPA_IE_LEN];
size_t rsn_ie_len;
struct ieee80211_tim_parameters tim;
+
+ /* 802.11h info */
+
+ /* Power Constraint - mandatory if spctrm mgmt required */
+ u8 power_constraint;
+
+ /* TPC Report - mandatory if spctrm mgmt required */
+ struct ieee80211_tpc_report tpc_report;
+
+ /* IBSS DFS - mandatory if spctrm mgmt required and IBSS
+ * NOTE: This is variable length and so must be allocated dynamically */
+ struct ieee80211_ibss_dfs *ibss_dfs;
+
+ /* Channel Switch Announcement - optional if spctrm mgmt required */
+ struct ieee80211_csa csa;
+
+ /* Quiet - optional if spctrm mgmt required */
+ struct ieee80211_quiet quiet;
+
struct list_head list;
};
int (*handle_auth) (struct net_device * dev,
struct ieee80211_auth * auth);
int (*handle_deauth) (struct net_device * dev,
- struct ieee80211_auth * auth);
+ struct ieee80211_deauth * auth);
+ int (*handle_action) (struct net_device * dev,
+ struct ieee80211_action * action,
+ struct ieee80211_rx_stats * stats);
int (*handle_disassoc) (struct net_device * dev,
struct ieee80211_disassoc * assoc);
int (*handle_beacon) (struct net_device * dev,
extern void ieee80211_rx_mgt(struct ieee80211_device *ieee,
struct ieee80211_hdr_4addr *header,
struct ieee80211_rx_stats *stats);
+extern void ieee80211_network_reset(struct ieee80211_network *network);
/* ieee80211_geo.c */
extern const struct ieee80211_geo *ieee80211_get_geo(struct ieee80211_device
extern int ieee80211_channel_to_index(struct ieee80211_device *ieee,
u8 channel);
extern u8 ieee80211_freq_to_channel(struct ieee80211_device *ieee, u32 freq);
+extern u8 ieee80211_get_channel_flags(struct ieee80211_device *ieee,
+ u8 channel);
+extern const struct ieee80211_channel *ieee80211_get_channel(struct
+ ieee80211_device
+ *ieee, u8 channel);
/* ieee80211_wx.c */
extern int ieee80211_wx_get_scan(struct ieee80211_device *ieee,
extern int ieee80211_wx_get_encodeext(struct ieee80211_device *ieee,
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
+extern int ieee80211_wx_set_auth(struct net_device *dev,
+ struct iw_request_info *info,
+ union iwreq_data *wrqu,
+ char *extra);
+extern int ieee80211_wx_get_auth(struct net_device *dev,
+ struct iw_request_info *info,
+ union iwreq_data *wrqu,
+ char *extra);
static inline void ieee80211_increment_scans(struct ieee80211_device *ieee)
{
/* deinitialize crypto context and free allocated private data */
void (*deinit) (void *priv);
- int (*build_iv) (struct sk_buff * skb, int hdr_len, void *priv);
+ int (*build_iv) (struct sk_buff * skb, int hdr_len,
+ u8 *key, int keylen, void *priv);
/* encrypt/decrypt return < 0 on error or >= 0 on success. The return
* value from decrypt_mpdu is passed as the keyidx value for
source "net/bluetooth/Kconfig"
source "net/ieee80211/Kconfig"
+config WIRELESS_EXT
+ bool
+
endif # if NET
endmenu # Networking
obj-$(CONFIG_SYSFS) += net-sysfs.o
obj-$(CONFIG_NET_DIVERT) += dv.o
obj-$(CONFIG_NET_PKTGEN) += pktgen.o
-obj-$(CONFIG_NET_RADIO) += wireless.o
+obj-$(CONFIG_WIRELESS_EXT) += wireless.o
obj-$(CONFIG_NETPOLL) += netpoll.o
#include <linux/netpoll.h>
#include <linux/rcupdate.h>
#include <linux/delay.h>
-#ifdef CONFIG_NET_RADIO
-#include <linux/wireless.h> /* Note : will define WIRELESS_EXT */
+#include <linux/wireless.h>
#include <net/iw_handler.h>
-#endif /* CONFIG_NET_RADIO */
#include <asm/current.h>
/*
.release = seq_release,
};
-#ifdef WIRELESS_EXT
+#ifdef CONFIG_WIRELESS_EXT
extern int wireless_proc_init(void);
#else
#define wireless_proc_init() 0
ret = -EFAULT;
return ret;
}
-#ifdef WIRELESS_EXT
+#ifdef CONFIG_WIRELESS_EXT
/* Take care of Wireless Extensions */
if (cmd >= SIOCIWFIRST && cmd <= SIOCIWLAST) {
/* If command is `set a parameter', or
ret = -EFAULT;
return ret;
}
-#endif /* WIRELESS_EXT */
+#endif /* CONFIG_WIRELESS_EXT */
return -EINVAL;
}
}
#include <linux/string.h>
#include <net/ieee80211.h>
-
MODULE_AUTHOR("Jouni Malinen");
MODULE_DESCRIPTION("HostAP crypto");
MODULE_LICENSE("GPL");
void ieee80211_crypt_deinit_entries(struct ieee80211_device *ieee, int force)
{
- struct ieee80211_crypt_data *entry, *next;
+ struct ieee80211_crypt_data *entry, *next;
unsigned long flags;
spin_lock_irqsave(&ieee->lock, flags);
- list_for_each_entry_safe(entry, next, &ieee->crypt_deinit_list, list) {
+ list_for_each_entry_safe(entry, next, &ieee->crypt_deinit_list, list) {
if (atomic_read(&entry->refcnt) != 0 && !force)
continue;
spin_unlock_irqrestore(&ieee80211_crypto_lock, flags);
return -EINVAL;
- found:
+ found:
printk(KERN_DEBUG "ieee80211_crypt: unregistered algorithm "
- "'%s'\n", ops->name);
+ "'%s'\n", ops->name);
list_del(&alg->list);
spin_unlock_irqrestore(&ieee80211_crypto_lock, flags);
kfree(alg);
spin_unlock_irqrestore(&ieee80211_crypto_lock, flags);
return NULL;
- found:
+ found:
spin_unlock_irqrestore(&ieee80211_crypto_lock, flags);
return alg->ops;
}
ieee80211_ccmp_aes_encrypt(tfm, b0, s0);
}
-static int ieee80211_ccmp_hdr(struct sk_buff *skb, int hdr_len, void *priv)
+static int ieee80211_ccmp_hdr(struct sk_buff *skb, int hdr_len,
+ u8 *aeskey, int keylen, void *priv)
{
struct ieee80211_ccmp_data *key = priv;
int i;
if (skb_headroom(skb) < CCMP_HDR_LEN || skb->len < hdr_len)
return -1;
+ if (aeskey != NULL && keylen >= CCMP_TK_LEN)
+ memcpy(aeskey, key->key, CCMP_TK_LEN);
+
pos = skb_push(skb, CCMP_HDR_LEN);
memmove(pos, pos + CCMP_HDR_LEN, hdr_len);
pos += hdr_len;
return -1;
data_len = skb->len - hdr_len;
- len = ieee80211_ccmp_hdr(skb, hdr_len, priv);
+ len = ieee80211_ccmp_hdr(skb, hdr_len, NULL, 0, priv);
if (len < 0)
return -1;
{
struct ieee80211_tkip_data *priv;
- priv = kmalloc(sizeof(*priv), GFP_ATOMIC);
+ priv = kzalloc(sizeof(*priv), GFP_ATOMIC);
if (priv == NULL)
goto fail;
- memset(priv, 0, sizeof(*priv));
priv->key_idx = key_idx;
#endif
}
-static u8 *ieee80211_tkip_hdr(struct sk_buff *skb, int hdr_len, void *priv)
+static int ieee80211_tkip_hdr(struct sk_buff *skb, int hdr_len,
+ u8 * rc4key, int keylen, void *priv)
{
struct ieee80211_tkip_data *tkey = priv;
int len;
- u8 *rc4key, *pos, *icv;
+ u8 *pos;
struct ieee80211_hdr_4addr *hdr;
- u32 crc;
hdr = (struct ieee80211_hdr_4addr *)skb->data;
if (skb_headroom(skb) < 8 || skb->len < hdr_len)
- return NULL;
+ return -1;
+
+ if (rc4key == NULL || keylen < 16)
+ return -1;
if (!tkey->tx_phase1_done) {
tkip_mixing_phase1(tkey->tx_ttak, tkey->key, hdr->addr2,
tkey->tx_iv32);
tkey->tx_phase1_done = 1;
}
- rc4key = kmalloc(16, GFP_ATOMIC);
- if (!rc4key)
- return NULL;
tkip_mixing_phase2(rc4key, tkey->key, tkey->tx_ttak, tkey->tx_iv16);
len = skb->len - hdr_len;
pos = skb_push(skb, 8);
memmove(pos, pos + 8, hdr_len);
pos += hdr_len;
- icv = skb_put(skb, 4);
*pos++ = *rc4key;
*pos++ = *(rc4key + 1);
*pos++ = (tkey->tx_iv32 >> 16) & 0xff;
*pos++ = (tkey->tx_iv32 >> 24) & 0xff;
- crc = ~crc32_le(~0, pos, len);
- icv[0] = crc;
- icv[1] = crc >> 8;
- icv[2] = crc >> 16;
- icv[3] = crc >> 24;
+ tkey->tx_iv16++;
+ if (tkey->tx_iv16 == 0) {
+ tkey->tx_phase1_done = 0;
+ tkey->tx_iv32++;
+ }
- return rc4key;
+ return 8;
}
static int ieee80211_tkip_encrypt(struct sk_buff *skb, int hdr_len, void *priv)
{
struct ieee80211_tkip_data *tkey = priv;
int len;
- const u8 *rc4key;
- u8 *pos;
+ u8 rc4key[16], *pos, *icv;
+ u32 crc;
struct scatterlist sg;
if (tkey->flags & IEEE80211_CRYPTO_TKIP_COUNTERMEASURES) {
if (net_ratelimit()) {
struct ieee80211_hdr_4addr *hdr =
(struct ieee80211_hdr_4addr *)skb->data;
- printk(KERN_DEBUG "TKIP countermeasures: dropped "
+ printk(KERN_DEBUG ": TKIP countermeasures: dropped "
"TX packet to " MAC_FMT "\n",
MAC_ARG(hdr->addr1));
}
len = skb->len - hdr_len;
pos = skb->data + hdr_len;
- rc4key = ieee80211_tkip_hdr(skb, hdr_len, priv);
- if (!rc4key)
+ if ((ieee80211_tkip_hdr(skb, hdr_len, rc4key, 16, priv)) < 0)
return -1;
+ icv = skb_put(skb, 4);
+
+ crc = ~crc32_le(~0, pos, len);
+ icv[0] = crc;
+ icv[1] = crc >> 8;
+ icv[2] = crc >> 16;
+ icv[3] = crc >> 24;
+
crypto_cipher_setkey(tkey->tfm_arc4, rc4key, 16);
sg.page = virt_to_page(pos);
sg.offset = offset_in_page(pos);
sg.length = len + 4;
crypto_cipher_encrypt(tkey->tfm_arc4, &sg, &sg, len + 4);
- tkey->tx_iv16++;
- if (tkey->tx_iv16 == 0) {
- tkey->tx_phase1_done = 0;
- tkey->tx_iv32++;
- }
-
return 0;
}
if (tkey->flags & IEEE80211_CRYPTO_TKIP_COUNTERMEASURES) {
if (net_ratelimit()) {
- printk(KERN_DEBUG "TKIP countermeasures: dropped "
+ printk(KERN_DEBUG ": TKIP countermeasures: dropped "
"received packet from " MAC_FMT "\n",
MAC_ARG(hdr->addr2));
}
.name = "TKIP",
.init = ieee80211_tkip_init,
.deinit = ieee80211_tkip_deinit,
+ .build_iv = ieee80211_tkip_hdr,
.encrypt_mpdu = ieee80211_tkip_encrypt,
.decrypt_mpdu = ieee80211_tkip_decrypt,
.encrypt_msdu = ieee80211_michael_mic_add,
}
/* Add WEP IV/key info to a frame that has at least 4 bytes of headroom */
-static int prism2_wep_build_iv(struct sk_buff *skb, int hdr_len, void *priv)
+static int prism2_wep_build_iv(struct sk_buff *skb, int hdr_len,
+ u8 *key, int keylen, void *priv)
{
struct prism2_wep_data *wep = priv;
u32 klen, len;
return -1;
/* add the IV to the frame */
- if (prism2_wep_build_iv(skb, hdr_len, priv))
+ if (prism2_wep_build_iv(skb, hdr_len, NULL, 0, priv))
return -1;
/* Copy the IV into the first 3 bytes of the key */
* this is a B only channel, we don't see it
* as valid. */
if ((ieee->geo.bg[i].channel == channel) &&
+ !(ieee->geo.bg[i].flags & IEEE80211_CH_INVALID) &&
(!(ieee->mode & IEEE_G) ||
!(ieee->geo.bg[i].flags & IEEE80211_CH_B_ONLY)))
return IEEE80211_24GHZ_BAND;
if (ieee->freq_band & IEEE80211_52GHZ_BAND)
for (i = 0; i < ieee->geo.a_channels; i++)
- if (ieee->geo.a[i].channel == channel)
+ if ((ieee->geo.a[i].channel == channel) &&
+ !(ieee->geo.a[i].flags & IEEE80211_CH_INVALID))
return IEEE80211_52GHZ_BAND;
return 0;
return &ieee->geo;
}
+u8 ieee80211_get_channel_flags(struct ieee80211_device * ieee, u8 channel)
+{
+ int index = ieee80211_channel_to_index(ieee, channel);
+
+ if (index == -1)
+ return IEEE80211_CH_INVALID;
+
+ if (channel <= IEEE80211_24GHZ_CHANNELS)
+ return ieee->geo.bg[index].flags;
+
+ return ieee->geo.a[index].flags;
+}
+
+static const struct ieee80211_channel bad_channel = {
+ .channel = 0,
+ .flags = IEEE80211_CH_INVALID,
+ .max_power = 0,
+};
+
+const struct ieee80211_channel *ieee80211_get_channel(struct ieee80211_device
+ *ieee, u8 channel)
+{
+ int index = ieee80211_channel_to_index(ieee, channel);
+
+ if (index == -1)
+ return &bad_channel;
+
+ if (channel <= IEEE80211_24GHZ_CHANNELS)
+ return &ieee->geo.bg[index];
+
+ return &ieee->geo.a[index];
+}
+
+EXPORT_SYMBOL(ieee80211_get_channel);
+EXPORT_SYMBOL(ieee80211_get_channel_flags);
EXPORT_SYMBOL(ieee80211_is_valid_channel);
EXPORT_SYMBOL(ieee80211_freq_to_channel);
EXPORT_SYMBOL(ieee80211_channel_to_index);
return 0;
}
+void ieee80211_network_reset(struct ieee80211_network *network)
+{
+ if (!network)
+ return;
+
+ if (network->ibss_dfs) {
+ kfree(network->ibss_dfs);
+ network->ibss_dfs = NULL;
+ }
+}
+
static inline void ieee80211_networks_free(struct ieee80211_device *ieee)
{
+ int i;
+
if (!ieee->networks)
return;
+
+ for (i = 0; i < MAX_NETWORK_COUNT; i++)
+ if (ieee->networks[i].ibss_dfs)
+ kfree(ieee->networks[i].ibss_dfs);
+
kfree(ieee->networks);
ieee->networks = NULL;
}
/* Put this code here so that we avoid duplicating it in all
* Rx paths. - Jean II */
+#ifdef CONFIG_WIRELESS_EXT
#ifdef IW_WIRELESS_SPY /* defined in iw_handler.h */
-#ifdef CONFIG_NET_RADIO
/* If spy monitoring on */
if (ieee->spy_data.spy_number > 0) {
struct iw_quality wstats;
/* Update spy records */
wireless_spy_update(ieee->dev, hdr->addr2, &wstats);
}
-#endif /* CONFIG_NET_RADIO */
#endif /* IW_WIRELESS_SPY */
+#endif /* CONFIG_WIRELESS_EXT */
#ifdef NOT_YET
hostap_update_rx_stats(local->ap, hdr, rx_stats);
/* skb: hdr + (possibly fragmented) plaintext payload */
// PR: FIXME: hostap has additional conditions in the "if" below:
// ieee->host_decrypt && (fc & IEEE80211_FCTL_PROTECTED) &&
- if ((frag != 0 || (fc & IEEE80211_FCTL_MOREFRAGS))) {
+ if ((frag != 0) || (fc & IEEE80211_FCTL_MOREFRAGS)) {
int flen;
struct sk_buff *frag_skb = ieee80211_frag_cache_get(ieee, hdr);
IEEE80211_DEBUG_FRAG("Rx Fragment received (%u)\n", frag);
memset(skb->cb, 0, sizeof(skb->cb));
skb->dev = dev;
skb->ip_summed = CHECKSUM_NONE; /* 802.11 crc not sufficient */
- netif_rx(skb);
+ if (netif_rx(skb) == NET_RX_DROP) {
+ /* netif_rx always succeeds, but it might drop
+ * the packet. If it drops the packet, we log that
+ * in our stats. */
+ IEEE80211_DEBUG_DROP
+ ("RX: netif_rx dropped the packet\n");
+ stats->rx_dropped++;
+ }
}
rx_exit:
return rc;
}
+#ifdef CONFIG_IEEE80211_DEBUG
+#define MFIE_STRING(x) case MFIE_TYPE_ ##x: return #x
+
+static const char *get_info_element_string(u16 id)
+{
+ switch (id) {
+ MFIE_STRING(SSID);
+ MFIE_STRING(RATES);
+ MFIE_STRING(FH_SET);
+ MFIE_STRING(DS_SET);
+ MFIE_STRING(CF_SET);
+ MFIE_STRING(TIM);
+ MFIE_STRING(IBSS_SET);
+ MFIE_STRING(COUNTRY);
+ MFIE_STRING(HOP_PARAMS);
+ MFIE_STRING(HOP_TABLE);
+ MFIE_STRING(REQUEST);
+ MFIE_STRING(CHALLENGE);
+ MFIE_STRING(POWER_CONSTRAINT);
+ MFIE_STRING(POWER_CAPABILITY);
+ MFIE_STRING(TPC_REQUEST);
+ MFIE_STRING(TPC_REPORT);
+ MFIE_STRING(SUPP_CHANNELS);
+ MFIE_STRING(CSA);
+ MFIE_STRING(MEASURE_REQUEST);
+ MFIE_STRING(MEASURE_REPORT);
+ MFIE_STRING(QUIET);
+ MFIE_STRING(IBSS_DFS);
+ MFIE_STRING(ERP_INFO);
+ MFIE_STRING(RSN);
+ MFIE_STRING(RATES_EX);
+ MFIE_STRING(GENERIC);
+ MFIE_STRING(QOS_PARAMETER);
+ default:
+ return "UNKNOWN";
+ }
+}
+#endif
+
static int ieee80211_parse_info_param(struct ieee80211_info_element
*info_element, u16 length,
struct ieee80211_network *network)
break;
case MFIE_TYPE_TIM:
- IEEE80211_DEBUG_MGMT("MFIE_TYPE_TIM: ignored\n");
+ network->tim.tim_count = info_element->data[0];
+ network->tim.tim_period = info_element->data[1];
+ IEEE80211_DEBUG_MGMT("MFIE_TYPE_TIM: partially ignored\n");
break;
case MFIE_TYPE_ERP_INFO:
printk(KERN_ERR
"QoS Error need to parse QOS_PARAMETER IE\n");
break;
+ /* 802.11h */
+ case MFIE_TYPE_POWER_CONSTRAINT:
+ network->power_constraint = info_element->data[0];
+ network->flags |= NETWORK_HAS_POWER_CONSTRAINT;
+ break;
+
+ case MFIE_TYPE_CSA:
+ network->power_constraint = info_element->data[0];
+ network->flags |= NETWORK_HAS_CSA;
+ break;
+
+ case MFIE_TYPE_QUIET:
+ network->quiet.count = info_element->data[0];
+ network->quiet.period = info_element->data[1];
+ network->quiet.duration = info_element->data[2];
+ network->quiet.offset = info_element->data[3];
+ network->flags |= NETWORK_HAS_QUIET;
+ break;
+
+ case MFIE_TYPE_IBSS_DFS:
+ if (network->ibss_dfs)
+ break;
+ network->ibss_dfs =
+ kmalloc(info_element->len, GFP_ATOMIC);
+ if (!network->ibss_dfs)
+ return 1;
+ memcpy(network->ibss_dfs, info_element->data,
+ info_element->len);
+ network->flags |= NETWORK_HAS_IBSS_DFS;
+ break;
+
+ case MFIE_TYPE_TPC_REPORT:
+ network->tpc_report.transmit_power =
+ info_element->data[0];
+ network->tpc_report.link_margin = info_element->data[1];
+ network->flags |= NETWORK_HAS_TPC_REPORT;
+ break;
default:
- IEEE80211_DEBUG_MGMT("unsupported IE %d\n",
- info_element->id);
+ IEEE80211_DEBUG_MGMT
+ ("Unsupported info element: %s (%d)\n",
+ get_info_element_string(info_element->id),
+ info_element->id);
break;
}
static int ieee80211_handle_assoc_resp(struct ieee80211_device *ieee, struct ieee80211_assoc_response
*frame, struct ieee80211_rx_stats *stats)
{
- struct ieee80211_network network_resp;
+ struct ieee80211_network network_resp = {
+ .ibss_dfs = NULL,
+ };
struct ieee80211_network *network = &network_resp;
struct net_device *dev = ieee->dev;
int qos_active;
u8 old_param;
+ ieee80211_network_reset(dst);
+ dst->ibss_dfs = src->ibss_dfs;
+
memcpy(&dst->stats, &src->stats, sizeof(struct ieee80211_rx_stats));
dst->capability = src->capability;
memcpy(dst->rates, src->rates, src->rates_len);
dst->listen_interval = src->listen_interval;
dst->atim_window = src->atim_window;
dst->erp_value = src->erp_value;
+ dst->tim = src->tim;
memcpy(dst->wpa_ie, src->wpa_ie, src->wpa_ie_len);
dst->wpa_ie_len = src->wpa_ie_len;
*stats)
{
struct net_device *dev = ieee->dev;
- struct ieee80211_network network;
+ struct ieee80211_network network = {
+ .ibss_dfs = NULL,
+ };
struct ieee80211_network *target;
struct ieee80211_network *oldest = NULL;
#ifdef CONFIG_IEEE80211_DEBUG
escape_essid(target->ssid,
target->ssid_len),
MAC_ARG(target->bssid));
+ ieee80211_network_reset(target);
} else {
/* Otherwise just pull from the free list */
target = list_entry(ieee->network_free_list.next,
"BEACON" : "PROBE RESPONSE");
#endif
memcpy(target, &network, sizeof(*target));
+ network.ibss_dfs = NULL;
list_add_tail(&target->list, &ieee->network_list);
} else {
IEEE80211_DEBUG_SCAN("Updating '%s' (" MAC_FMT ") via %s.\n",
frame_ctl)) ?
"BEACON" : "PROBE RESPONSE");
update_network(target, &network);
+ network.ibss_dfs = NULL;
}
spin_unlock_irqrestore(&ieee->lock, flags);
header);
break;
+ case IEEE80211_STYPE_ACTION:
+ IEEE80211_DEBUG_MGMT("ACTION\n");
+ if (ieee->handle_action)
+ ieee->handle_action(ieee->dev,
+ (struct ieee80211_action *)
+ header, stats);
+ break;
+
+ case IEEE80211_STYPE_REASSOC_REQ:
+ IEEE80211_DEBUG_MGMT("received reassoc (%d)\n",
+ WLAN_FC_GET_STYPE(le16_to_cpu
+ (header->frame_ctl)));
+
+ IEEE80211_WARNING("%s: IEEE80211_REASSOC_REQ received\n",
+ ieee->dev->name);
+ if (ieee->handle_reassoc_request != NULL)
+ ieee->handle_reassoc_request(ieee->dev,
+ (struct ieee80211_reassoc_request *)
+ header);
+ break;
+
+ case IEEE80211_STYPE_ASSOC_REQ:
+ IEEE80211_DEBUG_MGMT("received assoc (%d)\n",
+ WLAN_FC_GET_STYPE(le16_to_cpu
+ (header->frame_ctl)));
+
+ IEEE80211_WARNING("%s: IEEE80211_ASSOC_REQ received\n",
+ ieee->dev->name);
+ if (ieee->handle_assoc_request != NULL)
+ ieee->handle_assoc_request(ieee->dev);
+ break;
+
case IEEE80211_STYPE_DEAUTH:
- printk("DEAUTH from AP\n");
+ IEEE80211_DEBUG_MGMT("DEAUTH\n");
if (ieee->handle_deauth != NULL)
- ieee->handle_deauth(ieee->dev, (struct ieee80211_auth *)
+ ieee->handle_deauth(ieee->dev,
+ (struct ieee80211_deauth *)
header);
break;
default:
`--------------------------------------------------| |------'
Total: 28 non-data bytes `----.----'
|
- .- 'Frame data' expands to <---------------------------'
+ .- 'Frame data' expands, if WEP enabled, to <----------'
+ |
+ V
+ ,-----------------------.
+Bytes | 4 | 0-2296 | 4 |
+ |-----|-----------|-----|
+Desc. | IV | Encrypted | ICV |
+ | | Packet | |
+ `-----| |-----'
+ `-----.-----'
+ |
+ .- 'Encrypted Packet' expands to
|
V
,---------------------------------------------------.
Desc. | SNAP | SNAP | Control |Eth Tunnel| Type | IP |
| DSAP | SSAP | | | | Packet |
| 0xAA | 0xAA |0x03 (UI)|0x00-00-F8| | |
- `-----------------------------------------| |
-Total: 8 non-data bytes `----.----'
- |
- .- 'IP Packet' expands, if WEP enabled, to <--'
- |
- V
- ,-----------------------.
-Bytes | 4 | 0-2296 | 4 |
- |-----|-----------|-----|
-Desc. | IV | Encrypted | ICV |
- | | IP Packet | |
- `-----------------------'
+ `----------------------------------------------------
Total: 8 non-data bytes
802.3 Ethernet Data Frame
atomic_inc(&crypt->refcnt);
if (crypt->ops->build_iv)
crypt->ops->build_iv(skb_frag, hdr_len,
- crypt->priv);
+ ieee->sec.keys[ieee->sec.active_key],
+ ieee->sec.key_sizes[ieee->sec.active_key],
+ crypt->priv);
atomic_dec(&crypt->refcnt);
}
iwe.u.qual.updated |= IW_QUAL_QUAL_INVALID |
IW_QUAL_LEVEL_INVALID;
iwe.u.qual.qual = 0;
- iwe.u.qual.level = 0;
} else {
- iwe.u.qual.level = network->stats.rssi;
if (ieee->perfect_rssi == ieee->worst_rssi)
iwe.u.qual.qual = 100;
else
iwe.u.qual.noise = network->stats.noise;
}
+ if (!(network->stats.mask & IEEE80211_STATMASK_SIGNAL)) {
+ iwe.u.qual.updated |= IW_QUAL_LEVEL_INVALID;
+ iwe.u.qual.level = 0;
+ } else {
+ iwe.u.qual.level = network->stats.signal;
+ }
+
start = iwe_stream_add_event(start, stop, &iwe, IW_EV_QUAL_LEN);
iwe.cmd = IWEVCUSTOM;
if (iwe.u.data.length)
start = iwe_stream_add_point(start, stop, &iwe, custom);
+ /* Add spectrum management information */
+ iwe.cmd = -1;
+ p = custom;
+ p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), " Channel flags: ");
+
+ if (ieee80211_get_channel_flags(ieee, network->channel) &
+ IEEE80211_CH_INVALID) {
+ iwe.cmd = IWEVCUSTOM;
+ p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), "INVALID ");
+ }
+
+ if (ieee80211_get_channel_flags(ieee, network->channel) &
+ IEEE80211_CH_RADAR_DETECT) {
+ iwe.cmd = IWEVCUSTOM;
+ p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), "DFS ");
+ }
+
+ if (iwe.cmd == IWEVCUSTOM) {
+ iwe.u.data.length = p - custom;
+ start = iwe_stream_add_point(start, stop, &iwe, custom);
+ }
+
return start;
}
return 0;
}
+int ieee80211_wx_set_auth(struct net_device *dev,
+ struct iw_request_info *info,
+ union iwreq_data *wrqu,
+ char *extra)
+{
+ struct ieee80211_device *ieee = netdev_priv(dev);
+ unsigned long flags;
+ int err = 0;
+
+ spin_lock_irqsave(&ieee->lock, flags);
+
+ switch (wrqu->param.flags & IW_AUTH_INDEX) {
+ case IW_AUTH_WPA_VERSION:
+ case IW_AUTH_CIPHER_PAIRWISE:
+ case IW_AUTH_CIPHER_GROUP:
+ case IW_AUTH_KEY_MGMT:
+ /*
+ * Host AP driver does not use these parameters and allows
+ * wpa_supplicant to control them internally.
+ */
+ break;
+ case IW_AUTH_TKIP_COUNTERMEASURES:
+ break; /* FIXME */
+ case IW_AUTH_DROP_UNENCRYPTED:
+ ieee->drop_unencrypted = !!wrqu->param.value;
+ break;
+ case IW_AUTH_80211_AUTH_ALG:
+ break; /* FIXME */
+ case IW_AUTH_WPA_ENABLED:
+ ieee->privacy_invoked = ieee->wpa_enabled = !!wrqu->param.value;
+ break;
+ case IW_AUTH_RX_UNENCRYPTED_EAPOL:
+ ieee->ieee802_1x = !!wrqu->param.value;
+ break;
+ case IW_AUTH_PRIVACY_INVOKED:
+ ieee->privacy_invoked = !!wrqu->param.value;
+ break;
+ default:
+ err = -EOPNOTSUPP;
+ break;
+ }
+ spin_unlock_irqrestore(&ieee->lock, flags);
+ return err;
+}
+
+int ieee80211_wx_get_auth(struct net_device *dev,
+ struct iw_request_info *info,
+ union iwreq_data *wrqu,
+ char *extra)
+{
+ struct ieee80211_device *ieee = netdev_priv(dev);
+ unsigned long flags;
+ int err = 0;
+
+ spin_lock_irqsave(&ieee->lock, flags);
+
+ switch (wrqu->param.flags & IW_AUTH_INDEX) {
+ case IW_AUTH_WPA_VERSION:
+ case IW_AUTH_CIPHER_PAIRWISE:
+ case IW_AUTH_CIPHER_GROUP:
+ case IW_AUTH_KEY_MGMT:
+ case IW_AUTH_TKIP_COUNTERMEASURES: /* FIXME */
+ case IW_AUTH_80211_AUTH_ALG: /* FIXME */
+ /*
+ * Host AP driver does not use these parameters and allows
+ * wpa_supplicant to control them internally.
+ */
+ err = -EOPNOTSUPP;
+ break;
+ case IW_AUTH_DROP_UNENCRYPTED:
+ wrqu->param.value = ieee->drop_unencrypted;
+ break;
+ case IW_AUTH_WPA_ENABLED:
+ wrqu->param.value = ieee->wpa_enabled;
+ break;
+ case IW_AUTH_RX_UNENCRYPTED_EAPOL:
+ wrqu->param.value = ieee->ieee802_1x;
+ break;
+ default:
+ err = -EOPNOTSUPP;
+ break;
+ }
+ spin_unlock_irqrestore(&ieee->lock, flags);
+ return err;
+}
+
EXPORT_SYMBOL(ieee80211_wx_set_encodeext);
EXPORT_SYMBOL(ieee80211_wx_get_encodeext);
EXPORT_SYMBOL(ieee80211_wx_get_scan);
EXPORT_SYMBOL(ieee80211_wx_set_encode);
EXPORT_SYMBOL(ieee80211_wx_get_encode);
+
+EXPORT_SYMBOL_GPL(ieee80211_wx_set_auth);
+EXPORT_SYMBOL_GPL(ieee80211_wx_get_auth);
#include <linux/compat.h>
#include <linux/kmod.h>
#include <linux/audit.h>
-
-#ifdef CONFIG_NET_RADIO
-#include <linux/wireless.h> /* Note : will define WIRELESS_EXT */
-#endif /* CONFIG_NET_RADIO */
+#include <linux/wireless.h>
#include <asm/uaccess.h>
#include <asm/unistd.h>
if (cmd >= SIOCDEVPRIVATE && cmd <= (SIOCDEVPRIVATE + 15)) {
err = dev_ioctl(cmd, argp);
} else
-#ifdef WIRELESS_EXT
+#ifdef CONFIG_WIRELESS_EXT
if (cmd >= SIOCIWFIRST && cmd <= SIOCIWLAST) {
err = dev_ioctl(cmd, argp);
} else
-#endif /* WIRELESS_EXT */
+#endif /* CONFIG_WIRELESS_EXT */
switch (cmd) {
case FIOSETOWN:
case SIOCSPGRP:
git.samba.org / sfrench / cifs-2.6.git / commitdiff