mmc: renesas_sdhi_internal_dmac: mask DMAC interrupts
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Wed, 22 Aug 2018 18:22:26 +0000 (21:22 +0300)
committerUlf Hansson <ulf.hansson@linaro.org>
Thu, 23 Aug 2018 08:00:49 +0000 (10:00 +0200)
I have encountered an interrupt storm during the eMMC chip probing (and
the chip finally didn't get detected).  It turned out that U-Boot left
the SDHI DMA interrupts enabled while the Linux driver didn't use those.
Masking those interrupts in renesas_sdhi_internal_dmac_request_dma() gets
rid of both issues...

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Fixes: 2a68ea7896e3 ("mmc: renesas-sdhi: add support for R-Car Gen3 SDHI DMAC")
Cc: stable@vger.kernel.org # v4.14+
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/renesas_sdhi_internal_dmac.c

index f16677f424b93a0167ed33b10845d731d5e61593..ca0b43973769c9f80b4771914b5b74016b54bf84 100644 (file)
 
 /* DM_CM_INFO1 and DM_CM_INFO1_MASK */
 #define INFO1_CLEAR            0
+#define INFO1_MASK_CLEAR       GENMASK_ULL(31, 0)
 #define INFO1_DTRANEND1                BIT(17)
 #define INFO1_DTRANEND0                BIT(16)
 
 /* DM_CM_INFO2 and DM_CM_INFO2_MASK */
+#define INFO2_MASK_CLEAR       GENMASK_ULL(31, 0)
 #define INFO2_DTRANERR1                BIT(17)
 #define INFO2_DTRANERR0                BIT(16)
 
@@ -252,6 +254,12 @@ renesas_sdhi_internal_dmac_request_dma(struct tmio_mmc_host *host,
 {
        struct renesas_sdhi *priv = host_to_priv(host);
 
+       /* Disable DMAC interrupts, we don't use them */
+       renesas_sdhi_internal_dmac_dm_write(host, DM_CM_INFO1_MASK,
+                                           INFO1_MASK_CLEAR);
+       renesas_sdhi_internal_dmac_dm_write(host, DM_CM_INFO2_MASK,
+                                           INFO2_MASK_CLEAR);
+
        /* Each value is set to non-zero to assume "enabling" each DMA */
        host->chan_rx = host->chan_tx = (void *)0xdeadbeaf;