Merge branch 'misc' into devel
authorRussell King <rmk+kernel@arm.linux.org.uk>
Sat, 31 Jul 2010 13:20:02 +0000 (14:20 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Sat, 31 Jul 2010 13:20:02 +0000 (14:20 +0100)
Conflicts:
arch/arm/mm/init.c

528 files changed:
Documentation/00-INDEX
Documentation/bus-virt-phys-mapping.txt [moved from Documentation/IO-mapping.txt with 100% similarity]
Documentation/feature-removal-schedule.txt
Documentation/kernel-parameters.txt
MAINTAINERS
Makefile
arch/arm/Kconfig
arch/arm/Makefile
arch/arm/boot/compressed/Makefile
arch/arm/boot/compressed/head-l7200.S [deleted file]
arch/arm/common/gic.c
arch/arm/common/sa1111.c
arch/arm/configs/lusl7200_defconfig [deleted file]
arch/arm/include/asm/kexec.h
arch/arm/include/asm/mach/arch.h
arch/arm/include/asm/memblock.h [new file with mode: 0644]
arch/arm/include/asm/memory.h
arch/arm/include/asm/mmzone.h [deleted file]
arch/arm/include/asm/setup.h
arch/arm/kernel/Makefile
arch/arm/kernel/crash_dump.c [new file with mode: 0644]
arch/arm/kernel/machine_kexec.c
arch/arm/kernel/relocate_kernel.S
arch/arm/kernel/setup.c
arch/arm/lib/Makefile
arch/arm/mach-aaec2000/include/mach/memory.h
arch/arm/mach-at91/Kconfig
arch/arm/mach-at91/Makefile
arch/arm/mach-at91/at91sam9g45.c
arch/arm/mach-at91/board-sam9g20ek-2slot-mmc.c
arch/arm/mach-at91/board-sam9g20ek.c
arch/arm/mach-at91/board-snapper9260.c [new file with mode: 0644]
arch/arm/mach-at91/include/mach/at91cap9.h
arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h
arch/arm/mach-at91/include/mach/at91sam9260.h
arch/arm/mach-at91/include/mach/at91sam9261.h
arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h [new file with mode: 0644]
arch/arm/mach-at91/include/mach/at91sam9_sdramc.h
arch/arm/mach-at91/include/mach/at91sam9rl.h
arch/arm/mach-at91/include/mach/board.h
arch/arm/mach-at91/include/mach/cpu.h
arch/arm/mach-at91/include/mach/gpio.h
arch/arm/mach-at91/pm.h
arch/arm/mach-at91/pm_slowclock.S
arch/arm/mach-bcmring/core.c
arch/arm/mach-clps711x/Kconfig
arch/arm/mach-clps711x/clep7312.c
arch/arm/mach-clps711x/edb7211-arch.c
arch/arm/mach-clps711x/fortunet.c
arch/arm/mach-clps711x/include/mach/debug-macro.S
arch/arm/mach-clps711x/include/mach/memory.h
arch/arm/mach-davinci/board-da850-evm.c
arch/arm/mach-davinci/include/mach/memory.h
arch/arm/mach-ep93xx/adssphere.c
arch/arm/mach-ep93xx/clock.c
arch/arm/mach-ep93xx/core.c
arch/arm/mach-ep93xx/edb93xx.c
arch/arm/mach-ep93xx/gesbc9312.c
arch/arm/mach-ep93xx/include/mach/platform.h
arch/arm/mach-ep93xx/micro9.c
arch/arm/mach-ep93xx/simone.c
arch/arm/mach-ep93xx/ts72xx.c
arch/arm/mach-footbridge/common.c
arch/arm/mach-h720x/include/mach/debug-macro.S
arch/arm/mach-integrator/common.h [new file with mode: 0644]
arch/arm/mach-integrator/core.c
arch/arm/mach-integrator/integrator_ap.c
arch/arm/mach-integrator/integrator_cp.c
arch/arm/mach-iop13xx/include/mach/memory.h
arch/arm/mach-ixp4xx/common-pci.c
arch/arm/mach-ixp4xx/include/mach/memory.h
arch/arm/mach-kirkwood/tsx1x-common.c
arch/arm/mach-kirkwood/tsx1x-common.h
arch/arm/mach-l7200/Makefile [deleted file]
arch/arm/mach-l7200/Makefile.boot [deleted file]
arch/arm/mach-l7200/core.c [deleted file]
arch/arm/mach-l7200/include/mach/aux_reg.h [deleted file]
arch/arm/mach-l7200/include/mach/debug-macro.S [deleted file]
arch/arm/mach-l7200/include/mach/entry-macro.S [deleted file]
arch/arm/mach-l7200/include/mach/gp_timers.h [deleted file]
arch/arm/mach-l7200/include/mach/gpio.h [deleted file]
arch/arm/mach-l7200/include/mach/hardware.h [deleted file]
arch/arm/mach-l7200/include/mach/io.h [deleted file]
arch/arm/mach-l7200/include/mach/irqs.h [deleted file]
arch/arm/mach-l7200/include/mach/memory.h [deleted file]
arch/arm/mach-l7200/include/mach/pmpcon.h [deleted file]
arch/arm/mach-l7200/include/mach/pmu.h [deleted file]
arch/arm/mach-l7200/include/mach/serial.h [deleted file]
arch/arm/mach-l7200/include/mach/serial_l7200.h [deleted file]
arch/arm/mach-l7200/include/mach/sib.h [deleted file]
arch/arm/mach-l7200/include/mach/sys-clock.h [deleted file]
arch/arm/mach-l7200/include/mach/system.h [deleted file]
arch/arm/mach-l7200/include/mach/time.h [deleted file]
arch/arm/mach-l7200/include/mach/timex.h [deleted file]
arch/arm/mach-l7200/include/mach/uncompress.h [deleted file]
arch/arm/mach-l7200/include/mach/vmalloc.h [deleted file]
arch/arm/mach-lh7a40x/include/mach/memory.h
arch/arm/mach-msm/board-trout.c
arch/arm/mach-nomadik/clock.c
arch/arm/mach-ns9xxx/include/mach/debug-macro.S
arch/arm/mach-ns9xxx/include/mach/uncompress.h
arch/arm/mach-omap1/board-ams-delta.c
arch/arm/mach-omap1/board-fsample.c
arch/arm/mach-omap1/board-generic.c
arch/arm/mach-omap1/board-h2.c
arch/arm/mach-omap1/board-h3.c
arch/arm/mach-omap1/board-htcherald.c
arch/arm/mach-omap1/board-innovator.c
arch/arm/mach-omap1/board-nokia770.c
arch/arm/mach-omap1/board-osk.c
arch/arm/mach-omap1/board-palmte.c
arch/arm/mach-omap1/board-palmtt.c
arch/arm/mach-omap1/board-palmz71.c
arch/arm/mach-omap1/board-perseus2.c
arch/arm/mach-omap1/board-sx1.c
arch/arm/mach-omap1/board-voiceblue.c
arch/arm/mach-omap1/io.c
arch/arm/mach-omap2/board-2430sdp.c
arch/arm/mach-omap2/board-3430sdp.c
arch/arm/mach-omap2/board-3630sdp.c
arch/arm/mach-omap2/board-4430sdp.c
arch/arm/mach-omap2/board-am3517evm.c
arch/arm/mach-omap2/board-apollon.c
arch/arm/mach-omap2/board-cm-t35.c
arch/arm/mach-omap2/board-devkit8000.c
arch/arm/mach-omap2/board-generic.c
arch/arm/mach-omap2/board-h4.c
arch/arm/mach-omap2/board-igep0020.c
arch/arm/mach-omap2/board-ldp.c
arch/arm/mach-omap2/board-n8x0.c
arch/arm/mach-omap2/board-omap3beagle.c
arch/arm/mach-omap2/board-omap3evm.c
arch/arm/mach-omap2/board-omap3pandora.c
arch/arm/mach-omap2/board-omap3touchbook.c
arch/arm/mach-omap2/board-overo.c
arch/arm/mach-omap2/board-rx51-peripherals.c
arch/arm/mach-omap2/board-rx51.c
arch/arm/mach-omap2/board-zoom2.c
arch/arm/mach-omap2/board-zoom3.c
arch/arm/mach-omap2/clock3xxx_data.c
arch/arm/mach-omap2/io.c
arch/arm/mach-pxa/cm-x2xx-pci.c
arch/arm/mach-pxa/colibri-pxa300.c
arch/arm/mach-pxa/corgi.c
arch/arm/mach-pxa/cpufreq-pxa2xx.c
arch/arm/mach-pxa/eseries.c
arch/arm/mach-pxa/generic.h
arch/arm/mach-pxa/include/mach/memory.h
arch/arm/mach-pxa/palmt5.c
arch/arm/mach-pxa/palmtreo.c
arch/arm/mach-pxa/poodle.c
arch/arm/mach-pxa/pxa27x.c
arch/arm/mach-pxa/spitz.c
arch/arm/mach-pxa/tosa.c
arch/arm/mach-realview/core.c
arch/arm/mach-realview/include/mach/board-pb1176.h
arch/arm/mach-realview/include/mach/irqs-pb1176.h
arch/arm/mach-realview/include/mach/memory.h
arch/arm/mach-realview/realview_eb.c
arch/arm/mach-realview/realview_pb1176.c
arch/arm/mach-realview/realview_pb11mp.c
arch/arm/mach-realview/realview_pba8.c
arch/arm/mach-realview/realview_pbx.c
arch/arm/mach-s3c2410/mach-h1940.c
arch/arm/mach-s3c2412/mach-smdk2413.c
arch/arm/mach-s3c2412/mach-vstms.c
arch/arm/mach-s3c2440/mach-rx1950.c
arch/arm/mach-s3c2440/mach-rx3715.c
arch/arm/mach-sa1100/generic.h
arch/arm/mach-sa1100/include/mach/memory.h
arch/arm/mach-shark/include/mach/debug-macro.S
arch/arm/mach-shark/include/mach/memory.h
arch/arm/mach-shmobile/Kconfig
arch/arm/mach-shmobile/include/mach/irqs.h
arch/arm/mach-spear3xx/clock.c
arch/arm/mach-spear6xx/clock.c
arch/arm/mach-u300/clock.c
arch/arm/mach-u300/u300.c
arch/arm/mach-ux500/board-mop500.c
arch/arm/mach-ux500/clock.c
arch/arm/mach-ux500/devices-db8500.c
arch/arm/mach-ux500/include/mach/irqs-board-mop500.h [new file with mode: 0644]
arch/arm/mach-ux500/include/mach/irqs-db5500.h [new file with mode: 0644]
arch/arm/mach-ux500/include/mach/irqs-db8500.h [new file with mode: 0644]
arch/arm/mach-ux500/include/mach/irqs.h
arch/arm/mach-ux500/pins-db8500.h [new file with mode: 0644]
arch/arm/mach-versatile/core.c
arch/arm/mach-versatile/pci.c
arch/arm/mach-vexpress/ct-ca9x4.c
arch/arm/mach-vexpress/include/mach/ct-ca9x4.h
arch/arm/mach-vexpress/v2m.c
arch/arm/mach-w90x900/cpu.c
arch/arm/mach-w90x900/dev.c
arch/arm/mach-w90x900/include/mach/regs-gcr.h [new file with mode: 0644]
arch/arm/mach-w90x900/mach-nuc950evb.c
arch/arm/mach-w90x900/nuc910.c
arch/arm/mach-w90x900/nuc950.c
arch/arm/mm/Makefile
arch/arm/mm/discontig.c [deleted file]
arch/arm/mm/init.c
arch/arm/mm/mm.h
arch/arm/mm/mmu.c
arch/arm/mm/nommu.c
arch/arm/plat-iop/time.c
arch/arm/plat-nomadik/gpio.c
arch/arm/plat-nomadik/include/plat/gpio.h
arch/arm/plat-nomadik/include/plat/mtu.h
arch/arm/plat-nomadik/include/plat/pincfg.h [new file with mode: 0644]
arch/arm/plat-nomadik/timer.c
arch/arm/plat-omap/common.c
arch/arm/plat-omap/fb.c
arch/arm/plat-omap/include/plat/common.h
arch/arm/plat-omap/include/plat/vram.h
arch/arm/plat-spear/include/plat/debug-macro.S
arch/arm/plat-spear/time.c
arch/arm/plat-versatile/Makefile
arch/arm/plat-versatile/leds.c [new file with mode: 0644]
arch/avr32/include/asm/ioctls.h
arch/avr32/mach-at32ap/include/mach/board.h
arch/mips/alchemy/common/platform.c
arch/mips/alchemy/mtx-1/board_setup.c
arch/mips/bcm63xx/dev-enet.c
arch/mips/include/asm/atomic.h
arch/mips/include/asm/unistd.h
arch/mips/kernel/scall64-n32.S
arch/mips/kernel/vdso.c
arch/mips/mti-malta/malta-pci.c
arch/mips/nxp/pnx8550/common/pci.c
arch/mips/nxp/pnx8550/common/setup.c
arch/mips/pci/ops-pmcmsp.c
arch/mips/pci/pci-yosemite.c
arch/mips/powertv/asic/asic_devices.c
arch/powerpc/include/asm/kexec.h
arch/powerpc/include/asm/mmu-hash64.h
arch/powerpc/kernel/perf_event_fsl_emb.c
arch/powerpc/kernel/prom.c
arch/powerpc/mm/hash_low_64.S
arch/powerpc/mm/hash_utils_64.c
arch/powerpc/mm/hugetlbpage-hash64.c
arch/powerpc/mm/numa.c
arch/powerpc/platforms/pseries/hotplug-memory.c
arch/sparc/configs/sparc64_defconfig
arch/sparc/include/asm/cache.h
arch/sparc/include/asm/pgtable_32.h
arch/sparc/kernel/perf_event.c
arch/sparc/kernel/sun4d_irq.c
arch/sparc/kernel/ttable.S
arch/sparc/mm/srmmu.c
arch/sparc/mm/sun4c.c
arch/x86/kernel/acpi/cstate.c
arch/x86/kernel/acpi/sleep.c
arch/x86/kernel/apic/apic.c
arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
arch/x86/kernel/cpu/cpufreq/powernow-k8.c
arch/x86/kernel/early-quirks.c
arch/x86/kernel/entry_64.S
arch/x86/kernel/hpet.c
arch/x86/kernel/i8259.c
arch/x86/kernel/kgdb.c
arch/x86/kernel/kprobes.c
arch/x86/kernel/quirks.c
arch/x86/kernel/setup_percpu.c
arch/x86/kvm/mmu.c
arch/x86/kvm/paging_tmpl.h
arch/x86/kvm/x86.c
arch/x86/pci/i386.c
arch/x86/pci/mrst.c
crypto/ablkcipher.c
drivers/acpi/acpica/evxfevnt.c
drivers/acpi/battery.c
drivers/acpi/blacklist.c
drivers/acpi/processor_core.c
drivers/acpi/processor_idle.c
drivers/acpi/sleep.c
drivers/amba/bus.c
drivers/base/core.c
drivers/char/agp/intel-gtt.c
drivers/char/sysrq.c
drivers/char/tpm/tpm_tis.c
drivers/clocksource/cs5535-clockevt.c
drivers/cpufreq/cpufreq.c
drivers/crypto/talitos.c
drivers/edac/Kconfig
drivers/edac/i7core_edac.c
drivers/edac/mpc85xx_edac.c
drivers/gpio/cs5535-gpio.c
drivers/gpio/gpiolib.c
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/i915_dma.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_fb.c
drivers/gpu/drm/i915/intel_lvds.c
drivers/gpu/drm/nouveau/nouveau_bios.c
drivers/gpu/drm/nouveau/nouveau_fbcon.c
drivers/gpu/drm/radeon/evergreen_cs.c
drivers/gpu/drm/radeon/r100.c
drivers/gpu/drm/radeon/r300.c
drivers/gpu/drm/radeon/r520.c
drivers/gpu/drm/radeon/r600.c
drivers/gpu/drm/radeon/r600_blit.c
drivers/gpu/drm/radeon/r600_cs.c
drivers/gpu/drm/radeon/radeon.h
drivers/gpu/drm/radeon/radeon_atombios.c
drivers/gpu/drm/radeon/radeon_combios.c
drivers/gpu/drm/radeon/radeon_connectors.c
drivers/gpu/drm/radeon/radeon_device.c
drivers/gpu/drm/radeon/radeon_kms.c
drivers/gpu/drm/radeon/radeon_legacy_encoders.c
drivers/gpu/drm/radeon/radeon_legacy_tv.c
drivers/gpu/drm/radeon/rs400.c
drivers/gpu/drm/radeon/rs600.c
drivers/gpu/drm/radeon/rs690.c
drivers/gpu/drm/radeon/rv515.c
drivers/gpu/drm/ttm/ttm_page_alloc.c
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
drivers/input/joystick/gamecon.c
drivers/input/keyboard/Kconfig
drivers/input/keyboard/twl4030_keypad.c
drivers/input/keyboard/w90p910_keypad.c
drivers/input/mouse/synaptics.c
drivers/input/mouse/synaptics.h
drivers/input/serio/i8042-x86ia64io.h
drivers/input/touchscreen/w90p910_ts.c
drivers/misc/Kconfig
drivers/misc/Makefile
drivers/misc/arm-charlcd.c [new file with mode: 0644]
drivers/misc/cs5535-mfgpt.c
drivers/mmc/host/sdhci-s3c.c
drivers/net/bnx2x.h
drivers/net/bnx2x_main.c
drivers/net/bonding/bond_alb.c
drivers/net/declance.c
drivers/net/ibmveth.c
drivers/net/igb/igb_main.c
drivers/net/ixgbe/ixgbe_main.c
drivers/net/macvlan.c
drivers/net/macvtap.c
drivers/net/pcmcia/axnet_cs.c
drivers/net/r8169.c
drivers/net/s2io.h
drivers/net/tun.c
drivers/net/wimax/i2400m/i2400m-usb.h
drivers/net/wimax/i2400m/usb.c
drivers/net/wireless/ath/ath9k/hif_usb.c
drivers/net/wireless/ath/ath9k/recv.c
drivers/net/wireless/hostap/hostap_pci.c
drivers/net/wireless/iwlwifi/iwl-sta.h
drivers/net/wireless/rt2x00/rt2x00dev.c
drivers/pci/setup-res.c
drivers/pcmcia/pcmcia_resource.c
drivers/pcmcia/pxa2xx_base.c
drivers/platform/x86/intel_scu_ipc.c
drivers/power/ds2782_battery.c
drivers/regulator/ab3100.c
drivers/regulator/tps6507x-regulator.c
drivers/regulator/wm8350-regulator.c
drivers/rtc/rtc-rx8581.c
drivers/s390/block/dasd_devmap.c
drivers/s390/cio/chsc.c
drivers/s390/scsi/zfcp_erp.c
drivers/s390/scsi/zfcp_fsf.c
drivers/s390/scsi/zfcp_qdio.c
drivers/sbus/char/openprom.c
drivers/scsi/ibmvscsi/rpa_vscsi.c
drivers/scsi/ipr.c
drivers/scsi/ipr.h
drivers/serial/atmel_serial.c
drivers/serial/suncore.c
drivers/serial/sunsu.c
drivers/usb/class/cdc-acm.c
drivers/usb/core/hub.c
drivers/usb/core/quirks.c
drivers/usb/gadget/at91_udc.c
drivers/usb/gadget/at91_udc.h
drivers/usb/gadget/f_fs.c
drivers/usb/gadget/pxa27x_udc.c
drivers/usb/gadget/s3c2410_udc.c
drivers/usb/host/ohci-pxa27x.c
drivers/usb/host/xhci-mem.c
drivers/usb/host/xhci-ring.c
drivers/usb/host/xhci.c
drivers/usb/host/xhci.h
drivers/usb/misc/sisusbvga/sisusb.c
drivers/usb/musb/tusb6010.c
drivers/usb/serial/ftdi_sio.c
drivers/usb/serial/ftdi_sio_ids.h
drivers/usb/serial/option.c
drivers/usb/serial/qcserial.c
drivers/usb/serial/sierra.c
drivers/usb/storage/transport.c
drivers/vhost/net.c
drivers/video/aty/radeon_pm.c
drivers/video/au1100fb.c
drivers/video/gbefb.c
drivers/video/omap2/vram.c
drivers/video/pmag-ba-fb.c
drivers/video/pmagb-b-fb.c
drivers/virtio/virtio_ring.c
fs/9p/vfs_dir.c
fs/btrfs/ctree.c
fs/btrfs/ioctl.c
fs/ceph/Kconfig
fs/ceph/auth_x.c
fs/ceph/caps.c
fs/ceph/dir.c
fs/ceph/file.c
fs/ceph/inode.c
fs/ceph/mds_client.c
fs/ceph/mds_client.h
fs/ceph/messenger.c
fs/ceph/mon_client.c
fs/ceph/osd_client.c
fs/ceph/osdmap.c
fs/cifs/cifsfs.c
fs/cifs/dns_resolve.c
fs/cifs/dns_resolve.h
fs/dcache.c
fs/ecryptfs/messaging.c
fs/gfs2/bmap.c
fs/gfs2/dir.c
fs/gfs2/glock.c
fs/gfs2/inode.c
fs/gfs2/quota.c
fs/gfs2/quota.h
fs/inode.c
fs/jbd2/journal.c
fs/jbd2/transaction.c
fs/jffs2/xattr.c
fs/mbcache.c
fs/nfs/dir.c
fs/nfs/internal.h
fs/ocfs2/aops.c
fs/ocfs2/dlm/dlmdomain.c
fs/ocfs2/dlm/dlmmaster.c
fs/ocfs2/dlm/dlmrecovery.c
fs/ocfs2/file.c
fs/ocfs2/file.h
fs/ocfs2/journal.c
fs/ocfs2/localalloc.c
fs/ocfs2/quota_global.c
fs/ocfs2/quota_local.c
fs/ocfs2/refcounttree.c
fs/ocfs2/suballoc.c
fs/ocfs2/xattr.c
fs/partitions/ibm.c
fs/quota/dquot.c
fs/sysfs/symlink.c
fs/ubifs/shrinker.c
fs/ubifs/ubifs.h
fs/xfs/linux-2.6/xfs_buf.c
fs/xfs/linux-2.6/xfs_super.c
fs/xfs/linux-2.6/xfs_sync.c
fs/xfs/linux-2.6/xfs_sync.h
fs/xfs/linux-2.6/xfs_trace.h
fs/xfs/quota/xfs_qm.c
fs/xfs/xfs_mount.h
include/acpi/processor.h
include/asm-generic/vmlinux.lds.h
include/linux/acpi.h
include/linux/amba/bus.h
include/linux/fb.h
include/linux/fdtable.h
include/linux/i8042.h
include/linux/if_macvlan.h
include/linux/jbd2.h
include/linux/mm.h
include/linux/omapfb.h
include/linux/pci.h
include/linux/regulator/tps6507x.h [new file with mode: 0644]
include/linux/syscalls.h
include/linux/sysrq.h
include/linux/vgaarb.h
include/math-emu/op-common.h
include/net/sock.h
include/net/tc_act/tc_mirred.h
ipc/sem.c
kernel/debug/debug_core.c
kernel/debug/gdbstub.c
kernel/debug/kdb/kdb_main.c
kernel/early_res.c
kernel/module.c
mm/bootmem.c
mm/page_alloc.c
mm/page_cgroup.c
mm/vmscan.c
net/bluetooth/hci_conn.c
net/bluetooth/hci_event.c
net/bluetooth/l2cap.c
net/bridge/br_device.c
net/bridge/br_forward.c
net/core/dev.c
net/core/neighbour.c
net/core/skbuff.c
net/dsa/Kconfig
net/ipv4/ipmr.c
net/ipv4/tcp.c
net/ipv4/tcp_output.c
net/ipv6/addrconf.c
net/ipv6/mip6.c
net/mac80211/cfg.c
net/phonet/pep.c
net/sched/act_mirred.c
net/sched/act_nat.c
net/sunrpc/auth.c
net/xfrm/xfrm_policy.c
scripts/kconfig/nconf.gui.c
scripts/package/Makefile
scripts/setlocalversion
sound/soc/au1x/psc-i2s.c
sound/soc/codecs/Kconfig
sound/soc/codecs/wm8727.c
sound/soc/codecs/wm8776.c
sound/soc/codecs/wm8988.c
sound/soc/sh/fsi.c
tools/perf/Makefile
tools/perf/arch/sparc/Makefile [new file with mode: 0644]
tools/perf/arch/sparc/util/dwarf-regs.c [new file with mode: 0644]
tools/perf/builtin-report.c
tools/perf/util/PERF-VERSION-GEN
tools/perf/util/callchain.c
tools/perf/util/callchain.h
tools/perf/util/hist.c
tools/perf/util/symbol.c

index dd10b51b4e652570df9a6575ac2df654bbaca15d..5405f7aecefc334b7d16c0f2764a8757e845ad43 100644 (file)
@@ -32,8 +32,6 @@ DocBook/
        - directory with DocBook templates etc. for kernel documentation.
 HOWTO
        - the process and procedures of how to do Linux kernel development.
-IO-mapping.txt
-       - how to access I/O mapped memory from within device drivers.
 IPMI.txt
        - info on Linux Intelligent Platform Management Interface (IPMI) Driver.
 IRQ-affinity.txt
@@ -84,6 +82,8 @@ blockdev/
        - info on block devices & drivers
 btmrvl.txt
        - info on Marvell Bluetooth driver usage.
+bus-virt-phys-mapping.txt
+       - how to access I/O mapped memory from within device drivers.
 cachetlb.txt
        - describes the cache/TLB flushing interfaces Linux uses.
 cdrom/
@@ -168,6 +168,8 @@ initrd.txt
        - how to use the RAM disk as an initial/temporary root filesystem.
 input/
        - info on Linux input device support.
+io-mapping.txt
+       - description of io_mapping functions in linux/io-mapping.h
 io_ordering.txt
        - info on ordering I/O writes to memory-mapped addresses.
 ioctl/
index c268783bc4e7c18c2e4db792c3fba83d6bc44c71..1571c0c83dba0b0876ea52e4ff85ff69a56dab87 100644 (file)
@@ -647,3 +647,10 @@ Who:       Stefan Richter <stefanr@s5r6.in-berlin.de>
 
 ----------------------------
 
+What:  The acpi_sleep=s4_nonvs command line option
+When:  2.6.37
+Files: arch/x86/kernel/acpi/sleep.c
+Why:   superseded by acpi_sleep=nonvs
+Who:   Rafael J. Wysocki <rjw@sisk.pl>
+
+----------------------------
index 4ddb58df081e360311e22cafe40273d3176de46d..2b2407d9a6d025a8451605b104a35daa7da59b47 100644 (file)
@@ -254,8 +254,8 @@ and is between 256 and 4096 characters. It is defined in the file
                        control method, with respect to putting devices into
                        low power states, to be enforced (the ACPI 2.0 ordering
                        of _PTS is used by default).
-                       s4_nonvs prevents the kernel from saving/restoring the
-                       ACPI NVS memory during hibernation.
+                       nonvs prevents the kernel from saving/restoring the
+                       ACPI NVS memory during suspend/hibernation and resume.
                        sci_force_enable causes the kernel to set SCI_EN directly
                        on resume from S1/S3 (which is against the ACPI spec,
                        but some broken systems don't work without it).
index 58848125b8bfadcc70f9b37ac68d77d6aee0794b..db3d0f5061f9c42e301e420878b0dc5cbe31e6e1 100644 (file)
@@ -5336,6 +5336,7 @@ T:        git git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6.git
 T:     git git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-next-2.6.git
 S:     Maintained
 F:     arch/sparc/
+F:     drivers/sbus
 
 SPARC SERIAL DRIVERS
 M:     "David S. Miller" <davem@davemloft.net>
index 037ff4e62ca0ac605c2d63cdaa1cda79220f3cb4..886bf04931d4aea56c26761b26898a8f393fb9ce 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1,7 +1,7 @@
 VERSION = 2
 PATCHLEVEL = 6
 SUBLEVEL = 35
-EXTRAVERSION = -rc5
+EXTRAVERSION = -rc6
 NAME = Sheep on Meth
 
 # *DOCUMENTATION*
index 157b08aa03663ed744c24ee49f60df9937de1995..ba1ac08b4e02175a4581d1ef49f55f9af0fa17a1 100644 (file)
@@ -10,6 +10,7 @@ config ARM
        default y
        select HAVE_AOUT
        select HAVE_IDE
+       select HAVE_MEMBLOCK
        select RTC_LIB
        select SYS_SUPPORTS_APM_EMULATION
        select GENERIC_ATOMIC64 if (!CPU_32v6K)
@@ -440,21 +441,6 @@ config ARCH_IXP4XX
        help
          Support for Intel's IXP4XX (XScale) family of processors.
 
-config ARCH_L7200
-       bool "LinkUp-L7200"
-       select CPU_ARM720T
-       select FIQ
-       select ARCH_USES_GETTIMEOFFSET
-       help
-         Say Y here if you intend to run this kernel on a LinkUp Systems
-         L7200 Software Development Board which uses an ARM720T processor.
-         Information on this board can be obtained at:
-
-         <http://www.linkupsys.com/>
-
-         If you have any questions or comments about the Linux kernel port
-         to this board, send e-mail to <sjhill@cotw.com>.
-
 config ARCH_DOVE
        bool "Marvell Dove"
        select PCI
@@ -720,7 +706,6 @@ config ARCH_SHARK
 config ARCH_LH7A40X
        bool "Sharp LH7A40X"
        select CPU_ARM922T
-       select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM
        select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
        select ARCH_USES_GETTIMEOFFSET
        help
@@ -1168,9 +1153,10 @@ config HOTPLUG_CPU
 config LOCAL_TIMERS
        bool "Use local timer interrupts"
        depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || \
-               REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || ARCH_U8500)
+               REALVIEW_EB_A9MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
+               ARCH_U8500 || ARCH_VEXPRESS_CA9X4)
        default y
-       select HAVE_ARM_TWD if (ARCH_REALVIEW || ARCH_OMAP4 || ARCH_U8500)
+       select HAVE_ARM_TWD if (ARCH_REALVIEW || ARCH_VEXPRESS || ARCH_OMAP4 || ARCH_U8500)
        help
          Enable support for local timers on SMP platforms, rather then the
          legacy IPI broadcast method.  Local timers allows the system
@@ -1181,10 +1167,10 @@ source kernel/Kconfig.preempt
 
 config HZ
        int
-       default 128 if ARCH_L7200
        default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PV210
        default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
        default AT91_TIMER_HZ if ARCH_AT91
+       default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
        default 100
 
 config THUMB2_KERNEL
@@ -1237,10 +1223,6 @@ config OABI_COMPAT
 config ARCH_HAS_HOLES_MEMORYMODEL
        bool
 
-# Discontigmem is deprecated
-config ARCH_DISCONTIGMEM_ENABLE
-       bool
-
 config ARCH_SPARSEMEM_ENABLE
        bool
 
@@ -1248,13 +1230,7 @@ config ARCH_SPARSEMEM_DEFAULT
        def_bool ARCH_SPARSEMEM_ENABLE
 
 config ARCH_SELECT_MEMORY_MODEL
-       def_bool ARCH_DISCONTIGMEM_ENABLE && ARCH_SPARSEMEM_ENABLE
-
-config NODES_SHIFT
-       int
-       default "4" if ARCH_LH7A40X
-       default "2"
-       depends on NEED_MULTIPLE_NODES
+       def_bool ARCH_SPARSEMEM_ENABLE
 
 config HIGHMEM
        bool "High Memory Support (EXPERIMENTAL)"
index 64ba313724d2377fda7e439e130d7ad69dd1a83c..bea37a2512e74b33cafdb63b1173969c95ee49dd 100644 (file)
@@ -139,7 +139,6 @@ machine-$(CONFIG_ARCH_IXP23XX)              := ixp23xx
 machine-$(CONFIG_ARCH_IXP4XX)          := ixp4xx
 machine-$(CONFIG_ARCH_KIRKWOOD)                := kirkwood
 machine-$(CONFIG_ARCH_KS8695)          := ks8695
-machine-$(CONFIG_ARCH_L7200)           := l7200
 machine-$(CONFIG_ARCH_LH7A40X)         := lh7a40x
 machine-$(CONFIG_ARCH_LOKI)            := loki
 machine-$(CONFIG_ARCH_MMP)             := mmp
index 53faa9063a035be790c3aef7c5f32c4f48eb8025..7a29301d516b34530df958847a36f45067447838 100644 (file)
@@ -19,10 +19,6 @@ ifeq ($(CONFIG_ARCH_SHARK),y)
 OBJS           += head-shark.o ofw-shark.o
 endif
 
-ifeq ($(CONFIG_ARCH_L7200),y)
-OBJS           += head-l7200.o
-endif
-
 ifeq ($(CONFIG_ARCH_P720T),y)
 # Borrow this code from SA1100
 OBJS           += head-sa1100.o
diff --git a/arch/arm/boot/compressed/head-l7200.S b/arch/arm/boot/compressed/head-l7200.S
deleted file mode 100644 (file)
index d0e3b20..0000000
+++ /dev/null
@@ -1,29 +0,0 @@
-/* 
- * linux/arch/arm/boot/compressed/head-l7200.S
- * 
- * Copyright (C) 2000 Steve Hill <sjhill@cotw.com>
- * 
- * Some code borrowed from Nicolas Pitre's 'head-sa1100.S' file. This
- * is merged with head.S by the linker.
- */
-
-#include <asm/mach-types.h>
-
-#ifndef CONFIG_ARCH_L7200
-#error What am I doing here...
-#endif
-
-               .section        ".start", "ax"
-
-__L7200_start:
-               mov     r0, #0x00100000         @ FLASH address of initrd
-               mov     r2, #0xf1000000         @ RAM address of initrd
-               add     r3, r2, #0x00700000     @ Size of initrd 
-1:
-               ldmia   r0!, {r4, r5, r6, r7}
-               stmia   r2!, {r4, r5, r6, r7}
-               cmp     r2, r3
-               ble     1b
-
-               mov     r8, #0                  @ Zero it out
-               mov     r7, #MACH_TYPE_L7200    @ Set architecture ID
index 337741f734ac08d7f438e5d6240293adf3c5c366..7dfa9a85bc0c875b11567025f68e92bd768d7419 100644 (file)
@@ -108,6 +108,51 @@ static void gic_unmask_irq(unsigned int irq)
        spin_unlock(&irq_controller_lock);
 }
 
+static int gic_set_type(unsigned int irq, unsigned int type)
+{
+       void __iomem *base = gic_dist_base(irq);
+       unsigned int gicirq = gic_irq(irq);
+       u32 enablemask = 1 << (gicirq % 32);
+       u32 enableoff = (gicirq / 32) * 4;
+       u32 confmask = 0x2 << ((gicirq % 16) * 2);
+       u32 confoff = (gicirq / 16) * 4;
+       bool enabled = false;
+       u32 val;
+
+       /* Interrupt configuration for SGIs can't be changed */
+       if (gicirq < 16)
+               return -EINVAL;
+
+       if (type != IRQ_TYPE_LEVEL_HIGH && type != IRQ_TYPE_EDGE_RISING)
+               return -EINVAL;
+
+       spin_lock(&irq_controller_lock);
+
+       val = readl(base + GIC_DIST_CONFIG + confoff);
+       if (type == IRQ_TYPE_LEVEL_HIGH)
+               val &= ~confmask;
+       else if (type == IRQ_TYPE_EDGE_RISING)
+               val |= confmask;
+
+       /*
+        * As recommended by the spec, disable the interrupt before changing
+        * the configuration
+        */
+       if (readl(base + GIC_DIST_ENABLE_SET + enableoff) & enablemask) {
+               writel(enablemask, base + GIC_DIST_ENABLE_CLEAR + enableoff);
+               enabled = true;
+       }
+
+       writel(val, base + GIC_DIST_CONFIG + confoff);
+
+       if (enabled)
+               writel(enablemask, base + GIC_DIST_ENABLE_SET + enableoff);
+
+       spin_unlock(&irq_controller_lock);
+
+       return 0;
+}
+
 #ifdef CONFIG_SMP
 static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
 {
@@ -161,6 +206,7 @@ static struct irq_chip gic_chip = {
        .ack            = gic_ack_irq,
        .mask           = gic_mask_irq,
        .unmask         = gic_unmask_irq,
+       .set_type       = gic_set_type,
 #ifdef CONFIG_SMP
        .set_affinity   = gic_set_cpu,
 #endif
index 6f80665f477e70b0acad4d6ead228295446863c3..ac2fd440652ee06a32a2c113468871c03538d2c4 100644 (file)
@@ -185,13 +185,10 @@ static struct sa1111_dev_info sa1111_devices[] = {
        },
 };
 
-void __init sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes)
+void __init sa1111_adjust_zones(unsigned long *size, unsigned long *holes)
 {
        unsigned int sz = SZ_1M >> PAGE_SHIFT;
 
-       if (node != 0)
-               sz = 0;
-
        size[1] = size[0] - sz;
        size[0] = sz;
 }
diff --git a/arch/arm/configs/lusl7200_defconfig b/arch/arm/configs/lusl7200_defconfig
deleted file mode 100644 (file)
index 816fc42..0000000
+++ /dev/null
@@ -1,23 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
-# CONFIG_HOTPLUG is not set
-CONFIG_MODULES=y
-CONFIG_ARCH_L7200=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_ZBOOT_ROM_TEXT=0x00010000
-CONFIG_ZBOOT_ROM_BSS=0xf03e0000
-CONFIG_ZBOOT_ROM=y
-CONFIG_CMDLINE="console=tty0 console=ttyLU1,115200 root=/dev/ram initrd=0xf1000000,0x005dac7b mem=32M"
-CONFIG_BINFMT_AOUT=y
-CONFIG_BLK_DEV_RAM=y
-# CONFIG_INPUT is not set
-# CONFIG_SERIO_SERPORT is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_NONSTANDARD=y
-CONFIG_EXT2_FS=y
-CONFIG_DEBUG_USER=y
-# CONFIG_CRC32 is not set
index df15a0dc228e23da027667d3a992658daadf2305..8ec9ef5c3c7be25a2705451e8aab0a8205a47e67 100644 (file)
 
 #ifndef __ASSEMBLY__
 
-struct kimage;
-/* Provide a dummy definition to avoid build failures. */
+/**
+ * crash_setup_regs() - save registers for the panic kernel
+ * @newregs: registers are saved here
+ * @oldregs: registers to be saved (may be %NULL)
+ *
+ * Function copies machine registers from @oldregs to @newregs. If @oldregs is
+ * %NULL then current registers are stored there.
+ */
 static inline void crash_setup_regs(struct pt_regs *newregs,
-                                        struct pt_regs *oldregs) { }
+                                   struct pt_regs *oldregs)
+{
+       if (oldregs) {
+               memcpy(newregs, oldregs, sizeof(*newregs));
+       } else {
+               __asm__ __volatile__ ("stmia %0, {r0 - r15}"
+                                     : : "r" (&newregs->ARM_r0));
+               __asm__ __volatile__ ("mrs %0, cpsr"
+                                     : "=r" (newregs->ARM_cpsr));
+       }
+}
 
 #endif /* __ASSEMBLY__ */
 
index 5ee6f85236a406a7aba2be14c98caf747c54fabc..8a0dd18ba6427301ed4b802739a390dec64d12c2 100644 (file)
@@ -38,6 +38,7 @@ struct machine_desc {
        void                    (*fixup)(struct machine_desc *,
                                         struct tag *, char **,
                                         struct meminfo *);
+       void                    (*reserve)(void);/* reserve mem blocks  */
        void                    (*map_io)(void);/* IO mapping function  */
        void                    (*init_irq)(void);
        struct sys_timer        *timer;         /* system tick timer    */
diff --git a/arch/arm/include/asm/memblock.h b/arch/arm/include/asm/memblock.h
new file mode 100644 (file)
index 0000000..fdbc43b
--- /dev/null
@@ -0,0 +1,16 @@
+#ifndef _ASM_ARM_MEMBLOCK_H
+#define _ASM_ARM_MEMBLOCK_H
+
+#ifdef CONFIG_MMU
+extern phys_addr_t lowmem_end_addr;
+#define MEMBLOCK_REAL_LIMIT    lowmem_end_addr
+#else
+#define MEMBLOCK_REAL_LIMIT    0
+#endif
+
+struct meminfo;
+struct machine_desc;
+
+extern void arm_memblock_init(struct meminfo *, struct machine_desc *);
+
+#endif
index ab08d977ad490399e976d81cab30477963cfca9d..23c2e8e5c0faaa09d81910456d4de63a96a513da 100644 (file)
 #endif
 
 #ifndef arch_adjust_zones
-#define arch_adjust_zones(node,size,holes) do { } while (0)
+#define arch_adjust_zones(size,holes) do { } while (0)
 #elif !defined(CONFIG_ZONE_DMA)
 #error "custom arch_adjust_zones() requires CONFIG_ZONE_DMA"
 #endif
@@ -243,76 +243,11 @@ static inline __deprecated void *bus_to_virt(unsigned long x)
  *  virt_to_page(k)    convert a _valid_ virtual address to struct page *
  *  virt_addr_valid(k) indicates whether a virtual address is valid
  */
-#ifndef CONFIG_DISCONTIGMEM
-
 #define ARCH_PFN_OFFSET                PHYS_PFN_OFFSET
 
 #define virt_to_page(kaddr)    pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
 #define virt_addr_valid(kaddr) ((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory)
 
-#define PHYS_TO_NID(addr)      (0)
-
-#else /* CONFIG_DISCONTIGMEM */
-
-/*
- * This is more complex.  We have a set of mem_map arrays spread
- * around in memory.
- */
-#include <linux/numa.h>
-
-#define arch_pfn_to_nid(pfn)   PFN_TO_NID(pfn)
-#define arch_local_page_offset(pfn, nid) LOCAL_MAP_NR((pfn) << PAGE_SHIFT)
-
-#define virt_to_page(kaddr)                                    \
-       (ADDR_TO_MAPBASE(kaddr) + LOCAL_MAP_NR(kaddr))
-
-#define virt_addr_valid(kaddr) (KVADDR_TO_NID(kaddr) < MAX_NUMNODES)
-
-/*
- * Common discontigmem stuff.
- *  PHYS_TO_NID is used by the ARM kernel/setup.c
- */
-#define PHYS_TO_NID(addr)      PFN_TO_NID((addr) >> PAGE_SHIFT)
-
-/*
- * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory
- * and returns the mem_map of that node.
- */
-#define ADDR_TO_MAPBASE(kaddr) NODE_MEM_MAP(KVADDR_TO_NID(kaddr))
-
-/*
- * Given a page frame number, find the owning node of the memory
- * and returns the mem_map of that node.
- */
-#define PFN_TO_MAPBASE(pfn)    NODE_MEM_MAP(PFN_TO_NID(pfn))
-
-#ifdef NODE_MEM_SIZE_BITS
-#define NODE_MEM_SIZE_MASK     ((1 << NODE_MEM_SIZE_BITS) - 1)
-
-/*
- * Given a kernel address, find the home node of the underlying memory.
- */
-#define KVADDR_TO_NID(addr) \
-       (((unsigned long)(addr) - PAGE_OFFSET) >> NODE_MEM_SIZE_BITS)
-
-/*
- * Given a page frame number, convert it to a node id.
- */
-#define PFN_TO_NID(pfn) \
-       (((pfn) - PHYS_PFN_OFFSET) >> (NODE_MEM_SIZE_BITS - PAGE_SHIFT))
-
-/*
- * Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory
- * and returns the index corresponding to the appropriate page in the
- * node's mem_map.
- */
-#define LOCAL_MAP_NR(addr) \
-       (((unsigned long)(addr) & NODE_MEM_SIZE_MASK) >> PAGE_SHIFT)
-
-#endif /* NODE_MEM_SIZE_BITS */
-
-#endif /* !CONFIG_DISCONTIGMEM */
-
 /*
  * Optional coherency support.  Currently used only by selected
  * Intel XSC3-based systems.
diff --git a/arch/arm/include/asm/mmzone.h b/arch/arm/include/asm/mmzone.h
deleted file mode 100644 (file)
index ae63a4f..0000000
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- *  arch/arm/include/asm/mmzone.h
- *
- *  1999-12-29 Nicolas Pitre           Created
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ASM_MMZONE_H
-#define __ASM_MMZONE_H
-
-/*
- * Currently defined in arch/arm/mm/discontig.c
- */
-extern pg_data_t discontig_node_data[];
-
-/*
- * Return a pointer to the node data for node n.
- */
-#define NODE_DATA(nid)         (&discontig_node_data[nid])
-
-/*
- * NODE_MEM_MAP gives the kaddr for the mem_map of the node.
- */
-#define NODE_MEM_MAP(nid)      (NODE_DATA(nid)->node_mem_map)
-
-#include <mach/memory.h>
-
-#endif
index f392fb4437afbd86b35807f16a152ab773df17f4..f1e5a9bca2491d982bda9fda1d40aa7b63b0cfd8 100644 (file)
@@ -201,8 +201,7 @@ static struct tagtable __tagtable_##fn __tag = { tag, fn }
 struct membank {
        unsigned long start;
        unsigned long size;
-       unsigned short node;
-       unsigned short highmem;
+       unsigned int highmem;
 };
 
 struct meminfo {
@@ -212,9 +211,8 @@ struct meminfo {
 
 extern struct meminfo meminfo;
 
-#define for_each_nodebank(iter,mi,no)                  \
-       for (iter = 0; iter < (mi)->nr_banks; iter++)   \
-               if ((mi)->bank[iter].node == no)
+#define for_each_bank(iter,mi)                         \
+       for (iter = 0; iter < (mi)->nr_banks; iter++)
 
 #define bank_pfn_start(bank)   __phys_to_pfn((bank)->start)
 #define bank_pfn_end(bank)     __phys_to_pfn((bank)->start + (bank)->size)
index 26d302c28e1318b4aa5db81a491fcd6a82b0e6fa..ea023c6aa31e55599b38470913c004a437c90666 100644 (file)
@@ -39,6 +39,7 @@ obj-$(CONFIG_ARM_THUMBEE)     += thumbee.o
 obj-$(CONFIG_KGDB)             += kgdb.o
 obj-$(CONFIG_ARM_UNWIND)       += unwind.o
 obj-$(CONFIG_HAVE_TCM)         += tcm.o
+obj-$(CONFIG_CRASH_DUMP)       += crash_dump.o
 
 obj-$(CONFIG_CRUNCH)           += crunch.o crunch-bits.o
 AFLAGS_crunch-bits.o           := -Wa,-mcpu=ep9312
diff --git a/arch/arm/kernel/crash_dump.c b/arch/arm/kernel/crash_dump.c
new file mode 100644 (file)
index 0000000..cd3b853
--- /dev/null
@@ -0,0 +1,60 @@
+/*
+ * arch/arm/kernel/crash_dump.c
+ *
+ * Copyright (C) 2010 Nokia Corporation.
+ * Author: Mika Westerberg
+ *
+ * This code is taken from arch/x86/kernel/crash_dump_64.c
+ *   Created by: Hariprasad Nellitheertha (hari@in.ibm.com)
+ *   Copyright (C) IBM Corporation, 2004. All rights reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/errno.h>
+#include <linux/crash_dump.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
+
+/* stores the physical address of elf header of crash image */
+unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX;
+
+/**
+ * copy_oldmem_page() - copy one page from old kernel memory
+ * @pfn: page frame number to be copied
+ * @buf: buffer where the copied page is placed
+ * @csize: number of bytes to copy
+ * @offset: offset in bytes into the page
+ * @userbuf: if set, @buf is int he user address space
+ *
+ * This function copies one page from old kernel memory into buffer pointed by
+ * @buf. If @buf is in userspace, set @userbuf to %1. Returns number of bytes
+ * copied or negative error in case of failure.
+ */
+ssize_t copy_oldmem_page(unsigned long pfn, char *buf,
+                        size_t csize, unsigned long offset,
+                        int userbuf)
+{
+       void *vaddr;
+
+       if (!csize)
+               return 0;
+
+       vaddr = ioremap(pfn << PAGE_SHIFT, PAGE_SIZE);
+       if (!vaddr)
+               return -ENOMEM;
+
+       if (userbuf) {
+               if (copy_to_user(buf, vaddr + offset, csize)) {
+                       iounmap(vaddr);
+                       return -EFAULT;
+               }
+       } else {
+               memcpy(buf, vaddr + offset, csize);
+       }
+
+       iounmap(vaddr);
+       return csize;
+}
index df5958f6864fcde5cb3b8f1957f1cc589e0edd2e..1fc74cbd1a193ee4dcd2fd50afdd279804d9e5fd 100644 (file)
@@ -39,6 +39,10 @@ void machine_kexec_cleanup(struct kimage *image)
 
 void machine_crash_shutdown(struct pt_regs *regs)
 {
+       local_irq_disable();
+       crash_save_cpu(regs, smp_processor_id());
+
+       printk(KERN_INFO "Loading crashdump kernel...\n");
 }
 
 void machine_kexec(struct kimage *image)
index 61930eb0902941030e3e180aca40f6f82697e39e..fd26f8d65151a949e6ecff394f0146258882b9d6 100644 (file)
@@ -10,6 +10,12 @@ relocate_new_kernel:
        ldr     r0,kexec_indirection_page
        ldr     r1,kexec_start_address
 
+       /*
+        * If there is no indirection page (we are doing crashdumps)
+        * skip any relocation.
+        */
+       cmp     r0, #0
+       beq     2f
 
 0:     /* top, read another word for the indirection page */
        ldr     r3, [r0],#4
index 648c3c1e16c40dcd4504e90e96759113d5d7ee16..776ea1aa974b689285006edc70f8ba1158a36c3b 100644 (file)
 #include <linux/seq_file.h>
 #include <linux/screen_info.h>
 #include <linux/init.h>
+#include <linux/kexec.h>
+#include <linux/crash_dump.h>
 #include <linux/root_dev.h>
 #include <linux/cpu.h>
 #include <linux/interrupt.h>
 #include <linux/smp.h>
 #include <linux/fs.h>
 #include <linux/proc_fs.h>
+#include <linux/memblock.h>
 
 #include <asm/unified.h>
 #include <asm/cpu.h>
@@ -419,13 +422,12 @@ static int __init arm_add_memory(unsigned long start, unsigned long size)
        size -= start & ~PAGE_MASK;
        bank->start = PAGE_ALIGN(start);
        bank->size  = size & PAGE_MASK;
-       bank->node  = PHYS_TO_NID(start);
 
        /*
         * Check whether this memory region has non-zero size or
         * invalid node number.
         */
-       if (bank->size == 0 || bank->node >= MAX_NUMNODES)
+       if (bank->size == 0)
                return -EINVAL;
 
        meminfo.nr_banks++;
@@ -680,6 +682,79 @@ static int __init customize_machine(void)
 }
 arch_initcall(customize_machine);
 
+#ifdef CONFIG_KEXEC
+static inline unsigned long long get_total_mem(void)
+{
+       unsigned long total;
+
+       total = max_low_pfn - min_low_pfn;
+       return total << PAGE_SHIFT;
+}
+
+/**
+ * reserve_crashkernel() - reserves memory are for crash kernel
+ *
+ * This function reserves memory area given in "crashkernel=" kernel command
+ * line parameter. The memory reserved is used by a dump capture kernel when
+ * primary kernel is crashing.
+ */
+static void __init reserve_crashkernel(void)
+{
+       unsigned long long crash_size, crash_base;
+       unsigned long long total_mem;
+       int ret;
+
+       total_mem = get_total_mem();
+       ret = parse_crashkernel(boot_command_line, total_mem,
+                               &crash_size, &crash_base);
+       if (ret)
+               return;
+
+       ret = reserve_bootmem(crash_base, crash_size, BOOTMEM_EXCLUSIVE);
+       if (ret < 0) {
+               printk(KERN_WARNING "crashkernel reservation failed - "
+                      "memory is in use (0x%lx)\n", (unsigned long)crash_base);
+               return;
+       }
+
+       printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
+              "for crashkernel (System RAM: %ldMB)\n",
+              (unsigned long)(crash_size >> 20),
+              (unsigned long)(crash_base >> 20),
+              (unsigned long)(total_mem >> 20));
+
+       crashk_res.start = crash_base;
+       crashk_res.end = crash_base + crash_size - 1;
+       insert_resource(&iomem_resource, &crashk_res);
+}
+#else
+static inline void reserve_crashkernel(void) {}
+#endif /* CONFIG_KEXEC */
+
+/*
+ * Note: elfcorehdr_addr is not just limited to vmcore. It is also used by
+ * is_kdump_kernel() to determine if we are booting after a panic. Hence
+ * ifdef it under CONFIG_CRASH_DUMP and not CONFIG_PROC_VMCORE.
+ */
+
+#ifdef CONFIG_CRASH_DUMP
+/*
+ * elfcorehdr= specifies the location of elf core header stored by the crashed
+ * kernel. This option will be passed by kexec loader to the capture kernel.
+ */
+static int __init setup_elfcorehdr(char *arg)
+{
+       char *end;
+
+       if (!arg)
+               return -EINVAL;
+
+       elfcorehdr_addr = memparse(arg, &end);
+       return end > arg ? 0 : -EINVAL;
+}
+early_param("elfcorehdr", setup_elfcorehdr);
+#endif /* CONFIG_CRASH_DUMP */
+
 void __init setup_arch(char **cmdline_p)
 {
        struct tag *tags = (struct tag *)&init_tags;
@@ -733,12 +808,15 @@ void __init setup_arch(char **cmdline_p)
 
        parse_early_param();
 
+       arm_memblock_init(&meminfo, mdesc);
+
        paging_init(mdesc);
        request_standard_resources(&meminfo, mdesc);
 
 #ifdef CONFIG_SMP
        smp_init_cpus();
 #endif
+       reserve_crashkernel();
 
        cpu_init();
        tcm_init();
index 030ba7219f482bfd9873b196d1a8634d5fc2eacb..59ff42ddf0aed656f3def2c44859f0eec414b1d3 100644 (file)
@@ -41,7 +41,6 @@ else
 endif
 
 lib-$(CONFIG_ARCH_RPC)         += ecard.o io-acorn.o floppydma.o
-lib-$(CONFIG_ARCH_L7200)       += io-acorn.o
 lib-$(CONFIG_ARCH_SHARK)       += io-shark.o
 
 $(obj)/csumpartialcopy.o:      $(obj)/csumpartialcopygeneric.S
index c00822543d9f78a307c4a7c7f3c576db75c2efb4..4f93c567a35a3acb8969d5ae7951bfc2e8f008e4 100644 (file)
 
 #define PHYS_OFFSET    UL(0xf0000000)
 
-/*
- * The nodes are the followings:
- *
- *   node 0: 0xf000.0000 - 0xf3ff.ffff
- *   node 1: 0xf400.0000 - 0xf7ff.ffff
- *   node 2: 0xf800.0000 - 0xfbff.ffff
- *   node 3: 0xfc00.0000 - 0xffff.ffff
- */
-#define NODE_MEM_SIZE_BITS     26
-
 #endif /* __ASM_ARCH_MEMORY_H */
index 841eaf8f27e221dfa600178e4d20ac0d56ddeaad..939bccd70569846987c6ddb304cd22c7de730bf7 100644 (file)
@@ -366,6 +366,17 @@ config MACH_STAMP9G20
 
 endif
 
+if (ARCH_AT91SAM9260 || ARCH_AT91SAM9G20)
+comment "AT91SAM9260/AT91SAM9G20 boards"
+
+config MACH_SNAPPER_9260
+        bool "Bluewater Systems Snapper 9260/9G20 module"
+        help
+          Select this if you are using the Bluewater Systems Snapper 9260 or
+          Snapper 9G20 modules.
+          <http://www.bluewatersys.com/>
+endif
+
 # ----------------------------------------------------------
 
 if ARCH_AT91SAM9G45
index c1f821e58222b77257e875c3ce5a72ea2be6429d..ca2ac003f41f5666fb8da8c1e23b34ab3e363ea6 100644 (file)
@@ -66,6 +66,9 @@ obj-$(CONFIG_MACH_CPU9G20)    += board-cpu9krea.o
 obj-$(CONFIG_MACH_STAMP9G20)   += board-stamp9g20.o
 obj-$(CONFIG_MACH_PORTUXG20)   += board-stamp9g20.o
 
+# AT91SAM9260/AT91SAM9G20 board-specific support
+obj-$(CONFIG_MACH_SNAPPER_9260)        += board-snapper9260.o
+
 # AT91SAM9G45 board-specific support
 obj-$(CONFIG_MACH_AT91SAM9G45EKES) += board-sam9m10g45ek.o
 
index 85166b7e69a18235969336742526c2961c486d66..753c0d31a3d3f0b407cfe20b68f5ba66189cd1a7 100644 (file)
@@ -20,6 +20,7 @@
 #include <mach/at91_pmc.h>
 #include <mach/at91_rstc.h>
 #include <mach/at91_shdwc.h>
+#include <mach/cpu.h>
 
 #include "generic.h"
 #include "clock.h"
@@ -176,6 +177,13 @@ static struct clk mmc1_clk = {
        .type           = CLK_TYPE_PERIPHERAL,
 };
 
+/* Video decoder clock - Only for sam9m10/sam9m11 */
+static struct clk vdec_clk = {
+       .name           = "vdec_clk",
+       .pmc_mask       = 1 << AT91SAM9G45_ID_VDEC,
+       .type           = CLK_TYPE_PERIPHERAL,
+};
+
 /* One additional fake clock for ohci */
 static struct clk ohci_clk = {
        .name           = "ohci_clk",
@@ -239,6 +247,9 @@ static void __init at91sam9g45_register_clocks(void)
        for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
                clk_register(periph_clocks[i]);
 
+       if (cpu_is_at91sam9m10() || cpu_is_at91sam9m11())
+               clk_register(&vdec_clk);
+
        clk_register(&pck0);
        clk_register(&pck1);
 }
index a4102d72cc9b1c8e9d323f432fb5873b2144cc44..c49f5c003ee10d9fbad7a6f076f0e1dc58b0d653 100644 (file)
@@ -26,6 +26,9 @@
 #include <linux/spi/spi.h>
 #include <linux/spi/at73c213.h>
 #include <linux/clk.h>
+#include <linux/regulator/machine.h>
+#include <linux/regulator/fixed.h>
+#include <linux/regulator/consumer.h>
 
 #include <mach/hardware.h>
 #include <asm/setup.h>
@@ -235,6 +238,46 @@ static struct gpio_led ek_leds[] = {
        }
 };
 
+#if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
+static struct regulator_consumer_supply ek_audio_consumer_supplies[] = {
+       REGULATOR_SUPPLY("AVDD", "0-001b"),
+       REGULATOR_SUPPLY("HPVDD", "0-001b"),
+       REGULATOR_SUPPLY("DBVDD", "0-001b"),
+       REGULATOR_SUPPLY("DCVDD", "0-001b"),
+};
+
+static struct regulator_init_data ek_avdd_reg_init_data = {
+       .constraints    = {
+               .name   = "3V3",
+               .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+       },
+       .consumer_supplies = ek_audio_consumer_supplies,
+       .num_consumer_supplies = ARRAY_SIZE(ek_audio_consumer_supplies),
+};
+
+static struct fixed_voltage_config ek_vdd_pdata = {
+       .supply_name    = "board-3V3",
+       .microvolts     = 3300000,
+       .gpio           = -EINVAL,
+       .enabled_at_boot = 0,
+       .init_data      = &ek_avdd_reg_init_data,
+};
+static struct platform_device ek_voltage_regulator = {
+       .name           = "reg-fixed-voltage",
+       .id             = -1,
+       .num_resources  = 0,
+       .dev            = {
+               .platform_data  = &ek_vdd_pdata,
+       },
+};
+static void __init ek_add_regulators(void)
+{
+       platform_device_register(&ek_voltage_regulator);
+}
+#else
+static void __init ek_add_regulators(void) {}
+#endif
+
 static struct i2c_board_info __initdata ek_i2c_devices[] = {
        {
                I2C_BOARD_INFO("24c512", 0x50),
@@ -256,6 +299,8 @@ static void __init ek_board_init(void)
        ek_add_device_nand();
        /* Ethernet */
        at91_add_device_eth(&ek_macb_data);
+       /* Regulators */
+       ek_add_regulators();
        /* MMC */
 #if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
        at91_add_device_mci(0, &ek_mmc_data);
index c11fd47aec5d464a9f228f19a9ac79097ebcaf46..6ea9808b8868d53a0c7cefd1926f921eadd82633 100644 (file)
@@ -27,6 +27,9 @@
 #include <linux/gpio_keys.h>
 #include <linux/input.h>
 #include <linux/clk.h>
+#include <linux/regulator/machine.h>
+#include <linux/regulator/fixed.h>
+#include <linux/regulator/consumer.h>
 
 #include <mach/hardware.h>
 #include <asm/setup.h>
@@ -269,6 +272,46 @@ static void __init ek_add_device_buttons(void)
 static void __init ek_add_device_buttons(void) {}
 #endif
 
+#if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
+static struct regulator_consumer_supply ek_audio_consumer_supplies[] = {
+       REGULATOR_SUPPLY("AVDD", "0-001b"),
+       REGULATOR_SUPPLY("HPVDD", "0-001b"),
+       REGULATOR_SUPPLY("DBVDD", "0-001b"),
+       REGULATOR_SUPPLY("DCVDD", "0-001b"),
+};
+
+static struct regulator_init_data ek_avdd_reg_init_data = {
+       .constraints    = {
+               .name   = "3V3",
+               .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+       },
+       .consumer_supplies = ek_audio_consumer_supplies,
+       .num_consumer_supplies = ARRAY_SIZE(ek_audio_consumer_supplies),
+};
+
+static struct fixed_voltage_config ek_vdd_pdata = {
+       .supply_name    = "board-3V3",
+       .microvolts     = 3300000,
+       .gpio           = -EINVAL,
+       .enabled_at_boot = 0,
+       .init_data      = &ek_avdd_reg_init_data,
+};
+static struct platform_device ek_voltage_regulator = {
+       .name           = "reg-fixed-voltage",
+       .id             = -1,
+       .num_resources  = 0,
+       .dev            = {
+               .platform_data  = &ek_vdd_pdata,
+       },
+};
+static void __init ek_add_regulators(void)
+{
+       platform_device_register(&ek_voltage_regulator);
+}
+#else
+static void __init ek_add_regulators(void) {}
+#endif
+
 
 static struct i2c_board_info __initdata ek_i2c_devices[] = {
         {
@@ -294,6 +337,8 @@ static void __init ek_board_init(void)
        ek_add_device_nand();
        /* Ethernet */
        at91_add_device_eth(&ek_macb_data);
+       /* Regulators */
+       ek_add_regulators();
        /* MMC */
        at91_add_device_mmc(0, &ek_mmc_data);
        /* I2C */
diff --git a/arch/arm/mach-at91/board-snapper9260.c b/arch/arm/mach-at91/board-snapper9260.c
new file mode 100644 (file)
index 0000000..2c08ae4
--- /dev/null
@@ -0,0 +1,189 @@
+/*
+ * linux/arch/arm/mach-at91/board-snapper9260.c
+ *
+ *  Copyright (C) 2010 Bluewater System Ltd
+ *
+ * Author: Andre Renaud <andre@bluewatersys.com>
+ * Author: Ryan Mallon  <ryan@bluewatersys.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/i2c/pca953x.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include <mach/hardware.h>
+#include <mach/board.h>
+#include <mach/at91sam9_smc.h>
+
+#include "sam9_smc.h"
+#include "generic.h"
+
+#define SNAPPER9260_IO_EXP_GPIO(x)     (NR_BUILTIN_GPIO + (x))
+
+static void __init snapper9260_map_io(void)
+{
+       at91sam9260_initialize(18432000);
+
+       /* Debug on ttyS0 */
+       at91_register_uart(0, 0, 0);
+       at91_set_serial_console(0);
+
+       at91_register_uart(AT91SAM9260_ID_US0, 1,
+                          ATMEL_UART_CTS | ATMEL_UART_RTS);
+       at91_register_uart(AT91SAM9260_ID_US1, 2,
+                          ATMEL_UART_CTS | ATMEL_UART_RTS);
+       at91_register_uart(AT91SAM9260_ID_US2, 3, 0);
+}
+
+static void __init snapper9260_init_irq(void)
+{
+       at91sam9260_init_interrupts(NULL);
+}
+
+static struct at91_usbh_data __initdata snapper9260_usbh_data = {
+       .ports          = 2,
+};
+
+static struct at91_udc_data __initdata snapper9260_udc_data = {
+       .vbus_pin               = SNAPPER9260_IO_EXP_GPIO(5),
+       .vbus_active_low        = 1,
+       .vbus_polled            = 1,
+};
+
+static struct at91_eth_data snapper9260_macb_data = {
+       .is_rmii        = 1,
+};
+
+static struct mtd_partition __initdata snapper9260_nand_partitions[] = {
+       {
+               .name   = "Preboot",
+               .offset = 0,
+               .size   = SZ_128K,
+       },
+       {
+               .name   = "Bootloader",
+               .offset = MTDPART_OFS_APPEND,
+               .size   = SZ_256K,
+       },
+       {
+               .name   = "Environment",
+               .offset = MTDPART_OFS_APPEND,
+               .size   = SZ_128K,
+       },
+       {
+               .name   = "Kernel",
+               .offset = MTDPART_OFS_APPEND,
+               .size   = SZ_4M,
+       },
+       {
+               .name   = "Filesystem",
+               .offset = MTDPART_OFS_APPEND,
+               .size   = MTDPART_SIZ_FULL,
+       },
+};
+
+static struct mtd_partition * __init
+snapper9260_nand_partition_info(int size, int *num_partitions)
+{
+       *num_partitions = ARRAY_SIZE(snapper9260_nand_partitions);
+       return snapper9260_nand_partitions;
+}
+
+static struct atmel_nand_data __initdata snapper9260_nand_data = {
+       .ale            = 21,
+       .cle            = 22,
+       .rdy_pin        = AT91_PIN_PC13,
+       .partition_info = snapper9260_nand_partition_info,
+       .bus_width_16   = 0,
+};
+
+static struct sam9_smc_config __initdata snapper9260_nand_smc_config = {
+       .ncs_read_setup         = 0,
+       .nrd_setup              = 0,
+       .ncs_write_setup        = 0,
+       .nwe_setup              = 0,
+
+       .ncs_read_pulse         = 5,
+       .nrd_pulse              = 2,
+       .ncs_write_pulse        = 5,
+       .nwe_pulse              = 2,
+
+       .read_cycle             = 7,
+       .write_cycle            = 7,
+
+       .mode                   = (AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
+                                  AT91_SMC_EXNWMODE_DISABLE),
+       .tdf_cycles             = 1,
+};
+
+static struct pca953x_platform_data snapper9260_io_expander_data = {
+       .gpio_base              = SNAPPER9260_IO_EXP_GPIO(0),
+};
+
+static struct i2c_board_info __initdata snapper9260_i2c_devices[] = {
+       {
+               /* IO expander */
+               I2C_BOARD_INFO("max7312", 0x28),
+               .platform_data = &snapper9260_io_expander_data,
+       },
+       {
+               /* Audio codec */
+               I2C_BOARD_INFO("tlv320aic23", 0x1a),
+       },
+       {
+               /* RTC */
+               I2C_BOARD_INFO("isl1208", 0x6f),
+       },
+};
+
+static void __init snapper9260_add_device_nand(void)
+{
+       at91_set_A_periph(AT91_PIN_PC14, 0);
+       sam9_smc_configure(3, &snapper9260_nand_smc_config);
+       at91_add_device_nand(&snapper9260_nand_data);
+}
+
+static void __init snapper9260_board_init(void)
+{
+       at91_add_device_i2c(snapper9260_i2c_devices,
+                           ARRAY_SIZE(snapper9260_i2c_devices));
+       at91_add_device_serial();
+       at91_add_device_usbh(&snapper9260_usbh_data);
+       at91_add_device_udc(&snapper9260_udc_data);
+       at91_add_device_eth(&snapper9260_macb_data);
+       at91_add_device_ssc(AT91SAM9260_ID_SSC, (ATMEL_SSC_TF | ATMEL_SSC_TK |
+                                                ATMEL_SSC_TD | ATMEL_SSC_RD));
+       snapper9260_add_device_nand();
+}
+
+MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module")
+       .phys_io        = AT91_BASE_SYS,
+       .io_pg_offst    = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
+       .boot_params    = AT91_SDRAM_BASE + 0x100,
+       .timer          = &at91sam926x_timer,
+       .map_io         = snapper9260_map_io,
+       .init_irq       = snapper9260_init_irq,
+       .init_machine   = snapper9260_board_init,
+MACHINE_END
+
+
index d8c1ededaa75aea4ab8835ade94c2dda544068f7..9c6af97374851a72d2481a0fc4b03ba64781eff8 100644 (file)
@@ -84,7 +84,7 @@
  */
 #define AT91_ECC       (0xffffe200 - AT91_BASE_SYS)
 #define AT91_BCRAMC    (0xffffe400 - AT91_BASE_SYS)
-#define AT91_DDRSDRC   (0xffffe600 - AT91_BASE_SYS)
+#define AT91_DDRSDRC0  (0xffffe600 - AT91_BASE_SYS)
 #define AT91_SMC       (0xffffe800 - AT91_BASE_SYS)
 #define AT91_MATRIX    (0xffffea00 - AT91_BASE_SYS)
 #define AT91_CCFG      (0xffffeb10 - AT91_BASE_SYS)
index 1499b1cbffddbe6c3f0ff3d70617d2314d574ab4..976f4a6c33532e85e6a8053df737cf638c820827 100644 (file)
@@ -15,7 +15,7 @@
 #ifndef AT91CAP9_DDRSDR_H
 #define AT91CAP9_DDRSDR_H
 
-#define AT91_DDRSDRC_MR                (AT91_DDRSDRC + 0x00)   /* Mode Register */
+#define AT91_DDRSDRC_MR                0x00    /* Mode Register */
 #define                AT91_DDRSDRC_MODE       (0xf << 0)              /* Command Mode */
 #define                        AT91_DDRSDRC_MODE_NORMAL                0
 #define                        AT91_DDRSDRC_MODE_NOP           1
 #define                        AT91_DDRSDRC_MODE_EXT_LMR       5
 #define                        AT91_DDRSDRC_MODE_DEEP          6
 
-#define AT91_DDRSDRC_RTR       (AT91_DDRSDRC + 0x04)   /* Refresh Timer Register */
+#define AT91_DDRSDRC_RTR       0x04    /* Refresh Timer Register */
 #define                AT91_DDRSDRC_COUNT      (0xfff << 0)            /* Refresh Timer Counter */
 
-#define AT91_DDRSDRC_CR                (AT91_DDRSDRC + 0x08)   /* Configuration Register */
+#define AT91_DDRSDRC_CR                0x08    /* Configuration Register */
 #define                AT91_DDRSDRC_NC         (3 << 0)                /* Number of Column Bits */
 #define                        AT91_DDRSDRC_NC_SDR8    (0 << 0)
 #define                        AT91_DDRSDRC_NC_SDR9    (1 << 0)
@@ -49,7 +49,7 @@
 #define                AT91_DDRSDRC_DLL        (1 << 7)                /* Reset DLL */
 #define                AT91_DDRSDRC_DICDS      (1 << 8)                /* Output impedance control */
 
-#define AT91_DDRSDRC_T0PR      (AT91_DDRSDRC + 0x0C)   /* Timing 0 Register */
+#define AT91_DDRSDRC_T0PR      0x0C    /* Timing 0 Register */
 #define                AT91_DDRSDRC_TRAS       (0xf <<  0)             /* Active to Precharge delay */
 #define                AT91_DDRSDRC_TRCD       (0xf <<  4)             /* Row to Column delay */
 #define                AT91_DDRSDRC_TWR        (0xf <<  8)             /* Write recovery delay */
 #define                AT91_DDRSDRC_TWTR       (1   << 24)             /* Internal Write to Read delay */
 #define                AT91_DDRSDRC_TMRD       (0xf << 28)             /* Load mode to active/refresh delay */
 
-#define AT91_DDRSDRC_T1PR      (AT91_DDRSDRC + 0x10)   /* Timing 1 Register */
+#define AT91_DDRSDRC_T1PR      0x10    /* Timing 1 Register */
 #define                AT91_DDRSDRC_TRFC       (0x1f << 0)             /* Row Cycle Delay */
 #define                AT91_DDRSDRC_TXSNR      (0xff << 8)             /* Exit self-refresh to non-read */
 #define                AT91_DDRSDRC_TXSRD      (0xff << 16)            /* Exit self-refresh to read */
 #define                AT91_DDRSDRC_TXP        (0xf  << 24)            /* Exit power-down delay */
 
-#define AT91_DDRSDRC_LPR       (AT91_DDRSDRC + 0x18)   /* Low Power Register */
+#define AT91_DDRSDRC_LPR       0x18    /* Low Power Register */
 #define                AT91_DDRSDRC_LPCB               (3 << 0)        /* Low-power Configurations */
 #define                        AT91_DDRSDRC_LPCB_DISABLE               0
 #define                        AT91_DDRSDRC_LPCB_SELF_REFRESH          1
 #define                        AT91_DDRSDRC_TIMEOUT_64_CLK_CYCLES      (1 << 12)
 #define                        AT91_DDRSDRC_TIMEOUT_128_CLK_CYCLES     (2 << 12)
 
-#define AT91_DDRSDRC_MDR       (AT91_DDRSDRC + 0x1C)   /* Memory Device Register */
+#define AT91_DDRSDRC_MDR       0x1C    /* Memory Device Register */
 #define                AT91_DDRSDRC_MD         (3 << 0)                /* Memory Device Type */
 #define                        AT91_DDRSDRC_MD_SDR             0
 #define                        AT91_DDRSDRC_MD_LOW_POWER_SDR   1
 #define                        AT91_DDRSDRC_MD_DDR             2
 #define                        AT91_DDRSDRC_MD_LOW_POWER_DDR   3
 
-#define AT91_DDRSDRC_DLLR      (AT91_DDRSDRC + 0x20)   /* DLL Information Register */
+#define AT91_DDRSDRC_DLLR      0x20    /* DLL Information Register */
 #define                AT91_DDRSDRC_MDINC      (1 << 0)                /* Master Delay increment */
 #define                AT91_DDRSDRC_MDDEC      (1 << 1)                /* Master Delay decrement */
 #define                AT91_DDRSDRC_MDOVF      (1 << 2)                /* Master Delay Overflow */
 #define                AT91_DDRSDRC_SDVAL      (0xff << 16)            /* Slave Delay value */
 #define                AT91_DDRSDRC_SDCVAL     (0xff << 24)            /* Slave Delay Correction value */
 
+/* Register access macros */
+#define at91_ramc_read(num, reg) \
+       at91_sys_read(AT91_DDRSDRC##num + reg)
+#define at91_ramc_write(num, reg, value) \
+       at91_sys_write(AT91_DDRSDRC##num + reg, value)
+
 
 #endif
index 43c396b9b4cb8cc1ceedf44bf24fe62ff225c880..4e79036d3b801849ea8f547e6dd6fdf8b16d894e 100644 (file)
@@ -84,7 +84,7 @@
  * System Peripherals (offset from AT91_BASE_SYS)
  */
 #define AT91_ECC       (0xffffe800 - AT91_BASE_SYS)
-#define AT91_SDRAMC    (0xffffea00 - AT91_BASE_SYS)
+#define AT91_SDRAMC0   (0xffffea00 - AT91_BASE_SYS)
 #define AT91_SMC       (0xffffec00 - AT91_BASE_SYS)
 #define AT91_MATRIX    (0xffffee00 - AT91_BASE_SYS)
 #define AT91_CCFG      (0xffffef10 - AT91_BASE_SYS)
index 87de8be17484be6966c7ee02bcf4a94620932e63..2b561851812952fe60e8b44fa1d44641fcdd81bc 100644 (file)
@@ -68,7 +68,7 @@
 /*
  * System Peripherals (offset from AT91_BASE_SYS)
  */
-#define AT91_SDRAMC    (0xffffea00 - AT91_BASE_SYS)
+#define AT91_SDRAMC0   (0xffffea00 - AT91_BASE_SYS)
 #define AT91_SMC       (0xffffec00 - AT91_BASE_SYS)
 #define AT91_MATRIX    (0xffffee00 - AT91_BASE_SYS)
 #define AT91_AIC       (0xfffff000 - AT91_BASE_SYS)
diff --git a/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h b/arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h
new file mode 100644 (file)
index 0000000..d27b15b
--- /dev/null
@@ -0,0 +1,130 @@
+/*
+ * Header file for the Atmel DDR/SDR SDRAM Controller
+ *
+ * Copyright (C) 2010 Atmel Corporation
+ *     Nicolas Ferre <nicolas.ferre@atmel.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef AT91SAM9_DDRSDR_H
+#define AT91SAM9_DDRSDR_H
+
+#define AT91_DDRSDRC_MR                0x00    /* Mode Register */
+#define                AT91_DDRSDRC_MODE       (0x7 << 0)              /* Command Mode */
+#define                        AT91_DDRSDRC_MODE_NORMAL        0
+#define                        AT91_DDRSDRC_MODE_NOP           1
+#define                        AT91_DDRSDRC_MODE_PRECHARGE     2
+#define                        AT91_DDRSDRC_MODE_LMR           3
+#define                        AT91_DDRSDRC_MODE_REFRESH       4
+#define                        AT91_DDRSDRC_MODE_EXT_LMR       5
+#define                        AT91_DDRSDRC_MODE_DEEP          6
+
+#define AT91_DDRSDRC_RTR       0x04    /* Refresh Timer Register */
+#define                AT91_DDRSDRC_COUNT      (0xfff << 0)            /* Refresh Timer Counter */
+
+#define AT91_DDRSDRC_CR                0x08    /* Configuration Register */
+#define                AT91_DDRSDRC_NC         (3 << 0)                /* Number of Column Bits */
+#define                        AT91_DDRSDRC_NC_SDR8    (0 << 0)
+#define                        AT91_DDRSDRC_NC_SDR9    (1 << 0)
+#define                        AT91_DDRSDRC_NC_SDR10   (2 << 0)
+#define                        AT91_DDRSDRC_NC_SDR11   (3 << 0)
+#define                        AT91_DDRSDRC_NC_DDR9    (0 << 0)
+#define                        AT91_DDRSDRC_NC_DDR10   (1 << 0)
+#define                        AT91_DDRSDRC_NC_DDR11   (2 << 0)
+#define                        AT91_DDRSDRC_NC_DDR12   (3 << 0)
+#define                AT91_DDRSDRC_NR         (3 << 2)                /* Number of Row Bits */
+#define                        AT91_DDRSDRC_NR_11      (0 << 2)
+#define                        AT91_DDRSDRC_NR_12      (1 << 2)
+#define                        AT91_DDRSDRC_NR_13      (2 << 2)
+#define                        AT91_DDRSDRC_NR_14      (3 << 2)
+#define                AT91_DDRSDRC_CAS        (7 << 4)                /* CAS Latency */
+#define                        AT91_DDRSDRC_CAS_2      (2 << 4)
+#define                        AT91_DDRSDRC_CAS_3      (3 << 4)
+#define                        AT91_DDRSDRC_CAS_25     (6 << 4)
+#define                AT91_DDRSDRC_RST_DLL    (1 << 7)                /* Reset DLL */
+#define                AT91_DDRSDRC_DICDS      (1 << 8)                /* Output impedance control */
+#define                AT91_DDRSDRC_DIS_DLL    (1 << 9)                /* Disable DLL */
+#define                AT91_DDRSDRC_OCD        (1 << 12)               /* Off-Chip Driver */
+#define                AT91_DDRSDRC_DQMS       (1 << 16)               /* Mask Data is Shared */
+#define                AT91_DDRSDRC_ACTBST     (1 << 18)               /* Active Bank X to Burst Stop Read Access Bank Y */
+
+#define AT91_DDRSDRC_T0PR      0x0C    /* Timing 0 Register */
+#define                AT91_DDRSDRC_TRAS       (0xf <<  0)             /* Active to Precharge delay */
+#define                AT91_DDRSDRC_TRCD       (0xf <<  4)             /* Row to Column delay */
+#define                AT91_DDRSDRC_TWR        (0xf <<  8)             /* Write recovery delay */
+#define                AT91_DDRSDRC_TRC        (0xf << 12)             /* Row cycle delay */
+#define                AT91_DDRSDRC_TRP        (0xf << 16)             /* Row precharge delay */
+#define                AT91_DDRSDRC_TRRD       (0xf << 20)             /* Active BankA to BankB */
+#define                AT91_DDRSDRC_TWTR       (0x7 << 24)             /* Internal Write to Read delay */
+#define                AT91_DDRSDRC_RED_WRRD   (0x1 << 27)             /* Reduce Write to Read Delay */
+#define                AT91_DDRSDRC_TMRD       (0xf << 28)             /* Load mode to active/refresh delay */
+
+#define AT91_DDRSDRC_T1PR      0x10    /* Timing 1 Register */
+#define                AT91_DDRSDRC_TRFC       (0x1f << 0)             /* Row Cycle Delay */
+#define                AT91_DDRSDRC_TXSNR      (0xff << 8)             /* Exit self-refresh to non-read */
+#define                AT91_DDRSDRC_TXSRD      (0xff << 16)            /* Exit self-refresh to read */
+#define                AT91_DDRSDRC_TXP        (0xf  << 24)            /* Exit power-down delay */
+
+#define AT91_DDRSDRC_T2PR      0x14    /* Timing 2 Register */
+#define                AT91_DDRSDRC_TXARD      (0xf  << 0)             /* Exit active power down delay to read command in mode "Fast Exit" */
+#define                AT91_DDRSDRC_TXARDS     (0xf  << 4)             /* Exit active power down delay to read command in mode "Slow Exit" */
+#define                AT91_DDRSDRC_TRPA       (0xf  << 8)             /* Row Precharge All delay */
+#define                AT91_DDRSDRC_TRTP       (0x7  << 12)            /* Read to Precharge delay */
+
+#define AT91_DDRSDRC_LPR       0x1C    /* Low Power Register */
+#define                AT91_DDRSDRC_LPCB       (3 << 0)                /* Low-power Configurations */
+#define                        AT91_DDRSDRC_LPCB_DISABLE               0
+#define                        AT91_DDRSDRC_LPCB_SELF_REFRESH          1
+#define                        AT91_DDRSDRC_LPCB_POWER_DOWN            2
+#define                        AT91_DDRSDRC_LPCB_DEEP_POWER_DOWN       3
+#define                AT91_DDRSDRC_CLKFR      (1 << 2)        /* Clock Frozen */
+#define                AT91_DDRSDRC_PASR       (7 << 4)        /* Partial Array Self Refresh */
+#define                AT91_DDRSDRC_TCSR       (3 << 8)        /* Temperature Compensated Self Refresh */
+#define                AT91_DDRSDRC_DS         (3 << 10)       /* Drive Strength */
+#define                AT91_DDRSDRC_TIMEOUT    (3 << 12)       /* Time to define when Low Power Mode is enabled */
+#define                        AT91_DDRSDRC_TIMEOUT_0_CLK_CYCLES       (0 << 12)
+#define                        AT91_DDRSDRC_TIMEOUT_64_CLK_CYCLES      (1 << 12)
+#define                        AT91_DDRSDRC_TIMEOUT_128_CLK_CYCLES     (2 << 12)
+#define                AT91_DDRSDRC_APDE       (1 << 16)        /* Active power down exit time */
+#define                AT91_DDRSDRC_UPD_MR     (3 << 20)        /* Update load mode register and extended mode register */
+
+#define AT91_DDRSDRC_MDR       0x20    /* Memory Device Register */
+#define                AT91_DDRSDRC_MD         (3 << 0)                /* Memory Device Type */
+#define                        AT91_DDRSDRC_MD_SDR             0
+#define                        AT91_DDRSDRC_MD_LOW_POWER_SDR   1
+#define                        AT91_DDRSDRC_MD_LOW_POWER_DDR   3
+#define                        AT91_DDRSDRC_MD_DDR2            6
+#define                AT91_DDRSDRC_DBW        (1 << 4)                /* Data Bus Width */
+#define                        AT91_DDRSDRC_DBW_32BITS         (0 <<  4)
+#define                        AT91_DDRSDRC_DBW_16BITS         (1 <<  4)
+
+#define AT91_DDRSDRC_DLL       0x24    /* DLL Information Register */
+#define                AT91_DDRSDRC_MDINC      (1 << 0)                /* Master Delay increment */
+#define                AT91_DDRSDRC_MDDEC      (1 << 1)                /* Master Delay decrement */
+#define                AT91_DDRSDRC_MDOVF      (1 << 2)                /* Master Delay Overflow */
+#define                AT91_DDRSDRC_MDVAL      (0xff <<  8)            /* Master Delay value */
+
+#define AT91_DDRSDRC_HS                0x2C    /* High Speed Register */
+#define                AT91_DDRSDRC_DIS_ATCP_RD        (1 << 2)        /* Anticip read access is disabled */
+
+#define AT91_DDRSDRC_DELAY(n)  (0x30 + (0x4 * (n)))    /* Delay I/O Register n */
+
+#define AT91_DDRSDRC_WPMR      0xE4    /* Write Protect Mode Register */
+#define                AT91_DDRSDRC_WP         (1 << 0)                /* Write protect enable */
+#define                AT91_DDRSDRC_WPKEY      (0xffffff << 8)         /* Write protect key */
+#define                AT91_DDRSDRC_KEY        (0x444452 << 8)         /* Write protect key = "DDR" */
+
+#define AT91_DDRSDRC_WPSR      0xE8    /* Write Protect Status Register */
+#define                AT91_DDRSDRC_WPVS       (1 << 0)                /* Write protect violation status */
+#define                AT91_DDRSDRC_WPVSRC     (0xffff << 8)           /* Write protect violation source */
+
+/* Register access macros */
+#define at91_ramc_read(num, reg) \
+       at91_sys_read(AT91_DDRSDRC##num + reg)
+#define at91_ramc_write(num, reg, value) \
+       at91_sys_write(AT91_DDRSDRC##num + reg, value)
+
+#endif
index b7260389f7cac2a51937143c10e55e3e75ee8aa9..100f5a592926356db536780996a7796ff6856e91 100644 (file)
@@ -17,7 +17,7 @@
 #define AT91SAM9_SDRAMC_H
 
 /* SDRAM Controller (SDRAMC) registers */
-#define AT91_SDRAMC_MR         (AT91_SDRAMC + 0x00)    /* SDRAM Controller Mode Register */
+#define AT91_SDRAMC_MR         0x00    /* SDRAM Controller Mode Register */
 #define                AT91_SDRAMC_MODE        (0xf << 0)              /* Command Mode */
 #define                        AT91_SDRAMC_MODE_NORMAL         0
 #define                        AT91_SDRAMC_MODE_NOP            1
 #define                        AT91_SDRAMC_MODE_EXT_LMR        5
 #define                        AT91_SDRAMC_MODE_DEEP           6
 
-#define AT91_SDRAMC_TR         (AT91_SDRAMC + 0x04)    /* SDRAM Controller Refresh Timer Register */
+#define AT91_SDRAMC_TR         0x04    /* SDRAM Controller Refresh Timer Register */
 #define                AT91_SDRAMC_COUNT       (0xfff << 0)            /* Refresh Timer Counter */
 
-#define AT91_SDRAMC_CR         (AT91_SDRAMC + 0x08)    /* SDRAM Controller Configuration Register */
+#define AT91_SDRAMC_CR         0x08    /* SDRAM Controller Configuration Register */
 #define                AT91_SDRAMC_NC          (3 << 0)                /* Number of Column Bits */
 #define                        AT91_SDRAMC_NC_8        (0 << 0)
 #define                        AT91_SDRAMC_NC_9        (1 << 0)
@@ -57,7 +57,7 @@
 #define                AT91_SDRAMC_TRAS        (0xf << 24)             /* Active to Precharge Delay */
 #define                AT91_SDRAMC_TXSR        (0xf << 28)             /* Exit Self Refresh to Active Delay */
 
-#define AT91_SDRAMC_LPR                (AT91_SDRAMC + 0x10)    /* SDRAM Controller Low Power Register */
+#define AT91_SDRAMC_LPR                0x10    /* SDRAM Controller Low Power Register */
 #define                AT91_SDRAMC_LPCB                (3 << 0)        /* Low-power Configurations */
 #define                        AT91_SDRAMC_LPCB_DISABLE                0
 #define                        AT91_SDRAMC_LPCB_SELF_REFRESH           1
 #define                        AT91_SDRAMC_TIMEOUT_64_CLK_CYCLES       (1 << 12)
 #define                        AT91_SDRAMC_TIMEOUT_128_CLK_CYCLES      (2 << 12)
 
-#define AT91_SDRAMC_IER                (AT91_SDRAMC + 0x14)    /* SDRAM Controller Interrupt Enable Register */
-#define AT91_SDRAMC_IDR                (AT91_SDRAMC + 0x18)    /* SDRAM Controller Interrupt Disable Register */
-#define AT91_SDRAMC_IMR                (AT91_SDRAMC + 0x1C)    /* SDRAM Controller Interrupt Mask Register */
-#define AT91_SDRAMC_ISR                (AT91_SDRAMC + 0x20)    /* SDRAM Controller Interrupt Status Register */
+#define AT91_SDRAMC_IER                0x14    /* SDRAM Controller Interrupt Enable Register */
+#define AT91_SDRAMC_IDR                0x18    /* SDRAM Controller Interrupt Disable Register */
+#define AT91_SDRAMC_IMR                0x1C    /* SDRAM Controller Interrupt Mask Register */
+#define AT91_SDRAMC_ISR                0x20    /* SDRAM Controller Interrupt Status Register */
 #define                AT91_SDRAMC_RES         (1 << 0)                /* Refresh Error Status */
 
-#define AT91_SDRAMC_MDR                (AT91_SDRAMC + 0x24)    /* SDRAM Memory Device Register */
+#define AT91_SDRAMC_MDR                0x24    /* SDRAM Memory Device Register */
 #define                AT91_SDRAMC_MD          (3 << 0)                /* Memory Device Type */
 #define                        AT91_SDRAMC_MD_SDRAM            0
 #define                        AT91_SDRAMC_MD_LOW_POWER_SDRAM  1
 
+/* Register access macros */
+#define at91_ramc_read(num, reg) \
+       at91_sys_read(AT91_SDRAMC##num + reg)
+#define at91_ramc_write(num, reg, value) \
+       at91_sys_write(AT91_SDRAMC##num + reg, value)
 
 #endif
index fc2de6c09c86a67c21073e405144ad17d94f8f64..87ba8517ad98291a12749853cfc7379e021c4997 100644 (file)
@@ -74,7 +74,7 @@
  */
 #define AT91_DMA       (0xffffe600 - AT91_BASE_SYS)
 #define AT91_ECC       (0xffffe800 - AT91_BASE_SYS)
-#define AT91_SDRAMC    (0xffffea00 - AT91_BASE_SYS)
+#define AT91_SDRAMC0   (0xffffea00 - AT91_BASE_SYS)
 #define AT91_SMC       (0xffffec00 - AT91_BASE_SYS)
 #define AT91_MATRIX    (0xffffee00 - AT91_BASE_SYS)
 #define AT91_CCFG      (0xffffef10 - AT91_BASE_SYS)
index df2ed848c9f89b0e9f2e0bb3ee6a7c8d0fd631d5..58528aa9c8a86ddea8286cfb9ebdac7e26ed6942 100644 (file)
@@ -44,6 +44,8 @@
  /* USB Device */
 struct at91_udc_data {
        u8      vbus_pin;               /* high == host powering us */
+       u8      vbus_active_low;        /* vbus polarity */
+       u8      vbus_polled;            /* Use polling, not interrupt */
        u8      pullup_pin;             /* active == D+ pulled up */
        u8      pullup_active_low;      /* true == pullup_pin is active low */
 };
index 833659d1200ac057faff56ccd567de4ad718e09b..3bef931d0b1c915b5de540ee860dcf37cf27cba6 100644 (file)
@@ -52,6 +52,7 @@ static inline unsigned long at91_cpu_fully_identify(void)
 
 #define ARCH_EXID_AT91SAM9M11  0x00000001
 #define ARCH_EXID_AT91SAM9M10  0x00000002
+#define ARCH_EXID_AT91SAM9G46  0x00000003
 #define ARCH_EXID_AT91SAM9G45  0x00000004
 
 static inline unsigned long at91_exid_identify(void)
@@ -128,9 +129,18 @@ static inline unsigned long at91cap9_rev_identify(void)
 #ifdef CONFIG_ARCH_AT91SAM9G45
 #define cpu_is_at91sam9g45()   (at91_cpu_identify() == ARCH_ID_AT91SAM9G45)
 #define cpu_is_at91sam9g45es() (at91_cpu_fully_identify() == ARCH_ID_AT91SAM9G45ES)
+#define cpu_is_at91sam9m10()    (cpu_is_at91sam9g45() && \
+                                (at91_exid_identify() == ARCH_EXID_AT91SAM9M10))
+#define cpu_is_at91sam9m46()    (cpu_is_at91sam9g45() && \
+                                (at91_exid_identify() == ARCH_EXID_AT91SAM9G46))
+#define cpu_is_at91sam9m11()    (cpu_is_at91sam9g45() && \
+                                (at91_exid_identify() == ARCH_EXID_AT91SAM9M11))
 #else
 #define cpu_is_at91sam9g45()   (0)
 #define cpu_is_at91sam9g45es() (0)
+#define cpu_is_at91sam9m10()   (0)
+#define cpu_is_at91sam9g46()   (0)
+#define cpu_is_at91sam9m11()   (0)
 #endif
 
 #ifdef CONFIG_ARCH_AT91CAP9
index 04c91e31c9c5be8a7c20ca5a31b6ebef99963f89..bfdd8ab26dc8a2399a379058df2e9a04f41c2888 100644 (file)
@@ -19,6 +19,7 @@
 #define PIN_BASE               NR_AIC_IRQS
 
 #define MAX_GPIO_BANKS         5
+#define NR_BUILTIN_GPIO                (PIN_BASE + (MAX_GPIO_BANKS * 32))
 
 /* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */
 
index 08322c44df1a98d287c0247321158de4d41bb99c..8c87d0c1b8f8b9b9dc0383bff155798454a6460f 100644 (file)
@@ -30,14 +30,50 @@ static inline u32 sdram_selfrefresh_enable(void)
 {
        u32 saved_lpr, lpr;
 
-       saved_lpr = at91_sys_read(AT91_DDRSDRC_LPR);
+       saved_lpr = at91_ramc_read(0, AT91_DDRSDRC_LPR);
 
        lpr = saved_lpr & ~AT91_DDRSDRC_LPCB;
-       at91_sys_write(AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH);
+       at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH);
        return saved_lpr;
 }
 
-#define sdram_selfrefresh_disable(saved_lpr)   at91_sys_write(AT91_DDRSDRC_LPR, saved_lpr)
+#define sdram_selfrefresh_disable(saved_lpr)   at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr)
+
+#elif defined(CONFIG_ARCH_AT91SAM9G45)
+#include <mach/at91sam9_ddrsdr.h>
+
+/* We manage both DDRAM/SDRAM controllers, we need more than one value to
+ * remember.
+ */
+static u32 saved_lpr1;
+
+static inline u32 sdram_selfrefresh_enable(void)
+{
+       /* Those tow values allow us to delay self-refresh activation
+        * to the maximum. */
+       u32 lpr0, lpr1;
+       u32 saved_lpr0;
+
+       saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR);
+       lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB;
+       lpr1 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
+
+       saved_lpr0 = at91_ramc_read(0, AT91_DDRSDRC_LPR);
+       lpr0 = saved_lpr0 & ~AT91_DDRSDRC_LPCB;
+       lpr0 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
+
+       /* self-refresh mode now */
+       at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);
+       at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1);
+
+       return saved_lpr0;
+}
+
+#define sdram_selfrefresh_disable(saved_lpr0)  \
+       do { \
+               at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); \
+               at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); \
+       } while (0)
 
 #else
 #include <mach/at91sam9_sdramc.h>
@@ -47,7 +83,6 @@ static inline u32 sdram_selfrefresh_enable(void)
  * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
  * handle those cases both here and in the Suspend-To-RAM support.
  */
-#define        AT91_SDRAMC     AT91_SDRAMC0
 #warning Assuming EB1 SDRAM controller is *NOT* used
 #endif
 
@@ -55,13 +90,13 @@ static inline u32 sdram_selfrefresh_enable(void)
 {
        u32 saved_lpr, lpr;
 
-       saved_lpr = at91_sys_read(AT91_SDRAMC_LPR);
+       saved_lpr = at91_ramc_read(0, AT91_SDRAMC_LPR);
 
        lpr = saved_lpr & ~AT91_SDRAMC_LPCB;
-       at91_sys_write(AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH);
+       at91_ramc_write(0, AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH);
        return saved_lpr;
 }
 
-#define sdram_selfrefresh_disable(saved_lpr)   at91_sys_write(AT91_SDRAMC_LPR, saved_lpr)
+#define sdram_selfrefresh_disable(saved_lpr)   at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr)
 
 #endif
index 9c5b48e68a71343e26f2f17c4856886fc0509373..b6b00a1f612546eb463036214455336381560e37 100644 (file)
 #include <mach/hardware.h>
 #include <mach/at91_pmc.h>
 
-#ifdef CONFIG_ARCH_AT91RM9200
+#if defined(CONFIG_ARCH_AT91RM9200)
 #include <mach/at91rm9200_mc.h>
 #elif defined(CONFIG_ARCH_AT91CAP9)
 #include <mach/at91cap9_ddrsdr.h>
+#elif defined(CONFIG_ARCH_AT91SAM9G45)
+#include <mach/at91sam9_ddrsdr.h>
 #else
 #include <mach/at91sam9_sdramc.h>
 #endif
@@ -30,7 +32,6 @@
  * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
  * handle those cases both here and in the Suspend-To-RAM support.
  */
-#define AT91_SDRAMC    AT91_SDRAMC0
 #warning Assuming EB1 SDRAM controller is *NOT* used
 #endif
 
@@ -113,12 +114,14 @@ ENTRY(at91_slow_clock)
        /*
         * Register usage:
         *  R1 = Base address of AT91_PMC
-        *  R2 = Base address of AT91_SDRAMC (or AT91_SYS on AT91RM9200)
+        *  R2 = Base address of RAM Controller (SDRAM, DDRSDR, or AT91_SYS)
         *  R3 = temporary register
         *  R4 = temporary register
+        *  R5 = Base address of second RAM Controller or 0 if not present
         */
        ldr     r1, .at91_va_base_pmc
        ldr     r2, .at91_va_base_sdramc
+       ldr     r5, .at91_va_base_ramc1
 
        /* Drain write buffer */
        mcr     p15, 0, r0, c7, c10, 4
@@ -127,20 +130,33 @@ ENTRY(at91_slow_clock)
        /* Put SDRAM in self-refresh mode */
        mov     r3, #1
        str     r3, [r2, #AT91_SDRAMC_SRR]
-#elif defined(CONFIG_ARCH_AT91CAP9)
-       /* Enable SDRAM self-refresh mode */
-       ldr     r3, [r2, #AT91_DDRSDRC_LPR - AT91_DDRSDRC]
-       str     r3, .saved_sam9_lpr
+#elif defined(CONFIG_ARCH_AT91CAP9) \
+       || defined(CONFIG_ARCH_AT91SAM9G45)
 
-       mov     r3, #AT91_DDRSDRC_LPCB_SELF_REFRESH
-       str     r3, [r2, #AT91_DDRSDRC_LPR - AT91_DDRSDRC]
+       /* prepare for DDRAM self-refresh mode */
+       ldr     r3, [r2, #AT91_DDRSDRC_LPR]
+       str     r3, .saved_sam9_lpr
+       bic     r3, #AT91_DDRSDRC_LPCB
+       orr     r3, #AT91_DDRSDRC_LPCB_SELF_REFRESH
+
+       /* figure out if we use the second ram controller */
+       cmp     r5, #0
+       ldrne   r4, [r5, #AT91_DDRSDRC_LPR]
+       strne   r4, .saved_sam9_lpr1
+       bicne   r4, #AT91_DDRSDRC_LPCB
+       orrne   r4, #AT91_DDRSDRC_LPCB_SELF_REFRESH
+
+       /* Enable DDRAM self-refresh mode */
+       str     r3, [r2, #AT91_DDRSDRC_LPR]
+       strne   r4, [r5, #AT91_DDRSDRC_LPR]
 #else
        /* Enable SDRAM self-refresh mode */
-       ldr     r3, [r2, #AT91_SDRAMC_LPR - AT91_SDRAMC]
+       ldr     r3, [r2, #AT91_SDRAMC_LPR]
        str     r3, .saved_sam9_lpr
 
-       mov     r3, #AT91_SDRAMC_LPCB_SELF_REFRESH
-       str     r3, [r2, #AT91_SDRAMC_LPR - AT91_SDRAMC]
+       bic     r3, #AT91_SDRAMC_LPCB
+       orr     r3, #AT91_SDRAMC_LPCB_SELF_REFRESH
+       str     r3, [r2, #AT91_SDRAMC_LPR]
 #endif
 
        /* Save Master clock setting */
@@ -247,14 +263,21 @@ ENTRY(at91_slow_clock)
 
 #ifdef CONFIG_ARCH_AT91RM9200
        /* Do nothing - self-refresh is automatically disabled. */
-#elif defined(CONFIG_ARCH_AT91CAP9)
-       /* Restore LPR on AT91CAP9 */
+#elif defined(CONFIG_ARCH_AT91CAP9) \
+       || defined(CONFIG_ARCH_AT91SAM9G45)
+       /* Restore LPR on AT91 with DDRAM */
        ldr     r3, .saved_sam9_lpr
-       str     r3, [r2, #AT91_DDRSDRC_LPR - AT91_DDRSDRC]
+       str     r3, [r2, #AT91_DDRSDRC_LPR]
+
+       /* if we use the second ram controller */
+       cmp     r5, #0
+       ldrne   r4, .saved_sam9_lpr1
+       strne   r4, [r5, #AT91_DDRSDRC_LPR]
+
 #else
-       /* Restore LPR on AT91SAM9 */
+       /* Restore LPR on AT91 with SDRAM */
        ldr     r3, .saved_sam9_lpr
-       str     r3, [r2, #AT91_SDRAMC_LPR - AT91_SDRAMC]
+       str     r3, [r2, #AT91_SDRAMC_LPR]
 #endif
 
        /* Restore registers, and return */
@@ -273,18 +296,29 @@ ENTRY(at91_slow_clock)
 .saved_sam9_lpr:
        .word 0
 
+.saved_sam9_lpr1:
+       .word 0
+
 .at91_va_base_pmc:
        .word AT91_VA_BASE_SYS + AT91_PMC
 
 #ifdef CONFIG_ARCH_AT91RM9200
 .at91_va_base_sdramc:
        .word AT91_VA_BASE_SYS
-#elif defined(CONFIG_ARCH_AT91CAP9)
+#elif defined(CONFIG_ARCH_AT91CAP9) \
+       || defined(CONFIG_ARCH_AT91SAM9G45)
 .at91_va_base_sdramc:
-       .word AT91_VA_BASE_SYS + AT91_DDRSDRC
+       .word AT91_VA_BASE_SYS + AT91_DDRSDRC0
 #else
 .at91_va_base_sdramc:
-       .word AT91_VA_BASE_SYS + AT91_SDRAMC
+       .word AT91_VA_BASE_SYS + AT91_SDRAMC0
+#endif
+
+.at91_va_base_ramc1:
+#if defined(CONFIG_ARCH_AT91SAM9G45)
+       .word AT91_VA_BASE_SYS + AT91_DDRSDRC1
+#else
+       .word 0
 #endif
 
 ENTRY(at91_slow_clock_sz)
index 72e405df0fb07dd4b363153f149742875725f7ad..d3f959e92b2dd2ef15e129a3bd79e52801811efe 100644 (file)
@@ -91,14 +91,23 @@ static struct clk uart_clk = {
        .parent = &pll1_clk,
 };
 
+static struct clk dummy_apb_pclk = {
+       .name = "BUSCLK",
+       .type = CLK_TYPE_PRIMARY,
+       .mode = CLK_MODE_XTAL,
+};
+
 static struct clk_lookup lookups[] = {
-       {                       /* UART0 */
-        .dev_id = "uarta",
-        .clk = &uart_clk,
-        }, {                   /* UART1 */
-            .dev_id = "uartb",
-            .clk = &uart_clk,
-            }
+       {                       /* Bus clock */
+               .con_id = "apb_pclk",
+               .clk = &dummy_apb_pclk,
+       }, {                    /* UART0 */
+               .dev_id = "uarta",
+               .clk = &uart_clk,
+       }, {                    /* UART1 */
+               .dev_id = "uartb",
+               .clk = &uart_clk,
+       }
 };
 
 static struct amba_device *amba_devs[] __initdata = {
index dbaae5f746a1ced107faf56439c7f2bf71bc845c..eb34bd1251d491224f95216ca882070baa5933ce 100644 (file)
@@ -30,7 +30,6 @@ config ARCH_CLEP7312
 config ARCH_EDB7211
        bool "EDB7211"
        select ISA
-       select ARCH_DISCONTIGMEM_ENABLE
        select ARCH_SPARSEMEM_ENABLE
        select ARCH_SELECT_MEMORY_MODEL
        help
index 09fb57e452130d0766f4fe3eab0219138572ea13..3c3bf45039ff05f44c122adbc3bb1cceded613ab 100644 (file)
@@ -32,7 +32,6 @@ fixup_clep7312(struct machine_desc *desc, struct tag *tags,
        mi->nr_banks=1;
        mi->bank[0].start = 0xc0000000;
        mi->bank[0].size = 0x01000000;
-       mi->bank[0].node = 0;
 }
 
 
index dc81cc68595de96edd2f9e2679d1cd855bace03f..4a7a2322979a17c3dcb833bf44122f8af51bba8a 100644 (file)
@@ -18,6 +18,7 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 #include <linux/init.h>
+#include <linux/memblock.h>
 #include <linux/types.h>
 #include <linux/string.h>
 
 
 extern void edb7211_map_io(void);
 
+/* Reserve screen memory region at the start of main system memory. */
+static void __init edb7211_reserve(void)
+{
+       memblock_reserve(PHYS_OFFSET, 0x00020000);
+}
+
 static void __init
 fixup_edb7211(struct machine_desc *desc, struct tag *tags,
              char **cmdline, struct meminfo *mi)
@@ -43,10 +50,8 @@ fixup_edb7211(struct machine_desc *desc, struct tag *tags,
         */
        mi->bank[0].start = 0xc0000000;
        mi->bank[0].size = 8*1024*1024;
-       mi->bank[0].node = 0;
        mi->bank[1].start = 0xc1000000;
        mi->bank[1].size = 8*1024*1024;
-       mi->bank[1].node = 1;
        mi->nr_banks = 2;
 }
 
@@ -57,6 +62,7 @@ MACHINE_START(EDB7211, "CL-EDB7211 (EP7211 eval board)")
        .boot_params    = 0xc0020100,   /* 0xc0000000 - 0xc001ffff can be video RAM */
        .fixup          = fixup_edb7211,
        .map_io         = edb7211_map_io,
+       .reserve        = edb7211_reserve,
        .init_irq       = clps711x_init_irq,
        .timer          = &clps711x_timer,
 MACHINE_END
index 7430e4049d87b1ca789b372f2641c4088547c31c..a696099aa4f8f22ddd32e836b4bbb124acdc4ea0 100644 (file)
@@ -39,7 +39,6 @@ struct meminfo memmap = {
                {
                        .start  = 0xC0000000,
                        .size   = 0x01000000,
-                       .node   = 0
                },
        },
 };
index fedd8076a689a3555a986b5e96bc9348cf4ae77f..072cc6b61ba30b7b6e363040b40d409e8a43e38f 100644 (file)
@@ -11,6 +11,7 @@
  *
 */
 
+#include <mach/hardware.h>
 #include <asm/hardware/clps7111.h>
 
                .macro  addruart, rx, tmp
index f70d52be48a2a61c88b7276a830b7b3abf17aee5..f45c8e892cb5a0ae9cdf0c9cd2c78c2dfa61bb07 100644 (file)
@@ -20,7 +20,6 @@
 #ifndef __ASM_ARCH_MEMORY_H
 #define __ASM_ARCH_MEMORY_H
 
-
 /*
  * Physical DRAM offset.
  */
@@ -72,7 +71,6 @@
  *     node 2:  0xd0000000 - 0xd7ffffff
  *     node 3:  0xd8000000 - 0xdfffffff
  */
-#define NODE_MEM_SIZE_BITS     24
 #define SECTION_SIZE_BITS      24
 #define MAX_PHYSMEM_BITS       32
 
index 2ec3095ffb7b564e61a54bcc4e366f32b87e671c..b280efb1fa120806b1cfe85bdea1f90d1bc0caaf 100644 (file)
@@ -25,6 +25,7 @@
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/physmap.h>
 #include <linux/regulator/machine.h>
+#include <linux/regulator/tps6507x.h>
 #include <linux/mfd/tps6507x.h>
 #include <linux/input/tps6507x-ts.h>
 
@@ -469,6 +470,11 @@ struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
        },
 };
 
+/* We take advantage of the fact that both defdcdc{2,3} are tied high */
+static struct tps6507x_reg_platform_data tps6507x_platform_data = {
+       .defdcdc_default = true,
+};
+
 struct regulator_init_data tps65070_regulator_data[] = {
        /* dcdc1 */
        {
@@ -494,6 +500,7 @@ struct regulator_init_data tps65070_regulator_data[] = {
                },
                .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
                .consumer_supplies = tps65070_dcdc2_consumers,
+               .driver_data = &tps6507x_platform_data,
        },
 
        /* dcdc3 */
@@ -507,6 +514,7 @@ struct regulator_init_data tps65070_regulator_data[] = {
                },
                .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
                .consumer_supplies = tps65070_dcdc3_consumers,
+               .driver_data = &tps6507x_platform_data,
        },
 
        /* ldo1 */
index a91edfb8beeac3109542989c957256436fd5a5c8..22eb97c1c30b48c89e6e2f397f73ee5727f5240a 100644 (file)
  * below 128M
  */
 static inline void
-__arch_adjust_zones(int node, unsigned long *size, unsigned long *holes)
+__arch_adjust_zones(unsigned long *size, unsigned long *holes)
 {
        unsigned int sz = (128<<20) >> PAGE_SHIFT;
 
-       if (node != 0)
-               sz = 0;
-
        size[1] = size[0] - sz;
        size[0] = sz;
 }
 
-#define arch_adjust_zones(node, zone_size, holes) \
-        if ((meminfo.bank[0].size >> 20) > 128) __arch_adjust_zones(node, zone_size, holes)
+#define arch_adjust_zones(zone_size, holes) \
+        if ((meminfo.bank[0].size >> 20) > 128) __arch_adjust_zones(zone_size, holes)
 
 #define ISA_DMA_THRESHOLD      (PHYS_OFFSET + (128<<20) - 1)
 #define MAX_DMA_ADDRESS                (PAGE_OFFSET + (128<<20))
index 3a1a855bfdcace3e35591a50ede18edb6f2a1ec3..f744f676783f3024c0d18be2bff733432b260d9c 100644 (file)
@@ -13,7 +13,6 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/mtd/physmap.h>
 
 #include <mach/hardware.h>
 
 #include <asm/mach/arch.h>
 
 
-static struct physmap_flash_data adssphere_flash_data = {
-       .width          = 4,
-};
-
-static struct resource adssphere_flash_resource = {
-       .start          = EP93XX_CS6_PHYS_BASE,
-       .end            = EP93XX_CS6_PHYS_BASE + SZ_32M - 1,
-       .flags          = IORESOURCE_MEM,
-};
-
-static struct platform_device adssphere_flash = {
-       .name           = "physmap-flash",
-       .id             = 0,
-       .dev            = {
-               .platform_data  = &adssphere_flash_data,
-       },
-       .num_resources  = 1,
-       .resource       = &adssphere_flash_resource,
-};
-
 static struct ep93xx_eth_data __initdata adssphere_eth_data = {
        .phy_id         = 1,
 };
@@ -48,8 +27,7 @@ static struct ep93xx_eth_data __initdata adssphere_eth_data = {
 static void __init adssphere_init_machine(void)
 {
        ep93xx_init_devices();
-       platform_device_register(&adssphere_flash);
-
+       ep93xx_register_flash(4, EP93XX_CS6_PHYS_BASE, SZ_32M);
        ep93xx_register_eth(&adssphere_eth_data, 1);
 }
 
index e29bdef9b2e201ea345c4139487e4895dffad94d..7f3039761d91aecf0c0c46c84424f5ad4c1bf743 100644 (file)
@@ -185,7 +185,7 @@ static struct clk_lookup clocks[] = {
        INIT_CK(NULL,                   "pll1",         &clk_pll1),
        INIT_CK(NULL,                   "fclk",         &clk_f),
        INIT_CK(NULL,                   "hclk",         &clk_h),
-       INIT_CK(NULL,                   "pclk",         &clk_p),
+       INIT_CK(NULL,                   "apb_pclk",     &clk_p),
        INIT_CK(NULL,                   "pll2",         &clk_pll2),
        INIT_CK("ep93xx-ohci",          NULL,           &clk_usb_host),
        INIT_CK("ep93xx-keypad",        NULL,           &clk_keypad),
index 9092677f63eb739a529d137b5b1be891b11f53da..8e37a045188cbcf4bc334d521186b8d4a2871d5d 100644 (file)
@@ -29,6 +29,7 @@
 #include <linux/termios.h>
 #include <linux/amba/bus.h>
 #include <linux/amba/serial.h>
+#include <linux/mtd/physmap.h>
 #include <linux/i2c.h>
 #include <linux/i2c-gpio.h>
 #include <linux/spi/spi.h>
@@ -215,8 +216,8 @@ void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
        spin_lock_irqsave(&syscon_swlock, flags);
 
        val = __raw_readl(EP93XX_SYSCON_DEVCFG);
-       val |= set_bits;
        val &= ~clear_bits;
+       val |= set_bits;
        __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
        __raw_writel(val, EP93XX_SYSCON_DEVCFG);
 
@@ -347,6 +348,43 @@ static struct platform_device ep93xx_ohci_device = {
 };
 
 
+/*************************************************************************
+ * EP93xx physmap'ed flash
+ *************************************************************************/
+static struct physmap_flash_data ep93xx_flash_data;
+
+static struct resource ep93xx_flash_resource = {
+       .flags          = IORESOURCE_MEM,
+};
+
+static struct platform_device ep93xx_flash = {
+       .name           = "physmap-flash",
+       .id             = 0,
+       .dev            = {
+               .platform_data  = &ep93xx_flash_data,
+       },
+       .num_resources  = 1,
+       .resource       = &ep93xx_flash_resource,
+};
+
+/**
+ * ep93xx_register_flash() - Register the external flash device.
+ * @width:     bank width in octets
+ * @start:     resource start address
+ * @size:      resource size
+ */
+void __init ep93xx_register_flash(unsigned int width,
+                                 resource_size_t start, resource_size_t size)
+{
+       ep93xx_flash_data.width         = width;
+
+       ep93xx_flash_resource.start     = start;
+       ep93xx_flash_resource.end       = start + size - 1;
+
+       platform_device_register(&ep93xx_flash);
+}
+
+
 /*************************************************************************
  * EP93xx ethernet peripheral handling
  *************************************************************************/
@@ -620,6 +658,11 @@ static struct platform_device ep93xx_fb_device = {
        .resource               = ep93xx_fb_resource,
 };
 
+static struct platform_device ep93xx_bl_device = {
+       .name           = "ep93xx-bl",
+       .id             = -1,
+};
+
 /**
  * ep93xx_register_fb - Register the framebuffer platform device.
  * @data:      platform specific framebuffer configuration (__initdata)
@@ -628,6 +671,7 @@ void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
 {
        ep93xxfb_data = *data;
        platform_device_register(&ep93xx_fb_device);
+       platform_device_register(&ep93xx_bl_device);
 }
 
 
index 3884182cd3623e8799b00323115d097f1894e4e9..c2ce9034ba87f5b856cb6e1cae89fb69060b8ffe 100644 (file)
@@ -27,7 +27,6 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/mtd/physmap.h>
 #include <linux/gpio.h>
 #include <linux/i2c.h>
 #include <linux/i2c-gpio.h>
 #include <asm/mach/arch.h>
 
 
-static struct physmap_flash_data edb93xx_flash_data;
-
-static struct resource edb93xx_flash_resource = {
-       .flags          = IORESOURCE_MEM,
-};
-
-static struct platform_device edb93xx_flash = {
-       .name           = "physmap-flash",
-       .id             = 0,
-       .dev            = {
-               .platform_data  = &edb93xx_flash_data,
-       },
-       .num_resources  = 1,
-       .resource       = &edb93xx_flash_resource,
-};
-
-static void __init __edb93xx_register_flash(unsigned int width,
-                       resource_size_t start, resource_size_t size)
-{
-       edb93xx_flash_data.width        = width;
-       edb93xx_flash_resource.start    = start;
-       edb93xx_flash_resource.end      = start + size - 1;
-
-       platform_device_register(&edb93xx_flash);
-}
-
 static void __init edb93xx_register_flash(void)
 {
        if (machine_is_edb9307() || machine_is_edb9312() ||
            machine_is_edb9315()) {
-               __edb93xx_register_flash(4, EP93XX_CS6_PHYS_BASE, SZ_32M);
+               ep93xx_register_flash(4, EP93XX_CS6_PHYS_BASE, SZ_32M);
        } else {
-               __edb93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M);
+               ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M);
        }
 }
 
index a809618e9f059043b706bf25e57ffcf070dd3ff4..d97168c0ba336fa22179328b9dc72316807c13bb 100644 (file)
@@ -13,7 +13,6 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/mtd/physmap.h>
 
 #include <mach/hardware.h>
 
 #include <asm/mach/arch.h>
 
 
-static struct physmap_flash_data gesbc9312_flash_data = {
-       .width          = 4,
-};
-
-static struct resource gesbc9312_flash_resource = {
-       .start          = EP93XX_CS6_PHYS_BASE,
-       .end            = EP93XX_CS6_PHYS_BASE + SZ_8M - 1,
-       .flags          = IORESOURCE_MEM,
-};
-
-static struct platform_device gesbc9312_flash = {
-       .name           = "physmap-flash",
-       .id             = 0,
-       .dev            = {
-               .platform_data  = &gesbc9312_flash_data,
-       },
-       .num_resources  = 1,
-       .resource       = &gesbc9312_flash_resource,
-};
-
 static struct ep93xx_eth_data __initdata gesbc9312_eth_data = {
        .phy_id         = 1,
 };
@@ -48,8 +27,7 @@ static struct ep93xx_eth_data __initdata gesbc9312_eth_data = {
 static void __init gesbc9312_init_machine(void)
 {
        ep93xx_init_devices();
-       platform_device_register(&gesbc9312_flash);
-
+       ep93xx_register_flash(4, EP93XX_CS6_PHYS_BASE, SZ_8M);
        ep93xx_register_eth(&gesbc9312_eth_data, 0);
 }
 
index 9a4413dd44bb6e1cd2ac6cbc291cfd87b7220d6f..a6c09176334ce1a7028705feeddfc38ddadf235e 100644 (file)
@@ -43,6 +43,9 @@ static inline void ep93xx_devcfg_clear_bits(unsigned int bits)
 
 unsigned int ep93xx_chip_revision(void);
 
+void ep93xx_register_flash(unsigned int width,
+                          resource_size_t start, resource_size_t size);
+
 void ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr);
 void ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
                         struct i2c_board_info *devices, int num);
index 1cc911b4efa659dbfbc7e35aee6f80236e81e800..2ba776320a8282e978d989eea0377d6511dc3ab7 100644 (file)
@@ -14,7 +14,6 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/mtd/physmap.h>
 #include <linux/io.h>
 
 #include <mach/hardware.h>
  * Micro9-Lite uses a separate MTD map driver for flash support
  * Micro9-Slim has up to 64MB of either 32-bit or 16-bit flash on CS1
  *************************************************************************/
-static struct physmap_flash_data micro9_flash_data;
-
-static struct resource micro9_flash_resource = {
-       .start          = EP93XX_CS1_PHYS_BASE,
-       .end            = EP93XX_CS1_PHYS_BASE + SZ_64M - 1,
-       .flags          = IORESOURCE_MEM,
-};
-
-static struct platform_device micro9_flash = {
-       .name           = "physmap-flash",
-       .id             = 0,
-       .dev            = {
-               .platform_data  = &micro9_flash_data,
-       },
-       .num_resources  = 1,
-       .resource       = &micro9_flash_resource,
-};
-
-static void __init __micro9_register_flash(unsigned int width)
-{
-       micro9_flash_data.width = width;
-
-       platform_device_register(&micro9_flash);
-}
-
 static unsigned int __init micro9_detect_bootwidth(void)
 {
        u32 v;
@@ -70,10 +44,17 @@ static unsigned int __init micro9_detect_bootwidth(void)
 
 static void __init micro9_register_flash(void)
 {
+       unsigned int width;
+
        if (machine_is_micro9())
-               __micro9_register_flash(4);
+               width = 4;
        else if (machine_is_micro9m() || machine_is_micro9s())
-               __micro9_register_flash(micro9_detect_bootwidth());
+               width = micro9_detect_bootwidth();
+       else
+               width = 0;
+
+       if (width)
+               ep93xx_register_flash(width, EP93XX_CS1_PHYS_BASE, SZ_64M);
 }
 
 
index 388aec95f60e39fb304ac48c655c413f33129c45..5dded5884133f89e27898567a61163c583fa8f3d 100644 (file)
@@ -18,7 +18,6 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
-#include <linux/mtd/physmap.h>
 #include <linux/gpio.h>
 #include <linux/i2c.h>
 #include <linux/i2c-gpio.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
-static struct physmap_flash_data simone_flash_data = {
-       .width          = 2,
-};
-
-static struct resource simone_flash_resource = {
-       .start          = EP93XX_CS6_PHYS_BASE,
-       .end            = EP93XX_CS6_PHYS_BASE + SZ_8M - 1,
-       .flags          = IORESOURCE_MEM,
-};
-
-static struct platform_device simone_flash = {
-       .name           = "physmap-flash",
-       .id             = 0,
-       .num_resources  = 1,
-       .resource       = &simone_flash_resource,
-       .dev = {
-               .platform_data  = &simone_flash_data,
-       },
-};
-
 static struct ep93xx_eth_data __initdata simone_eth_data = {
        .phy_id         = 1,
 };
@@ -77,8 +56,7 @@ static struct i2c_board_info __initdata simone_i2c_board_info[] = {
 static void __init simone_init_machine(void)
 {
        ep93xx_init_devices();
-
-       platform_device_register(&simone_flash);
+       ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_8M);
        ep93xx_register_eth(&simone_eth_data, 1);
        ep93xx_register_fb(&simone_fb_info);
        ep93xx_register_i2c(&simone_i2c_gpio_data, simone_i2c_board_info,
index ae7319e588c7e59ca570173d47d1e95a0fe06d0f..93aeab8af705e8dd3dde989b1658e81e6ed60062 100644 (file)
@@ -17,7 +17,6 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
 #include <linux/m48t86.h>
-#include <linux/mtd/physmap.h>
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
 
@@ -173,31 +172,13 @@ static struct platform_device ts72xx_nand_flash = {
 };
 
 
-/*************************************************************************
- * NOR flash (TS-7200 only)
- *************************************************************************/
-static struct physmap_flash_data ts72xx_nor_data = {
-       .width          = 2,
-};
-
-static struct resource ts72xx_nor_resource = {
-       .start          = EP93XX_CS6_PHYS_BASE,
-       .end            = EP93XX_CS6_PHYS_BASE + SZ_16M - 1,
-       .flags          = IORESOURCE_MEM,
-};
-
-static struct platform_device ts72xx_nor_flash = {
-       .name                   = "physmap-flash",
-       .id                     = 0,
-       .dev.platform_data      = &ts72xx_nor_data,
-       .resource               = &ts72xx_nor_resource,
-       .num_resources          = 1,
-};
-
 static void __init ts72xx_register_flash(void)
 {
+       /*
+        * TS7200 has NOR flash all other TS72xx board have NAND flash.
+        */
        if (board_is_ts7200()) {
-               platform_device_register(&ts72xx_nor_flash);
+               ep93xx_register_flash(2, EP93XX_CS6_PHYS_BASE, SZ_16M);
        } else {
                resource_size_t start;
 
index e3bc3f6f6b105d42c8d4f73d33b4d5f92fc15a81..88b3dd89be89a20b65761de100c7799798ccb1df 100644 (file)
@@ -232,7 +232,7 @@ EXPORT_SYMBOL(__bus_to_virt);
 
 unsigned long __pfn_to_bus(unsigned long pfn)
 {
-       return __pfn_to_phys(pfn) + (fb_bus_sdram_offset() - PHYS_OFFSET));
+       return __pfn_to_phys(pfn) + (fb_bus_sdram_offset() - PHYS_OFFSET);
 }
 EXPORT_SYMBOL(__pfn_to_bus);
 
index a9ee8f0d48b7f6792ea5004844649c3acb3a5bd0..27cafd12f033cbba19bd507e5a90ac198c1db8e1 100644 (file)
  *
 */
 
-               .equ    io_virt, IO_BASE
-               .equ    io_phys, IO_START
+#include <mach/hardware.h>
+
+               .equ    io_virt, IO_VIRT
+               .equ    io_phys, IO_PHYS
 
                .macro  addruart, rx, tmp
                mrc     p15, 0, \rx, c1, c0
diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h
new file mode 100644 (file)
index 0000000..5f96e15
--- /dev/null
@@ -0,0 +1 @@
+void integrator_reserve(void);
index b02cfc06e0aeeff452a2c3813523fccd53f1edf2..8f4fb6d638f7ea66717a5afb5d962ef0d88723a3 100644 (file)
@@ -14,6 +14,7 @@
 #include <linux/spinlock.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
+#include <linux/memblock.h>
 #include <linux/sched.h>
 #include <linux/smp.h>
 #include <linux/termios.h>
@@ -30,6 +31,7 @@
 #include <asm/system.h>
 #include <asm/leds.h>
 #include <asm/mach/time.h>
+#include <asm/pgtable.h>
 
 static struct amba_pl010_data integrator_uart_data;
 
@@ -119,8 +121,13 @@ static struct clk uartclk = {
        .rate   = 14745600,
 };
 
+static struct clk dummy_apb_pclk;
+
 static struct clk_lookup lookups[] = {
-       {       /* UART0 */
+       {       /* Bus clock */
+               .con_id         = "apb_pclk",
+               .clk            = &dummy_apb_pclk,
+       }, {    /* UART0 */
                .dev_id         = "mb:16",
                .clk            = &uartclk,
        }, {    /* UART1 */
@@ -215,3 +222,13 @@ void cm_control(u32 mask, u32 set)
 }
 
 EXPORT_SYMBOL(cm_control);
+
+/*
+ * We need to stop things allocating the low memory; ideally we need a
+ * better implementation of GFP_DMA which does not assume that DMA-able
+ * memory starts at zero.
+ */
+void __init integrator_reserve(void)
+{
+       memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET);
+}
index 227cf4d05088ec85bf870e1423b7044d0758d133..6ab5a03ab9d8b0a7f45311595b0ee1fa16474ef3 100644 (file)
@@ -48,6 +48,8 @@
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
 
+#include "common.h"
+
 /* 
  * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx
  * is the (PA >> 12).
@@ -502,6 +504,7 @@ MACHINE_START(INTEGRATOR, "ARM-Integrator")
        .io_pg_offst    = ((0xf1600000) >> 18) & 0xfffc,
        .boot_params    = 0x00000100,
        .map_io         = ap_map_io,
+       .reserve        = integrator_reserve,
        .init_irq       = ap_init_irq,
        .timer          = &ap_timer,
        .init_machine   = ap_init,
index cde57b2b83b57a36288382ef5b57a39ae895d802..05db40e3c4f75a7fcf661718269cdcf330d7f9cc 100644 (file)
@@ -43,6 +43,8 @@
 
 #include <plat/timer-sp.h>
 
+#include "common.h"
+
 #define INTCP_PA_FLASH_BASE            0x24000000
 #define INTCP_FLASH_SIZE               SZ_32M
 
@@ -601,6 +603,7 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
        .io_pg_offst    = ((0xf1600000) >> 18) & 0xfffc,
        .boot_params    = 0x00000100,
        .map_io         = intcp_map_io,
+       .reserve        = integrator_reserve,
        .init_irq       = intcp_init_irq,
        .timer          = &cp_timer,
        .init_machine   = intcp_init,
index 25b1da9a5035469fcf4355e80082f3dd7af586c8..7415e4338651e7c84e2e3a587092a1c1859cda1d 100644 (file)
@@ -69,6 +69,4 @@ static inline unsigned long __lbus_to_virt(dma_addr_t x)
 #endif /* CONFIG_ARCH_IOP13XX */
 #endif /* !ASSEMBLY */
 
-#define PFN_TO_NID(addr)       (0)
-
 #endif
index f4fbb5ec645b0a04c27318319969441ef897c10c..61cd4d64b98596c7507dcaf67d069dbe22508e50 100644 (file)
@@ -348,7 +348,7 @@ int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size)
  * This is really ugly and we need a better way of specifying
  * DMA-capable regions of memory.
  */
-void __init ixp4xx_adjust_zones(int node, unsigned long *zone_size,
+void __init ixp4xx_adjust_zones(unsigned long *zone_size,
        unsigned long *zhole_size)
 {
        unsigned int sz = SZ_64M >> PAGE_SHIFT;
@@ -356,7 +356,7 @@ void __init ixp4xx_adjust_zones(int node, unsigned long *zone_size,
        /*
         * Only adjust if > 64M on current system
         */
-       if (node || (zone_size[0] <= sz))
+       if (zone_size[0] <= sz)
                return;
 
        zone_size[1] = zone_size[0] - sz;
index 98f5e5e2098001398d45930d2fb5d33b3452f0ea..0136eaa29224a538cfdd65179dd59432fa7b1488 100644 (file)
 
 #if !defined(__ASSEMBLY__) && defined(CONFIG_PCI)
 
-void ixp4xx_adjust_zones(int node, unsigned long *size, unsigned long *holes);
+void ixp4xx_adjust_zones(unsigned long *size, unsigned long *holes);
 
-#define arch_adjust_zones(node, size, holes) \
-       ixp4xx_adjust_zones(node, size, holes)
+#define arch_adjust_zones(size, holes) \
+       ixp4xx_adjust_zones(size, holes)
 
 #define ISA_DMA_THRESHOLD (SZ_64M - 1)
 #define MAX_DMA_ADDRESS                (PAGE_OFFSET + SZ_64M)
index 7221c20b2afa241b5854c90b90f24352b73572c8..f781164e623fc89e7a4362b3d039f9e58688fd0d 100644 (file)
@@ -77,7 +77,7 @@ struct spi_board_info __initdata qnap_tsx1x_spi_slave_info[] = {
        },
 };
 
-void qnap_tsx1x_register_flash(void)
+void __init qnap_tsx1x_register_flash(void)
 {
        spi_register_board_info(qnap_tsx1x_spi_slave_info,
                                ARRAY_SIZE(qnap_tsx1x_spi_slave_info));
index 9a592962a6ea0df6f7546d847a50b150d45243c1..7fa037361b55a5e23738f9a37c8637f64d91b56e 100644 (file)
@@ -1,7 +1,7 @@
 #ifndef __ARCH_KIRKWOOD_TSX1X_COMMON_H
 #define __ARCH_KIRKWOOD_TSX1X_COMMON_H
 
-extern void qnap_tsx1x_register_flash(void);
+extern void __init qnap_tsx1x_register_flash(void);
 extern void qnap_tsx1x_power_off(void);
 
 #endif
diff --git a/arch/arm/mach-l7200/Makefile b/arch/arm/mach-l7200/Makefile
deleted file mode 100644 (file)
index 4bd8ebd..0000000
+++ /dev/null
@@ -1,11 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-
-# Object file lists.
-
-obj-y                  := core.o
-obj-m                  :=
-obj-n                  :=
-obj-                   :=
-
diff --git a/arch/arm/mach-l7200/Makefile.boot b/arch/arm/mach-l7200/Makefile.boot
deleted file mode 100644 (file)
index 6c72ecb..0000000
+++ /dev/null
@@ -1,2 +0,0 @@
-   zreladdr-y  := 0xf0008000
-
diff --git a/arch/arm/mach-l7200/core.c b/arch/arm/mach-l7200/core.c
deleted file mode 100644 (file)
index 50d2324..0000000
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- *  linux/arch/arm/mm/mm-lusl7200.c
- *
- *  Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
- *
- *  Extra MM routines for L7200 architecture
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/device.h>
-
-#include <asm/types.h>
-#include <asm/irq.h>
-#include <asm/mach-types.h>
-#include <mach/hardware.h>
-#include <asm/page.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-/*
- * IRQ base register
- */
-#define        IRQ_BASE        (IO_BASE_2 + 0x1000)
-
-/* 
- * Normal IRQ registers
- */
-#define IRQ_STATUS     (*(volatile unsigned long *) (IRQ_BASE + 0x000))
-#define IRQ_RAWSTATUS  (*(volatile unsigned long *) (IRQ_BASE + 0x004))
-#define IRQ_ENABLE     (*(volatile unsigned long *) (IRQ_BASE + 0x008))
-#define IRQ_ENABLECLEAR        (*(volatile unsigned long *) (IRQ_BASE + 0x00c))
-#define IRQ_SOFT       (*(volatile unsigned long *) (IRQ_BASE + 0x010))
-#define IRQ_SOURCESEL  (*(volatile unsigned long *) (IRQ_BASE + 0x018))
-
-/* 
- * Fast IRQ registers
- */
-#define FIQ_STATUS     (*(volatile unsigned long *) (IRQ_BASE + 0x100))
-#define FIQ_RAWSTATUS  (*(volatile unsigned long *) (IRQ_BASE + 0x104))
-#define FIQ_ENABLE     (*(volatile unsigned long *) (IRQ_BASE + 0x108))
-#define FIQ_ENABLECLEAR        (*(volatile unsigned long *) (IRQ_BASE + 0x10c))
-#define FIQ_SOFT       (*(volatile unsigned long *) (IRQ_BASE + 0x110))
-#define FIQ_SOURCESEL  (*(volatile unsigned long *) (IRQ_BASE + 0x118))
-
-static void l7200_mask_irq(unsigned int irq)
-{
-       IRQ_ENABLECLEAR = 1 << irq;
-}
-
-static void l7200_unmask_irq(unsigned int irq)
-{
-       IRQ_ENABLE = 1 << irq;
-}
-
-static struct irq_chip l7200_irq_chip = {
-       .ack            = l7200_mask_irq,
-       .mask           = l7200_mask_irq,
-       .unmask         = l7200_unmask_irq
-};
-static void __init l7200_init_irq(void)
-{
-       int irq;
-
-       IRQ_ENABLECLEAR = 0xffffffff;   /* clear all interrupt enables */
-       FIQ_ENABLECLEAR = 0xffffffff;   /* clear all fast interrupt enables */
-
-       for (irq = 0; irq < NR_IRQS; irq++) {
-               set_irq_chip(irq, &l7200_irq_chip);
-               set_irq_flags(irq, IRQF_VALID);
-               set_irq_handler(irq, handle_level_irq);
-       }
-
-       init_FIQ();
-}
-
-static struct map_desc l7200_io_desc[] __initdata = {
-       { IO_BASE,      IO_START,       IO_SIZE,        MT_DEVICE },
-       { IO_BASE_2,    IO_START_2,     IO_SIZE_2,      MT_DEVICE },
-       { AUX_BASE,     AUX_START,      AUX_SIZE,       MT_DEVICE },
-       { FLASH1_BASE,  FLASH1_START,   FLASH1_SIZE,    MT_DEVICE },
-       { FLASH2_BASE,  FLASH2_START,   FLASH2_SIZE,    MT_DEVICE }
-};
-
-static void __init l7200_map_io(void)
-{
-       iotable_init(l7200_io_desc, ARRAY_SIZE(l7200_io_desc));
-}
-
-MACHINE_START(L7200, "LinkUp Systems L7200")
-       /* Maintainer: Steve Hill / Scott McConnell */
-       .phys_io        = 0x80040000,
-       .io_pg_offst    = ((0xd0000000) >> 18) & 0xfffc,
-       .map_io         = l7200_map_io,
-       .init_irq       = l7200_init_irq,
-MACHINE_END
-
diff --git a/arch/arm/mach-l7200/include/mach/aux_reg.h b/arch/arm/mach-l7200/include/mach/aux_reg.h
deleted file mode 100644 (file)
index 4671558..0000000
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * arch/arm/mach-l7200/include/mach/aux_reg.h
- *
- * Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
- *
- * Changelog:
- *   08-02-2000        SJH     Created file
- */
-#ifndef _ASM_ARCH_AUXREG_H
-#define _ASM_ARCH_AUXREG_H
-
-#include <mach/hardware.h>
-
-#define l7200aux_reg   *((volatile unsigned int *) (AUX_BASE))
-
-/*
- * Auxillary register values
- */
-#define AUX_CLEAR              0x00000000
-#define AUX_DIAG_LED_ON                0x00000002
-#define AUX_RTS_UART1          0x00000004
-#define AUX_DTR_UART1          0x00000008
-#define AUX_KBD_COLUMN_12_HIGH 0x00000010
-#define AUX_KBD_COLUMN_12_OFF  0x00000020
-#define AUX_KBD_COLUMN_13_HIGH 0x00000040
-#define AUX_KBD_COLUMN_13_OFF  0x00000080
-
-#endif
diff --git a/arch/arm/mach-l7200/include/mach/debug-macro.S b/arch/arm/mach-l7200/include/mach/debug-macro.S
deleted file mode 100644 (file)
index b69ed34..0000000
+++ /dev/null
@@ -1,40 +0,0 @@
-/* arch/arm/mach-l7200/include/mach/debug-macro.S
- *
- * Debugging macro include header
- *
- *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
-
-               .equ    io_virt, IO_BASE
-               .equ    io_phys, IO_START
-
-               .macro  addruart, rx, tmp
-               mrc     p15, 0, \rx, c1, c0
-               tst     \rx, #1                 @ MMU enabled?
-               moveq   \rx, #io_phys           @ physical base address
-               movne   \rx, #io_virt           @ virtual address
-               add     \rx, \rx, #0x00044000   @ UART1
-@              add     \rx, \rx, #0x00045000   @ UART2
-               .endm
-
-               .macro  senduart,rd,rx
-               str     \rd, [\rx, #0x0]        @ UARTDR
-               .endm
-
-               .macro  waituart,rd,rx
-1001:          ldr     \rd, [\rx, #0x18]       @ UARTFLG
-               tst     \rd, #1 << 5            @ UARTFLGUTXFF - 1 when full
-               bne     1001b
-               .endm
-
-               .macro  busyuart,rd,rx
-1001:          ldr     \rd, [\rx, #0x18]       @ UARTFLG
-               tst     \rd, #1 << 3            @ UARTFLGUBUSY - 1 when busy
-               bne     1001b
-               .endm
diff --git a/arch/arm/mach-l7200/include/mach/entry-macro.S b/arch/arm/mach-l7200/include/mach/entry-macro.S
deleted file mode 100644 (file)
index 1726d91..0000000
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * arch/arm/mach-l7200/include/mach/entry-macro.S
- *
- * Low-level IRQ helper macros for L7200-based platforms
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-#include <mach/hardware.h>
-
-               .equ    irq_base_addr,  IO_BASE_2
-
-               .macro  disable_fiq
-               .endm
-
-               .macro  get_irqnr_preamble, base, tmp
-               .endm
-
-               .macro  arch_ret_to_user, tmp1, tmp2
-               .endm
-
-               .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-               mov     \irqstat, #irq_base_addr                @ Virt addr IRQ regs
-               add     \irqstat, \irqstat, #0x00001000         @ Status reg
-               ldr     \irqstat, [\irqstat, #0]                @ get interrupts
-               mov     \irqnr, #0
-1001:          tst     \irqstat, #1
-               addeq   \irqnr, \irqnr, #1
-               moveq   \irqstat, \irqstat, lsr #1
-               tsteq   \irqnr, #32
-               beq     1001b
-               teq     \irqnr, #32
-               .endm
-
diff --git a/arch/arm/mach-l7200/include/mach/gp_timers.h b/arch/arm/mach-l7200/include/mach/gp_timers.h
deleted file mode 100644 (file)
index 2b7086a..0000000
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * arch/arm/mach-l7200/include/mach/gp_timers.h
- *
- * Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
- *
- * Changelog:
- *   07-28-2000        SJH     Created file
- *   08-02-2000        SJH     Used structure for registers
- */
-#ifndef _ASM_ARCH_GPTIMERS_H
-#define _ASM_ARCH_GPTIMERS_H
-
-#include <mach/hardware.h>
-
-/*
- * Layout of L7200 general purpose timer registers
- */
-struct GPT_Regs {
-       unsigned int TIMERLOAD;
-       unsigned int TIMERVALUE;
-       unsigned int TIMERCONTROL;
-       unsigned int TIMERCLEAR;
-};
-
-#define GPT_BASE               (IO_BASE_2 + 0x3000)
-#define l7200_timer1_regs      ((volatile struct GPT_Regs *) (GPT_BASE))
-#define l7200_timer2_regs      ((volatile struct GPT_Regs *) (GPT_BASE + 0x20))
-
-/*
- * General register values
- */
-#define        GPT_PRESCALE_1          0x00000000
-#define        GPT_PRESCALE_16         0x00000004
-#define        GPT_PRESCALE_256        0x00000008
-#define GPT_MODE_FREERUN       0x00000000
-#define GPT_MODE_PERIODIC      0x00000040
-#define GPT_ENABLE             0x00000080
-#define GPT_BZTOG              0x00000100
-#define GPT_BZMOD              0x00000200
-#define GPT_LOAD_MASK          0x0000ffff
-
-#endif
diff --git a/arch/arm/mach-l7200/include/mach/gpio.h b/arch/arm/mach-l7200/include/mach/gpio.h
deleted file mode 100644 (file)
index c7b0a5d..0000000
+++ /dev/null
@@ -1,105 +0,0 @@
-/****************************************************************************/
-/*
- *      arch/arm/mach-l7200/include/mach/gpio.h
- *
- *      Registers and  helper functions for the L7200 Link-Up Systems
- *      GPIO.
- *
- *      (C) Copyright 2000, S A McConnell  (samcconn@cotw.com)
- *
- *  This file is subject to the terms and conditions of the GNU General Public
- *  License. See the file COPYING in the main directory of this archive for
- *  more details.
- */
-
-/****************************************************************************/
-
-#define GPIO_OFF   0x00005000  /* Offset from IO_START to the GPIO reg's. */
-
-/* IO_START and IO_BASE are defined in hardware.h */
-
-#define GPIO_START (IO_START_2 + GPIO_OFF) /* Physical addr of the GPIO reg. */
-#define GPIO_BASE  (IO_BASE_2  + GPIO_OFF) /* Virtual addr of the GPIO reg. */
-
-/* Offsets from the start of the GPIO for all the registers. */
-#define PADR_OFF     0x000
-#define PADDR_OFF    0x004
-#define PASBSR_OFF   0x008
-#define PAEENR_OFF   0x00c
-#define PAESNR_OFF   0x010
-#define PAESTR_OFF   0x014
-#define PAIMR_OFF    0x018
-#define PAINT_OFF    0x01c
-
-#define PBDR_OFF     0x020
-#define PBDDR_OFF    0x024
-#define PBSBSR_OFF   0x028
-#define PBIMR_OFF    0x038
-#define PBINT_OFF    0x03c
-
-#define PCDR_OFF     0x040
-#define PCDDR_OFF    0x044
-#define PCSBSR_OFF   0x048
-#define PCIMR_OFF    0x058
-#define PCINT_OFF    0x05c
-
-#define PDDR_OFF     0x060
-#define PDDDR_OFF    0x064
-#define PDSBSR_OFF   0x068
-#define PDEENR_OFF   0x06c
-#define PDESNR_OFF   0x070
-#define PDESTR_OFF   0x074
-#define PDIMR_OFF    0x078
-#define PDINT_OFF    0x07c
-
-#define PEDR_OFF     0x080
-#define PEDDR_OFF    0x084
-#define PESBSR_OFF   0x088
-#define PEEENR_OFF   0x08c
-#define PEESNR_OFF   0x090
-#define PEESTR_OFF   0x094
-#define PEIMR_OFF    0x098
-#define PEINT_OFF    0x09c
-
-/* Define the GPIO registers for use by device drivers and the kernel. */
-#define PADR   (*(volatile unsigned long *)(GPIO_BASE+PADR_OFF))
-#define PADDR  (*(volatile unsigned long *)(GPIO_BASE+PADDR_OFF))
-#define PASBSR (*(volatile unsigned long *)(GPIO_BASE+PASBSR_OFF))
-#define PAEENR (*(volatile unsigned long *)(GPIO_BASE+PAEENR_OFF))
-#define PAESNR (*(volatile unsigned long *)(GPIO_BASE+PAESNR_OFF))
-#define PAESTR (*(volatile unsigned long *)(GPIO_BASE+PAESTR_OFF))
-#define PAIMR  (*(volatile unsigned long *)(GPIO_BASE+PAIMR_OFF))
-#define PAINT  (*(volatile unsigned long *)(GPIO_BASE+PAINT_OFF))
-
-#define PBDR   (*(volatile unsigned long *)(GPIO_BASE+PBDR_OFF))
-#define PBDDR  (*(volatile unsigned long *)(GPIO_BASE+PBDDR_OFF))
-#define PBSBSR (*(volatile unsigned long *)(GPIO_BASE+PBSBSR_OFF))
-#define PBIMR  (*(volatile unsigned long *)(GPIO_BASE+PBIMR_OFF))
-#define PBINT  (*(volatile unsigned long *)(GPIO_BASE+PBINT_OFF))
-
-#define PCDR   (*(volatile unsigned long *)(GPIO_BASE+PCDR_OFF))
-#define PCDDR  (*(volatile unsigned long *)(GPIO_BASE+PCDDR_OFF))
-#define PCSBSR (*(volatile unsigned long *)(GPIO_BASE+PCSBSR_OFF))
-#define PCIMR  (*(volatile unsigned long *)(GPIO_BASE+PCIMR_OFF))
-#define PCINT  (*(volatile unsigned long *)(GPIO_BASE+PCINT_OFF))
-
-#define PDDR   (*(volatile unsigned long *)(GPIO_BASE+PDDR_OFF))
-#define PDDDR  (*(volatile unsigned long *)(GPIO_BASE+PDDDR_OFF))
-#define PDSBSR (*(volatile unsigned long *)(GPIO_BASE+PDSBSR_OFF))
-#define PDEENR (*(volatile unsigned long *)(GPIO_BASE+PDEENR_OFF))
-#define PDESNR (*(volatile unsigned long *)(GPIO_BASE+PDESNR_OFF))
-#define PDESTR (*(volatile unsigned long *)(GPIO_BASE+PDESTR_OFF))
-#define PDIMR  (*(volatile unsigned long *)(GPIO_BASE+PDIMR_OFF))
-#define PDINT  (*(volatile unsigned long *)(GPIO_BASE+PDINT_OFF))
-
-#define PEDR   (*(volatile unsigned long *)(GPIO_BASE+PEDR_OFF))
-#define PEDDR  (*(volatile unsigned long *)(GPIO_BASE+PEDDR_OFF))
-#define PESBSR (*(volatile unsigned long *)(GPIO_BASE+PESBSR_OFF))
-#define PEEENR (*(volatile unsigned long *)(GPIO_BASE+PEEENR_OFF))
-#define PEESNR (*(volatile unsigned long *)(GPIO_BASE+PEESNR_OFF))
-#define PEESTR (*(volatile unsigned long *)(GPIO_BASE+PEESTR_OFF))
-#define PEIMR  (*(volatile unsigned long *)(GPIO_BASE+PEIMR_OFF))
-#define PEINT  (*(volatile unsigned long *)(GPIO_BASE+PEINT_OFF))
-
-#define VEE_EN         0x02
-#define BACKLIGHT_EN   0x04
diff --git a/arch/arm/mach-l7200/include/mach/hardware.h b/arch/arm/mach-l7200/include/mach/hardware.h
deleted file mode 100644 (file)
index c31909c..0000000
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * arch/arm/mach-l7200/include/mach/hardware.h
- *
- * Copyright (C) 2000 Rob Scott (rscott@mtrob.fdns.net)
- *                    Steve Hill (sjhill@cotw.com)
- *
- * This file contains the hardware definitions for the 
- * LinkUp Systems L7200 SOC development board.
- *
- * Changelog:
- *   02-01-2000         RS     Created L7200 version, derived from rpc code
- *   03-21-2000        SJH     Cleaned up file
- *   04-21-2000         RS     Changed mapping of I/O in virtual space
- *   04-25-2000        SJH     Removed unused symbols and such
- *   05-05-2000        SJH     Complete rewrite
- *   07-31-2000        SJH     Added undocumented debug auxillary port to
- *                     get at last two columns for keyboard driver
- */
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H
-
-/* Hardware addresses of major areas.
- *  *_START is the physical address
- *  *_SIZE  is the size of the region
- *  *_BASE  is the virtual address
- */
-#define RAM_START              0xf0000000
-#define RAM_SIZE               0x02000000
-#define RAM_BASE               0xc0000000
-
-#define IO_START               0x80000000      /* I/O */
-#define IO_SIZE                        0x01000000
-#define IO_BASE                        0xd0000000
-
-#define IO_START_2             0x90000000      /* I/O */
-#define IO_SIZE_2              0x01000000
-#define IO_BASE_2              0xd1000000
-
-#define AUX_START              0x1a000000      /* AUX PORT */
-#define AUX_SIZE               0x01000000
-#define AUX_BASE               0xd2000000
-
-#define FLASH1_START           0x00000000      /* FLASH BANK 1 */
-#define FLASH1_SIZE            0x01000000
-#define FLASH1_BASE            0xd3000000
-
-#define FLASH2_START           0x10000000      /* FLASH BANK 2 */
-#define FLASH2_SIZE            0x01000000
-#define FLASH2_BASE            0xd4000000
-
-#define ISA_START              0x20000000      /* ISA */
-#define ISA_SIZE               0x20000000
-#define ISA_BASE               0xe0000000
-
-#define PCIO_BASE              IO_BASE
-
-#endif
diff --git a/arch/arm/mach-l7200/include/mach/io.h b/arch/arm/mach-l7200/include/mach/io.h
deleted file mode 100644 (file)
index a770a89..0000000
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * arch/arm/mach-l7200/include/mach/io.h
- *
- * Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
- *
- * Changelog:
- *  03-21-2000 SJH     Created from arch/arm/mach-nexuspci/include/mach/io.h
- *  08-31-2000 SJH     Added in IO functions necessary for new drivers
- */
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xffffffff
-
-/*
- * There are not real ISA nor PCI buses, so we fake it.
- */
-#define __io(a)                __typesafe_io(a)
-#define __mem_pci(a)   (a)
-
-#endif
diff --git a/arch/arm/mach-l7200/include/mach/irqs.h b/arch/arm/mach-l7200/include/mach/irqs.h
deleted file mode 100644 (file)
index 7edffd7..0000000
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * arch/arm/mach-l7200/include/mach/irqs.h
- *
- * Copyright (C) 2000 Rob Scott (rscott@mtrob.fdns.net)
- *                    Steve Hill (sjhill@cotw.com)
- *
- * Changelog:
- *   01-02-2000 RS     Create l7200 version
- *   03-28-2000 SJH    Removed unused interrupt
- *   07-28-2000 SJH    Added pseudo-keyboard interrupt
- */
-
-/*
- * NOTE: The second timer (Timer 2) is used as the keyboard
- *       interrupt when the keyboard driver is enabled.
- */
-
-#define NR_IRQS          32
-
-#define IRQ_STWDOG        0   /* Watchdog timer */
-#define IRQ_PROG          1   /* Programmable interrupt */
-#define IRQ_DEBUG_RX      2   /* Comm Rx debug */
-#define IRQ_DEBUG_TX      3   /* Comm Tx debug */
-#define IRQ_GCTC1         4   /* Timer 1 */
-#define IRQ_GCTC2         5   /* Timer 2 / Keyboard */
-#define IRQ_DMA           6   /* DMA controller */
-#define IRQ_CLCD          7   /* Color LCD controller */
-#define IRQ_SM_RX         8   /* Smart card */
-#define IRQ_SM_TX         9   /* Smart cart */
-#define IRQ_SM_RST       10   /* Smart card */
-#define IRQ_SIB          11   /* Serial Interface Bus */
-#define IRQ_MMC          12   /* MultiMediaCard */
-#define IRQ_SSP1         13   /* Synchronous Serial Port 1 */
-#define IRQ_SSP2         14   /* Synchronous Serial Port 1 */
-#define IRQ_SPI          15   /* SPI slave */
-#define IRQ_UART_1       16   /* UART 1 */
-#define IRQ_UART_2       17   /* UART 2 */
-#define IRQ_IRDA         18   /* IRDA */
-#define IRQ_RTC_TICK     19   /* Real Time Clock tick */
-#define IRQ_RTC_ALARM    20   /* Real Time Clock alarm */
-#define IRQ_GPIO         21   /* General Purpose IO */
-#define IRQ_GPIO_DMA     22   /* General Purpose IO, DMA */
-#define IRQ_M2M          23   /* Memory to memory DMA  */
-#define IRQ_RESERVED     24   /* RESERVED, don't use */
-#define IRQ_INTF         25   /* External active low interrupt */
-#define IRQ_INT0         26   /* External active low interrupt */
-#define IRQ_INT1         27   /* External active low interrupt */
-#define IRQ_INT2         28   /* External active low interrupt */
-#define IRQ_UCB1200      29   /* Interrupt generated by UCB1200*/
-#define IRQ_BAT_LO       30   /* Low batery or external power */
-#define IRQ_MEDIA_CHG    31   /* Media change interrupt */
-
-/*
- * This is the offset of the FIQ "IRQ" numbers
- */
-#define FIQ_START      64
diff --git a/arch/arm/mach-l7200/include/mach/memory.h b/arch/arm/mach-l7200/include/mach/memory.h
deleted file mode 100644 (file)
index 9fb40ed..0000000
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * arch/arm/mach-l7200/include/mach/memory.h
- *
- * Copyright (c) 2000 Steve Hill (sjhill@cotw.com)
- * Copyright (c) 2000 Rob Scott (rscott@mtrob.fdns.net)
- *
- * Changelog:
- *  03-13-2000 SJH     Created
- *  04-13-2000  RS      Changed bus macros for new addr
- *  05-03-2000  SJH     Removed bus macros and fixed virt_to_phys macro
- */
-#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
-
-/*
- * Physical DRAM offset on the L7200 SDB.
- */
-#define PHYS_OFFSET     UL(0xf0000000)
-
-/*
- * Cache flushing area - ROM
- */
-#define FLUSH_BASE_PHYS                0x40000000
-#define FLUSH_BASE             0xdf000000
-
-#endif
diff --git a/arch/arm/mach-l7200/include/mach/pmpcon.h b/arch/arm/mach-l7200/include/mach/pmpcon.h
deleted file mode 100644 (file)
index 3959871..0000000
+++ /dev/null
@@ -1,46 +0,0 @@
-/****************************************************************************/
-/*
- *  arch/arm/mach-l7200/include/mach/pmpcon.h
- *
- *   Registers and  helper functions for the L7200 Link-Up Systems
- *   DC/DC converter register.
- *
- *   (C) Copyright 2000, S A McConnell  (samcconn@cotw.com)
- *
- *  This file is subject to the terms and conditions of the GNU General Public
- *  License. See the file COPYING in the main directory of this archive for
- *  more details.
- */
-
-/****************************************************************************/
-
-#define PMPCON_OFF 0x00006000  /* Offset from IO_START_2. */
-
-/* IO_START_2 and IO_BASE_2 are defined in hardware.h */
-
-#define PMPCON_START (IO_START_2 + PMPCON_OFF)  /* Physical address of reg. */
-#define PMPCON_BASE  (IO_BASE_2  + PMPCON_OFF)  /* Virtual address of reg. */
-
-
-#define PMPCON (*(volatile unsigned int *)(PMPCON_BASE))
-
-#define PWM2_50CYCLE 0x800
-#define CONTRAST     0x9
-
-#define PWM1H (CONTRAST)
-#define PWM1L (CONTRAST << 4)
-
-#define PMPCON_VALUE  (PWM2_50CYCLE | PWM1L | PWM1H) 
-       
-/* PMPCON = 0x811;   // too light and fuzzy
- * PMPCON = 0x844;   
- * PMPCON = 0x866;   // better color poor depth
- * PMPCON = 0x888;   // Darker but better depth 
- * PMPCON = 0x899;   // Darker even better depth
- * PMPCON = 0x8aa;   // too dark even better depth
- * PMPCON = 0X8cc;   // Way too dark
- */
-
-/* As CONTRAST value increases the greater the depth perception and
- * the darker the colors.
- */
diff --git a/arch/arm/mach-l7200/include/mach/pmu.h b/arch/arm/mach-l7200/include/mach/pmu.h
deleted file mode 100644 (file)
index a2da7ae..0000000
+++ /dev/null
@@ -1,125 +0,0 @@
-/****************************************************************************/
-/*
- *  arch/arm/mach-l7200/include/mach/pmu.h
- *
- *   Registers and  helper functions for the L7200 Link-Up Systems
- *   Power Management Unit (PMU).
- *
- *   (C) Copyright 2000, S A McConnell  (samcconn@cotw.com)
- *
- *  This file is subject to the terms and conditions of the GNU General Public
- *  License. See the file COPYING in the main directory of this archive for
- *  more details.
- */
-
-/****************************************************************************/
-
-#define PMU_OFF   0x00050000  /* Offset from IO_START to the PMU registers. */
-
-/* IO_START and IO_BASE are defined in hardware.h */
-
-#define PMU_START (IO_START + PMU_OFF)  /* Physical addr. of the PMU reg. */
-#define PMU_BASE  (IO_BASE  + PMU_OFF)  /* Virtual addr. of the PMU reg. */
-
-
-/* Define the PMU registers for use by device drivers and the kernel. */
-
-typedef struct {
-     unsigned int CURRENT;  /* Current configuration register */
-     unsigned int NEXT;     /* Next configuration register */
-     unsigned int reserved;
-     unsigned int RUN;      /* Run configuration register */
-     unsigned int COMM;     /* Configuration command register */
-     unsigned int SDRAM;    /* SDRAM configuration bypass register */
-} pmu_interface;
-
-#define PMU ((volatile pmu_interface *)(PMU_BASE))
-
-
-/* Macro's for reading the common register fields. */
-
-#define GET_TRANSOP(reg)  ((reg >> 25) & 0x03) /* Bits 26-25 */
-#define GET_OSCEN(reg)    ((reg >> 16) & 0x01)
-#define GET_OSCMUX(reg)   ((reg >> 15) & 0x01)
-#define GET_PLLMUL(reg)   ((reg >>  9) & 0x3f) /* Bits 14-9 */
-#define GET_PLLEN(reg)    ((reg >>  8) & 0x01)
-#define GET_PLLMUX(reg)   ((reg >>  7) & 0x01)
-#define GET_BCLK_DIV(reg) ((reg >>  3) & 0x03) /* Bits 4-3 */
-#define GET_SDRB_SEL(reg) ((reg >>  2) & 0x01)
-#define GET_SDRF_SEL(reg) ((reg >>  1) & 0x01)
-#define GET_FASTBUS(reg)  (reg & 0x1)
-
-/* CFG_NEXT register */
-
-#define CFG_NEXT_CLOCKRECOVERY ((PMU->NEXT >> 18) & 0x7f)   /* Bits 24-18 */
-#define CFG_NEXT_INTRET        ((PMU->NEXT >> 17) & 0x01)
-#define CFG_NEXT_SDR_STOP      ((PMU->NEXT >>  6) & 0x01)
-#define CFG_NEXT_SYSCLKEN      ((PMU->NEXT >>  5) & 0x01)
-
-/* Useful field values that can be used to construct the
- * CFG_NEXT and CFG_RUN registers.
- */
-
-#define TRANSOP_NOP      0<<25  /* NOCHANGE_NOSTALL */
-#define NOCHANGE_STALL   1<<25
-#define CHANGE_NOSTALL   2<<25
-#define CHANGE_STALL     3<<25
-
-#define INTRET           1<<17
-#define OSCEN            1<<16
-#define OSCMUX           1<<15
-
-/* PLL frequencies */
-
-#define PLLMUL_0         0<<9         /*  3.6864 MHz */
-#define PLLMUL_1         1<<9         /*  ?????? MHz */
-#define PLLMUL_5         5<<9         /*  18.432 MHz */
-#define PLLMUL_10       10<<9         /*  36.864 MHz */
-#define PLLMUL_18       18<<9         /*  ?????? MHz */
-#define PLLMUL_20       20<<9         /*  73.728 MHz */
-#define PLLMUL_32       32<<9         /*  ?????? MHz */
-#define PLLMUL_35       35<<9         /* 129.024 MHz */
-#define PLLMUL_36       36<<9         /*  ?????? MHz */
-#define PLLMUL_39       39<<9         /*  ?????? MHz */
-#define PLLMUL_40       40<<9         /* 147.456 MHz */
-
-/* Clock recovery times */
-
-#define CRCLOCK_1        1<<18
-#define CRCLOCK_2        2<<18
-#define CRCLOCK_4        4<<18
-#define CRCLOCK_8        8<<18
-#define CRCLOCK_16      16<<18
-#define CRCLOCK_32      32<<18
-#define CRCLOCK_63      63<<18
-#define CRCLOCK_127    127<<18
-
-#define PLLEN            1<<8
-#define PLLMUX           1<<7
-#define SDR_STOP         1<<6
-#define SYSCLKEN         1<<5
-
-#define BCLK_DIV_4       2<<3
-#define BCLK_DIV_2       1<<3
-#define BCLK_DIV_1       0<<3
-
-#define SDRB_SEL         1<<2
-#define SDRF_SEL         1<<1
-#define FASTBUS          1<<0
-
-
-/* CFG_SDRAM */
-
-#define SDRREFFQ         1<<0  /* Only if SDRSTOPRQ is not set. */
-#define SDRREFACK        1<<1  /* Read-only */
-#define SDRSTOPRQ        1<<2  /* Only if SDRREFFQ is not set. */
-#define SDRSTOPACK       1<<3  /* Read-only */
-#define PICEN            1<<4  /* Enable Co-procesor */
-#define PICTEST          1<<5
-
-#define GET_SDRREFFQ    ((PMU->SDRAM >> 0) & 0x01)
-#define GET_SDRREFACK   ((PMU->SDRAM >> 1) & 0x01) /* Read-only */
-#define GET_SDRSTOPRQ   ((PMU->SDRAM >> 2) & 0x01)
-#define GET_SDRSTOPACK  ((PMU->SDRAM >> 3) & 0x01) /* Read-only */
-#define GET_PICEN       ((PMU->SDRAM >> 4) & 0x01)
-#define GET_PICTEST     ((PMU->SDRAM >> 5) & 0x01)
diff --git a/arch/arm/mach-l7200/include/mach/serial.h b/arch/arm/mach-l7200/include/mach/serial.h
deleted file mode 100644 (file)
index adc05e5..0000000
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * arch/arm/mach-l7200/include/mach/serial.h
- *
- * Copyright (c) 2000 Rob Scott (rscott@mtrob.fdns.net)
- *                    Steve Hill (sjhill@cotw.com)
- *
- * Changelog:
- *  03-20-2000  SJH     Created
- *  03-26-2000  SJH     Added flags for serial ports
- *  03-27-2000  SJH     Corrected BASE_BAUD value
- *  04-14-2000  RS      Made register addr dependent on IO_BASE
- *  05-03-2000  SJH     Complete rewrite
- *  05-09-2000 SJH     Stripped out architecture specific serial stuff
- *                      and placed it in a separate file
- *  07-28-2000 SJH     Moved base baud rate variable
- */
-#ifndef __ASM_ARCH_SERIAL_H
-#define __ASM_ARCH_SERIAL_H
-
-/*
- * This assumes you have a 3.6864 MHz clock for your UART.
- */
-#define BASE_BAUD      3686400
-
-/*
- * Standard COM flags
- */
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-
-#define STD_SERIAL_PORT_DEFNS          \
-       /* MAGIC UART CLK   PORT       IRQ     FLAGS */                 \
-       { 0, BASE_BAUD, UART1_BASE, IRQ_UART_1, STD_COM_FLAGS },  /* ttyLU0 */ \
-       { 0, BASE_BAUD, UART2_BASE, IRQ_UART_2, STD_COM_FLAGS },  /* ttyLU1 */ \
-
-#define EXTRA_SERIAL_PORT_DEFNS
-
-#endif
diff --git a/arch/arm/mach-l7200/include/mach/serial_l7200.h b/arch/arm/mach-l7200/include/mach/serial_l7200.h
deleted file mode 100644 (file)
index 645f1c5..0000000
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * arch/arm/mach-l7200/include/mach/serial_l7200.h
- *
- * Copyright (c) 2000 Steven Hill (sjhill@cotw.com)
- *
- * Changelog:
- *  05-09-2000 SJH     Created
- */
-#ifndef __ASM_ARCH_SERIAL_L7200_H
-#define __ASM_ARCH_SERIAL_L7200_H
-
-#include <mach/memory.h>
-
-/*
- * This assumes you have a 3.6864 MHz clock for your UART.
- */
-#define BASE_BAUD 3686400
-
-/*
- * UART base register addresses
- */
-#define UART1_BASE     (IO_BASE + 0x00044000)
-#define UART2_BASE     (IO_BASE + 0x00045000)
-
-/*
- * UART register offsets
- */
-#define UARTDR                 0x00    /* Tx/Rx data */
-#define RXSTAT                 0x04    /* Rx status */
-#define H_UBRLCR               0x08    /* mode register high */
-#define M_UBRLCR               0x0C    /* mode reg mid (MSB of baud)*/
-#define L_UBRLCR               0x10    /* mode reg low (LSB of baud)*/
-#define UARTCON                        0x14    /* control register */
-#define UARTFLG                        0x18    /* flag register */
-#define UARTINTSTAT            0x1C    /* FIFO IRQ status register */
-#define UARTINTMASK            0x20    /* FIFO IRQ mask register */
-
-/*
- * UART baud rate register values
- */
-#define BR_110                 0x827
-#define BR_1200                        0x06e
-#define BR_2400                        0x05f
-#define BR_4800                        0x02f
-#define BR_9600                        0x017
-#define BR_14400               0x00f
-#define BR_19200               0x00b
-#define BR_38400               0x005
-#define BR_57600               0x003
-#define BR_76800               0x002
-#define BR_115200              0x001
-
-/*
- * Receiver status register (RXSTAT) mask values
- */
-#define RXSTAT_NO_ERR          0x00    /* No error */
-#define RXSTAT_FRM_ERR         0x01    /* Framing error */
-#define RXSTAT_PAR_ERR         0x02    /* Parity error */
-#define RXSTAT_OVR_ERR         0x04    /* Overrun error */
-
-/*
- * High byte of UART bit rate and line control register (H_UBRLCR) values
- */
-#define UBRLCR_BRK             0x01    /* generate break on tx */
-#define UBRLCR_PEN             0x02    /* enable parity */
-#define UBRLCR_PDIS            0x00    /* disable parity */
-#define UBRLCR_EVEN            0x04    /* 1= even parity,0 = odd parity */
-#define UBRLCR_STP2            0x08    /* transmit 2 stop bits */
-#define UBRLCR_FIFO            0x10    /* enable FIFO */
-#define UBRLCR_LEN5            0x60    /* word length5 */
-#define UBRLCR_LEN6            0x40    /* word length6 */
-#define UBRLCR_LEN7            0x20    /* word length7 */
-#define UBRLCR_LEN8            0x00    /* word length8 */
-
-/*
- * UART control register (UARTCON) values
- */
-#define UARTCON_UARTEN         0x01    /* Enable UART */
-#define UARTCON_DMAONERR       0x08    /* Mask RxDmaRq when errors occur */
-
-/*
- * UART flag register (UARTFLG) mask values
- */
-#define UARTFLG_UTXFF          0x20    /* Transmit FIFO full */
-#define UARTFLG_URXFE          0x10    /* Receiver FIFO empty */
-#define UARTFLG_UBUSY          0x08    /* Transmitter busy */
-#define UARTFLG_DCD            0x04    /* Data carrier detect */
-#define UARTFLG_DSR            0x02    /* Data set ready */
-#define UARTFLG_CTS            0x01    /* Clear to send */
-
-/*
- * UART interrupt status/clear registers (UARTINTSTAT/CLR) values
- */
-#define UART_TXINT             0x01    /* TX interrupt */
-#define UART_RXINT             0x02    /* RX interrupt */
-#define UART_RXERRINT          0x04    /* RX error interrupt */
-#define UART_MSINT             0x08    /* Modem Status interrupt */
-#define UART_UDINT             0x10    /* UART Disabled interrupt */
-#define UART_ALLIRQS           0x1f    /* All interrupts */
-
-#endif
diff --git a/arch/arm/mach-l7200/include/mach/sib.h b/arch/arm/mach-l7200/include/mach/sib.h
deleted file mode 100644 (file)
index 9657287..0000000
+++ /dev/null
@@ -1,119 +0,0 @@
-/****************************************************************************/
-/*
- *  arch/arm/mach-l7200/include/mach/sib.h
- *
- *  Registers and helper functions for the Serial Interface Bus.
- *
- *  (C) Copyright 2000, S A McConnell  (samcconn@cotw.com)
- *
- *  This file is subject to the terms and conditions of the GNU General Public
- *  License. See the file COPYING in the main directory of this archive for
- *  more details.
- */
-
-/****************************************************************************/
-
-#define SIB_OFF   0x00040000  /* Offset from IO_START to the SIB reg's. */
-
-/* IO_START and IO_BASE are defined in hardware.h */
-
-#define SIB_START (IO_START + SIB_OFF) /* Physical addr of the SIB reg. */
-#define SIB_BASE  (IO_BASE  + SIB_OFF) /* Virtual addr of the SIB reg.  */
-
-/* Offsets from the start of the SIB for all the registers. */
-
-/* Define the SIB registers for use by device drivers and the kernel. */
-
-typedef struct
-{
-     unsigned int MCCR;    /* SIB Control Register           Offset: 0x00 */
-     unsigned int RES1;    /* Reserved                       Offset: 0x04 */
-     unsigned int MCDR0;   /* SIB Data Register 0            Offset: 0x08 */
-     unsigned int MCDR1;   /* SIB Data Register 1            Offset: 0x0c */
-     unsigned int MCDR2;   /* SIB Data Register 2 (UCB1x00)  Offset: 0x10 */
-     unsigned int RES2;    /* Reserved                       Offset: 0x14 */
-     unsigned int MCSR;    /* SIB Status Register            Offset: 0x18 */
-} SIB_Interface;
-
-#define SIB ((volatile SIB_Interface *) (SIB_BASE))
-
-/* MCCR */
-
-#define INTERNAL_FREQ   9216000  /* Hertz */
-#define AUDIO_FREQ         5000  /* Hertz */
-#define TELECOM_FREQ       5000  /* Hertz */
-
-#define AUDIO_DIVIDE    (INTERNAL_FREQ / (32 * AUDIO_FREQ))
-#define TELECOM_DIVIDE  (INTERNAL_FREQ / (32 * TELECOM_FREQ))
-
-#define MCCR_ASD57      AUDIO_DIVIDE
-#define MCCR_TSD57      (TELECOM_DIVIDE << 8)
-#define MCCR_MCE        (1 << 16)             /* SIB enable */
-#define MCCR_ECS        (1 << 17)             /* External Clock Select */
-#define MCCR_ADM        (1 << 18)             /* A/D Data Sampling */
-#define MCCR_PMC        (1 << 26)             /* PIN Multiplexer Control */
-
-
-#define GET_ASD ((SIB->MCCR >>  0) & 0x3f) /* Audio Sample Rate Div. */
-#define GET_TSD ((SIB->MCCR >>  8) & 0x3f) /* Telcom Sample Rate Div. */
-#define GET_MCE ((SIB->MCCR >> 16) & 0x01) /* SIB Enable */
-#define GET_ECS ((SIB->MCCR >> 17) & 0x01) /* External Clock Select */
-#define GET_ADM ((SIB->MCCR >> 18) & 0x01) /* A/D Data Sampling Mode */
-#define GET_TTM ((SIB->MCCR >> 19) & 0x01) /* Telco Trans. FIFO I mask */ 
-#define GET_TRM ((SIB->MCCR >> 20) & 0x01) /* Telco Recv. FIFO I mask */
-#define GET_ATM ((SIB->MCCR >> 21) & 0x01) /* Audio Trans. FIFO I mask */ 
-#define GET_ARM ((SIB->MCCR >> 22) & 0x01) /* Audio Recv. FIFO I mask */
-#define GET_LBM ((SIB->MCCR >> 23) & 0x01) /* Loop Back Mode */
-#define GET_ECP ((SIB->MCCR >> 24) & 0x03) /* Extern. Clck Prescale sel */
-#define GET_PMC ((SIB->MCCR >> 26) & 0x01) /* PIN Multiplexer Control */
-#define GET_ERI ((SIB->MCCR >> 27) & 0x01) /* External Read Interrupt */
-#define GET_EWI ((SIB->MCCR >> 28) & 0x01) /* External Write Interrupt */
-
-/* MCDR0 */
-
-#define AUDIO_RECV     ((SIB->MCDR0 >> 4) & 0xfff)
-#define AUDIO_WRITE(v) ((SIB->MCDR0 = (v & 0xfff) << 4))
-
-/* MCDR1 */
-
-#define TELECOM_RECV     ((SIB->MCDR1 >> 2) & 032fff)
-#define TELECOM_WRITE(v) ((SIB->MCDR1 = (v & 0x3fff) << 2))
-
-
-/* MCSR */
-
-#define MCSR_ATU (1 << 4)  /* Audio Transmit FIFO Underrun */
-#define MCSR_ARO (1 << 5)  /* Audio Receive  FIFO Underrun */
-#define MCSR_TTU (1 << 6)  /* TELECOM Transmit FIFO Underrun */
-#define MCSR_TRO (1 << 7)  /* TELECOM Receive  FIFO Underrun */
-
-#define MCSR_CLEAR_UNDERUN_BITS (MCSR_ATU | MCSR_ARO | MCSR_TTU | MCSR_TRO)
-
-
-#define GET_ATS ((SIB->MCSR >>  0) & 0x01) /* Audio Transmit FIFO Service Req*/
-#define GET_ARS ((SIB->MCSR >>  1) & 0x01) /* Audio Recv FIFO Service Request*/
-#define GET_TTS ((SIB->MCSR >>  2) & 0x01) /* TELECOM Transmit FIFO  Flag */
-#define GET_TRS ((SIB->MCSR >>  3) & 0x01) /* TELECOM Recv FIFO Service Req. */
-#define GET_ATU ((SIB->MCSR >>  4) & 0x01) /* Audio Transmit FIFO Underrun */
-#define GET_ARO ((SIB->MCSR >>  5) & 0x01) /* Audio Receive  FIFO Underrun */
-#define GET_TTU ((SIB->MCSR >>  6) & 0x01) /* TELECOM Transmit FIFO Underrun */
-#define GET_TRO ((SIB->MCSR >>  7) & 0x01) /* TELECOM Receive  FIFO Underrun */
-#define GET_ANF ((SIB->MCSR >>  8) & 0x01) /* Audio Transmit FIFO not full */
-#define GET_ANE ((SIB->MCSR >>  9) & 0x01) /* Audio Receive FIFO not empty */
-#define GET_TNF ((SIB->MCSR >> 10) & 0x01) /* Telecom Transmit FIFO not full */
-#define GET_TNE ((SIB->MCSR >> 11) & 0x01) /* Telecom Receive FIFO not empty */
-#define GET_CWC ((SIB->MCSR >> 12) & 0x01) /* Codec Write Complete */
-#define GET_CRC ((SIB->MCSR >> 13) & 0x01) /* Codec Read Complete */
-#define GET_ACE ((SIB->MCSR >> 14) & 0x01) /* Audio Codec Enabled */
-#define GET_TCE ((SIB->MCSR >> 15) & 0x01) /* Telecom Codec Enabled */
-
-/* MCDR2 */
-
-#define MCDR2_rW               (1 << 16)
-
-#define WRITE_MCDR2(reg, data) (SIB->MCDR2 =((reg<<17)|MCDR2_rW|(data&0xffff)))
-#define MCDR2_WRITE_COMPLETE   GET_CWC
-
-#define INITIATE_MCDR2_READ(reg) (SIB->MCDR2 = (reg << 17))
-#define MCDR2_READ_COMPLETE      GET_CRC
-#define MCDR2_READ               (SIB->MCDR2 & 0xffff)
diff --git a/arch/arm/mach-l7200/include/mach/sys-clock.h b/arch/arm/mach-l7200/include/mach/sys-clock.h
deleted file mode 100644 (file)
index e9729a3..0000000
+++ /dev/null
@@ -1,67 +0,0 @@
-/****************************************************************************/
-/*
- *  arch/arm/mach-l7200/include/mach/sys-clock.h
- *
- *   Registers and  helper functions for the L7200 Link-Up Systems
- *   System clocks.
- *
- *   (C) Copyright 2000, S A McConnell  (samcconn@cotw.com)
- *
- *  This file is subject to the terms and conditions of the GNU General Public
- *  License. See the file COPYING in the main directory of this archive for
- *  more details.
- */
-
-/****************************************************************************/
-
-#define SYS_CLOCK_OFF   0x00050030  /* Offset from IO_START. */
-
-/* IO_START and IO_BASE are defined in hardware.h */
-
-#define SYS_CLOCK_START (IO_START + SYS_CLOCK_OFF)  /* Physical address */
-#define SYS_CLOCK_BASE  (IO_BASE  + SYS_CLOCK_OFF)  /* Virtual address  */
-
-/* Define the interface to the SYS_CLOCK */
-
-typedef struct
-{
-     unsigned int ENABLE;
-     unsigned int ESYNC;
-     unsigned int SELECT;
-} sys_clock_interface;
-
-#define SYS_CLOCK   ((volatile sys_clock_interface *)(SYS_CLOCK_BASE))
-
-//#define CLOCK_EN    (*(volatile unsigned long *)(PMU_BASE+CLOCK_EN_OFF))
-//#define CLOCK_ESYNC (*(volatile unsigned long *)(PMU_BASE+CLOCK_ESYNC_OFF))
-//#define CLOCK_SEL   (*(volatile unsigned long *)(PMU_BASE+CLOCK_SEL_OFF))
-
-/* SYS_CLOCK -> ENABLE */
-
-#define SYN_EN          1<<0
-#define B18M_EN         1<<1
-#define CLK3M6_EN       1<<2
-#define BUART_EN        1<<3
-#define CLK18MU_EN      1<<4
-#define FIR_EN          1<<5
-#define MIRN_EN         1<<6
-#define UARTM_EN        1<<7
-#define SIBADC_EN       1<<8
-#define ALTD_EN         1<<9
-#define CLCLK_EN        1<<10
-
-/* SYS_CLOCK -> SELECT */
-
-#define CLK18M_DIV      1<<0
-#define MIR_SEL         1<<1
-#define SSP_SEL         1<<4
-#define MM_DIV          1<<5
-#define MM_SEL          1<<6
-#define ADC_SEL_2       0<<7
-#define ADC_SEL_4       1<<7
-#define ADC_SEL_8       3<<7
-#define ADC_SEL_16      7<<7
-#define ADC_SEL_32      0x0f<<7
-#define ADC_SEL_64      0x1f<<7
-#define ADC_SEL_128     0x3f<<7
-#define ALTD_SEL        1<<13
diff --git a/arch/arm/mach-l7200/include/mach/system.h b/arch/arm/mach-l7200/include/mach/system.h
deleted file mode 100644 (file)
index e0dd3b6..0000000
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * arch/arm/mach-l7200/include/mach/system.h
- *
- * Copyright (c) 2000 Steve Hill (sjhill@cotw.com)
- *
- * Changelog
- *  03-21-2000  SJH    Created
- *  04-26-2000  SJH    Fixed functions
- *  05-03-2000  SJH    Removed usage of obsolete 'iomd.h'
- *  05-31-2000  SJH    Properly implemented 'arch_idle'
- */
-#ifndef __ASM_ARCH_SYSTEM_H
-#define __ASM_ARCH_SYSTEM_H
-
-#include <mach/hardware.h>
-
-static inline void arch_idle(void)
-{
-       *(unsigned long *)(IO_BASE + 0x50004) = 1;      /* idle mode */
-}
-
-static inline void arch_reset(char mode, const char *cmd)
-{
-       if (mode == 's') {
-               cpu_reset(0);
-       }
-}
-
-#endif
diff --git a/arch/arm/mach-l7200/include/mach/time.h b/arch/arm/mach-l7200/include/mach/time.h
deleted file mode 100644 (file)
index 061771c..0000000
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * arch/arm/mach-l7200/include/mach/time.h
- *
- * Copyright (C) 2000 Rob Scott (rscott@mtrob.fdns.net)
- *                    Steve Hill (sjhill@cotw.com)
- *
- * Changelog:
- *   01-02-2000        RS      Created l7200 version, derived from rpc code
- *   05-03-2000        SJH     Complete rewrite
- */
-#ifndef _ASM_ARCH_TIME_H
-#define _ASM_ARCH_TIME_H
-
-#include <mach/irqs.h>
-
-/*
- * RTC base register address
- */
-#define RTC_BASE       (IO_BASE_2 + 0x2000)
-
-/*
- * RTC registers
- */
-#define RTC_RTCDR      (*(volatile unsigned char *) (RTC_BASE + 0x000))
-#define RTC_RTCMR      (*(volatile unsigned char *) (RTC_BASE + 0x004))
-#define RTC_RTCS       (*(volatile unsigned char *) (RTC_BASE + 0x008))
-#define RTC_RTCC       (*(volatile unsigned char *) (RTC_BASE + 0x008))
-#define RTC_RTCDV      (*(volatile unsigned char *) (RTC_BASE + 0x00c))
-#define RTC_RTCCR      (*(volatile unsigned char *) (RTC_BASE + 0x010))
-
-/*
- * RTCCR register values
- */
-#define RTC_RATE_32    0x00      /* 32 Hz tick */
-#define RTC_RATE_64    0x10      /* 64 Hz tick */
-#define RTC_RATE_128   0x20      /* 128 Hz tick */
-#define RTC_RATE_256   0x30      /* 256 Hz tick */
-#define RTC_EN_ALARM   0x01      /* Enable alarm */
-#define RTC_EN_TIC     0x04      /* Enable counter */
-#define RTC_EN_STWDOG  0x08      /* Enable watchdog */
-
-/*
- * Handler for RTC timer interrupt
- */
-static irqreturn_t
-timer_interrupt(int irq, void *dev_id)
-{
-       struct pt_regs *regs = get_irq_regs();
-       do_timer(1);
-#ifndef CONFIG_SMP
-       update_process_times(user_mode(regs));
-#endif
-       do_profile(regs);
-       RTC_RTCC = 0;                           /* Clear interrupt */
-
-       return IRQ_HANDLED;
-}
-
-/*
- * Set up RTC timer interrupt, and return the current time in seconds.
- */
-void __init time_init(void)
-{
-       RTC_RTCC = 0;                           /* Clear interrupt */
-
-       timer_irq.handler = timer_interrupt;
-
-       setup_irq(IRQ_RTC_TICK, &timer_irq);
-
-       RTC_RTCCR = RTC_RATE_128 | RTC_EN_TIC;  /* Set rate and enable timer */
-}
-
-#endif
diff --git a/arch/arm/mach-l7200/include/mach/timex.h b/arch/arm/mach-l7200/include/mach/timex.h
deleted file mode 100644 (file)
index ffc96a6..0000000
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * arch/arm/mach-l7200/include/mach/timex.h
- *
- * Copyright (C) 2000 Rob Scott (rscott@mtrob.fdns.net)
- *                    Steve Hill (sjhill@cotw.com)
- *
- * 04-21-2000  RS Created file
- * 05-03-2000 SJH Tick rate was wrong
- *
- */
-
-/*
- * On the ARM720T, clock ticks are set to 128 Hz.
- *
- * NOTE: The actual RTC value is set in 'time.h' which
- *       must be changed when choosing a different tick
- *       rate. The value of HZ in 'param.h' must also
- *       be changed to match below.
- */
-#define CLOCK_TICK_RATE                128
diff --git a/arch/arm/mach-l7200/include/mach/uncompress.h b/arch/arm/mach-l7200/include/mach/uncompress.h
deleted file mode 100644 (file)
index 591c962..0000000
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * arch/arm/mach-l7200/include/mach/uncompress.h
- *
- * Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
- *
- * Changelog:
- *  05-01-2000 SJH     Created
- *  05-13-2000 SJH     Filled in function bodies
- *  07-26-2000 SJH     Removed hard coded baud rate
- */
-
-#include <mach/hardware.h>
-
-#define IO_UART  IO_START + 0x00044000
-
-#define __raw_writeb(v,p)      (*(volatile unsigned char *)(p) = (v))
-#define __raw_readb(p)         (*(volatile unsigned char *)(p))
-
-static inline void putc(int c)
-{
-       while(__raw_readb(IO_UART + 0x18) & 0x20 ||
-             __raw_readb(IO_UART + 0x18) & 0x08)
-               barrier();
-
-       __raw_writeb(c, IO_UART + 0x00);
-}
-
-static inline void flush(void)
-{
-}
-
-static __inline__ void arch_decomp_setup(void)
-{
-       __raw_writeb(0x00, IO_UART + 0x08);     /* Set HSB */
-       __raw_writeb(0x00, IO_UART + 0x20);     /* Disable IRQs */
-       __raw_writeb(0x01, IO_UART + 0x14);     /* Enable UART */
-}
-
-#define arch_decomp_wdog()
diff --git a/arch/arm/mach-l7200/include/mach/vmalloc.h b/arch/arm/mach-l7200/include/mach/vmalloc.h
deleted file mode 100644 (file)
index 85f0abb..0000000
+++ /dev/null
@@ -1,4 +0,0 @@
-/*
- * arch/arm/mach-l7200/include/mach/vmalloc.h
- */
-#define VMALLOC_END       (PAGE_OFFSET + 0x10000000)
index 189d20e543e75f41b52a39f4f009e30ed87ed2d5..edb8f5faf5d5032c9047d4c743a66e1230dbe0e8 100644 (file)
  */
 #define PHYS_OFFSET    UL(0xc0000000)
 
-#ifdef CONFIG_DISCONTIGMEM
-
-/*
- * Given a kernel address, find the home node of the underlying memory.
- */
-
-# ifdef CONFIG_LH7A40X_ONE_BANK_PER_NODE
-#  define KVADDR_TO_NID(addr) \
-  (  ((((unsigned long) (addr) - PAGE_OFFSET) >> 24) &  1)\
-   | ((((unsigned long) (addr) - PAGE_OFFSET) >> 25) & ~1))
-# else  /* 2 banks per node */
-#  define KVADDR_TO_NID(addr) \
-      (((unsigned long) (addr) - PAGE_OFFSET) >> 26)
-# endif
-
-/*
- * Given a page frame number, convert it to a node id.
- */
-
-# ifdef CONFIG_LH7A40X_ONE_BANK_PER_NODE
-#  define PFN_TO_NID(pfn) \
-  (((((pfn) - PHYS_PFN_OFFSET) >> (24 - PAGE_SHIFT)) &  1)\
- | ((((pfn) - PHYS_PFN_OFFSET) >> (25 - PAGE_SHIFT)) & ~1))
-# else  /* 2 banks per node */
-#  define PFN_TO_NID(pfn) \
-    (((pfn) - PHYS_PFN_OFFSET) >> (26 - PAGE_SHIFT))
-#endif
-
-/*
- * Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory
- * and returns the index corresponding to the appropriate page in the
- * node's mem_map.
- */
-
-# ifdef CONFIG_LH7A40X_ONE_BANK_PER_NODE
-#  define LOCAL_MAP_NR(addr) \
-       (((unsigned long)(addr) & 0x003fffff) >> PAGE_SHIFT)
-# else  /* 2 banks per node */
-#  define LOCAL_MAP_NR(addr) \
-       (((unsigned long)(addr) & 0x01ffffff) >> PAGE_SHIFT)
-# endif
-
-#endif
-
 /*
  * Sparsemem version of the above
  */
index dca5a5f062dce229fe98b9e00fe5f18e5ff40620..e69a1502e4e8dc80cac9dd620497b5adddd0e6d4 100644 (file)
@@ -50,7 +50,6 @@ static void __init trout_fixup(struct machine_desc *desc, struct tag *tags,
 {
        mi->nr_banks = 1;
        mi->bank[0].start = PHYS_OFFSET;
-       mi->bank[0].node = PHYS_TO_NID(PHYS_OFFSET);
        mi->bank[0].size = (101*1024*1024);
 }
 
index f035f4185274160757e11d32377509defbdfb1b7..89f793adf77643093c9e465c35447553102ae295 100644 (file)
@@ -53,6 +53,10 @@ static struct clk clk_default;
        }
 
 static struct clk_lookup lookups[] = {
+       {
+               .con_id         = "apb_pclk",
+               .clk            = &clk_default,
+       },
        CLK(&clk_24, "mtu0"),
        CLK(&clk_24, "mtu1"),
        CLK(&clk_48, "uart0"),
index 0859336a8e6d1be71a8090c1e8ef53b1640c87bc..5c934bdb71583e037c59fdadc3490e43838ff425 100644 (file)
@@ -8,6 +8,7 @@
  * the Free Software Foundation.
  */
 #include <mach/hardware.h>
+#include <asm/memory.h>
 
 #include <mach/regs-board-a9m9750dev.h>
 
index 1b12d324b087d1528c87d828bebec3308be1dbaa..770a68c46e8114f4a7360b559e0ddecd15cfdc57 100644 (file)
@@ -20,50 +20,49 @@ static void putc_dummy(char c, void __iomem *base)
        /* nothing */
 }
 
+static int timeout;
+
 static void putc_ns9360(char c, void __iomem *base)
 {
-       static int t = 0x10000;
        do {
-               if (t)
-                       --t;
+               if (timeout)
+                       --timeout;
 
                if (__raw_readl(base + 8) & (1 << 3)) {
                        __raw_writeb(c, base + 16);
-                       t = 0x10000;
+                       timeout = 0x10000;
                        break;
                }
-       } while (t);
+       } while (timeout);
 }
 
 static void putc_a9m9750dev(char c, void __iomem *base)
 {
-       static int t = 0x10000;
        do {
-               if (t)
-                       --t;
+               if (timeout)
+                       --timeout;
 
                if (__raw_readb(base + 5) & (1 << 5)) {
                        __raw_writeb(c, base);
-                       t = 0x10000;
+                       timeout = 0x10000;
                        break;
                }
-       } while (t);
+       } while (timeout);
 
 }
 
 static void putc_ns921x(char c, void __iomem *base)
 {
-       static int t = 0x10000;
        do {
-               if (t)
-                       --t;
+               if (timeout)
+                       --timeout;
 
                if (!(__raw_readl(base) & (1 << 11))) {
                        __raw_writeb(c, base + 0x0028);
-                       t = 0x10000;
+                       timeout = 0x10000;
                        break;
                }
-       } while (t);
+       } while (timeout);
 }
 
 #define MSCS __REG(0xA0900184)
@@ -89,6 +88,7 @@ static void putc_ns921x(char c, void __iomem *base)
 
 static void autodetect(void (**putc)(char, void __iomem *), void __iomem **base)
 {
+       timeout = 0x10000;
        if (((__raw_readl(MSCS) >> 16) & 0xfe) == 0x00) {
                /* ns9360 or ns9750 */
                if (NS9360_UART_ENABLED(NS9360_UARTA)) {
index fdd1dd53fa9ceddcc5738687b36215d31c3b8ca0..0a9d61d2d2293f8b51c32eb82cd4bea5ada9e6d9 100644 (file)
@@ -301,6 +301,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
        .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
        .boot_params    = 0x10000100,
        .map_io         = ams_delta_map_io,
+       .reserve        = omap_reserve,
        .init_irq       = ams_delta_init_irq,
        .init_machine   = ams_delta_init,
        .timer          = &omap_timer,
index 096f2ed102cbe5aa8fff6a3632022f999776c51d..059bac60b35ae7a3d5d5a59a7e481e549989ae2d 100644 (file)
@@ -378,6 +378,7 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
        .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
        .boot_params    = 0x10000100,
        .map_io         = omap_fsample_map_io,
+       .reserve        = omap_reserve,
        .init_irq       = omap_fsample_init_irq,
        .init_machine   = omap_fsample_init,
        .timer          = &omap_timer,
index e1195a3467b86106a60c258a429c664ca818569e..7a65684d2a15b52064a7afee5be0926b5d8e0ffd 100644 (file)
@@ -98,6 +98,7 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710")
        .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
        .boot_params    = 0x10000100,
        .map_io         = omap_generic_map_io,
+       .reserve        = omap_reserve,
        .init_irq       = omap_generic_init_irq,
        .init_machine   = omap_generic_init,
        .timer          = &omap_timer,
index d1100e4f65aca736c6113643c1310cff4bc2a9b4..68b2beda8b99c8ef9e5261e7a658d0968bb7d27b 100644 (file)
@@ -467,6 +467,7 @@ MACHINE_START(OMAP_H2, "TI-H2")
        .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
        .boot_params    = 0x10000100,
        .map_io         = h2_map_io,
+       .reserve        = omap_reserve,
        .init_irq       = h2_init_irq,
        .init_machine   = h2_init,
        .timer          = &omap_timer,
index a53ab8297d25eb05185b433d310ab2dd415290bf..0b0825fe6751aea72a6ee39e490ab75bf087fd79 100644 (file)
@@ -437,6 +437,7 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
        .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
        .boot_params    = 0x10000100,
        .map_io         = h3_map_io,
+       .reserve        = omap_reserve,
        .init_irq       = h3_init_irq,
        .init_machine   = h3_init,
        .timer          = &omap_timer,
index 8e313b4b99a9d91145201f1d2e28a4a022a7f151..d70a4f0923f53278858692e2bf48637dbb495a4b 100644 (file)
@@ -304,6 +304,7 @@ MACHINE_START(HERALD, "HTC Herald")
        .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
        .boot_params    = 0x10000100,
        .map_io         = htcherald_map_io,
+       .reserve        = omap_reserve,
        .init_irq       = htcherald_init_irq,
        .init_machine   = htcherald_init,
        .timer          = &omap_timer,
index 5d12fd35681b24041695fd3a324bb5a8f2d226bc..91064b37859a131e1d71250d941ebb4e3844237f 100644 (file)
@@ -463,6 +463,7 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
        .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
        .boot_params    = 0x10000100,
        .map_io         = innovator_map_io,
+       .reserve        = omap_reserve,
        .init_irq       = innovator_init_irq,
        .init_machine   = innovator_init,
        .timer          = &omap_timer,
index 71e1a3fad0ead110b7947e555af8c652da261695..8c28b10f3dae75b091017600d03c2d1ed67eca07 100644 (file)
@@ -400,6 +400,7 @@ MACHINE_START(NOKIA770, "Nokia 770")
        .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
        .boot_params    = 0x10000100,
        .map_io         = omap_nokia770_map_io,
+       .reserve        = omap_reserve,
        .init_irq       = omap_nokia770_init_irq,
        .init_machine   = omap_nokia770_init,
        .timer          = &omap_timer,
index 80d862001def595ef2fada032e909a9bcd9aea01..e2a72af30890bbd54850257c3d82df1e5e38339f 100644 (file)
@@ -584,6 +584,7 @@ MACHINE_START(OMAP_OSK, "TI-OSK")
        .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
        .boot_params    = 0x10000100,
        .map_io         = osk_map_io,
+       .reserve        = omap_reserve,
        .init_irq       = osk_init_irq,
        .init_machine   = osk_init,
        .timer          = &omap_timer,
index 569b4c9085cd8b952f91716ebe7e00984ebe7169..61a2321b97323d200db96f1e6e8ceb73794189ed 100644 (file)
@@ -373,6 +373,7 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")
        .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
        .boot_params    = 0x10000100,
        .map_io         = omap_palmte_map_io,
+       .reserve        = omap_reserve,
        .init_irq       = omap_palmte_init_irq,
        .init_machine   = omap_palmte_init,
        .timer          = &omap_timer,
index 6ad49a2cc1a03af4368628ddef06896786d6c3ae..21c01c6afcc1690faaa3cea3399b085b2e8efc9f 100644 (file)
@@ -321,6 +321,7 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T")
        .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
        .boot_params    = 0x10000100,
        .map_io         = omap_palmtt_map_io,
+       .reserve        = omap_reserve,
        .init_irq       = omap_palmtt_init_irq,
        .init_machine   = omap_palmtt_init,
        .timer          = &omap_timer,
index 6641de9257efa047cbf02d94e37506675913c354..f324924515332e956e1eebbda1319b54f9a8a407 100644 (file)
@@ -338,10 +338,12 @@ omap_palmz71_map_io(void)
 }
 
 MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71")
-       .phys_io = 0xfff00000,
-       .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
-       .boot_params = 0x10000100,.map_io = omap_palmz71_map_io,
-       .init_irq = omap_palmz71_init_irq,
-       .init_machine = omap_palmz71_init,
-       .timer = &omap_timer,
+       .phys_io        = 0xfff00000,
+       .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
+       .boot_params    = 0x10000100,
+       .map_io         = omap_palmz71_map_io,
+