ARM: dts: imx51-zii-rdu1: Make sure SD1_WP is low

Make sure that MX51_PAD_GPIO1_1 does not remain configure as
ALT0/SD1_WP (it is out of reset). This is needed because of external
pull-up resistor attached to that pad that, when left unchanged, will
drive SD1_WP high preventing eSDHC1/eMMC from working correctly.

To fix that add a pinmux configuration line configureing the pad to
function as a GPIO. While we are at it, add a corresponding
output-high GPIO hog in an effort to minimize current consumption.

Cc: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Tested-By: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx51-zii-rdu1.dts b/arch/arm/boot/dts/imx51-zii-rdu1.dts
index ad2445dfa91daf141ef2525c13de75923c1aaa6c..27ea581f7789aa40e20fcec4bae9370469661f86 100644 (file)
--- a/arch/arm/boot/dts/imx51-zii-rdu1.dts
+++ b/arch/arm/boot/dts/imx51-zii-rdu1.dts
@@ -476,6 +476,17 @@
        status = "okay";
 };
 
+&gpio1 {
+       unused-sd3-wp-gpio {
+               /*
+                * See pinctrl_esdhc1 below for more details on this
+                */
+               gpio-hog;
+               gpios = <1 GPIO_ACTIVE_HIGH>;
+               output-high;
+       };
+};
+
 &i2c2 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_i2c2>;
@@ -668,6 +679,23 @@
                        MX51_PAD_SD1_DATA1__SD1_DATA1           0x20d5
                        MX51_PAD_SD1_DATA2__SD1_DATA2           0x20d5
                        MX51_PAD_SD1_DATA3__SD1_DATA3           0x20d5
+                       /*
+                        * GPIO1_1 is not directly used by eSDHC1 in
+                        * any capacity, but earlier versions of RDU1
+                        * used that pin as WP GPIO for eSDHC3 and
+                        * because of that that pad has an external
+                        * pull-up resistor. This is problematic
+                        * because out of reset the pad is configured
+                        * as ALT0 which serves as SD1_WP, which, when
+                        * pulled high by and external pull-up, will
+                        * inhibit execution of any write request to
+                        * attached eMMC device.
+                        *
+                        * To avoid this problem we configure the pad
+                        * to ALT1/GPIO and avoid driving SD1_WP
+                        * signal high.
+                        */
+                       MX51_PAD_GPIO1_1__GPIO1_1               0x0000
                >;
        };