* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6:
3c589_cs: fix local_bh_enable warning
RESEND [PATCH 3/3] NetXen: Graceful teardown of interface and hardware upon module unload
drivers/net/ns83820.c: fix a check-after-use
net/usb/cdc_ether minor sparse cleanup
RESEND [PATCH 2/3] NetXen: Support per PCI-function interrupt mask registers
RESEND [PATCH 1/3] NetXen: Fix issue of MSI not working correctly
dm9601: Return 0 from bind() on success
Update MAINTAINERS for USB network devices
usbnet: Zero padding byte if there is tail room in skb
dm9601: HW header size shouldn't be included in packet length
starfire list alpha as 64 bit arch
myri10ge: SET_NETDEV_DEV()
gianfar: Fix typo bug introduced by move to udp_hdr()
[PATCH] libertas: remove private ioctls
[PATCH] libertas: fix WPA associations by handling ENABLE_RSN correctly
[PATCH] libertas: kill wlan_scan_process_results
[PATCH] libertas: style fixes
that "speaks" the ATA protocol, also called ATA controller),
because you will be asked for it.
+ NOTE: ATA enables basic SCSI support; *however*,
+ 'SCSI disk support', 'SCSI tape support', or
+ 'SCSI CDROM support' may also be needed,
+ depending on your hardware configuration.
+
if ATA
config ATA_NONSTANDARD
/* Drives which do spurious command completion */
{ "HTS541680J9SA00", "SB2IC7EP", ATA_HORKAGE_NONCQ, },
{ "HTS541612J9SA00", "SBDIC7JP", ATA_HORKAGE_NONCQ, },
+ { "Hitachi HTS541616J9SA00", "SB4OC70P", ATA_HORKAGE_NONCQ, },
{ "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
/* Devices with NCQ limits */
} else
ata_qc_complete(qc);
}
-
- ata_altstatus(ap); /* flush */
}
/**
void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR];
u32 scr;
long start_count, end_count;
- long pll_clock;
+ struct timeval start_time, end_time;
+ long pll_clock, usec_elapsed;
/* Read current counter value */
start_count = pdc_read_counter(host);
+ do_gettimeofday(&start_time);
/* Start the test mode */
scr = readl(mmio_base + PDC_SYS_CTL);
/* Read the counter values again */
end_count = pdc_read_counter(host);
+ do_gettimeofday(&end_time);
/* Stop the test mode */
scr = readl(mmio_base + PDC_SYS_CTL);
readl(mmio_base + PDC_SYS_CTL); /* flush */
/* calculate the input clock in Hz */
- pll_clock = (start_count - end_count) * 10;
+ usec_elapsed = (end_time.tv_sec - start_time.tv_sec) * 1000000 +
+ (end_time.tv_usec - start_time.tv_usec);
+
+ pll_clock = (start_count - end_count) / 100 *
+ (100000000 / usec_elapsed);
PDPRINTK("start[%ld] end[%ld] \n", start_count, end_count);
PDPRINTK("PLL input clock[%ld]Hz\n", pll_clock);
.port_start = ata_port_start,
};
+static const struct ata_port_operations sis_133_for_sata_ops = {
+ .port_disable = ata_port_disable,
+ .set_piomode = sis_133_set_piomode,
+ .set_dmamode = sis_133_set_dmamode,
+ .mode_filter = ata_pci_default_filter,
+
+ .tf_load = ata_tf_load,
+ .tf_read = ata_tf_read,
+ .check_status = ata_check_status,
+ .exec_command = ata_exec_command,
+ .dev_select = ata_std_dev_select,
+
+ .freeze = ata_bmdma_freeze,
+ .thaw = ata_bmdma_thaw,
+ .error_handler = ata_bmdma_error_handler,
+ .post_internal_cmd = ata_bmdma_post_internal_cmd,
+ .cable_detect = sis_133_cable_detect,
+
+ .bmdma_setup = ata_bmdma_setup,
+ .bmdma_start = ata_bmdma_start,
+ .bmdma_stop = ata_bmdma_stop,
+ .bmdma_status = ata_bmdma_status,
+ .qc_prep = ata_qc_prep,
+ .qc_issue = ata_qc_issue_prot,
+ .data_xfer = ata_data_xfer,
+
+ .irq_handler = ata_interrupt,
+ .irq_clear = ata_bmdma_irq_clear,
+ .irq_on = ata_irq_on,
+ .irq_ack = ata_irq_ack,
+
+ .port_start = ata_port_start,
+};
+
static const struct ata_port_operations sis_133_early_ops = {
.port_disable = ata_port_disable,
.set_piomode = sis_100_set_piomode,
.pio_mask = 0x1f, /* pio0-4 */
.port_ops = &sis_66_ops,
};
-const struct ata_port_info sis_info133 = {
+static const struct ata_port_info sis_info133 = {
.sht = &sis_sht,
.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
.pio_mask = 0x1f, /* pio0-4 */
.udma_mask = ATA_UDMA6,
.port_ops = &sis_133_ops,
};
+const struct ata_port_info sis_info133_for_sata = {
+ .sht = &sis_sht,
+ .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
+ .pio_mask = 0x1f, /* pio0-4 */
+ .udma_mask = ATA_UDMA6,
+ .port_ops = &sis_133_for_sata_ops,
+};
static const struct ata_port_info sis_info133_early = {
.sht = &sis_sht,
.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
};
/* Privately shared with the SiS180 SATA driver, not for use elsewhere */
-EXPORT_SYMBOL_GPL(sis_info133);
+EXPORT_SYMBOL_GPL(sis_info133_for_sata);
static void sis_fixup(struct pci_dev *pdev, struct sis_chipset *sis)
{
static const struct pci_device_id sis_pci_tbl[] = {
{ PCI_VDEVICE(SI, 0x5513), }, /* SiS 5513 */
{ PCI_VDEVICE(SI, 0x5518), }, /* SiS 5518 */
+ { PCI_VDEVICE(SI, 0x1180), }, /* SiS 1180 */
{ }
};
/* inic can only handle upto LBA28 max sectors */
if (dev->max_sectors > ATA_MAX_SECTORS)
dev->max_sectors = ATA_MAX_SECTORS;
+
+ if (dev->n_sectors >= 1 << 28) {
+ ata_dev_printk(dev, KERN_ERR,
+ "ERROR: This driver doesn't support LBA48 yet and may cause\n"
+ " data corruption on such devices. Disabling.\n");
+ ata_dev_disable(dev);
+ }
}
static void init_port(struct ata_port *ap)
.name = DRV_NAME,
.ioctl = ata_scsi_ioctl,
.queuecommand = ata_scsi_queuecmd,
+ .change_queue_depth = ata_scsi_change_queue_depth,
.can_queue = ATA_DEF_QUEUE,
.this_id = ATA_SHT_THIS_ID,
.sg_tablesize = LIBATA_MAX_PRD,
.name = DRV_NAME,
.ioctl = ata_scsi_ioctl,
.queuecommand = ata_scsi_queuecmd,
+ .change_queue_depth = ata_scsi_change_queue_depth,
.can_queue = NV_ADMA_MAX_CPBS,
.this_id = ATA_SHT_THIS_ID,
.sg_tablesize = NV_ADMA_SGTBL_TOTAL_LEN,
{ PCI_VDEVICE(SI, 0x0181), sis_180 }, /* SiS 964/180 */
{ PCI_VDEVICE(SI, 0x0182), sis_180 }, /* SiS 965/965L */
{ PCI_VDEVICE(SI, 0x0183), sis_180 }, /* SiS 965/965L */
- { PCI_VDEVICE(SI, 0x1182), sis_180 }, /* SiS 966/966L */
- { PCI_VDEVICE(SI, 0x1183), sis_180 }, /* SiS 966/966L */
+ { PCI_VDEVICE(SI, 0x1182), sis_180 }, /* SiS 966/680 */
+ { PCI_VDEVICE(SI, 0x1183), sis_180 }, /* SiS 966/966L/968/680 */
{ } /* terminate list */
};
case 0x0182:
case 0x0183:
case 0x1182:
- case 0x1183:
addr += SIS182_SATA1_OFS;
break;
}
pci_read_config_dword(pdev, cfg_addr, &val);
- if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || (pdev->device == 0x1182) ||
- (pdev->device == 0x1183) || (pmr & SIS_PMR_COMBINED))
+ if ((pdev->device == 0x0182) || (pdev->device == 0x0183) ||
+ (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED))
pci_read_config_dword(pdev, cfg_addr+0x10, &val2);
return (val|val2) & 0xfffffffb; /* avoid problems with powerdowned ports */
pci_write_config_dword(pdev, cfg_addr, val);
- if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || (pdev->device == 0x1182) ||
- (pdev->device == 0x1183) || (pmr & SIS_PMR_COMBINED))
+ if ((pdev->device == 0x0182) || (pdev->device == 0x0183) ||
+ (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED))
pci_write_config_dword(pdev, cfg_addr+0x10, val);
}
val = ioread32(ap->ioaddr.scr_addr + (sc_reg * 4));
- if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || (pdev->device == 0x1182) ||
- (pdev->device == 0x1183) || (pmr & SIS_PMR_COMBINED))
+ if ((pdev->device == 0x0182) || (pdev->device == 0x0183) ||
+ (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED))
val2 = ioread32(ap->ioaddr.scr_addr + (sc_reg * 4) + 0x10);
return (val | val2) & 0xfffffffb;
sis_scr_cfg_write(ap, sc_reg, val);
else {
iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4));
- if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || (pdev->device == 0x1182) ||
- (pdev->device == 0x1183) || (pmr & SIS_PMR_COMBINED))
+ if ((pdev->device == 0x0182) || (pdev->device == 0x0183) ||
+ (pdev->device == 0x1182) || (pmr & SIS_PMR_COMBINED))
iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4)+0x10);
}
}
/* The PATA-handling is provided by pata_sis */
switch (pmr & 0x30) {
case 0x10:
- ppi[1] = &sis_info133;
+ ppi[1] = &sis_info133_for_sata;
break;
case 0x30:
- ppi[0] = &sis_info133;
+ ppi[0] = &sis_info133_for_sata;
break;
}
if ((pmr & SIS_PMR_COMBINED) == 0) {
break;
case 0x1182:
+ dev_printk(KERN_INFO, &pdev->dev, "Detected SiS 1182/966/680 SATA controller\n");
+ pi.flags |= ATA_FLAG_SLAVE_POSS;
+ break;
+
case 0x1183:
- pci_read_config_dword(pdev, 0x64, &val);
- if (val & 0x10000000) {
- dev_printk(KERN_INFO, &pdev->dev, "Detected SiS 1182/1183/966L SATA controller\n");
- } else {
- dev_printk(KERN_INFO, &pdev->dev, "Detected SiS 1182/1183/966 SATA controller\n");
- pi.flags |= ATA_FLAG_SLAVE_POSS;
- }
+ dev_printk(KERN_INFO, &pdev->dev, "Detected SiS 1183/966/966L/968/680 controller in PATA mode\n");
+ ppi[0] = &sis_info133_for_sata;
+ ppi[1] = &sis_info133_for_sata;
break;
}
struct ata_port_info;
/* pata_sis.c */
-extern const struct ata_port_info sis_info133;
+extern const struct ata_port_info sis_info133_for_sata;
depends on EXPERIMENTAL=n
config FIREWIRE
- tristate "IEEE 1394 (FireWire) support (JUJU alternative stack, experimental)"
+ tristate "IEEE 1394 (FireWire) support - alternative stack, EXPERIMENTAL"
depends on EXPERIMENTAL
select CRC_ITU_T
help
- IEEE 1394 describes a high performance serial bus, which is also
- known as FireWire(tm) or i.Link(tm) and is used for connecting all
- sorts of devices (most notably digital video cameras) to your
- computer.
-
- If you have FireWire hardware and want to use it, say Y here. This
- is the core support only, you will also need to select a driver for
- your IEEE 1394 adapter.
-
- To compile this driver as a module, say M here: the module will be
- called firewire-core.
-
- This is the "JUJU" FireWire stack, an alternative implementation
+ This is the "Juju" FireWire stack, a new alternative implementation
designed for robustness and simplicity. You can build either this
stack, or the classic stack (the ieee1394 driver, ohci1394 etc.)
or both.
+ To compile this driver as a module, say M here: the module will be
+ called firewire-core. It functionally replaces ieee1394, raw1394,
+ and video1394.
+
+ NOTE:
+
+ You should only build ONE of the stacks, unless you REALLY know what
+ you are doing. If you install both, you should configure them only as
+ modules rather than link them statically, and you should blacklist one
+ of the concurrent low-level drivers in /etc/modprobe.conf. Add either
+
+ blacklist firewire-ohci
+ or
+ blacklist ohci1394
+
+ there depending on which driver you DON'T want to have auto-loaded.
+ You can optionally do the same with the other IEEE 1394/ FireWire
+ drivers.
+
+ If you have an old modprobe which doesn't implement the blacklist
+ directive, use either
+
+ install firewire-ohci /bin/true
+ or
+ install ohci1394 /bin/true
+
+ and so on, depending on which modules you DON't want to have
+ auto-loaded.
+
config FIREWIRE_OHCI
tristate "Support for OHCI FireWire host controllers"
depends on PCI && FIREWIRE
is the only chipset in use, so say Y here.
To compile this driver as a module, say M here: The module will be
- called firewire-ohci.
+ called firewire-ohci. It replaces ohci1394 of the classic IEEE 1394
+ stack.
+
+ NOTE:
- If you also build ohci1394 of the classic IEEE 1394 driver stack,
- blacklist either ohci1394 or firewire-ohci to let hotplug load the
- desired driver.
+ If you also build ohci1394 of the classic stack, blacklist either
+ ohci1394 or firewire-ohci to let hotplug load only the desired driver.
config FIREWIRE_SBP2
tristate "Support for storage devices (SBP-2 protocol driver)"
like scanners.
To compile this driver as a module, say M here: The module will be
- called firewire-sbp2.
+ called firewire-sbp2. It replaces sbp2 of the classic IEEE 1394
+ stack.
You should also enable support for disks, CD-ROMs, etc. in the SCSI
configuration section.
- If you also build sbp2 of the classic IEEE 1394 driver stack,
- blacklist either sbp2 or firewire-sbp2 to let hotplug load the
- desired driver.
+ NOTE:
+
+ If you also build sbp2 of the classic stack, blacklist either sbp2
+ or firewire-sbp2 to let hotplug load only the desired driver.
offset = offsetof(struct ar_buffer, data);
dma_unmap_single(ohci->card.device,
- ab->descriptor.data_address - offset,
- PAGE_SIZE, DMA_BIDIRECTIONAL);
+ le32_to_cpu(ab->descriptor.data_address) - offset,
+ PAGE_SIZE, DMA_BIDIRECTIONAL);
buffer = ab;
ab = ab->next;
size_t offset;
offset = offsetof(struct ar_buffer, data);
- ab_bus = ab->descriptor.data_address - offset;
+ ab_bus = le32_to_cpu(ab->descriptor.data_address) - offset;
reg_write(ctx->ohci, COMMAND_PTR(ctx->regs), ab_bus | 1);
reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN);
depends on SCSI
---help---
If you want to use SCSI hard disks, Fibre Channel disks,
+ Serial ATA (SATA) or Parallel ATA (PATA) hard disks,
USB storage or the SCSI or parallel port version of
the IOMEGA ZIP drive, say Y and read the SCSI-HOWTO,
the Disk-HOWTO and the Multi-Disk-HOWTO, available from
git.samba.org / sfrench / cifs-2.6.git / commitdiff