Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
authorLinus Torvalds <torvalds@linux-foundation.org>
Sat, 20 Jul 2019 00:19:24 +0000 (17:19 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Sat, 20 Jul 2019 00:19:24 +0000 (17:19 -0700)
Pull ARM Devicetree updates from Olof Johansson:
 "We continue to see a lot of new material. I've highlighted some of it
  below, but there's been more beyond that as well.

  One of the sweeping changes is that many boards have seen their ARM
  Mali GPU devices added to device trees, since the DRM drivers have now
  been merged.

  So, with the caveat that I have surely missed several great
  contributions, here's a collection of the material this time around:

  New SoCs:

   - Mediatek mt8183 (4x Cortex-A73 + 4x Cortex-A53)

   - TI J721E (2x Cortex-A72 + 3x Cortex-R5F + 3 DSPs + MMA)

   - Amlogic G12B (4x Cortex-A73 + 2x Cortex-A53)

  New Boards / platforms:

   - Aspeed BMC support for a number of new server platforms

   - Kontron SMARC SoM (several i.MX6 versions)

   - Novtech's Meerkat96 (i.MX7)

   - ST Micro Avenger96 board

   - Hardkernel ODROID-N2 (Amlogic G12B)

   - Purism Librem5 devkit (i.MX8MQ)

   - Google Cheza (Qualcomm SDM845)

   - Qualcomm Dragonboard 845c (Qualcomm SDM845)

   - Hugsun X99 TV Box (Rockchip RK3399)

   - Khadas Edge/Edge-V/Captain (Rockchip RK3399)

  Updated / expanded boards and platforms:

   - Renesas r7s9210 has a lot of new peripherals added

   - Fixes and polish for Rockchip-based Chromebooks

   - Amlogic G12A has a lot of peripherals added

   - Nvidia Jetson Nano sees various fixes and improvements, and is now
     at feature parity with TX1"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (586 commits)
  ARM: dts: gemini: Set DIR-685 SPI CS as active low
  ARM: dts: exynos: Adjust buck[78] regulators to supported values on Arndale Octa
  ARM: dts: exynos: Adjust buck[78] regulators to supported values on Odroid XU3 family
  ARM: dts: exynos: Move Mali400 GPU node to "/soc"
  ARM: dts: exynos: Fix imprecise abort on Mali GPU probe on Exynos4210
  arm64: dts: qcom: qcs404: Add missing space for cooling-cells property
  arm64: dts: rockchip: Fix USB3 Type-C on rk3399-sapphire
  arm64: dts: rockchip: Update DWC3 modules on RK3399 SoCs
  arm64: dts: rockchip: enable rk3328 watchdog clock
  ARM: dts: rockchip: add display nodes for rk322x
  ARM: dts: rockchip: fix vop iommu-cells on rk322x
  arm64: dts: rockchip: Add support for Hugsun X99 TV Box
  arm64: dts: rockchip: Define values for the IPA governor for rock960
  arm64: dts: rockchip: Fix multiple thermal zones conflict in rk3399.dtsi
  arm64: dts: rockchip: add core dtsi file for RK3399Pro SoCs
  arm64: dts: rockchip: improve rk3328-roc-cc rgmii performance.
  Revert "ARM: dts: rockchip: set PWM delay backlight settings for Minnie"
  ARM: dts: rockchip: Configure BT_DEV_WAKE in on rk3288-veyron
  arm64: dts: qcom: sdm845-cheza: add initial cheza dt
  ARM: dts: msm8974-FP2: Add vibration motor
  ...

445 files changed:
Documentation/devicetree/bindings/arm/amlogic.txt [deleted file]
Documentation/devicetree/bindings/arm/amlogic.yaml [new file with mode: 0644]
Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.txt [new file with mode: 0644]
Documentation/devicetree/bindings/arm/atmel-at91.txt [deleted file]
Documentation/devicetree/bindings/arm/atmel-at91.yaml [new file with mode: 0644]
Documentation/devicetree/bindings/arm/emtrion.txt [deleted file]
Documentation/devicetree/bindings/arm/fsl.yaml
Documentation/devicetree/bindings/arm/mediatek.txt [deleted file]
Documentation/devicetree/bindings/arm/mediatek.yaml [new file with mode: 0644]
Documentation/devicetree/bindings/arm/omap/omap.txt
Documentation/devicetree/bindings/arm/renesas.yaml
Documentation/devicetree/bindings/arm/rockchip.yaml
Documentation/devicetree/bindings/arm/stm32/stm32.txt [deleted file]
Documentation/devicetree/bindings/arm/stm32/stm32.yaml [new file with mode: 0644]
Documentation/devicetree/bindings/arm/sunxi.yaml
Documentation/devicetree/bindings/arm/ti/k3.txt
Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml [new file with mode: 0644]
Documentation/devicetree/bindings/bus/sunxi-rsb.txt [deleted file]
Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt
Documentation/devicetree/bindings/dma/fsl-qdma.txt
Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt
Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
Documentation/devicetree/bindings/input/sun4i-lradc-keys.txt
Documentation/devicetree/bindings/net/can/rcar_can.txt
Documentation/devicetree/bindings/net/can/rcar_canfd.txt
Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml [new file with mode: 0644]
Documentation/devicetree/bindings/pwm/pwm-sun4i.txt [deleted file]
Documentation/devicetree/bindings/serial/omap_serial.txt
Documentation/devicetree/bindings/timer/renesas,cmt.txt
Documentation/devicetree/bindings/vendor-prefixes.yaml
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/am335x-baltos-ir2110.dts
arch/arm/boot/dts/am335x-baltos-ir3220.dts
arch/arm/boot/dts/am335x-baltos-ir5221.dts
arch/arm/boot/dts/am335x-pcm-953.dtsi
arch/arm/boot/dts/am335x-phycore-rdk.dts
arch/arm/boot/dts/am335x-phycore-som.dtsi
arch/arm/boot/dts/am335x-regor-rdk.dts [new file with mode: 0644]
arch/arm/boot/dts/am335x-regor.dtsi [new file with mode: 0644]
arch/arm/boot/dts/am335x-wega-rdk.dts
arch/arm/boot/dts/am335x-wega.dtsi
arch/arm/boot/dts/arm-realview-eb.dtsi
arch/arm/boot/dts/arm-realview-pb1176.dts
arch/arm/boot/dts/arm-realview-pb11mp.dts
arch/arm/boot/dts/arm-realview-pbx.dtsi
arch/arm/boot/dts/armada-370-netgear-rn104.dts
arch/arm/boot/dts/aspeed-bmc-facebook-cmm.dts
arch/arm/boot/dts/aspeed-bmc-facebook-yamp.dts [new file with mode: 0644]
arch/arm/boot/dts/aspeed-bmc-inspur-fp5280g2.dts [new file with mode: 0644]
arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts [new file with mode: 0644]
arch/arm/boot/dts/aspeed-bmc-microsoft-olympus.dts [new file with mode: 0644]
arch/arm/boot/dts/aspeed-bmc-opp-lanyang.dts
arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts
arch/arm/boot/dts/aspeed-bmc-opp-swift.dts [new file with mode: 0644]
arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts [new file with mode: 0644]
arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts
arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts
arch/arm/boot/dts/aspeed-g4.dtsi
arch/arm/boot/dts/aspeed-g5.dtsi
arch/arm/boot/dts/at91-wb50n.dtsi
arch/arm/boot/dts/at91sam9261ek.dts
arch/arm/boot/dts/at91sam9g45.dtsi
arch/arm/boot/dts/at91sam9rl.dtsi
arch/arm/boot/dts/at91sam9x5.dtsi
arch/arm/boot/dts/bcm-cygnus-clock.dtsi
arch/arm/boot/dts/bcm-cygnus.dtsi
arch/arm/boot/dts/bcm-nsp.dtsi
arch/arm/boot/dts/bcm11351.dtsi
arch/arm/boot/dts/bcm21664-garnet.dts
arch/arm/boot/dts/bcm21664.dtsi
arch/arm/boot/dts/bcm23550-sparrow.dts
arch/arm/boot/dts/bcm23550.dtsi
arch/arm/boot/dts/bcm28155-ap.dts
arch/arm/boot/dts/bcm283x.dtsi
arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts
arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts
arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
arch/arm/boot/dts/bcm4708-luxul-xap-1510.dts
arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts
arch/arm/boot/dts/bcm4708-netgear-r6250.dts
arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts
arch/arm/boot/dts/bcm4708-smartrg-sr400ac.dts
arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts
arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts
arch/arm/boot/dts/bcm47081-luxul-xap-1410.dts
arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
arch/arm/boot/dts/bcm47081-tplink-archer-c5-v2.dts
arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
arch/arm/boot/dts/bcm47094-linksys-panamera.dts
arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts
arch/arm/boot/dts/bcm47094-luxul-xap-1610.dts
arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts
arch/arm/boot/dts/bcm47094-luxul-xwr-3100.dts
arch/arm/boot/dts/bcm47094-luxul-xwr-3150-v1.dts
arch/arm/boot/dts/bcm47094-netgear-r8500.dts
arch/arm/boot/dts/bcm47094-phicomm-k3.dts
arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
arch/arm/boot/dts/bcm47189-tenda-ac9.dts
arch/arm/boot/dts/bcm5301x.dtsi
arch/arm/boot/dts/bcm53573.dtsi
arch/arm/boot/dts/bcm63138.dtsi
arch/arm/boot/dts/bcm7445-bcm97445svmb.dts
arch/arm/boot/dts/bcm7445.dtsi
arch/arm/boot/dts/bcm911360_entphn.dts
arch/arm/boot/dts/bcm947189acdbmr.dts
arch/arm/boot/dts/bcm953012er.dts
arch/arm/boot/dts/bcm953012k.dts
arch/arm/boot/dts/bcm958522er.dts
arch/arm/boot/dts/bcm958525er.dts
arch/arm/boot/dts/bcm958525xmc.dts
arch/arm/boot/dts/bcm958622hr.dts
arch/arm/boot/dts/bcm958623hr.dts
arch/arm/boot/dts/bcm958625hr.dts
arch/arm/boot/dts/bcm958625k.dts
arch/arm/boot/dts/bcm963138dvt.dts
arch/arm/boot/dts/bcm988312hr.dts
arch/arm/boot/dts/da850-evm.dts
arch/arm/boot/dts/da850-lcdk.dts
arch/arm/boot/dts/da850-lego-ev3.dts
arch/arm/boot/dts/da850.dtsi
arch/arm/boot/dts/emev2-kzm9d.dts
arch/arm/boot/dts/exynos3250-artik5.dtsi
arch/arm/boot/dts/exynos3250-monk.dts
arch/arm/boot/dts/exynos3250-rinato.dts
arch/arm/boot/dts/exynos3250.dtsi
arch/arm/boot/dts/exynos4.dtsi
arch/arm/boot/dts/exynos4210-origen.dts
arch/arm/boot/dts/exynos4210-trats.dts
arch/arm/boot/dts/exynos4210-universal_c210.dts
arch/arm/boot/dts/exynos4210.dtsi
arch/arm/boot/dts/exynos4412-galaxy-s3.dtsi
arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi
arch/arm/boot/dts/exynos4412-midas.dtsi
arch/arm/boot/dts/exynos4412-odroid-common.dtsi
arch/arm/boot/dts/exynos4412-prime.dtsi
arch/arm/boot/dts/exynos4412.dtsi
arch/arm/boot/dts/exynos5410-odroidxu.dts
arch/arm/boot/dts/exynos5410.dtsi
arch/arm/boot/dts/exynos5420-arndale-octa.dts
arch/arm/boot/dts/exynos5420.dtsi
arch/arm/boot/dts/exynos5422-odroid-core.dtsi
arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi
arch/arm/boot/dts/exynos54xx.dtsi
arch/arm/boot/dts/gemini-dlink-dir-685.dts
arch/arm/boot/dts/hip04.dtsi
arch/arm/boot/dts/ibm-power9-dual.dtsi [new file with mode: 0644]
arch/arm/boot/dts/imx53-m53menlo.dts
arch/arm/boot/dts/imx53-smd.dts
arch/arm/boot/dts/imx53.dtsi
arch/arm/boot/dts/imx6dl-kontron-samx6i.dtsi [new file with mode: 0644]
arch/arm/boot/dts/imx6q-kontron-samx6i.dtsi [new file with mode: 0644]
arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi [new file with mode: 0644]
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
arch/arm/boot/dts/imx6qdl.dtsi
arch/arm/boot/dts/imx6sl-evk.dts
arch/arm/boot/dts/imx6sl.dtsi
arch/arm/boot/dts/imx6sll-evk.dts
arch/arm/boot/dts/imx6sll.dtsi
arch/arm/boot/dts/imx6sx-sdb-reva.dts
arch/arm/boot/dts/imx6sx-sdb.dts
arch/arm/boot/dts/imx6sx-udoo-neo-basic.dts
arch/arm/boot/dts/imx6sx-udoo-neo-extended.dts
arch/arm/boot/dts/imx6sx-udoo-neo-full.dts
arch/arm/boot/dts/imx6sx-udoo-neo.dtsi
arch/arm/boot/dts/imx6sx.dtsi
arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
arch/arm/boot/dts/imx6ul-geam.dts
arch/arm/boot/dts/imx6ul-isiot.dtsi
arch/arm/boot/dts/imx6ul.dtsi
arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi
arch/arm/boot/dts/imx6ull-colibri.dtsi
arch/arm/boot/dts/imx6ull.dtsi
arch/arm/boot/dts/imx7d-meerkat96.dts [new file with mode: 0644]
arch/arm/boot/dts/imx7d-sdb.dts
arch/arm/boot/dts/imx7d-zii-rpu2.dts
arch/arm/boot/dts/imx7d.dtsi
arch/arm/boot/dts/imx7s.dtsi
arch/arm/boot/dts/imx7ulp-evk.dts
arch/arm/boot/dts/imx7ulp.dtsi
arch/arm/boot/dts/integrator.dtsi
arch/arm/boot/dts/iwg20d-q7-common.dtsi
arch/arm/boot/dts/logicpd-torpedo-37xx-devkit-28.dts [new file with mode: 0644]
arch/arm/boot/dts/ls1021a-tsn.dts [new file with mode: 0644]
arch/arm/boot/dts/meson.dtsi
arch/arm/boot/dts/meson6-atv1200.dts
arch/arm/boot/dts/meson6.dtsi
arch/arm/boot/dts/meson8-minix-neo-x8.dts
arch/arm/boot/dts/meson8.dtsi
arch/arm/boot/dts/meson8b-ec100.dts
arch/arm/boot/dts/meson8b-mxq.dts
arch/arm/boot/dts/meson8b-odroidc1.dts
arch/arm/boot/dts/meson8b.dtsi
arch/arm/boot/dts/meson8m2-mxiii-plus.dts
arch/arm/boot/dts/meson8m2.dtsi
arch/arm/boot/dts/omap4-l4.dtsi
arch/arm/boot/dts/pxa300-raumfeld-common.dtsi
arch/arm/boot/dts/pxa300-raumfeld-controller.dts
arch/arm/boot/dts/pxa300-raumfeld-speaker-one.dts
arch/arm/boot/dts/pxa3xx.dtsi
arch/arm/boot/dts/qcom-apq8064.dtsi
arch/arm/boot/dts/qcom-msm8974-fairphone-fp2.dts
arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
arch/arm/boot/dts/qcom-msm8974.dtsi
arch/arm/boot/dts/r7s72100-genmai.dts
arch/arm/boot/dts/r7s72100-rskrza1.dts
arch/arm/boot/dts/r7s72100.dtsi
arch/arm/boot/dts/r7s9210-rza2mevb.dts
arch/arm/boot/dts/r7s9210.dtsi
arch/arm/boot/dts/r8a73a4-ape6evm.dts
arch/arm/boot/dts/r8a7740-armadillo800eva.dts
arch/arm/boot/dts/r8a7743-sk-rzg1m.dts
arch/arm/boot/dts/r8a7745-iwg22d-sodimm.dts
arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
arch/arm/boot/dts/r8a7778-bockw.dts
arch/arm/boot/dts/r8a7779-marzen.dts
arch/arm/boot/dts/r8a7790-lager.dts
arch/arm/boot/dts/r8a7790-stout.dts
arch/arm/boot/dts/r8a7791-koelsch.dts
arch/arm/boot/dts/r8a7791-porter.dts
arch/arm/boot/dts/r8a7792-blanche.dts
arch/arm/boot/dts/r8a7792-wheat.dts
arch/arm/boot/dts/r8a7792.dtsi
arch/arm/boot/dts/r8a7793-gose.dts
arch/arm/boot/dts/r8a7794-alt.dts
arch/arm/boot/dts/r8a7794-silk.dts
arch/arm/boot/dts/rk322x.dtsi
arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
arch/arm/boot/dts/rk3288-veyron-jaq.dts
arch/arm/boot/dts/rk3288-veyron-jerry.dts
arch/arm/boot/dts/rk3288-veyron-mickey.dts
arch/arm/boot/dts/rk3288-veyron-minnie.dts
arch/arm/boot/dts/rk3288-veyron-pinky.dts
arch/arm/boot/dts/rk3288-veyron-speedy.dts
arch/arm/boot/dts/rk3288-veyron.dtsi
arch/arm/boot/dts/rk3288.dtsi
arch/arm/boot/dts/sama5d3.dtsi
arch/arm/boot/dts/sh73a0-kzm9g.dts
arch/arm/boot/dts/socfpga_arria10.dtsi
arch/arm/boot/dts/socfpga_arria10_socdk.dtsi
arch/arm/boot/dts/stm32746g-eval.dts
arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
arch/arm/boot/dts/stm32mp157a-avenger96.dts [new file with mode: 0644]
arch/arm/boot/dts/stm32mp157a-dk1.dts
arch/arm/boot/dts/stm32mp157c-ed1.dts
arch/arm/boot/dts/stm32mp157c-ev1.dts
arch/arm/boot/dts/stm32mp157c.dtsi
arch/arm/boot/dts/stm32mp157xaa-pinctrl.dtsi [new file with mode: 0644]
arch/arm/boot/dts/stm32mp157xab-pinctrl.dtsi [new file with mode: 0644]
arch/arm/boot/dts/stm32mp157xac-pinctrl.dtsi [new file with mode: 0644]
arch/arm/boot/dts/stm32mp157xad-pinctrl.dtsi [new file with mode: 0644]
arch/arm/boot/dts/sun5i-gr8-evb.dts
arch/arm/boot/dts/sun6i-a31.dtsi
arch/arm/boot/dts/sun7i-a20-icnova-swac.dts
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
arch/arm/boot/dts/sun8i-a83t.dtsi
arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
arch/arm/boot/dts/sun8i-r40.dtsi
arch/arm/boot/dts/sun8i-v3s.dtsi
arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
arch/arm/boot/dts/sunxi-bananapi-m2-plus-v1.2.dtsi
arch/arm/boot/dts/uniphier-ld4-ref.dts
arch/arm/boot/dts/uniphier-ld4.dtsi
arch/arm/boot/dts/uniphier-ld6b-ref.dts
arch/arm/boot/dts/uniphier-pro4-ref.dts
arch/arm/boot/dts/uniphier-pro4.dtsi
arch/arm/boot/dts/uniphier-pro5.dtsi
arch/arm/boot/dts/uniphier-pxs2.dtsi
arch/arm/boot/dts/uniphier-sld8-ref.dts
arch/arm/boot/dts/uniphier-sld8.dtsi
arch/arm/boot/dts/versatile-ab.dts
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
arch/arm/boot/dts/vexpress-v2m.dtsi
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
arch/arm/boot/dts/vf610-zii-dev.dtsi
arch/arm/configs/davinci_all_defconfig
arch/arm64/boot/dts/allwinner/axp803.dtsi
arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts
arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
arch/arm64/boot/dts/allwinner/sun50i-a64-oceanic-5205-5inmfd.dts
arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
arch/arm64/boot/dts/allwinner/sun50i-h5-emlid-neutis-n5-devboard.dts
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
arch/arm64/boot/dts/amlogic/Makefile
arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
arch/arm64/boot/dts/amlogic/meson-axg.dtsi
arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts [new file with mode: 0644]
arch/arm64/boot/dts/amlogic/meson-g12b.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
arch/arm64/boot/dts/amlogic/meson-gx.dtsi
arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts
arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts
arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts
arch/arm64/boot/dts/arm/juno-base.dtsi
arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi
arch/arm64/boot/dts/arm/juno-motherboard.dtsi
arch/arm64/boot/dts/broadcom/stingray/stingray-usb.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
arch/arm64/boot/dts/exynos/exynos5433.dtsi
arch/arm64/boot/dts/exynos/exynos7-espresso.dts
arch/arm64/boot/dts/exynos/exynos7.dtsi
arch/arm64/boot/dts/freescale/Makefile
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
arch/arm64/boot/dts/freescale/imx8mm-evk.dts
arch/arm64/boot/dts/freescale/imx8mm.dtsi
arch/arm64/boot/dts/freescale/imx8mq-evk.dts
arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts [new file with mode: 0644]
arch/arm64/boot/dts/freescale/imx8mq.dtsi
arch/arm64/boot/dts/freescale/imx8qxp.dtsi
arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/hisilicon/hi3660.dtsi
arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
arch/arm64/boot/dts/marvell/armada-7040-db.dts
arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
arch/arm64/boot/dts/marvell/armada-8040-db.dts
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi
arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
arch/arm64/boot/dts/marvell/armada-ap806.dtsi
arch/arm64/boot/dts/marvell/armada-cp110.dtsi
arch/arm64/boot/dts/mediatek/Makefile
arch/arm64/boot/dts/mediatek/mt8183-evb.dts [new file with mode: 0644]
arch/arm64/boot/dts/mediatek/mt8183.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
arch/arm64/boot/dts/nvidia/tegra186.dtsi
arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
arch/arm64/boot/dts/nvidia/tegra194.dtsi
arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts
arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
arch/arm64/boot/dts/nvidia/tegra210.dtsi
arch/arm64/boot/dts/qcom/Makefile
arch/arm64/boot/dts/qcom/msm8916.dtsi
arch/arm64/boot/dts/qcom/msm8996.dtsi
arch/arm64/boot/dts/qcom/msm8998.dtsi
arch/arm64/boot/dts/qcom/pm8998.dtsi
arch/arm64/boot/dts/qcom/pms405.dtsi
arch/arm64/boot/dts/qcom/qcs404-evb.dtsi
arch/arm64/boot/dts/qcom/qcs404.dtsi
arch/arm64/boot/dts/qcom/sdm845-cheza-r1.dts [new file with mode: 0644]
arch/arm64/boot/dts/qcom/sdm845-cheza-r2.dts [new file with mode: 0644]
arch/arm64/boot/dts/qcom/sdm845-cheza-r3.dts [new file with mode: 0644]
arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/qcom/sdm845-db845c.dts [new file with mode: 0644]
arch/arm64/boot/dts/qcom/sdm845-mtp.dts
arch/arm64/boot/dts/qcom/sdm845.dtsi
arch/arm64/boot/dts/renesas/Makefile
arch/arm64/boot/dts/renesas/hihope-common.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/renesas/hihope-rzg2-ex.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex.dts [new file with mode: 0644]
arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m.dts [new file with mode: 0644]
arch/arm64/boot/dts/renesas/r8a774a1.dtsi
arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
arch/arm64/boot/dts/renesas/r8a774c0.dtsi
arch/arm64/boot/dts/renesas/r8a7795.dtsi
arch/arm64/boot/dts/renesas/r8a7796.dtsi
arch/arm64/boot/dts/renesas/r8a77965.dtsi
arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
arch/arm64/boot/dts/renesas/r8a77990.dtsi
arch/arm64/boot/dts/renesas/r8a77995-draak.dts
arch/arm64/boot/dts/renesas/r8a77995.dtsi
arch/arm64/boot/dts/renesas/salvator-common.dtsi
arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
arch/arm64/boot/dts/renesas/ulcb.dtsi
arch/arm64/boot/dts/rockchip/Makefile
arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
arch/arm64/boot/dts/rockchip/rk3328.dtsi
arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
arch/arm64/boot/dts/rockchip/rk3399-hugsun-x99.dts [new file with mode: 0644]
arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-captain.dts [new file with mode: 0644]
arch/arm64/boot/dts/rockchip/rk3399-khadas-edge-v.dts [new file with mode: 0644]
arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dts [new file with mode: 0644]
arch/arm64/boot/dts/rockchip/rk3399-khadas-edge.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts
arch/arm64/boot/dts/rockchip/rk3399-rock960.dts
arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts
arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
arch/arm64/boot/dts/rockchip/rk3399.dtsi
arch/arm64/boot/dts/rockchip/rk3399pro.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
arch/arm64/boot/dts/sprd/sc9836.dtsi
arch/arm64/boot/dts/sprd/sc9860.dtsi
arch/arm64/boot/dts/sprd/whale2.dtsi
arch/arm64/boot/dts/ti/Makefile
arch/arm64/boot/dts/ti/k3-am65-main.dtsi
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi
arch/arm64/boot/dts/ti/k3-am65.dtsi
arch/arm64/boot/dts/ti/k3-am654-base-board.dts
arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts [new file with mode: 0644]
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/ti/k3-j721e.dtsi [new file with mode: 0644]
arch/arm64/configs/defconfig
drivers/soc/ti/Kconfig
include/dt-bindings/gpio/tegra186-gpio.h

diff --git a/Documentation/devicetree/bindings/arm/amlogic.txt b/Documentation/devicetree/bindings/arm/amlogic.txt
deleted file mode 100644 (file)
index 061f7b9..0000000
+++ /dev/null
@@ -1,142 +0,0 @@
-Amlogic MesonX device tree bindings
--------------------------------------------
-
-Work in progress statement:
-
-Device tree files and bindings applying to Amlogic SoCs and boards are
-considered "unstable". Any Amlogic device tree binding may change at
-any time. Be sure to use a device tree binary and a kernel image
-generated from the same source tree.
-
-Please refer to Documentation/devicetree/bindings/ABI.txt for a definition of a
-stable binding/ABI.
-
----------------------------------------------------------------
-
-Boards with the Amlogic Meson6 SoC shall have the following properties:
-  Required root node property:
-    compatible: "amlogic,meson6"
-
-Boards with the Amlogic Meson8 SoC shall have the following properties:
-  Required root node property:
-    compatible: "amlogic,meson8";
-
-Boards with the Amlogic Meson8b SoC shall have the following properties:
-  Required root node property:
-    compatible: "amlogic,meson8b";
-
-Boards with the Amlogic Meson8m2 SoC shall have the following properties:
-  Required root node property:
-    compatible: "amlogic,meson8m2";
-
-Boards with the Amlogic Meson GXBaby SoC shall have the following properties:
-  Required root node property:
-    compatible: "amlogic,meson-gxbb";
-
-Boards with the Amlogic Meson GXL S905X SoC shall have the following properties:
-  Required root node property:
-    compatible: "amlogic,s905x", "amlogic,meson-gxl";
-
-Boards with the Amlogic Meson GXL S905D SoC shall have the following properties:
-  Required root node property:
-    compatible: "amlogic,s905d", "amlogic,meson-gxl";
-
-Boards with the Amlogic Meson GXL S805X SoC shall have the following properties:
-  Required root node property:
-    compatible: "amlogic,s805x", "amlogic,meson-gxl";
-
-Boards with the Amlogic Meson GXL S905W SoC shall have the following properties:
-  Required root node property:
-    compatible: "amlogic,s905w", "amlogic,meson-gxl";
-
-Boards with the Amlogic Meson GXM S912 SoC shall have the following properties:
-  Required root node property:
-    compatible: "amlogic,s912", "amlogic,meson-gxm";
-
-Boards with the Amlogic Meson AXG A113D SoC shall have the following properties:
-  Required root node property:
-    compatible: "amlogic,a113d", "amlogic,meson-axg";
-
-Boards with the Amlogic Meson G12A S905D2 SoC shall have the following properties:
-  Required root node property:
-    compatible: "amlogic,g12a";
-
-Board compatible values (alphabetically, grouped by SoC):
-
-  - "geniatech,atv1200" (Meson6)
-
-  - "minix,neo-x8" (Meson8)
-
-  - "endless,ec100" (Meson8b)
-  - "hardkernel,odroid-c1" (Meson8b)
-  - "tronfy,mxq" (Meson8b)
-
-  - "tronsmart,mxiii-plus" (Meson8m2)
-
-  - "amlogic,p200" (Meson gxbb)
-  - "amlogic,p201" (Meson gxbb)
-  - "friendlyarm,nanopi-k2" (Meson gxbb)
-  - "hardkernel,odroid-c2" (Meson gxbb)
-  - "nexbox,a95x" (Meson gxbb or Meson gxl s905x)
-  - "tronsmart,vega-s95-pro", "tronsmart,vega-s95" (Meson gxbb)
-  - "tronsmart,vega-s95-meta", "tronsmart,vega-s95" (Meson gxbb)
-  - "tronsmart,vega-s95-telos", "tronsmart,vega-s95" (Meson gxbb)
-  - "wetek,hub" (Meson gxbb)
-  - "wetek,play2" (Meson gxbb)
-
-  - "amlogic,p212" (Meson gxl s905x)
-  - "hwacom,amazetv" (Meson gxl s905x)
-  - "khadas,vim" (Meson gxl s905x)
-  - "libretech,cc" (Meson gxl s905x)
-
-  - "amlogic,p230" (Meson gxl s905d)
-  - "amlogic,p231" (Meson gxl s905d)
-  - "phicomm,n1" (Meson gxl s905d)
-
-  - "amlogic,p241" (Meson gxl s805x)
-  - "libretech,aml-s805x-ac" (Meson gxl s805x)
-
-  - "amlogic,p281" (Meson gxl s905w)
-  - "oranth,tx3-mini" (Meson gxl s905w)
-
-  - "amlogic,q200" (Meson gxm s912)
-  - "amlogic,q201" (Meson gxm s912)
-  - "khadas,vim2" (Meson gxm s912)
-  - "kingnovel,r-box-pro" (Meson gxm S912)
-  - "nexbox,a1" (Meson gxm s912)
-  - "tronsmart,vega-s96" (Meson gxm s912)
-
-  - "amlogic,s400" (Meson axg a113d)
-
-  - "amlogic,u200" (Meson g12a s905d2)
-  - "amediatech,x96-max" (Meson g12a s905x2)
-  - "seirobotics,sei510" (Meson g12a s905x2)
-
-Amlogic Meson Firmware registers Interface
-------------------------------------------
-
-The Meson SoCs have a register bank with status and data shared with the
-secure firmware.
-
-Required properties:
- - compatible: For Meson GX SoCs, must be "amlogic,meson-gx-ao-secure", "syscon"
-
-Properties should indentify components of this register interface :
-
-Meson GX SoC Information
-------------------------
-A firmware register encodes the SoC type, package and revision information on
-the Meson GX SoCs.
-If present, the following property should be added :
-
-Optional properties:
-  - amlogic,has-chip-id: If present, the interface gives the current SoC version.
-
-Example
--------
-
-ao-secure@140 {
-       compatible = "amlogic,meson-gx-ao-secure", "syscon";
-       reg = <0x0 0x140 0x0 0x140>;
-       amlogic,has-chip-id;
-};
diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml
new file mode 100644 (file)
index 0000000..325c6fd
--- /dev/null
@@ -0,0 +1,144 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/amlogic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic MesonX device tree bindings
+
+maintainers:
+  - Kevin Hilman <khilman@baylibre.com>
+
+description: |+
+  Work in progress statement:
+
+  Device tree files and bindings applying to Amlogic SoCs and boards are
+  considered "unstable". Any Amlogic device tree binding may change at
+  any time. Be sure to use a device tree binary and a kernel image
+  generated from the same source tree.
+
+  Please refer to Documentation/devicetree/bindings/ABI.txt for a definition of a
+  stable binding/ABI.
+
+properties:
+  $nodename:
+    const: '/'
+  compatible:
+    oneOf:
+      - description: Boards with the Amlogic Meson6 SoC
+        items:
+          - enum:
+              - geniatech,atv1200
+          - const: amlogic,meson6
+
+      - description: Boards with the Amlogic Meson8 SoC
+        items:
+          - enum:
+              - minix,neo-x8
+          - const: amlogic,meson8
+
+      - description: Boards with the Amlogic Meson8m2 SoC
+        items:
+          - enum:
+              - tronsmart,mxiii-plus
+          - const: amlogic,meson8m2
+
+      - description: Boards with the Amlogic Meson8b SoC
+        items:
+          - enum:
+              - endless,ec100
+              - hardkernel,odroid-c1
+              - tronfy,mxq
+          - const: amlogic,meson8b
+
+      - description: Boards with the Amlogic Meson GXBaby SoC
+        items:
+          - enum:
+              - amlogic,p200
+              - amlogic,p201
+              - friendlyarm,nanopi-k2
+              - hardkernel,odroid-c2
+              - nexbox,a95x
+              - wetek,hub
+              - wetek,play2
+          - const: amlogic,meson-gxbb
+
+      - description: Tronsmart Vega S95 devices
+        items:
+          - enum:
+              - tronsmart,vega-s95-pro
+              - tronsmart,vega-s95-meta
+              - tronsmart,vega-s95-telos
+          - const: tronsmart,vega-s95
+          - const: amlogic,meson-gxbb
+
+      - description: Boards with the Amlogic Meson GXL S805X SoC
+        items:
+          - enum:
+              - amlogic,p241
+              - libretech,aml-s805x-ac
+          - const: amlogic,s805x
+          - const: amlogic,meson-gxl
+
+      - description: Boards with the Amlogic Meson GXL S905W SoC
+        items:
+          - enum:
+              - amlogic,p281
+              - oranth,tx3-mini
+          - const: amlogic,s905w
+          - const: amlogic,meson-gxl
+
+      - description: Boards with the Amlogic Meson GXL S905X SoC
+        items:
+          - enum:
+              - amediatech,x96-max
+              - amlogic,p212
+              - hwacom,amazetv
+              - khadas,vim
+              - libretech,cc
+              - nexbox,a95x
+              - seirobotics,sei510
+          - const: amlogic,s905x
+          - const: amlogic,meson-gxl
+
+      - description: Boards with the Amlogic Meson GXL S905D SoC
+        items:
+          - enum:
+              - amlogic,p230
+              - amlogic,p231
+              - phicomm,n1
+          - const: amlogic,s905d
+          - const: amlogic,meson-gxl
+
+      - description: Boards with the Amlogic Meson GXM S912 SoC
+        items:
+          - enum:
+              - amlogic,q200
+              - amlogic,q201
+              - khadas,vim2
+              - kingnovel,r-box-pro
+              - nexbox,a1
+              - tronsmart,vega-s96
+          - const: amlogic,s912
+          - const: amlogic,meson-gxm
+
+      - description: Boards with the Amlogic Meson AXG A113D SoC
+        items:
+          - enum:
+              - amlogic,s400
+          - const: amlogic,a113d
+          - const: amlogic,meson-axg
+
+      - description: Boards with the Amlogic Meson G12A S905D2 SoC
+        items:
+          - enum:
+              - amlogic,u200
+          - const: amlogic,g12a
+
+      - description: Boards with the Amlogic Meson G12B S922X SoC
+        items:
+          - enum:
+              - hardkernel,odroid-n2
+          - const: amlogic,g12b
+
+...
diff --git a/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.txt b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.txt
new file mode 100644 (file)
index 0000000..c67d9f4
--- /dev/null
@@ -0,0 +1,28 @@
+Amlogic Meson Firmware registers Interface
+------------------------------------------
+
+The Meson SoCs have a register bank with status and data shared with the
+secure firmware.
+
+Required properties:
+ - compatible: For Meson GX SoCs, must be "amlogic,meson-gx-ao-secure", "syscon"
+
+Properties should indentify components of this register interface :
+
+Meson GX SoC Information
+------------------------
+A firmware register encodes the SoC type, package and revision information on
+the Meson GX SoCs.
+If present, the following property should be added :
+
+Optional properties:
+  - amlogic,has-chip-id: If present, the interface gives the current SoC version.
+
+Example
+-------
+
+ao-secure@140 {
+       compatible = "amlogic,meson-gx-ao-secure", "syscon";
+       reg = <0x0 0x140 0x0 0x140>;
+       amlogic,has-chip-id;
+};
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
deleted file mode 100644 (file)
index 99dee23..0000000
+++ /dev/null
@@ -1,73 +0,0 @@
-Atmel AT91 device tree bindings.
-================================
-
-Boards with a SoC of the Atmel AT91 or SMART family shall have the following
-properties:
-
-Required root node properties:
-compatible: must be one of:
- * "atmel,at91rm9200"
-
- * "atmel,at91sam9" for SoCs using an ARM926EJ-S core, shall be extended with
-   the specific SoC family or compatible:
-    o "atmel,at91sam9260"
-    o "atmel,at91sam9261"
-    o "atmel,at91sam9263"
-    o "atmel,at91sam9x5" for the 5 series, shall be extended with the specific
-      SoC compatible:
-       - "atmel,at91sam9g15"
-       - "atmel,at91sam9g25"
-       - "atmel,at91sam9g35"
-       - "atmel,at91sam9x25"
-       - "atmel,at91sam9x35"
-    o "atmel,at91sam9g20"
-    o "atmel,at91sam9g45"
-    o "atmel,at91sam9n12"
-    o "atmel,at91sam9rl"
-    o "atmel,at91sam9xe"
-    o "microchip,sam9x60"
- * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific
-   SoC family:
-    o "atmel,sama5d2" shall be extended with the specific SoC compatible:
-       - "atmel,sama5d27"
-    o "atmel,sama5d3" shall be extended with the specific SoC compatible:
-       - "atmel,sama5d31"
-       - "atmel,sama5d33"
-       - "atmel,sama5d34"
-       - "atmel,sama5d35"
-       - "atmel,sama5d36"
-    o "atmel,sama5d4" shall be extended with the specific SoC compatible:
-       - "atmel,sama5d41"
-       - "atmel,sama5d42"
-       - "atmel,sama5d43"
-       - "atmel,sama5d44"
-
- * "atmel,samv7" for MCUs using a Cortex-M7, shall be extended with the specific
-   SoC family:
-    o "atmel,sams70" shall be extended with the specific MCU compatible:
-       - "atmel,sams70j19"
-       - "atmel,sams70j20"
-       - "atmel,sams70j21"
-       - "atmel,sams70n19"
-       - "atmel,sams70n20"
-       - "atmel,sams70n21"
-       - "atmel,sams70q19"
-       - "atmel,sams70q20"
-       - "atmel,sams70q21"
-    o "atmel,samv70" shall be extended with the specific MCU compatible:
-       - "atmel,samv70j19"
-       - "atmel,samv70j20"
-       - "atmel,samv70n19"
-       - "atmel,samv70n20"
-       - "atmel,samv70q19"
-       - "atmel,samv70q20"
-    o "atmel,samv71" shall be extended with the specific MCU compatible:
-       - "atmel,samv71j19"
-       - "atmel,samv71j20"
-       - "atmel,samv71j21"
-       - "atmel,samv71n19"
-       - "atmel,samv71n20"
-       - "atmel,samv71n21"
-       - "atmel,samv71q19"
-       - "atmel,samv71q20"
-       - "atmel,samv71q21"
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.yaml b/Documentation/devicetree/bindings/arm/atmel-at91.yaml
new file mode 100644 (file)
index 0000000..6e168ab
--- /dev/null
@@ -0,0 +1,134 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/atmel-at91.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atmel AT91 device tree bindings.
+
+maintainers:
+  - Alexandre Belloni <alexandre.belloni@bootlin.com>
+  - Ludovic Desroches <ludovic.desroches@microchip.com>
+
+description: |
+  Boards with a SoC of the Atmel AT91 or SMART family shall have the following
+
+properties:
+  $nodename:
+    const: '/'
+  compatible:
+    oneOf:
+      - items:
+          - const: atmel,at91rm9200
+      - items:
+          - enum:
+              - olimex,sam9-l9260
+          - enum:
+              - atmel,at91sam9260
+              - atmel,at91sam9261
+              - atmel,at91sam9263
+              - atmel,at91sam9g20
+              - atmel,at91sam9g45
+              - atmel,at91sam9n12
+              - atmel,at91sam9rl
+              - atmel,at91sam9xe
+              - atmel,at91sam9x60
+          - const: atmel,at91sam9
+
+      - items:
+          - enum:
+              - atmel,at91sam9g15
+              - atmel,at91sam9g25
+              - atmel,at91sam9g35
+              - atmel,at91sam9x25
+              - atmel,at91sam9x35
+          - const: atmel,at91sam9x5
+          - const: atmel,at91sam9
+
+      - items:
+          - const: atmel,sama5d27
+          - const: atmel,sama5d2
+          - const: atmel,sama5
+
+      - description: Nattis v2 board with Natte v2 power board
+        items:
+          - const: axentia,nattis-2
+          - const: axentia,natte-2
+          - const: axentia,linea
+          - const: atmel,sama5d31
+          - const: atmel,sama5d3
+          - const: atmel,sama5
+
+      - description: TSE-850 v3 board
+        items:
+          - const: axentia,tse850v3
+          - const: axentia,linea
+          - const: atmel,sama5d31
+          - const: atmel,sama5d3
+          - const: atmel,sama5
+
+      - items:
+          - const: axentia,linea
+          - const: atmel,sama5d31
+          - const: atmel,sama5d3
+          - const: atmel,sama5
+
+      - items:
+          - enum:
+              - atmel,sama5d31
+              - atmel,sama5d33
+              - atmel,sama5d34
+              - atmel,sama5d35
+              - atmel,sama5d36
+          - const: atmel,sama5d3
+          - const: atmel,sama5
+
+      - items:
+          - enum:
+              - atmel,sama5d41
+              - atmel,sama5d42
+              - atmel,sama5d43
+              - atmel,sama5d44
+          - const: atmel,sama5d4
+          - const: atmel,sama5
+
+      - items:
+          - enum:
+              - atmel,sams70j19
+              - atmel,sams70j20
+              - atmel,sams70j21
+              - atmel,sams70n19
+              - atmel,sams70n20
+              - atmel,sams70n21
+              - atmel,sams70q19
+              - atmel,sams70q20
+              - atmel,sams70q21
+          - const: atmel,sams70
+          - const: atmel,samv7
+
+      - items:
+          - enum:
+              - atmel,samv70j19
+              - atmel,samv70j20
+              - atmel,samv70n19
+              - atmel,samv70n20
+              - atmel,samv70q19
+              - atmel,samv70q20
+          - const: atmel,samv70
+          - const: atmel,samv7
+
+      - items:
+          - enum:
+              - atmel,samv71j19
+              - atmel,samv71j20
+              - atmel,samv71j21
+              - atmel,samv71n19
+              - atmel,samv71n20
+              - atmel,samv71n21
+              - atmel,samv71q19
+              - atmel,samv71q20
+              - atmel,samv71q21
+          - const: atmel,samv71
+          - const: atmel,samv7
+
+...
diff --git a/Documentation/devicetree/bindings/arm/emtrion.txt b/Documentation/devicetree/bindings/arm/emtrion.txt
deleted file mode 100644 (file)
index 83329ae..0000000
+++ /dev/null
@@ -1,12 +0,0 @@
-Emtrion Devicetree Bindings
-===========================
-
-emCON Series:
--------------
-
-Required root node properties
-       - compatible:
-       - "emtrion,emcon-mx6", "fsl,imx6q";             : emCON-MX6D or emCON-MX6Q SoM
-       - "emtrion,emcon-mx6-avari", "fsl,imx6q";       : emCON-MX6D or emCON-MX6Q SoM on Avari Base
-       - "emtrion,emcon-mx6", "fsl,imx6dl";            : emCON-MX6S or emCON-MX6DL SoM
-       - "emtrion,emcon-mx6-avari", "fsl,imx6dl";      : emCON-MX6S or emCON-MX6DL SoM on Avari Base
index 407138ebc0d0a934f33b79f569c96f22a849bc49..7294ac36f4c0be99557a1d6b7dca331d97222d80 100644 (file)
@@ -15,6 +15,13 @@ properties:
     const: '/'
   compatible:
     oneOf:
+      - description: i.MX1 based Boards
+        items:
+          - enum:
+              - armadeus,imx1-apf9328
+              - fsl,imx1ads
+          - const: fsl,imx1
+
       - description: i.MX23 based Boards
         items:
           - enum:
@@ -51,6 +58,25 @@ properties:
           - const: i2se,duckbill-2
           - const: fsl,imx28
 
+      - description: i.MX31 based Boards
+        items:
+          - enum:
+              - buglabs,imx31-bug
+              - logicpd,imx31-lite
+          - const: fsl,imx31
+
+      - description: i.MX35 based Boards
+        items:
+          - enum:
+              - fsl,imx35-pdk
+          - const: fsl,imx35
+
+      - description: i.MX35 Eukrea CPUIMX35 Board
+        items:
+          - const: eukrea,mbimxsd35-baseboard
+          - const: eukrea,cpuimx35
+          - const: fsl,imx35
+
       - description: i.MX50 based Boards
         items:
           - enum:
@@ -80,6 +106,8 @@ properties:
       - description: i.MX6Q based Boards
         items:
           - enum:
+              - emtrion,emcon-mx6         # emCON-MX6D or emCON-MX6Q SoM
+              - emtrion,emcon-mx6-avari   # emCON-MX6D or emCON-MX6Q SoM on Avari Base
               - fsl,imx6q-arm2
               - fsl,imx6q-sabreauto
               - fsl,imx6q-sabrelite
@@ -99,6 +127,8 @@ properties:
         items:
           - enum:
               - eckelmann,imx6dl-ci4x10
+              - emtrion,emcon-mx6         # emCON-MX6S or emCON-MX6DL SoM
+              - emtrion,emcon-mx6-avari   # emCON-MX6S or emCON-MX6DL SoM on Avari Base
               - fsl,imx6dl-sabreauto      # i.MX6 DualLite/Solo SABRE Automotive Board
               - fsl,imx6dl-sabresd        # i.MX6 DualLite SABRE Smart Device Board
               - technologic,imx6dl-ts4900
@@ -156,6 +186,7 @@ properties:
         items:
           - enum:
               - fsl,imx7d-sdb             # i.MX7 SabreSD Board
+              - novtech,imx7d-meerkat96   # i.MX7 Meerkat96 Board
               - tq,imx7d-mba7             # i.MX7D TQ MBa7 with TQMa7D SoM
               - zii,imx7d-rpu2            # ZII RPU2 Board
           - const: fsl,imx7d
@@ -171,12 +202,25 @@ properties:
           - const: compulab,cl-som-imx7
           - const: fsl,imx7d
 
+      - description: i.MX7ULP based Boards
+        items:
+          - enum:
+              - fsl,imx7ulp-evk           # i.MX7ULP Evaluation Kit
+          - const: fsl,imx7ulp
+
       - description: i.MX8MM based Boards
         items:
           - enum:
               - fsl,imx8mm-evk            # i.MX8MM EVK Board
           - const: fsl,imx8mm
 
+      - description: i.MX8MQ based Boards
+        items:
+          - enum:
+              - fsl,imx8mq-evk            # i.MX8MQ EVK Board
+              - purism,librem5-devkit     # Purism Librem5 devkit
+          - const: fsl,imx8mq
+
       - description: i.MX8QXP based Boards
         items:
           - enum:
diff --git a/Documentation/devicetree/bindings/arm/mediatek.txt b/Documentation/devicetree/bindings/arm/mediatek.txt
deleted file mode 100644 (file)
index 56ac789..0000000
+++ /dev/null
@@ -1,89 +0,0 @@
-MediaTek SoC based Platforms Device Tree Bindings
-
-Boards with a MediaTek SoC shall have the following property:
-
-Required root node property:
-
-compatible: Must contain one of
-   "mediatek,mt2701"
-   "mediatek,mt2712"
-   "mediatek,mt6580"
-   "mediatek,mt6589"
-   "mediatek,mt6592"
-   "mediatek,mt6755"
-   "mediatek,mt6765"
-   "mediatek,mt6795"
-   "mediatek,mt6797"
-   "mediatek,mt7622"
-   "mediatek,mt7623"
-   "mediatek,mt7629"
-   "mediatek,mt8127"
-   "mediatek,mt8135"
-   "mediatek,mt8173"
-   "mediatek,mt8183"
-
-
-Supported boards:
-
-- Evaluation board for MT2701:
-    Required root node properties:
-      - compatible = "mediatek,mt2701-evb", "mediatek,mt2701";
-- Evaluation board for MT2712:
-    Required root node properties:
-      - compatible = "mediatek,mt2712-evb", "mediatek,mt2712";
-- Evaluation board for MT6580:
-    Required root node properties:
-      - compatible = "mediatek,mt6580-evbp1", "mediatek,mt6580";
-- bq Aquaris5 smart phone:
-    Required root node properties:
-      - compatible = "mundoreader,bq-aquaris5", "mediatek,mt6589";
-- Evaluation board for MT6592:
-    Required root node properties:
-      - compatible = "mediatek,mt6592-evb", "mediatek,mt6592";
-- Evaluation phone for MT6755(Helio P10):
-    Required root node properties:
-      - compatible = "mediatek,mt6755-evb", "mediatek,mt6755";
-- Evaluation board for MT6765(Helio P22):
-    Required root node properties:
-      - compatible = "mediatek,mt6765-evb", "mediatek,mt6765";
-- Evaluation board for MT6795(Helio X10):
-    Required root node properties:
-      - compatible = "mediatek,mt6795-evb", "mediatek,mt6795";
-- Evaluation board for MT6797(Helio X20):
-    Required root node properties:
-      - compatible = "mediatek,mt6797-evb", "mediatek,mt6797";
-- Mediatek X20 Development Board:
-    Required root node properties:
-      - compatible = "archermind,mt6797-x20-dev", "mediatek,mt6797";
-- Reference board variant 1 for MT7622:
-    Required root node properties:
-      - compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
-- Bananapi BPI-R64 for MT7622:
-    Required root node properties:
-      - compatible = "bananapi,bpi-r64", "mediatek,mt7622";
-- Reference board for MT7623a with eMMC:
-    Required root node properties:
-      - compatible = "mediatek,mt7623a-rfb-emmc", "mediatek,mt7623";
-- Reference board for MT7623a with NAND:
-    Required root node properties:
-      - compatible = "mediatek,mt7623a-rfb-nand", "mediatek,mt7623";
-- Reference board for MT7623n with eMMC:
-    Required root node properties:
-      - compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623";
-- Bananapi BPI-R2 board:
-      - compatible = "bananapi,bpi-r2", "mediatek,mt7623";
-- Reference board for MT7629:
-    Required root node properties:
-      - compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";
-- MTK mt8127 tablet moose EVB:
-    Required root node properties:
-      - compatible = "mediatek,mt8127-moose", "mediatek,mt8127";
-- MTK mt8135 tablet EVB:
-    Required root node properties:
-      - compatible = "mediatek,mt8135-evbp1", "mediatek,mt8135";
-- MTK mt8173 tablet EVB:
-    Required root node properties:
-      - compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
-- Evaluation board for MT8183:
-    Required root node properties:
-      - compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml
new file mode 100644 (file)
index 0000000..a4ad2eb
--- /dev/null
@@ -0,0 +1,91 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/mediatek.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek SoC based Platforms Device Tree Bindings
+
+maintainers:
+  - Sean Wang <sean.wang@mediatek.com>
+  - Matthias Brugger <matthias.bgg@gmail.com>
+description: |
+  Boards with a MediaTek SoC shall have the following properties.
+
+properties:
+  $nodename:
+    const: '/'
+  compatible:
+    oneOf:
+      - items:
+          - enum:
+              - mediatek,mt2701-evb
+          - const: mediatek,mt2701
+
+      - items:
+          - enum:
+              - mediatek,mt2712-evb
+          - const: mediatek,mt2712
+      - items:
+          - enum:
+              - mediatek,mt6580-evbp1
+          - const: mediatek,mt6580
+      - items:
+          - enum:
+              - mundoreader,bq-aquaris5
+          - const: mediatek,mt6589
+      - items:
+          - enum:
+              - mediatek,mt6592-evb
+          - const: mediatek,mt6592
+      - items:
+          - enum:
+              - mediatek,mt6755-evb
+          - const: mediatek,mt6755
+      - items:
+          - enum:
+              - mediatek,mt6765-evb
+          - const: mediatek,mt6765
+      - items:
+          - enum:
+              - mediatek,mt6795-evb
+          - const: mediatek,mt6795
+      - items:
+          - enum:
+              - archermind,mt6797-x20-dev
+              - mediatek,mt6797-evb
+          - const: mediatek,mt6797
+      - items:
+          - enum:
+              - bananapi,bpi-r64
+              - mediatek,mt7622-rfb1
+          - const: mediatek,mt7622
+      - items:
+          - enum:
+              - mediatek,mt7623a-rfb-emmc
+              - mediatek,mt7623a-rfb-nand
+              - mediatek,mt7623n-rfb-emmc
+              - bananapi,bpi-r2
+          - const: mediatek,mt7623
+
+      - items:
+          - enum:
+              - mediatek,mt7629-rfb
+          - const: mediatek,mt7629
+      - items:
+          - enum:
+              - mediatek,mt8127-moose
+          - const: mediatek,mt8127
+      - items:
+          - enum:
+              - mediatek,mt8135-evbp1
+          - const: mediatek,mt8135
+      - items:
+          - enum:
+              - mediatek,mt8173-evb
+          - const: mediatek,mt8173
+      - items:
+          - enum:
+              - mediatek,mt8183-evb
+          - const: mediatek,mt8183
+...
index 1c1e48fd94b553c2681591c5489a84e26c72ac4b..b301f753ed2c213d4f67b94d31f1652d57eedc3c 100644 (file)
@@ -160,6 +160,9 @@ Boards:
 - AM335X phyCORE-AM335x: Development kit
   compatible = "phytec,am335x-pcm-953", "phytec,am335x-phycore-som", "ti,am33xx"
 
+- AM335x phyBOARD-REGOR: Single Board Computer
+  compatible = "phytec,am335x-regor", "phytec,am335x-phycore-som", "ti,am33xx"
+
 - AM335X UC-8100-ME-T: Communication-centric industrial computing platform
   compatible = "moxa,uc-8100-me-t", "ti,am33xx";
 
index 19f379863d50bd414ed1b0668b21c40263ba1f14..08c923f8c25788b6c563a8f48dfb4fd5dd7b6242 100644 (file)
@@ -106,6 +106,14 @@ properties:
 
       - description: RZ/G2M (R8A774A1)
         items:
+          - enum:
+              - hoperun,hihope-rzg2m # HopeRun HiHope RZ/G2M platform
+          - const: renesas,r8a774a1
+
+      - items:
+          - enum:
+              - hoperun,hihope-rzg2-ex # HopeRun expansion board for HiHope RZ/G2 platforms
+          - const: hoperun,hihope-rzg2m
           - const: renesas,r8a774a1
 
       - description: RZ/G2E (R8A774C0)
index 5c6bbf10abc9c1624f586afc08c239c8878dcf24..34865042f4e458077c7a32c9b7394467c2f3f33e 100644 (file)
@@ -316,6 +316,19 @@ properties:
           - const: haoyu,marsboard-rk3066
           - const: rockchip,rk3066a
 
+      - description: Hugsun X99 TV Box
+        items:
+          - const: hugsun,x99
+          - const: rockchip,rk3399
+
+      - description: Khadas Edge series boards
+        items:
+          - enum:
+              - khadas,edge
+              - khadas,edge-captain
+              - khadas,edge-v
+          - const: rockchip,rk3399
+
       - description: mqmaker MiQi
         items:
           - const: mqmaker,miqi
diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.txt b/Documentation/devicetree/bindings/arm/stm32/stm32.txt
deleted file mode 100644 (file)
index 6808ed9..0000000
+++ /dev/null
@@ -1,10 +0,0 @@
-STMicroelectronics STM32 Platforms Device Tree Bindings
-
-Each device tree must specify which STM32 SoC it uses,
-using one of the following compatible strings:
-
-  st,stm32f429
-  st,stm32f469
-  st,stm32f746
-  st,stm32h743
-  st,stm32mp157
diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml
new file mode 100644 (file)
index 0000000..4d194f1
--- /dev/null
@@ -0,0 +1,31 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/stm32/stm32.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STMicroelectronics STM32 Platforms Device Tree Bindings
+
+maintainers:
+  - Alexandre Torgue <alexandre.torgue@st.com>
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - const: st,stm32f429
+
+      - items:
+          - const: st,stm32f469
+
+      - items:
+          - const: st,stm32f746
+
+      - items:
+          - const: st,stm32h743
+
+      - items:
+          - enum:
+              - arrow,stm32mp157a-avenger96 # Avenger96
+          - const: st,stm32mp157
+...
index 285f4fc8519d29cf4d63303c0873a67c31f5bdfa..000a00d12d6a44267ef86e0c0d39d8c215721f5a 100644 (file)
@@ -263,7 +263,7 @@ properties:
 
       - description: ICNova A20 SWAC
         items:
-          - const: swac,icnova-a20-swac
+          - const: incircuit,icnova-a20-swac
           - const: incircuit,icnova-a20
           - const: allwinner,sun7i-a20
 
index 6a059cabb2da09bc842816d4f41a59983d5f2adf..333e7256126a8810ca0179673dddc7784e8652f6 100644 (file)
@@ -13,6 +13,9 @@ architecture it uses, using one of the following compatible values:
 - AM654
   compatible = "ti,am654";
 
+- J721E
+  compatible = "ti,j721e";
+
 Boards
 ------
 
diff --git a/Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml b/Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml
new file mode 100644 (file)
index 0000000..fc2f638
--- /dev/null
@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bus/allwinner,sun8i-a23-rsb.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A23 RSB Device Tree Bindings
+
+maintainers:
+  - Chen-Yu Tsai <wens@csie.org>
+  - Maxime Ripard <maxime.ripard@bootlin.com>
+
+properties:
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 0
+
+  compatible:
+    oneOf:
+      - const: allwinner,sun8i-a23-rsb
+      - items:
+        - const: allwinner,sun8i-a83t-rsb
+        - const: allwinner,sun8i-a23-rsb
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  resets:
+    maxItems: 1
+
+  clock-frequency:
+    minimum: 1
+    maximum: 20000000
+
+patternProperties:
+  "^.*@[0-9a-fA-F]+$":
+    properties:
+      reg:
+        maxItems: 1
+
+    required:
+      - reg
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - resets
+
+examples:
+  - |
+    rsb@1f03400 {
+        compatible = "allwinner,sun8i-a23-rsb";
+        reg = <0x01f03400 0x400>;
+        interrupts = <0 39 4>;
+        clocks = <&apb0_gates 3>;
+        clock-frequency = <3000000>;
+        resets = <&apb0_rst 3>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        pmic@3e3 {
+            compatible = "...";
+            reg = <0x3e3>;
+
+            /* ... */
+        };
+    };
+
+additionalProperties: false
diff --git a/Documentation/devicetree/bindings/bus/sunxi-rsb.txt b/Documentation/devicetree/bindings/bus/sunxi-rsb.txt
deleted file mode 100644 (file)
index eb3ed62..0000000
+++ /dev/null
@@ -1,47 +0,0 @@
-Allwinner Reduced Serial Bus (RSB) controller
-
-The RSB controller found on later Allwinner SoCs is an SMBus like 2 wire
-serial bus with 1 master and up to 15 slaves. It is represented by a node
-for the controller itself, and child nodes representing the slave devices.
-
-Required properties :
-
- - reg             : Offset and length of the register set for the controller.
- - compatible      : Shall be "allwinner,sun8i-a23-rsb".
- - interrupts      : The interrupt line associated to the RSB controller.
- - clocks          : The gate clk associated to the RSB controller.
- - resets          : The reset line associated to the RSB controller.
- - #address-cells  : shall be 1
- - #size-cells     : shall be 0
-
-Optional properties :
-
- - clock-frequency : Desired RSB bus clock frequency in Hz. Maximum is 20MHz.
-                    If not set this defaults to 3MHz.
-
-Child nodes:
-
-An RSB controller node can contain zero or more child nodes representing
-slave devices on the bus.  Child 'reg' properties should contain the slave
-device's hardware address. The hardware address is hardwired in the device,
-which can normally be found in the datasheet.
-
-Example:
-
-       rsb@1f03400 {
-               compatible = "allwinner,sun8i-a23-rsb";
-               reg = <0x01f03400 0x400>;
-               interrupts = <0 39 4>;
-               clocks = <&apb0_gates 3>;
-               clock-frequency = <3000000>;
-               resets = <&apb0_rst 3>;
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               pmic@3e3 {
-                       compatible = "...";
-                       reg = <0x3e3>;
-
-                       /* ... */
-               };
-       };
index a41d280c3f9f74a5dc2b600a868ec0f8d6e73426..db680413e89c2957594dcac9430861e794b0349e 100644 (file)
@@ -12,10 +12,12 @@ following device-specific properties.
 Required properties:
 
 - compatible : Shall contain one or more of
+  - "renesas,r8a774a1-hdmi" for R8A774A1 (RZ/G2M) compatible HDMI TX
   - "renesas,r8a7795-hdmi" for R8A7795 (R-Car H3) compatible HDMI TX
   - "renesas,r8a7796-hdmi" for R8A7796 (R-Car M3-W) compatible HDMI TX
   - "renesas,r8a77965-hdmi" for R8A77965 (R-Car M3-N) compatible HDMI TX
-  - "renesas,rcar-gen3-hdmi" for the generic R-Car Gen3 compatible HDMI TX
+  - "renesas,rcar-gen3-hdmi" for the generic R-Car Gen3 and RZ/G2 compatible
+                            HDMI TX
 
     When compatible with generic versions, nodes must list the SoC-specific
     version corresponding to the platform first, followed by the
index 6a0ff9059e72f1e8b5ec00dca256f6f059c55c10..da371c4d406ce74f8bf00113ad16cf273a2acd3e 100644 (file)
@@ -7,6 +7,7 @@ Required properties:
 
 - compatible:          Must be one of
                         "fsl,ls1021a-qdma": for LS1021A Board
+                        "fsl,ls1028a-qdma": for LS1028A Board
                         "fsl,ls1043a-qdma": for ls1043A Board
                         "fsl,ls1046a-qdma": for ls1046A Board
 - reg:                 Should contain the register's base address and length.
index e5ad3b2afe17d9d8c4c7fbe7b011726fb19f5300..9b298edec5b2206aaf37465c06738aeb425161c3 100644 (file)
@@ -17,6 +17,7 @@ Required properties:
   * which must be preceded by one of the following vendor specifics:
     + "allwinner,sun50i-h6-mali"
     + "amlogic,meson-gxm-mali"
+    + "samsung,exynos5433-mali"
     + "rockchip,rk3288-mali"
     + "rockchip,rk3399-mali"
 
index ae63f09fda7d5e9128134c4a4ac4ae4b1ed97a0b..b352a6851a0689aeb37321ba5907639a9ec25132 100644 (file)
@@ -17,6 +17,7 @@ Required properties:
       + amlogic,meson8b-mali
       + amlogic,meson-gxbb-mali
       + amlogic,meson-gxl-mali
+      + samsung,exynos4210-mali
       + rockchip,rk3036-mali
       + rockchip,rk3066-mali
       + rockchip,rk3188-mali
index 496125c6bfb7d28168f1afe203f0ba3c716a9563..507b737612eae9bd74b81f0b2efe7615f903fa2a 100644 (file)
@@ -5,6 +5,7 @@ Required properties:
  - compatible: should be one of the following string:
                "allwinner,sun4i-a10-lradc-keys"
                "allwinner,sun8i-a83t-r-lradc"
+               "allwinner,sun50i-a64-lradc", "allwinner,sun8i-a83t-r-lradc"
  - reg: mmio address range of the chip
  - interrupts: interrupt to which the chip is connected
  - vref-supply: powersupply for the lradc reference voltage
index 9936b9ee67c36672afeb050a5641aa44cebbb728..b463e1268ac4f253a4f3704af511c7c490319747 100644 (file)
@@ -6,6 +6,7 @@ Required properties:
              "renesas,can-r8a7744" if CAN controller is a part of R8A7744 SoC.
              "renesas,can-r8a7745" if CAN controller is a part of R8A7745 SoC.
              "renesas,can-r8a774a1" if CAN controller is a part of R8A774A1 SoC.
+             "renesas,can-r8a774c0" if CAN controller is a part of R8A774C0 SoC.
              "renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC.
              "renesas,can-r8a7779" if CAN controller is a part of R8A7779 SoC.
              "renesas,can-r8a7790" if CAN controller is a part of R8A7790 SoC.
@@ -27,13 +28,8 @@ Required properties:
 
 - reg: physical base address and size of the R-Car CAN register map.
 - interrupts: interrupt specifier for the sole interrupt.
-- clocks: phandles and clock specifiers for 2 CAN clock inputs for RZ/G2
-         devices.
-         phandles and clock specifiers for 3 CAN clock inputs for every other
-         SoC.
-- clock-names: 2 clock input name strings for RZ/G2: "clkp1", "can_clk".
-              3 clock input name strings for every other SoC: "clkp1", "clkp2",
-              "can_clk".
+- clocks: phandles and clock specifiers for 3 CAN clock inputs.
+- clock-names: 3 clock input name strings: "clkp1", "clkp2", and "can_clk".
 - pinctrl-0: pin control group to be used for this controller.
 - pinctrl-names: must be "default".
 
@@ -49,8 +45,7 @@ using the below properties:
 Optional properties:
 - renesas,can-clock-select: R-Car CAN Clock Source Select. Valid values are:
                            <0x0> (default) : Peripheral clock (clkp1)
-                           <0x1> : Peripheral clock (clkp2) (not supported by
-                                   RZ/G2 devices)
+                           <0x1> : Peripheral clock (clkp2)
                            <0x3> : External input clock
 
 Example
index ac71daa4619505030ac1373e678ca13241727f82..32f051f6d338ee74d7af3361f7a9cee3313fac94 100644 (file)
@@ -3,11 +3,14 @@ Renesas R-Car CAN FD controller Device Tree Bindings
 
 Required properties:
 - compatible: Must contain one or more of the following:
-  - "renesas,rcar-gen3-canfd" for R-Car Gen3 compatible controller.
+  - "renesas,rcar-gen3-canfd" for R-Car Gen3 and RZ/G2 compatible controllers.
+  - "renesas,r8a774c0-canfd" for R8A774C0 (RZ/G2E) compatible controller.
   - "renesas,r8a7795-canfd" for R8A7795 (R-Car H3) compatible controller.
   - "renesas,r8a7796-canfd" for R8A7796 (R-Car M3-W) compatible controller.
+  - "renesas,r8a77965-canfd" for R8A77965 (R-Car M3-N) compatible controller.
   - "renesas,r8a77970-canfd" for R8A77970 (R-Car V3M) compatible controller.
   - "renesas,r8a77980-canfd" for R8A77980 (R-Car V3H) compatible controller.
+  - "renesas,r8a77990-canfd" for R8A77990 (R-Car E3) compatible controller.
 
   When compatible with the generic version, nodes must list the
   SoC-specific version corresponding to the platform first, followed by the
@@ -26,12 +29,13 @@ The name of the child nodes are "channel0" and "channel1" respectively. Each
 child node supports the "status" property only, which is used to
 enable/disable the respective channel.
 
-Required properties for "renesas,r8a7795-canfd" and "renesas,r8a7796-canfd"
+Required properties for "renesas,r8a774c0-canfd", "renesas,r8a7795-canfd",
+"renesas,r8a7796-canfd", "renesas,r8a77965-canfd", and "renesas,r8a77990-canfd"
 compatible:
-In R8A7795 and R8A7796 SoCs, canfd clock is a div6 clock and can be used by both
-CAN and CAN FD controller at the same time. It needs to be scaled to maximum
-frequency if any of these controllers use it. This is done using the below
-properties:
+In R8A774C0, R8A7795, R8A7796, R8A77965, and R8A77990 SoCs, canfd clock is a
+div6 clock and can be used by both CAN and CAN FD controller at the same time.
+It needs to be scaled to maximum frequency if any of these controllers use it.
+This is done using the below properties:
 
 - assigned-clocks: phandle of canfd clock.
 - assigned-clock-rates: maximum frequency of this clock.
diff --git a/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml b/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml
new file mode 100644 (file)
index 0000000..0ac52f8
--- /dev/null
@@ -0,0 +1,57 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pwm/allwinner,sun4i-a10-pwm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A10 PWM Device Tree Bindings
+
+maintainers:
+  - Chen-Yu Tsai <wens@csie.org>
+  - Maxime Ripard <maxime.ripard@bootlin.com>
+
+properties:
+  "#pwm-cells":
+    const: 3
+
+  compatible:
+    oneOf:
+      - const: allwinner,sun4i-a10-pwm
+      - const: allwinner,sun5i-a10s-pwm
+      - const: allwinner,sun5i-a13-pwm
+      - const: allwinner,sun7i-a20-pwm
+      - const: allwinner,sun8i-h3-pwm
+      - items:
+          - const: allwinner,sun8i-a83t-pwm
+          - const: allwinner,sun8i-h3-pwm
+      - items:
+          - const: allwinner,sun50i-a64-pwm
+          - const: allwinner,sun5i-a13-pwm
+      - items:
+          - const: allwinner,sun50i-h5-pwm
+          - const: allwinner,sun5i-a13-pwm
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+required:
+  - "#pwm-cells"
+  - compatible
+  - reg
+  - clocks
+
+additionalProperties: false
+
+examples:
+  - |
+    pwm: pwm@1c20e00 {
+        compatible = "allwinner,sun7i-a20-pwm";
+        reg = <0x01c20e00 0xc>;
+        clocks = <&osc24M>;
+        #pwm-cells = <3>;
+    };
+
+...
diff --git a/Documentation/devicetree/bindings/pwm/pwm-sun4i.txt b/Documentation/devicetree/bindings/pwm/pwm-sun4i.txt
deleted file mode 100644 (file)
index 2a1affb..0000000
+++ /dev/null
@@ -1,24 +0,0 @@
-Allwinner sun4i and sun7i SoC PWM controller
-
-Required properties:
-  - compatible: should be one of:
-    - "allwinner,sun4i-a10-pwm"
-    - "allwinner,sun5i-a10s-pwm"
-    - "allwinner,sun5i-a13-pwm"
-    - "allwinner,sun7i-a20-pwm"
-    - "allwinner,sun8i-h3-pwm"
-    - "allwinner,sun50i-a64-pwm", "allwinner,sun5i-a13-pwm"
-    - "allwinner,sun50i-h5-pwm", "allwinner,sun5i-a13-pwm"
-  - reg: physical base address and length of the controller's registers
-  - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
-    the cells format.
-  - clocks: From common clock binding, handle to the parent clock.
-
-Example:
-
-       pwm: pwm@1c20e00 {
-               compatible = "allwinner,sun7i-a20-pwm";
-               reg = <0x01c20e00 0xc>;
-               clocks = <&osc24M>;
-               #pwm-cells = <3>;
-       };
index 0a9b5444f4e62dfb725c1b007d0b5f4a3e86a818..dcba86b0a0d0bc8d9513b9fd2a0b38f2614b55fb 100644 (file)
@@ -1,6 +1,7 @@
 OMAP UART controller
 
 Required properties:
+- compatible : should be "ti,j721e-uart", "ti,am654-uart" for J721E controllers
 - compatible : should be "ti,am654-uart" for AM654 controllers
 - compatible : should be "ti,omap2-uart" for OMAP2 controllers
 - compatible : should be "ti,omap3-uart" for OMAP3 controllers
index c0594450e9efa9ba2117ddb93321a9bf87f34889..c5220bcd852b5a5949d9439cb0d0883b64d7436b 100644 (file)
@@ -42,12 +42,18 @@ Required Properties:
     - "renesas,r8a7793-cmt1" for the 48-bit CMT1 device included in r8a7793.
     - "renesas,r8a7794-cmt0" for the 32-bit CMT0 device included in r8a7794.
     - "renesas,r8a7794-cmt1" for the 48-bit CMT1 device included in r8a7794.
+    - "renesas,r8a7795-cmt0" for the 32-bit CMT0 device included in r8a7795.
+    - "renesas,r8a7795-cmt1" for the 48-bit CMT1 device included in r8a7795.
     - "renesas,r8a7796-cmt0" for the 32-bit CMT0 device included in r8a7796.
     - "renesas,r8a7796-cmt1" for the 48-bit CMT1 device included in r8a7796.
+    - "renesas,r8a77965-cmt0" for the 32-bit CMT0 device included in r8a77965.
+    - "renesas,r8a77965-cmt1" for the 48-bit CMT1 device included in r8a77965.
     - "renesas,r8a77970-cmt0" for the 32-bit CMT0 device included in r8a77970.
     - "renesas,r8a77970-cmt1" for the 48-bit CMT1 device included in r8a77970.
     - "renesas,r8a77980-cmt0" for the 32-bit CMT0 device included in r8a77980.
     - "renesas,r8a77980-cmt1" for the 48-bit CMT1 device included in r8a77980.
+    - "renesas,r8a77990-cmt0" for the 32-bit CMT0 device included in r8a77990.
+    - "renesas,r8a77990-cmt1" for the 48-bit CMT1 device included in r8a77990.
 
     - "renesas,rcar-gen2-cmt0" for 32-bit CMT0 devices included in R-Car Gen2
                and RZ/G1.
index eade302345a3d89d8d3af3b83f66a8e46e09c0b4..6992bbbbffab6a57b185a244048ea9d03d60ea15 100644 (file)
@@ -395,12 +395,16 @@ patternProperties:
     description: Holt Integrated Circuits, Inc.
   "^honeywell,.*":
     description: Honeywell
+  "^hoperun,.*":
+    description: Jiangsu HopeRun Software Co., Ltd.
   "^hp,.*":
     description: Hewlett Packard
   "^hsg,.*":
     description: HannStar Display Co.
   "^holtek,.*":
     description: Holtek Semiconductor, Inc.
+  "^hugsun,.*":
+    description: Shenzhen Hugsun Technology Co. Ltd.
   "^hwacom,.*":
     description: HwaCom Systems Inc.
   "^hyundai,.*":
@@ -735,6 +739,8 @@ patternProperties:
     description: PROBOX2 (by W2COMP Co., Ltd.)
   "^pulsedlight,.*":
     description: PulsedLight, Inc
+  "^purism,.*":
+    description: Purism, SPC
   "^qca,.*":
     description: Qualcomm Atheros, Inc.
   "^qcom,.*":
index dab2914fa293cde2916a4fd0ceddf0e9929e411f..9159fa2cea90c22b8163d12e978b7fd5063dbad0 100644 (file)
@@ -586,6 +586,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
        imx7d-colibri-emmc-eval-v3.dtb \
        imx7d-colibri-eval-v3.dtb \
        imx7d-mba7.dtb \
+       imx7d-meerkat96.dtb \
        imx7d-nitrogen7.dtb \
        imx7d-pico-hobbit.dtb \
        imx7d-pico-pi.dtb \
@@ -602,6 +603,7 @@ dtb-$(CONFIG_SOC_IMX7ULP) += \
 dtb-$(CONFIG_SOC_LS1021A) += \
        ls1021a-moxa-uc-8410a.dtb \
        ls1021a-qds.dtb \
+       ls1021a-tsn.dtb \
        ls1021a-twr.dtb
 dtb-$(CONFIG_SOC_VF610) += \
        vf500-colibri-eval-v3.dtb \
@@ -748,6 +750,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
        am335x-pepper.dtb \
        am335x-phycore-rdk.dtb \
        am335x-pocketbeagle.dtb \
+       am335x-regor-rdk.dtb \
        am335x-sancloud-bbe.dtb \
        am335x-shc.dtb \
        am335x-sbc-t335.dtb \
@@ -975,6 +978,7 @@ dtb-$(CONFIG_ARCH_STM32) += \
        stm32746g-eval.dtb \
        stm32h743i-eval.dtb \
        stm32h743i-disco.dtb \
+       stm32mp157a-avenger96.dtb \
        stm32mp157a-dk1.dtb \
        stm32mp157c-dk2.dtb \
        stm32mp157c-ed1.dtb \
@@ -1268,10 +1272,16 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
        aspeed-bmc-arm-stardragon4800-rep2.dtb \
        aspeed-bmc-facebook-cmm.dtb \
        aspeed-bmc-facebook-tiogapass.dtb \
+       aspeed-bmc-facebook-yamp.dtb \
        aspeed-bmc-intel-s2600wf.dtb \
+       aspeed-bmc-inspur-fp5280g2.dtb \
+       aspeed-bmc-lenovo-hr630.dtb \
+       aspeed-bmc-microsoft-olympus.dtb \
        aspeed-bmc-opp-lanyang.dtb \
        aspeed-bmc-opp-palmetto.dtb \
        aspeed-bmc-opp-romulus.dtb \
+       aspeed-bmc-opp-swift.dtb \
+       aspeed-bmc-opp-vesnin.dtb \
        aspeed-bmc-opp-witherspoon.dtb \
        aspeed-bmc-opp-zaius.dtb \
        aspeed-bmc-portwell-neptune.dtb \
index 49e46baf954246b8b76a212f36b2756c22828bf2..386d5f89978e3384b8f0ae53fd9ad32e6a3b2a78 100644 (file)
                        AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)      /* lcd_ac_bias_en.gpio2[25] RI */
                >;
        };
+
+       mmc1_pins: pinmux_mmc1_pins {
+               pinctrl-single,pins = <
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT, MUX_MODE7)     /* MMC1 CD */
+               >;
+       };
 };
 
 &uart1 {
 };
 
 &cpsw_emac1 {
-       phy-mode = "rgmii-txid";
+       phy-mode = "rgmii-id";
        dual_emac_res_vlan = <2>;
        phy-handle = <&phy1>;
 };
+
+&mmc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc1_pins>;
+       cd-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+};
index 9e88bc2f64652ce89783152e4cdde6cf48544264..b0df7256db13b8fcadb1e51ea7b73dac2518fbfb 100644 (file)
                        AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7)      /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */
                >;
        };
+
+       mmc1_pins: pinmux_mmc1_pins {
+               pinctrl-single,pins = <
+                       AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT, MUX_MODE7)     /* MMC1 CD */
+               >;
+       };
 };
 
 &uart1 {
 };
 
 &cpsw_emac1 {
-       phy-mode = "rgmii-txid";
+       phy-mode = "rgmii-id";
        dual_emac_res_vlan = <2>;
        phy-handle = <&phy1>;
 };
+
+&mmc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc1_pins>;
+       cd-gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
+};
index 28aa00422951555a660ec23699bc97c7cf0927c9..d6aa46e8700e9250a4a0a057a2c3a1f3744ea91b 100644 (file)
                >;
        };
 
+       mmc1_pins: pinmux_mmc1_pins {
+               pinctrl-single,pins = <
+                       AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT, MUX_MODE7)     /* MMC1 CD */
+               >;
+       };
 };
 
 &uart1 {
 };
 
 &cpsw_emac1 {
-       phy-mode = "rgmii-txid";
+       phy-mode = "rgmii-id";
        dual_emac_res_vlan = <2>;
        phy-handle = <&phy1>;
 };
 
        status = "okay";
 };
+
+&mmc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc1_pins>;
+       cd-gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
+};
index d774bf76720c5596aa6b909990af721b86ef36aa..9bfa032bcada76248c618499024f0656f21f5430 100644 (file)
                pinctrl-names = "default";
                pinctrl-0 = <&user_leds_pins>;
 
-               green {
-                       label = "green:user";
+               user-led0 {
                        gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
                        linux,default-trigger = "gpio";
                        default-state = "on";
                };
 
-               yellow {
-                       label = "yellow:user";
+               user-led1 {
                        gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
                        linux,default-trigger = "gpio";
                        default-state = "on";
 &davinci_mdio {
        phy1: ethernet-phy@2 {
                reg = <2>;
-
-               /* Register 260 (104h) – RGMII Clock and Control Pad Skew */
-               rxc-skew-ps = <1400>;
-               rxdv-skew-ps = <0>;
-               txc-skew-ps = <1400>;
-               txen-skew-ps = <0>;
-               /* Register 261 (105h) – RGMII RX Data Pad Skew */
-               rxd3-skew-ps = <0>;
-               rxd2-skew-ps = <0>;
-               rxd1-skew-ps = <0>;
-               rxd0-skew-ps = <0>;
-               /* Register 262 (106h) – RGMII TX Data Pad Skew */
-               txd3-skew-ps = <0>;
-               txd2-skew-ps = <0>;
-               txd1-skew-ps = <0>;
-               txd0-skew-ps = <0>;
        };
 };
 
index 672daf9d36be1f8266746d16718e58863fbc7d12..43907d03e67597dcd18777728274a0a1791e20f3 100644 (file)
 #include "am335x-pcm-953.dtsi"
 
 /* SoM */
+&gpmc {
+       status = "okay";
+};
+
 &i2c_eeprom {
        status = "okay";
 };
index ee6b1cb27ce550fd76c8f1d3de25b0599050f34c..3d0672b53d779e84b76a0e992bdcba8486d83bc7 100644 (file)
                reg = <0x80000000 0x10000000>; /* 256 MB */
        };
 
-       regulators {
-               compatible = "simple-bus";
-
-               vcc5v: fixedregulator0 {
-                       compatible = "regulator-fixed";
-                       regulator-name = "vcc5v";
-                       regulator-min-microvolt = <5000000>;
-                       regulator-max-microvolt = <5000000>;
-                       regulator-boot-on;
-                       regulator-always-on;
-               };
+       vcc5v: fixedregulator0 {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc5v";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-boot-on;
+               regulator-always-on;
        };
 };
 
        status = "okay";
 };
 
+/* EMMC */
+&am33xx_pinmux {
+       emmc_pins: pinmux_emmc_pins {
+               pinctrl-single,pins = <
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2)       /* gpmc_csn1.mmc1_clk */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2)       /* gpmc_csn2.mmc1_cmd */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1)        /* gpmc_ad0.mmc1_dat0 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1)        /* gpmc_ad1.mmc1_dat1 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1)        /* gpmc_ad2.mmc1_dat2 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1)        /* gpmc_ad3.mmc1_dat3 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1)        /* gpmc_ad4.mmc1_dat4 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1)        /* gpmc_ad5.mmc1_dat5 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1)        /* gpmc_ad6.mmc1_dat6 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1)        /* gpmc_ad7.mmc1_dat7 */
+               >;
+       };
+};
+
+&mmc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&emmc_pins>;
+       vmmc-supply = <&vmmc_reg>;
+       bus-width = <8>;
+       ti,non-removable;
+       status = "disabled";
+};
+
 /* Ethernet */
 &am33xx_pinmux {
        ethernet0_pins: pinmux_ethernet0 {
 };
 
 &gpmc {
-       status = "okay";
+       status = "disabled";
        pinctrl-names = "default";
        pinctrl-0 = <&nandflash_pins>;
        ranges = <0 0 0x08000000 0x1000000>;   /* CS0: NAND */
diff --git a/arch/arm/boot/dts/am335x-regor-rdk.dts b/arch/arm/boot/dts/am335x-regor-rdk.dts
new file mode 100644 (file)
index 0000000..66a1360
--- /dev/null
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Phytec Messtechnik GmbH
+ * Author: Teresa Remmet <t.remmet@phytec.de>
+ *
+ */
+
+/dts-v1/;
+
+#include "am335x-phycore-som.dtsi"
+#include "am335x-regor.dtsi"
+
+/* SoM */
+&gpmc {
+       status = "okay";
+};
+
+&i2c_eeprom {
+       status = "okay";
+};
+
+&serial_flash {
+       status = "okay";
+};
diff --git a/arch/arm/boot/dts/am335x-regor.dtsi b/arch/arm/boot/dts/am335x-regor.dtsi
new file mode 100644 (file)
index 0000000..5aff02a
--- /dev/null
@@ -0,0 +1,223 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Phytec Messtechnik GmbH
+ * Author: Teresa Remmet <t.remmet@phytec.de>
+ *
+ */
+
+/ {
+       model = "Phytec AM335x phyBOARD-REGOR";
+       compatible = "phytec,am335x-regor", "phytec,am335x-phycore-som", "ti,am33xx";
+
+       vcc3v3: fixedregulator@1 {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc3v3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+       };
+
+       /* User IO */
+       user_leds: user_leds {
+               compatible = "gpio-leds";
+               pinctrl-names = "default";
+               pinctrl-0 = <&user_leds_pins>;
+
+               run_stop-led {
+                       gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
+                       linux,default-trigger = "gpio";
+                       default-state = "off";
+               };
+
+               error-led {
+                       gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
+                       linux,default-trigger = "gpio";
+                       default-state = "off";
+               };
+       };
+};
+
+/* User Leds */
+&am33xx_pinmux {
+       user_leds_pins: pinmux_user_leds {
+               pinctrl-single,pins = <
+                       AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7)    /* lcd_hsync.gpio2_22 */
+                       AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLDOWN, MUX_MODE7)   /* mcasp0_fsx.gpio3_15 */
+               >;
+       };
+};
+
+/* CAN Busses */
+&am33xx_pinmux {
+       dcan1_pins: pinmux_dcan1 {
+               pinctrl-single,pins = <
+                       AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT_PULLUP, MUX_MODE2)     /* uart0_ctsn.d_can1_tx */
+                       AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE2)      /* uart0_rtsn.d_can1_rx */
+               >;
+       };
+};
+
+&dcan1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&dcan1_pins>;
+       status = "okay";
+};
+
+/* Ethernet */
+&am33xx_pinmux {
+       ethernet1_pins: pinmux_ethernet1 {
+               pinctrl-single,pins = <
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT, MUX_MODE1)               /* gpmc_a0.mii2_txen */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE1)       /* gpmc_a1.mii2_rxdv */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT, MUX_MODE1)               /* gpmc_a2.mii2_txd3 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT, MUX_MODE1)               /* gpmc_a3.mii2_txd2 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT, MUX_MODE1)               /* gpmc_a4.mii2_txd1 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE1)               /* gpmc_a5.mii2_txd0 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLDOWN, MUX_MODE1)       /* gpmc_a6.mii2_txclk */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE1)       /* gpmc_a7.mii2_rxclk */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE1)       /* gpmc_a8.mii2_rxd3 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE1)        /* gpmc_a9.mii2_rxd2 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE1)      /* gpmc_a10.mii2_rxd1 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE1)      /* gpmc_a11.mii2_rxd0 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLDOWN, MUX_MODE1)      /* gpmc_wpn.mii2_rxerr */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLDOWN, MUX_MODE1)     /* gpmc_ben1.mii2_col */
+               >;
+       };
+};
+
+&cpsw_emac1 {
+       phy-handle = <&phy1>;
+       phy-mode = "mii";
+       dual_emac_res_vlan = <2>;
+};
+
+&davinci_mdio {
+       phy1: ethernet-phy@1 {
+               reg = <1>;
+       };
+};
+
+&mac {
+       slaves = <2>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&ethernet0_pins &ethernet1_pins>;
+       dual_emac = <1>;
+};
+
+/* GPIOs */
+&am33xx_pinmux {
+       pinctrl-names = "default";
+       pinctrl-0 = <&user_gpios_pins>;
+
+       user_gpios_pins: pinmux_user_gpios {
+               pinctrl-single,pins = <
+                       /* DIGIN 1-4 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT, MUX_MODE7)              /* gpmc_ad11.gpio0_27 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT, MUX_MODE7)              /* gpmc_ad10.gpio0_26 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT, MUX_MODE7)               /* gpmc_ad9.gpio0_23 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT, MUX_MODE7)               /* gpmc_ad8.gpio0_22 */
+                       /* DIGOUT 1-4 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT, MUX_MODE7)             /* gpmc_ad15.gpio1_15 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT, MUX_MODE7)             /* gpmc_ad14.gpio1_14 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT, MUX_MODE7)             /* gpmc_ad13.gpio1_13 */
+                       AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT, MUX_MODE7)             /* gpmc_ad12.gpio1_12 */
+               >;
+       };
+};
+
+/* MMC */
+&am33xx_pinmux {
+       mmc1_pins: pinmux_mmc1 {
+               pinctrl-single,pins = <
+                       AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
+                       AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
+                       AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
+                       AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
+                       AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
+                       AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
+                       AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE7)        /* spi0_cs1.mmc0_sdcd */
+               >;
+       };
+};
+
+&mmc1 {
+       vmmc-supply = <&vcc3v3>;
+       bus-width = <4>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc1_pins>;
+       cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+/* RTC */
+&i2c_rtc {
+       status = "okay";
+};
+
+/* UARTs */
+&am33xx_pinmux {
+       uart0_pins: pinmux_uart0 {
+               pinctrl-single,pins = <
+                       AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
+                       AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+               >;
+       };
+
+       uart2_pins: pinmux_uart2 {
+               pinctrl-single,pins = <
+                       AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE1)     /* mii1_tx_clk.uart2_rxd */
+                       AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE1)  /* mii1_rx_clk.uart2_txd */
+               >;
+       };
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pins>;
+       status = "okay";
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart2_pins>;
+       status = "okay";
+};
+
+/* RS485 - UART1 */
+&am33xx_pinmux {
+       uart1_rs485_pins: pinmux_uart1_rs485_pins {
+               pinctrl-single,pins = <
+                       AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
+                       AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+                       AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLUP, MUX_MODE0)
+               >;
+       };
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart1_rs485_pins>;
+       status = "okay";
+       linux,rs485-enabled-at-boot-time;
+};
+
+/* USB */
+&cppi41dma {
+       status = "okay";
+};
+
+&usb_ctrl_mod {
+       status = "okay";
+};
+
+&usb {
+       status = "okay";
+};
+
+&usb0 {
+       status = "okay";
+};
+
+&usb0_phy {
+       status = "okay";
+};
index 2e04f6df825797ce1bd8dd260a288adc83ed8a26..866b5f0cbfbc4960903ef0be045695e645edfe73 100644 (file)
 #include "am335x-wega.dtsi"
 
 /* SoM */
+&gpmc {
+       status = "okay";
+};
+
 &i2c_eeprom {
        status = "okay";
 };
index 67bde56f89fd3e05aad25171c9846385cb1213a5..61fc4cd2d164e57543ac3ac02fa01daf0d9a0839 100644 (file)
                compatible = "ti,da830-evm-audio";
        };
 
-       regulators {
-               compatible = "simple-bus";
-
-               vcc3v3: fixedregulator1 {
-                       compatible = "regulator-fixed";
-                       regulator-name = "vcc3v3";
-                       regulator-min-microvolt = <3300000>;
-                       regulator-max-microvolt = <3300000>;
-                       regulator-boot-on;
-               };
+       vcc3v3: fixedregulator1 {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc3v3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
        };
 };
 
index 610506723ea5de1c6e0458445085890726fe7ee7..fe0207b88053d3971e851ace3d2c1d10697b3ff4 100644 (file)
                compatible = "arm,versatile-flash", "cfi-flash";
                reg = <0x40000000 0x04000000>;
                bank-width = <4>;
+               partitions {
+                       compatible = "arm,arm-firmware-suite";
+               };
        };
 
        flash1@44000000 {
                compatible = "arm,versatile-flash", "cfi-flash";
                reg = <0x44000000 0x04000000>;
                bank-width = <4>;
+               partitions {
+                       compatible = "arm,arm-firmware-suite";
+               };
        };
 
        /* SMSC LAN91C111 ethernet with PHY and EEPROM */
index cbbb8878daa3a841d9247088c7c713d8bc169b29..2625ce66f8e7e64d45d869f25bd6d0c17a430e9a 100644 (file)
                compatible = "arm,versatile-flash", "cfi-flash";
                reg = <0x30000000 0x4000000>;
                bank-width = <4>;
+               partitions {
+                       compatible = "arm,arm-firmware-suite";
+               };
        };
 
        fpga_flash@38000000 {
                compatible = "arm,versatile-flash", "cfi-flash";
                reg = <0x38000000 0x800000>;
                bank-width = <4>;
+               partitions {
+                       compatible = "arm,arm-firmware-suite";
+               };
        };
 
        /*
index 2015619ca22cdb90f673b3713f5012f1546a8340..c69cf7ddbe614aa091b95f0e44f81e1d0b59fc63 100644 (file)
                compatible = "arm,versatile-flash", "cfi-flash";
                reg = <0x40000000 0x04000000>;
                bank-width = <4>;
+               partitions {
+                       compatible = "arm,arm-firmware-suite";
+               };
        };
 
        flash1@44000000 {
                compatible = "arm,versatile-flash", "cfi-flash";
                reg = <0x44000000 0x04000000>;
                bank-width = <4>;
+               partitions {
+                       compatible = "arm,arm-firmware-suite";
+               };
        };
 
        bridge {
index a81e9c28243219d80c0627e772efc197569da566..09f3f544f3a73eb81e33acce2e0fb4e3c7f5efbf 100644 (file)
                compatible = "arm,versatile-flash", "cfi-flash";
                reg = <0x40000000 0x04000000>;
                bank-width = <4>;
+               partitions {
+                       compatible = "arm,arm-firmware-suite";
+               };
        };
 
        flash1@44000000 {
                compatible = "arm,versatile-flash", "cfi-flash";
                reg = <0x44000000 0x04000000>;
                bank-width = <4>;
+               partitions {
+                       compatible = "arm,arm-firmware-suite";
+               };
        };
 
        /* SMSC 9118 ethernet with PHY and EEPROM */
index 9fd1cb9f499219535d00280c0cd5a1e2875eda94..85e2e9e27a9f367d8e020f80e002c78e37cc8ec7 100644 (file)
                };
        };
 
+       auxdisplay {
+               compatible = "hit,hd44780";
+               data-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>,
+                               <&gpio1 26 GPIO_ACTIVE_HIGH>,
+                               <&gpio1 27 GPIO_ACTIVE_HIGH>,
+                               <&gpio1 29 GPIO_ACTIVE_HIGH>;
+               enable-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
+               rs-gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+               rw-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+               backlight-gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
+               display-height-chars = <2>;
+               display-width-chars = <16>;
+       };
+
        gpio-keys {
                compatible = "gpio-keys";
                pinctrl-0 = <&backup_button_pin
index 43aba4071a5c2c610ebd00f219fec074cb3133f1..d519d307aa2aef3f07c31e22490c864e7b2c82cc 100644 (file)
 &adc {
        status = "okay";
 };
+
+&ehci0 {
+       status = "okay";
+};
+
+&ehci1 {
+       status = "okay";
+};
diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-yamp.dts b/arch/arm/boot/dts/aspeed-bmc-facebook-yamp.dts
new file mode 100644 (file)
index 0000000..4e09a9c
--- /dev/null
@@ -0,0 +1,160 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2018 Facebook Inc.
+/dts-v1/;
+
+#include "aspeed-g5.dtsi"
+
+/ {
+       model = "Facebook YAMP 100 BMC";
+       compatible = "facebook,yamp-bmc", "aspeed,ast2500";
+
+       aliases {
+               /*
+                * Override the default uart aliases to avoid breaking
+                * the legacy applications.
+                */
+               serial0 = &uart5;
+               serial1 = &uart1;
+               serial2 = &uart2;
+               serial3 = &uart3;
+       };
+
+       chosen {
+               stdout-path = &uart5;
+               bootargs = "console=ttyS0,9600n8 root=/dev/ram rw";
+       };
+
+       memory@80000000 {
+               reg = <0x80000000 0x20000000>;
+       };
+};
+
+&pinctrl {
+       aspeed,external-nodes = <&gfx &lhc>;
+};
+
+/*
+ * Update reset type to "system" (full chip) to fix warm reboot hang issue
+ * when reset type is set to default ("soc", gated by reset mask registers).
+ */
+&wdt1 {
+       status = "okay";
+       aspeed,reset-type = "system";
+};
+
+/*
+ * wdt2 is not used by Yamp.
+ */
+&wdt2 {
+       status = "disabled";
+};
+
+&fmc {
+       status = "okay";
+       flash@0 {
+               status = "okay";
+               m25p,fast-read;
+               label = "bmc";
+#include "facebook-bmc-flash-layout.dtsi"
+       };
+};
+
+&uart1 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_txd1_default
+                    &pinctrl_rxd1_default>;
+};
+
+&uart2 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_txd2_default
+                    &pinctrl_rxd2_default>;
+};
+
+&uart3 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_txd3_default
+                    &pinctrl_rxd3_default>;
+};
+
+&uart5 {
+       status = "okay";
+};
+
+&mac0 {
+       status = "okay";
+       use-ncsi;
+       no-hw-checksum;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_rmii1_default>;
+};
+
+&i2c0 {
+       status = "okay";
+};
+
+&i2c1 {
+       status = "okay";
+};
+
+&i2c2 {
+       status = "okay";
+
+       i2c-switch@75 {
+               compatible = "nxp,pca9548";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x75>;
+       };
+};
+
+&i2c3 {
+       status = "okay";
+};
+
+&i2c4 {
+       status = "okay";
+};
+
+&i2c5 {
+       status = "okay";
+};
+
+&i2c6 {
+       status = "okay";
+};
+
+&i2c7 {
+       status = "okay";
+};
+
+&i2c8 {
+       status = "okay";
+};
+
+&i2c9 {
+       status = "okay";
+};
+
+&i2c10 {
+       status = "okay";
+};
+
+&i2c11 {
+       status = "okay";
+};
+
+&i2c12 {
+       status = "okay";
+};
+
+&i2c13 {
+       status = "okay";
+};
+
+&vhub {
+       status = "okay";
+};
diff --git a/arch/arm/boot/dts/aspeed-bmc-inspur-fp5280g2.dts b/arch/arm/boot/dts/aspeed-bmc-inspur-fp5280g2.dts
new file mode 100644 (file)
index 0000000..628195b
--- /dev/null
@@ -0,0 +1,846 @@
+// SPDX-License-Identifier: GPL-2.0+
+/dts-v1/;
+#include "aspeed-g5.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+#include <dt-bindings/leds/leds-pca955x.h>
+
+/ {
+       model = "FP5280G2 BMC";
+       compatible = "inspur,fp5280g2-bmc", "aspeed,ast2500";
+
+       chosen {
+               stdout-path = &uart5;
+               bootargs = "console=ttyS4,115200 earlyprintk";
+       };
+
+       memory@80000000 {
+               reg = <0x80000000 0x20000000>;
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               vga_memory: framebuffer@9f000000 {
+                       no-map;
+                       reg = <0x9f000000 0x01000000>; /* 16M */
+               };
+
+               flash_memory: region@98000000 {
+                       no-map;
+                       reg = <0x98000000 0x04000000>; /* 64M */
+               };
+
+               coldfire_memory: codefire_memory@9ef00000 {
+                       reg = <0x9ef00000 0x00100000>;
+                       no-map;
+               };
+
+               gfx_memory: framebuffer {
+                       size = <0x01000000>;
+                       alignment = <0x01000000>;
+                       compatible = "shared-dma-pool";
+                       reusable;
+               };
+
+               video_engine_memory: jpegbuffer {
+                       size = <0x02000000>;    /* 32M */
+                       alignment = <0x01000000>;
+                       compatible = "shared-dma-pool";
+                       reusable;
+               };
+       };
+
+       fsi: gpio-fsi {
+               compatible = "aspeed,ast2500-cf-fsi-master", "fsi-master";
+               #address-cells = <2>;
+               #size-cells = <0>;
+               no-gpio-delays;
+
+               memory-region = <&coldfire_memory>;
+               aspeed,sram = <&sram>;
+               aspeed,cvic = <&cvic>;
+
+               clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
+               data-gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_HIGH>;
+               mux-gpios = <&gpio ASPEED_GPIO(I, 2) GPIO_ACTIVE_HIGH>;
+               enable-gpios = <&gpio ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
+               trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+
+               checkstop {
+                       label = "checkstop";
+                       gpios = <&gpio ASPEED_GPIO(B, 3) GPIO_ACTIVE_LOW>;
+                       linux,code = <ASPEED_GPIO(B, 3)>;
+               };
+
+               ps0-presence {
+                       label = "ps0-presence";
+                       gpios = <&gpio ASPEED_GPIO(F, 0) GPIO_ACTIVE_LOW>;
+                       linux,code = <ASPEED_GPIO(F, 0)>;
+               };
+
+               ps1-presence {
+                       label = "ps1-presence";
+                       gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>;
+                       linux,code = <ASPEED_GPIO(F, 1)>;
+               };
+
+       };
+
+       gpio-keys-polled {
+               compatible = "gpio-keys-polled";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               poll-interval = <1000>;
+
+               fan0-presence {
+                       label = "fan0-presence";
+                       gpios = <&pca1 0 GPIO_ACTIVE_LOW>;
+                       linux,code = <1>;
+               };
+
+               fan1-presence {
+                       label = "fan1-presence";
+                       gpios = <&pca1 1 GPIO_ACTIVE_LOW>;
+                       linux,code = <2>;
+               };
+
+               fan2-presence {
+                       label = "fan2-presence";
+                       gpios = <&pca1 2 GPIO_ACTIVE_LOW>;
+                       linux,code = <3>;
+               };
+
+               fan3-presence {
+                       label = "fan3-presence";
+                       gpios = <&pca1 3 GPIO_ACTIVE_LOW>;
+                       linux,code = <4>;
+               };
+
+               fan4-presence {
+                       label = "fan4-presence";
+                       gpios = <&pca1 4 GPIO_ACTIVE_LOW>;
+                       linux,code = <5>;
+               };
+
+               fan5-presence {
+                       label = "fan5-presence";
+                       gpios = <&pca1 5 GPIO_ACTIVE_LOW>;
+                       linux,code = <6>;
+               };
+
+               fan6-presence {
+                       label = "fan6-presence";
+                       gpios = <&pca1 6 GPIO_ACTIVE_LOW>;
+                       linux,code = <7>;
+               };
+
+               fan7-presence {
+                       label = "fan7-presence";
+                       gpios = <&pca1 7 GPIO_ACTIVE_LOW>;
+                       linux,code = <8>;
+               };
+       };
+
+       leds {
+           compatible = "gpio-leds";
+
+           power {
+                   label = "power";
+                   /* TODO: dummy gpio */
+                   gpios = <&gpio ASPEED_GPIO(R, 1) GPIO_ACTIVE_LOW>;
+           };
+
+       };
+
+       iio-hwmon-battery {
+               compatible = "iio-hwmon";
+               io-channels = <&adc 15>;
+       };
+
+       iio-hwmon {
+               compatible = "iio-hwmon";
+               io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>,
+                       <&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>,
+                       <&adc 10>, <&adc 11>, <&adc 12>, <&adc 13>, <&adc 14>;
+       };
+
+};
+
+&fmc {
+       status = "okay";
+
+       flash@0 {
+               status = "okay";
+               label = "bmc";
+               m25p,fast-read;
+               spi-max-frequency = <50000000>;
+#include "openbmc-flash-layout.dtsi"
+       };
+};
+
+&spi1 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_spi1_default>;
+
+       flash@0 {
+               status = "okay";
+               label = "pnor";
+               m25p,fast-read;
+               spi-max-frequency = <100000000>;
+       };
+};
+
+&uart1 {
+       /* Rear RS-232 connector */
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_txd1_default
+                       &pinctrl_rxd1_default
+                       &pinctrl_nrts1_default
+                       &pinctrl_ndtr1_default
+                       &pinctrl_ndsr1_default
+                       &pinctrl_ncts1_default
+                       &pinctrl_ndcd1_default
+                       &pinctrl_nri1_default>;
+};
+
+&uart2 {
+       /* Test Point */
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
+};
+
+&uart3 {
+       /* APSS */
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
+};
+
+&uart5 {
+       status = "okay";
+};
+
+&lpc_ctrl {
+       status = "okay";
+       memory-region = <&flash_memory>;
+       flash = <&spi1>;
+};
+
+&mac0 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_rmii1_default>;
+       use-ncsi;
+};
+
+&mac1 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
+};
+
+&i2c0 {
+       /* LCD */
+       status = "okay";
+};
+
+&i2c1 {
+       status = "okay";
+
+       eeprom@50 {
+               compatible = "atmel,24c256";
+               reg = <0x50>;
+               label = "fru";
+       };
+
+};
+
+&i2c2 {
+       status = "okay";
+
+       tmp112@48 {
+               compatible = "ti,tmp112";
+               reg = <0x48>;
+               label = "inlet";
+       };
+
+       tmp112@49 {
+               compatible = "ti,tmp112";
+               reg = <0x49>;
+               label = "outlet";
+       };
+
+       i2c-switch@70 {
+               compatible = "nxp,pca9546";
+               reg = <0x70>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               i2c@0 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0>;
+
+                       tmp112@4a {
+                               compatible = "ti,tmp112";
+                               reg = <0x4a>;
+                               label = "psu_inlet";
+                       };
+
+               };
+
+               i2c@1 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <1>;
+
+                       tmp112@4a {
+                               compatible = "ti,tmp112";
+                               reg = <0x4a>;
+                               label = "ocp_zone";
+                       };
+               };
+
+               i2c@2 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <2>;
+
+                       tmp112@4a {
+                               compatible = "ti,tmp112";
+                               reg = <0x4a>;
+                               label = "bmc_zone";
+                       };
+               };
+
+               i2c@3 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <3>;
+
+                       tmp112@7c {
+                               compatible = "microchip,emc1413";
+                               reg = <0x7c>;
+                       };
+               };
+
+       };
+};
+
+&i2c3 {
+       /* Riser Card */
+       status = "okay";
+};
+
+&i2c4 {
+       status = "okay";
+
+       rtc@68 {
+               compatible = "dallas,ds3232";
+               reg = <0x68>;
+       };
+};
+
+&i2c5 {
+       /* vr  */
+       status = "okay";
+};
+
+&i2c6 {
+       /* bp card */
+       status = "okay";
+};
+
+&i2c7 {
+       status = "okay";
+
+       i2c-switch@70 {
+               compatible = "nxp,pca9546";
+               reg = <0x70>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               i2c@0 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0>;
+
+                       adm1278@10 {
+                               compatible = "adi,adm1278";
+                               reg = <0x10>;
+                       };
+
+                       adm1278@13 {
+                               compatible = "adi,adm1278";
+                               reg = <0x13>;
+                       };
+
+                       adm1278@50 {
+                               compatible = "adi,adm1278";
+                               reg = <0x50>;
+                       };
+
+                       adm1278@53 {
+                               compatible = "adi,adm1278";
+                               reg = <0x53>;
+                       };
+
+               };
+
+               /*pcie riser*/
+
+       };
+};
+
+&i2c8 {
+       status = "okay";
+
+       pca0: pca9555@20 {
+               compatible = "nxp,pca9555";
+               reg = <0x20>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               gpio-controller;
+               #gpio-cells = <2>;
+
+               gpio@0 {
+                       reg = <0>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@1 {
+                       reg = <1>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@2 {
+                       reg = <2>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@3 {
+                       reg = <3>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@4 {
+                       reg = <4>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@5 {
+                       reg = <5>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@6 {
+                       reg = <6>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@7 {
+                       reg = <7>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+       };
+
+       pca1: pca9555@21 {
+               compatible = "nxp,pca9555";
+               reg = <0x21>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               gpio-controller;
+               #gpio-cells = <2>;
+
+               gpio@0 {
+                       reg = <0>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@1 {
+                       reg = <1>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@2 {
+                       reg = <2>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@3 {
+                       reg = <3>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@4 {
+                       reg = <4>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@5 {
+                       reg = <5>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@6 {
+                       reg = <6>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@7 {
+                       reg = <7>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+       };
+
+       pca2: pca9555@22 {
+               compatible = "nxp,pca9555";
+               reg = <0x22>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               gpio-controller;
+               #gpio-cells = <2>;
+
+               gpio@0 {
+                       reg = <0>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@1 {
+                       reg = <1>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@2 {
+                       reg = <2>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@3 {
+                       reg = <3>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@4 {
+                       reg = <4>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@5 {
+                       reg = <5>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@6 {
+                       reg = <6>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@7 {
+                       reg = <7>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+       };
+
+       pca3: pca9555@23 {
+               compatible = "nxp,pca9555";
+               reg = <0x23>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               gpio-controller;
+               #gpio-cells = <2>;
+
+               gpio@0 {
+                       reg = <0>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@1 {
+                       reg = <1>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@2 {
+                       reg = <2>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@3 {
+                       reg = <3>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@4 {
+                       reg = <4>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@5 {
+                       reg = <5>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@6 {
+                       reg = <6>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@7 {
+                       reg = <7>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+       };
+
+       pca4: pca9555@24 {
+               compatible = "nxp,pca9555";
+               reg = <0x24>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               gpio-controller;
+               #gpio-cells = <2>;
+
+               gpio@0 {
+                       reg = <0>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@1 {
+                       reg = <1>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@2 {
+                       reg = <2>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@3 {
+                       reg = <3>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@4 {
+                       reg = <4>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@5 {
+                       reg = <5>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@6 {
+                       reg = <6>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@7 {
+                       reg = <7>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+       };
+
+       pca5: pca9555@25 {
+               compatible = "nxp,pca9555";
+               reg = <0x25>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               gpio-controller;
+               #gpio-cells = <2>;
+
+               gpio@0 {
+                       reg = <0>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@1 {
+                       reg = <1>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@2 {
+                       reg = <2>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@3 {
+                       reg = <3>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@4 {
+                       reg = <4>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@5 {
+                       reg = <5>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@6 {
+                       reg = <6>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@7 {
+                       reg = <7>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+       };
+
+};
+
+&i2c9 {
+       /* cpld */
+       status = "okay";
+};
+
+&i2c10 {
+       /* hdd bp */
+       status = "okay";
+};
+
+&i2c11 {
+       status = "okay";
+
+       power-supply@58 {
+               compatible = "pmbus";
+               reg = <0x58>;
+       };
+
+       power-supply@5a {
+               compatible = "pmbus";
+               reg = <0x5a>;
+       };
+};
+
+&i2c12 {
+       /* odcc */
+       status = "okay";
+};
+
+&vuart {
+       status = "okay";
+};
+
+&gfx {
+       status = "okay";
+       memory-region = <&gfx_memory>;
+};
+
+&pinctrl {
+       aspeed,external-nodes = <&gfx &lhc>;
+};
+
+&gpio {
+       pin_gpio_b7 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(B,7) GPIO_ACTIVE_LOW>;
+               output-high;
+               line-name = "BMC_INIT_OK";
+       };
+};
+
+&wdt1 {
+       aspeed,reset-type = "none";
+       aspeed,external-signal;
+       aspeed,ext-push-pull;
+       aspeed,ext-active-high;
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_wdtrst1_default>;
+};
+
+&ibt {
+       status = "okay";
+
+};
+
+&adc {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
+        &pinctrl_adc2_default &pinctrl_adc3_default &pinctrl_adc4_default
+        &pinctrl_adc5_default &pinctrl_adc6_default &pinctrl_adc7_default
+        &pinctrl_adc8_default &pinctrl_adc9_default &pinctrl_adc10_default
+        &pinctrl_adc11_default &pinctrl_adc12_default &pinctrl_adc13_default
+        &pinctrl_adc14_default &pinctrl_adc15_default>;
+};
+
+&vhub {
+       status = "okay";
+};
+
+&video {
+       status = "okay";
+       memory-region = <&video_engine_memory>;
+};
+
+&pwm_tacho {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
+               &pinctrl_pwm2_default &pinctrl_pwm3_default
+               &pinctrl_pwm4_default &pinctrl_pwm5_default
+               &pinctrl_pwm6_default &pinctrl_pwm7_default>;
+
+       fan@0 {
+               reg = <0x00>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>;
+       };
+
+       fan@1 {
+               reg = <0x01>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>;
+       };
+
+       fan@2 {
+               reg = <0x02>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>;
+       };
+
+       fan@3 {
+               reg = <0x03>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>;
+       };
+
+       fan@4 {
+               reg = <0x04>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>;
+       };
+
+       fan@5 {
+               reg = <0x05>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x0a 0x0b>;
+       };
+
+       fan@6 {
+               reg = <0x06>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x0c 0x0d>;
+       };
+
+       fan@7 {
+               reg = <0x07>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x0e 0x0f>;
+       };
+
+};
+
+#include "ibm-power9-dual.dtsi"
diff --git a/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts b/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
new file mode 100644 (file)
index 0000000..d3695a3
--- /dev/null
@@ -0,0 +1,566 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Device Tree file for Lenovo Hr630 platform
+ *
+ * Copyright (C) 2019-present Lenovo
+ */
+
+/dts-v1/;
+
+#include "aspeed-g5.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+
+/ {
+       model = "HR630 BMC";
+       compatible = "lenovo,hr630-bmc", "aspeed,ast2500";
+
+       aliases {
+               i2c14 = &i2c_rbp;
+               i2c15 = &i2c_fbp1;
+               i2c16 = &i2c_fbp2;
+               i2c17 = &i2c_fbp3;
+               i2c18 = &i2c_riser2;
+               i2c19 = &i2c_pcie4;
+               i2c20 = &i2c_riser1;
+               i2c21 = &i2c_ocp;
+       };
+
+       chosen {
+               stdout-path = &uart5;
+               bootargs = "console=tty0 console=ttyS4,115200 earlyprintk";
+       };
+
+       memory@80000000 {
+               device_type = "memory";
+               reg = <0x80000000 0x20000000>;
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               flash_memory: region@98000000 {
+                       no-map;
+                       reg = <0x98000000 0x00100000>; /* 1M */
+               };
+
+               gfx_memory: framebuffer {
+                       size = <0x01000000>;
+                       alignment = <0x01000000>;
+                       compatible = "shared-dma-pool";
+                       reusable;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               heartbeat {
+                       gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_LOW>;
+               };
+
+               fault {
+                       gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
+               };
+       };
+
+       iio-hwmon {
+               compatible = "iio-hwmon";
+               io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
+               <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
+               <&adc 8>, <&adc 9>, <&adc 10>,
+               <&adc 12>, <&adc 13>, <&adc 14>;
+       };
+
+};
+
+&fmc {
+       status = "okay";
+       flash@0 {
+               status = "okay";
+               m25p,fast-read;
+               label = "bmc";
+               spi-max-frequency = <50000000>;
+#include "openbmc-flash-layout.dtsi"
+       };
+};
+
+&lpc_ctrl {
+       status = "okay";
+       memory-region = <&flash_memory>;
+       flash = <&spi1>;
+};
+
+&uart1 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_txd1_default
+                       &pinctrl_rxd1_default>;
+};
+
+&uart2 {
+       /* Rear RS-232 connector */
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_txd2_default
+                       &pinctrl_rxd2_default
+                       &pinctrl_nrts2_default
+                       &pinctrl_ndtr2_default
+                       &pinctrl_ndsr2_default
+                       &pinctrl_ncts2_default
+                       &pinctrl_ndcd2_default
+                       &pinctrl_nri2_default>;
+};
+
+&uart3 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_txd3_default
+                       &pinctrl_rxd3_default>;
+};
+
+&uart5 {
+       status = "okay";
+};
+
+&ibt {
+       status = "okay";
+};
+
+&mac0 {
+       status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_rmii1_default>;
+       use-ncsi;
+};
+
+&mac1 {
+       status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
+};
+
+&adc {
+       status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_adc0_default
+                       &pinctrl_adc1_default
+                       &pinctrl_adc2_default
+                       &pinctrl_adc3_default
+                       &pinctrl_adc4_default
+                       &pinctrl_adc5_default
+                       &pinctrl_adc6_default
+                       &pinctrl_adc7_default
+                       &pinctrl_adc8_default
+                       &pinctrl_adc9_default
+                       &pinctrl_adc10_default
+                       &pinctrl_adc12_default
+                       &pinctrl_adc13_default
+                       &pinctrl_adc14_default>;
+};
+
+&i2c0 {
+       status = "okay";
+       /* temp1 inlet */
+       tmp75@4e {
+               compatible = "national,lm75";
+               reg = <0x4e>;
+       };
+};
+
+&i2c1 {
+       status = "okay";
+       /* temp2 outlet */
+       tmp75@4d {
+               compatible = "national,lm75";
+               reg = <0x4d>;
+       };
+};
+
+&i2c2 {
+       status = "okay";
+};
+
+&i2c3 {
+       status = "okay";
+};
+
+&i2c4 {
+       status = "okay";
+};
+
+&i2c5 {
+       status = "okay";
+};
+
+&i2c6 {
+       status = "okay";
+       /*      Slot 0,
+        *      Slot 1,
+        *      Slot 2,
+        *      Slot 3
+        */
+
+       i2c-switch@70 {
+               compatible = "nxp,pca9545";
+               reg = <0x70>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               i2c-mux-idle-disconnect;        /* may use mux@70 next. */
+
+               i2c_rbp: i2c@0 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0>;
+               };
+
+               i2c_fbp1: i2c@1 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <1>;
+               };
+
+               i2c_fbp2: i2c@2 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <2>;
+               };
+
+               i2c_fbp3: i2c@3 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <3>;
+               };
+       };
+};
+
+&i2c7 {
+       status = "okay";
+
+       /*      Slot 0,
+        *      Slot 1,
+        *      Slot 2,
+        *      Slot 3
+        */
+       i2c-switch@76 {
+               compatible = "nxp,pca9546";
+               reg = <0x76>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               i2c-mux-idle-disconnect;  /* may use mux@76 next. */
+
+               i2c_riser2: i2c@0 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0>;
+               };
+
+               i2c_pcie4: i2c@1 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <1>;
+               };
+
+               i2c_riser1: i2c@2 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <2>;
+               };
+
+               i2c_ocp: i2c@3 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <3>;
+               };
+       };
+};
+
+&i2c8 {
+       status = "okay";
+
+       eeprom@57 {
+               compatible = "atmel,24c256";
+               reg = <0x57>;
+               pagesize = <16>;
+       };
+};
+
+&i2c9 {
+       status = "okay";
+};
+
+&i2c10 {
+       status = "okay";
+};
+
+&i2c11 {
+       status = "okay";
+};
+
+&i2c12 {
+       status = "okay";
+};
+
+&ehci1 {
+       status = "okay";
+};
+
+&uhci {
+       status = "okay";
+};
+
+&gfx {
+       status = "okay";
+       memory-region = <&gfx_memory>;
+};
+
+&pwm_tacho {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm0_default
+       &pinctrl_pwm1_default
+       &pinctrl_pwm2_default
+       &pinctrl_pwm3_default
+       &pinctrl_pwm4_default
+       &pinctrl_pwm5_default
+       &pinctrl_pwm6_default>;
+
+       fan@0 {
+               reg = <0x00>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x00>;
+       };
+
+       fan@1 {
+               reg = <0x00>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x01>;
+       };
+
+       fan@2 {
+               reg = <0x01>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x02>;
+       };
+
+       fan@3 {
+               reg = <0x01>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x03>;
+       };
+
+       fan@4 {
+               reg = <0x02>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x04>;
+       };
+
+       fan@5 {
+               reg = <0x02>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x05>;
+       };
+
+       fan@6 {
+               reg = <0x03>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x06>;
+       };
+
+       fan@7 {
+               reg = <0x03>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x07>;
+       };
+
+       fan@8 {
+               reg = <0x04>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x08>;
+       };
+
+       fan@9 {
+               reg = <0x04>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x09>;
+       };
+
+       fan@10 {
+               reg = <0x05>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
+       };
+
+       fan@11 {
+               reg = <0x05>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
+       };
+
+       fan@12 {
+               reg = <0x06>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
+       };
+
+       fan@13 {
+               reg = <0x06>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
+       };
+};
+
+&gpio {
+
+       pin_gpio_b5 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "IRQ_BMC_PCH_SMI_LPC_N";
+       };
+
+       pin_gpio_f0 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(F, 0) GPIO_ACTIVE_HIGH>;
+               output-low;
+               line-name = "IRQ_BMC_PCH_NMI_R";
+       };
+
+       pin_gpio_f3 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(F, 3) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "I2C_BUS0_RST_OUT_N";
+       };
+
+       pin_gpio_f4 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(F, 4) GPIO_ACTIVE_HIGH>;
+               output-low;
+               line-name = "FM_SKT0_FAULT_LED";
+       };
+
+       pin_gpio_f5 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(F, 5) GPIO_ACTIVE_HIGH>;
+               output-low;
+               line-name = "FM_SKT1_FAULT_LED";
+       };
+
+       pin_gpio_g4 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "FAN_PWR_CTL_N";
+       };
+
+       pin_gpio_g7 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(G, 7) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "RST_BMC_PCIE_I2CMUX_N";
+       };
+
+       pin_gpio_h2 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "PSU1_FFS_N_R";
+       };
+
+       pin_gpio_h3 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "PSU2_FFS_N_R";
+       };
+
+       pin_gpio_i3 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "BMC_INTRUDED_COVER";
+       };
+
+       pin_gpio_j2 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(J, 2) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "BMC_BIOS_UPDATE_N";
+       };
+
+       pin_gpio_j3 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(J, 3) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "RST_BMC_HDD_I2CMUX_N";
+       };
+
+       pin_gpio_s2 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "BMC_VGA_SW";
+       };
+
+       pin_gpio_s4 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(S, 4) GPIO_ACTIVE_HIGH>;
+               output;
+               line-name = "VBAT_EN_N";
+       };
+
+       pin_gpio_s6 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(S, 6) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "PU_BMC_GPIOS6";
+       };
+
+       pin_gpio_y0 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(Y, 0) GPIO_ACTIVE_HIGH>;
+               output-low;
+               line-name = "BMC_NCSI_MUX_CTL_S0";
+       };
+
+       pin_gpio_y1 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(Y, 1) GPIO_ACTIVE_HIGH>;
+               output-low;
+               line-name = "BMC_NCSI_MUX_CTL_S1";
+       };
+
+       pin_gpio_z0 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(Z, 0) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "I2C_RISER2_INT_N";
+       };
+
+       pin_gpio_z2 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "I2C_RISER2_RESET_N";
+       };
+
+       pin_gpio_z3 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "FM_BMC_PCH_SCI_LPC_N";
+       };
+
+       pin_gpio_z7 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(Z, 7) GPIO_ACTIVE_HIGH>;
+               output-low;
+               line-name = "BMC_POST_CMPLT_N";
+       };
+
+       pin_gpio_aa0 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
+               output-low;
+               line-name = "HOST_BMC_USB_SEL";
+       };
+
+       pin_gpio_aa5 {
+               gpio-hog;
+               gpios = <ASPEED_GPIO(AA, 5) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "I2C_BUS1_RST_OUT_N";
+       };
+
+};
diff --git a/arch/arm/boot/dts/aspeed-bmc-microsoft-olympus.dts b/arch/arm/boot/dts/aspeed-bmc-microsoft-olympus.dts
new file mode 100644 (file)
index 0000000..7331991
--- /dev/null
@@ -0,0 +1,207 @@
+//SPDX-License-Identifier: GPL-2.0+
+
+/dts-v1/;
+
+#include "aspeed-g4.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+
+/ {
+       model = "Olympus BMC";
+       compatible = "microsoft,olympus-bmc", "aspeed,ast2400";
+
+       chosen {
+               stdout-path = &uart5;
+               bootargs = "console=ttyS4,115200 earlyprintk";
+       };
+
+       memory@40000000 {
+               reg = <0x40000000 0x20000000>;
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               vga_memory: framebuffer@5f000000 {
+                       no-map;
+                       reg = <0x5f000000 0x01000000>; /* 16M */
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               bmc_heartbeat {
+                       gpios = <&gpio ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>;
+               };
+
+               power_green {
+                       gpios = <&gpio ASPEED_GPIO(U, 2) GPIO_ACTIVE_HIGH>;
+               };
+
+               power_amber {
+                       gpios = <&gpio ASPEED_GPIO(U, 3) GPIO_ACTIVE_HIGH>;
+               };
+
+               identify {
+                       gpios = <&gpio ASPEED_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
+               };
+
+               fault {
+                       gpios = <&gpio ASPEED_GPIO(A, 1) GPIO_ACTIVE_LOW>;
+               };
+       };
+
+
+       iio-hwmon {
+               compatible = "iio-hwmon";
+               io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
+               <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
+       };
+};
+
+&adc {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 =    <&pinctrl_adc0_default
+                       &pinctrl_adc1_default
+                       &pinctrl_adc2_default
+                       &pinctrl_adc3_default
+                       &pinctrl_adc4_default
+                       &pinctrl_adc5_default
+                       &pinctrl_adc6_default
+                       &pinctrl_adc7_default>;
+};
+
+&fmc {
+       status = "okay";
+
+       flash@0 {
+               status = "okay";
+               m25p,fast-read;
+               label = "bmc";
+#include "openbmc-flash-layout.dtsi"
+       };
+};
+
+&spi {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_spi1_default>;
+
+       flash@0 {
+               status = "okay";
+               m25p,fast-read;
+               label = "pnor";
+       };
+};
+
+&uart5 {
+       status = "okay";
+};
+
+&mac0 {
+       status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
+};
+
+&i2c0 {
+       status = "okay";
+};
+
+&i2c1 {
+       status = "okay";
+
+       tmp421@4c {
+               compatible = "ti,tmp421";
+               reg = <0x4c>;
+       };
+};
+
+&i2c2 {
+       status = "okay";
+};
+
+&i2c3 {
+       status = "okay";
+};
+
+&i2c4 {
+       status = "okay";
+       clock-frequency = <100000>;
+};
+
+&i2c5 {
+       status = "okay";
+};
+
+&i2c6 {
+       status = "okay";
+
+       tmp421@4c {
+               compatible = "ti,tmp421";
+               reg = <0x4c>;
+       };
+};
+
+&i2c7 {
+       status = "okay";
+};
+
+&vuart {
+       status = "okay";
+};
+
+&wdt2 {
+       status = "okay";
+};
+
+&lpc_ctrl {
+       status = "okay";
+};
+
+&pwm_tacho {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 =    <&pinctrl_pwm0_default
+                       &pinctrl_pwm1_default
+                       &pinctrl_pwm2_default
+                       &pinctrl_pwm3_default
+                       &pinctrl_pwm4_default
+                       &pinctrl_pwm5_default
+                       &pinctrl_pwm6_default>;
+
+       fan@0 {
+               reg = <0x00>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x00>;
+       };
+
+       fan@1 {
+               reg = <0x01>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x01>;
+       };
+
+       fan@2 {
+               reg = <0x02>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x02>;
+       };
+
+       fan@3 {
+               reg = <0x03>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x03>;
+       };
+
+       fan@4 {
+               reg = <0x04>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x04>;
+       };
+
+       fan@5 {
+               reg = <0x05>;
+               aspeed,fan-tach-ch = /bits/ 8 <0x05>;
+       };
+
+};
index 024e52a6cd0f8f8e781c7f62a7811cecf8e5d7b6..de95112e2a04f110ad41b92670b6adf2b300a1cf 100644 (file)
 &adc {
        status = "okay";
 };
+
+#include "ibm-power9-dual.dtsi"
index b249da80fb83e56fe4182f188059c140611d3b62..b0cb34ccb1356ec54359cfdf3bf62644f07b3ebf 100644 (file)
                line-name = "BMC_TPM_INT_N";
        };
 };
+
+&fsi {
+       cfam@0,0 {
+               reg = <0 0>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               chip-id = <0>;
+
+               scom@1000 {
+                       compatible = "ibm,fsi2pib";
+                       reg = <0x1000 0x400>;
+               };
+
+               fsi_hub0: hub@3400 {
+                       compatible = "ibm,fsi-master-hub";
+                       reg = <0x3400 0x400>;
+                       #address-cells = <2>;
+                       #size-cells = <0>;
+                       no-scan-on-init;
+               };
+       };
+};
index 418a1988b262a43466e4fd227c6b20b28b271750..9628ecb879cf53d59004432ff84581f6a26efa8f 100644 (file)
                        compatible = "shared-dma-pool";
                        reusable;
                };
+
+               video_engine_memory: jpegbuffer {
+                       size = <0x02000000>;    /* 32M */
+                       alignment = <0x01000000>;
+                       compatible = "shared-dma-pool";
+                       reusable;
+               };
        };
 
        leds {
 &adc {
        status = "okay";
 };
+
+&video {
+       status = "okay";
+       memory-region = <&video_engine_memory>;
+};
+
+#include "ibm-power9-dual.dtsi"
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts b/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
new file mode 100644 (file)
index 0000000..caac895
--- /dev/null
@@ -0,0 +1,966 @@
+// SPDX-License-Identifier: GPL-2.0+
+/dts-v1/;
+#include "aspeed-g5.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+#include <dt-bindings/leds/leds-pca955x.h>
+
+/ {
+       model = "Swift BMC";
+       compatible = "ibm,swift-bmc", "aspeed,ast2500";
+
+       chosen {
+               stdout-path = &uart5;
+               bootargs = "console=ttyS4,115200 earlyprintk";
+       };
+
+       memory@80000000 {
+               reg = <0x80000000 0x20000000>;
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               flash_memory: region@98000000 {
+                       no-map;
+                       reg = <0x98000000 0x04000000>; /* 64M */
+               };
+
+               gfx_memory: framebuffer {
+                       size = <0x01000000>;
+                       alignment = <0x01000000>;
+                       compatible = "shared-dma-pool";
+                       reusable;
+               };
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+
+               air-water {
+                       label = "air-water";
+                       gpios = <&gpio ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>;
+                       linux,code = <ASPEED_GPIO(B, 5)>;
+               };
+
+               checkstop {
+                       label = "checkstop";
+                       gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
+                       linux,code = <ASPEED_GPIO(J, 2)>;
+               };
+
+               ps0-presence {
+                       label = "ps0-presence";
+                       gpios = <&gpio ASPEED_GPIO(R, 7) GPIO_ACTIVE_LOW>;
+                       linux,code = <ASPEED_GPIO(R, 7)>;
+               };
+
+               ps1-presence {
+                       label = "ps1-presence";
+                       gpios = <&gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>;
+                       linux,code = <ASPEED_GPIO(N, 0)>;
+               };
+
+               oppanel-presence {
+                       label = "oppanel-presence";
+                       gpios = <&gpio ASPEED_GPIO(A, 7) GPIO_ACTIVE_LOW>;
+                       linux,code = <ASPEED_GPIO(A, 7)>;
+               };
+
+               opencapi-riser-presence {
+                       label = "opencapi-riser-presence";
+                       gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>;
+                       linux,code = <ASPEED_GPIO(I, 0)>;
+               };
+       };
+
+       iio-hwmon-battery {
+               compatible = "iio-hwmon";
+               io-channels = <&adc 12>;
+       };
+
+       gpio-keys-polled {
+               compatible = "gpio-keys-polled";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               poll-interval = <1000>;
+
+               scm0-presence {
+                       label = "scm0-presence";
+                       gpios = <&pca9552 6 GPIO_ACTIVE_LOW>;
+                       linux,code = <6>;
+               };
+
+               scm1-presence {
+                       label = "scm1-presence";
+                       gpios = <&pca9552 7 GPIO_ACTIVE_LOW>;
+                       linux,code = <7>;
+               };
+
+               cpu0vrm-presence {
+                       label = "cpu0vrm-presence";
+                       gpios = <&pca9552 12 GPIO_ACTIVE_LOW>;
+                       linux,code = <12>;
+               };
+
+               cpu1vrm-presence {
+                       label = "cpu1vrm-presence";
+                       gpios = <&pca9552 13 GPIO_ACTIVE_LOW>;
+                       linux,code = <13>;
+               };
+
+               fan0-presence {
+                       label = "fan0-presence";
+                       gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
+                       linux,code = <5>;
+               };
+
+               fan1-presence {
+                       label = "fan1-presence";
+                       gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
+                       linux,code = <6>;
+               };
+
+               fan2-presence {
+                       label = "fan2-presence";
+                       gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
+                       linux,code = <7>;
+               };
+
+               fan3-presence {
+                       label = "fan3-presence";
+                       gpios = <&pca0 8 GPIO_ACTIVE_LOW>;
+                       linux,code = <8>;
+               };
+
+               fanboost-presence {
+                       label = "fanboost-presence";
+                       gpios = <&pca0 9 GPIO_ACTIVE_LOW>;
+                       linux,code = <9>;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               fan0 {
+                       retain-state-shutdown;
+                       default-state = "keep";
+                       gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
+               };
+
+               fan1 {
+                       retain-state-shutdown;
+                       default-state = "keep";
+                       gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
+               };
+
+               fan2 {
+                       retain-state-shutdown;
+                       default-state = "keep";
+                       gpios = <&pca0 2 GPIO_ACTIVE_LOW>;
+               };
+
+               fan3 {
+                       retain-state-shutdown;
+                       default-state = "keep";
+                       gpios = <&pca0 3 GPIO_ACTIVE_LOW>;
+               };
+
+               fanboost {
+                       retain-state-shutdown;
+                       default-state = "keep";
+                       gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
+               };
+
+               front-fault {
+                       retain-state-shutdown;
+                       default-state = "keep";
+                       gpios = <&pca1 2 GPIO_ACTIVE_LOW>;
+               };
+
+               front-power {
+                       retain-state-shutdown;
+                       default-state = "keep";
+                       gpios = <&pca1 3 GPIO_ACTIVE_LOW>;
+               };
+
+               front-id {
+                       retain-state-shutdown;
+                       default-state = "keep";
+                       gpios = <&pca1 0 GPIO_ACTIVE_LOW>;
+               };
+
+               rear-fault {
+                       gpios = <&gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>;
+               };
+
+               rear-id {
+                       gpios = <&gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_LOW>;
+               };
+       };
+
+       fsi: gpio-fsi {
+               compatible = "fsi-master-gpio", "fsi-master";
+               #address-cells = <2>;
+               #size-cells = <0>;
+               no-gpio-delays;
+
+               clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
+               data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>;
+               mux-gpios = <&gpio ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
+               enable-gpios = <&gpio ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
+               trans-gpios = <&gpio ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
+       };
+
+       iio-hwmon-dps310 {
+               compatible = "iio-hwmon";
+               io-channels = <&dps 0>;
+       };
+
+};
+
+&fmc {
+       status = "okay";
+
+       flash@0 {
+               status = "okay";
+               label = "bmc";
+               m25p,fast-read;
+               spi-max-frequency = <100000000>;
+               partitions {
+                       #address-cells = < 1 >;
+                       #size-cells = < 1 >;
+                       compatible = "fixed-partitions";
+                       u-boot@0 {
+                               reg = < 0 0x60000 >;
+                               label = "u-boot";
+                       };
+                       u-boot-env@60000 {
+                               reg = < 0x60000 0x20000 >;
+                               label = "u-boot-env";
+                       };
+                       obmc-ubi@80000 {
+                               reg = < 0x80000 0x7F80000>;
+                               label = "obmc-ubi";
+                       };
+               };
+       };
+
+       flash@1 {
+               status = "okay";
+               label = "alt-bmc";
+               m25p,fast-read;
+               spi-max-frequency = <100000000>;
+               partitions {
+                       #address-cells = < 1 >;
+                       #size-cells = < 1 >;
+                       compatible = "fixed-partitions";
+                       u-boot@0 {
+                               reg = < 0 0x60000 >;
+                               label = "alt-u-boot";
+                       };
+                       u-boot-env@60000 {
+                               reg = < 0x60000 0x20000 >;
+                               label = "alt-u-boot-env";
+                       };
+                       obmc-ubi@80000 {
+                               reg = < 0x80000 0x7F80000>;
+                               label = "alt-obmc-ubi";
+                       };
+               };
+       };
+};
+
+&spi1 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_spi1_default>;
+
+       flash@0 {
+               status = "okay";
+               label = "pnor";
+               m25p,fast-read;
+               spi-max-frequency = <100000000>;
+       };
+};
+
+&uart1 {
+       /* Rear RS-232 connector */
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_txd1_default
+                       &pinctrl_rxd1_default
+                       &pinctrl_nrts1_default
+                       &pinctrl_ndtr1_default
+                       &pinctrl_ndsr1_default
+                       &pinctrl_ncts1_default
+                       &pinctrl_ndcd1_default
+                       &pinctrl_nri1_default>;
+};
+
+&uart2 {
+       /* APSS */
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
+};
+
+&uart5 {
+       status = "okay";
+};
+
+&lpc_ctrl {
+       status = "okay";
+       memory-region = <&flash_memory>;
+       flash = <&spi1>;
+};
+
+&mac0 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_rmii1_default>;
+       use-ncsi;
+};
+
+&i2c2 {
+       status = "okay";
+
+       /* MUX ->
+        *    Samtec 1
+        *    Samtec 2
+        */
+};
+
+&i2c3 {
+       status = "okay";
+
+       max31785@52 {
+               compatible = "maxim,max31785a";
+               reg = <0x52>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               fan@0 {
+                       compatible = "pmbus-fan";
+                       reg = <0>;
+                       tach-pulses = <2>;
+                       maxim,fan-rotor-input = "tach";
+                       maxim,fan-pwm-freq = <25000>;
+                       maxim,fan-no-watchdog;
+                       maxim,fan-no-fault-ramp;
+                       maxim,fan-ramp = <2>;
+                       maxim,fan-fault-pin-mon;
+               };
+
+               fan@1 {
+                       compatible = "pmbus-fan";
+                       reg = <1>;
+                       tach-pulses = <2>;
+                       maxim,fan-rotor-input = "tach";
+                       maxim,fan-pwm-freq = <25000>;
+                       maxim,fan-no-watchdog;
+                       maxim,fan-no-fault-ramp;
+                       maxim,fan-ramp = <2>;
+                       maxim,fan-fault-pin-mon;
+               };
+
+               fan@2 {
+                       compatible = "pmbus-fan";
+                       reg = <2>;
+                       tach-pulses = <2>;
+                       maxim,fan-rotor-input = "tach";
+                       maxim,fan-pwm-freq = <25000>;
+                       maxim,fan-no-watchdog;
+                       maxim,fan-no-fault-ramp;
+                       maxim,fan-ramp = <2>;
+                       maxim,fan-fault-pin-mon;
+               };
+
+               fan@3 {
+                       compatible = "pmbus-fan";
+                       reg = <3>;
+                       tach-pulses = <2>;
+                       maxim,fan-rotor-input = "tach";
+                       maxim,fan-pwm-freq = <25000>;
+                       maxim,fan-no-watchdog;
+                       maxim,fan-no-fault-ramp;
+                       maxim,fan-ramp = <2>;
+                       maxim,fan-fault-pin-mon;
+               };
+
+               fan@4 {
+                       compatible = "pmbus-fan";
+                       reg = <4>;
+                       tach-pulses = <2>;
+                       maxim,fan-rotor-input = "tach";
+                       maxim,fan-pwm-freq = <25000>;
+                       maxim,fan-no-watchdog;
+                       maxim,fan-no-fault-ramp;
+                       maxim,fan-ramp = <2>;
+                       maxim,fan-fault-pin-mon;
+               };
+       };
+
+       pca0: pca9552@60 {
+               compatible = "nxp,pca9552";
+               reg = <0x60>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               gpio-controller;
+               #gpio-cells = <2>;
+
+               gpio@0 {
+                       reg = <0>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@1 {
+                       reg = <1>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@2 {
+                       reg = <2>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@3 {
+                       reg = <3>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@4 {
+                       reg = <4>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@5 {
+                       reg = <5>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@6 {
+                       reg = <6>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@7 {
+                       reg = <7>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@8 {
+                       reg = <8>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@9 {
+                       reg = <9>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@10 {
+                       reg = <10>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@11 {
+                       reg = <11>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@12 {
+                       reg = <12>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@13 {
+                       reg = <13>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@14 {
+                       reg = <14>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@15 {
+                       reg = <15>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+       };
+
+       power-supply@68 {
+               compatible = "ibm,cffps1";
+               reg = <0x68>;
+       };
+
+       eeprom@50 {
+               compatible = "atmel,24c64";
+               reg = <0x50>;
+       };
+
+       power-supply@69 {
+               compatible = "ibm,cffps1";
+               reg = <0x69>;
+       };
+
+       eeprom@51 {
+               compatible = "atmel,24c64";
+               reg = <0x51>;
+       };
+};
+
+&i2c7 {
+       status = "okay";
+
+       dps: dps310@76 {
+               compatible = "infineon,dps310";
+               reg = <0x76>;
+               #io-channel-cells = <0>;
+       };
+
+       tmp275@48 {
+               compatible = "ti,tmp275";
+               reg = <0x48>;
+       };
+
+       si7021a20@20 {
+               compatible = "si,si7021a20";
+               reg = <0x20>;
+       };
+
+       eeprom@50 {
+               compatible = "atmel,24c64";
+               reg = <0x50>;
+       };
+
+       pca1: pca9551@60 {
+               compatible = "nxp,pca9551";
+               reg = <0x60>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               gpio-controller;
+               #gpio-cells = <2>;
+
+               gpio@0 {
+                       reg = <0>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@1 {
+                       reg = <1>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@2 {
+                       reg = <2>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@3 {
+                       reg = <3>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@4 {
+                       reg = <4>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@5 {
+                       reg = <5>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@6 {
+                       reg = <6>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@7 {
+                       reg = <7>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+       };
+};
+
+&i2c8 {
+       status = "okay";
+
+       pca9552: pca9552@60 {
+               compatible = "nxp,pca9552";
+               reg = <0x60>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               gpio-controller;
+               #gpio-cells = <2>;
+
+               gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N",
+                       "GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF",
+                       "GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF",
+                       "P9_SCM0_PRES", "P9_SCM1_PRES",
+                       "GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF",
+                       "GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF",
+                       "PRESENT_VRM_CP0_N", "PRESENT_VRM_CP1_N",
+                       "12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N";
+
+               gpio@0 {
+                       reg = <0>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@1 {
+                       reg = <1>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@2 {
+                       reg = <2>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@3 {
+                       reg = <3>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@4 {
+                       reg = <4>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@5 {
+                       reg = <5>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@6 {
+                       reg = <6>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@7 {
+                       reg = <7>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@8 {
+                       reg = <8>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@9 {
+                       reg = <9>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@10 {
+                       reg = <10>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@11 {
+                       reg = <11>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@12 {
+                       reg = <12>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@13 {
+                       reg = <13>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@14 {
+                       reg = <14>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+
+               gpio@15 {
+                       reg = <15>;
+                       type = <PCA955X_TYPE_GPIO>;
+               };
+       };
+
+       rtc@32 {
+               compatible = "epson,rx8900";
+               reg = <0x32>;
+       };
+
+       eeprom@51 {
+               compatible = "atmel,24c64";
+               reg = <0x51>;
+       };
+
+       ucd90160@64 {
+               compatible = "ti,ucd90160";
+               reg = <0x64>;
+       };
+};
+
+&i2c9 {
+       status = "okay";
+
+       eeprom@50 {
+               compatible = "atmel,24c64";
+               reg = <0x50>;
+       };
+
+       tmp423a@4c {
+               compatible = "ti,tmp423";
+               reg = <0x4c>;
+       };
+
+       ir35221@71 {
+               compatible = "infineon,ir35221";
+               reg = <0x71>;
+       };
+
+       ir35221@72 {
+               compatible = "infineon,ir35221";
+               reg = <0x72>;
+       };
+
+       pca2: pca9539@74 {
+               compatible = "nxp,pca9539";
+               reg = <0x74>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               gpio-controller;
+               #gpio-cells = <2>;
+
+               gpio@0 {
+                       reg = <0>;
+               };
+
+               gpio@1 {
+                       reg = <1>;
+               };
+
+               gpio@2 {
+                       reg = <2>;
+               };
+
+               gpio@3 {
+                       reg = <3>;
+               };
+
+               gpio@4 {
+                       reg = <4>;
+               };
+
+               gpio@5 {
+                       reg = <5>;
+               };
+
+               gpio@6 {
+                       reg = <6>;
+               };
+
+               gpio@7 {
+                       reg = <7>;
+               };
+
+               gpio@8 {
+                       reg = <8>;
+               };
+
+               gpio@9 {
+                       reg = <9>;
+               };
+
+               gpio@10 {
+                       reg = <10>;
+               };
+
+               gpio@11 {
+                       reg = <11>;
+               };
+
+               gpio@12 {
+                       reg = <12>;
+               };
+
+               gpio@13 {
+                       reg = <13>;
+               };
+
+               gpio@14 {
+                       reg = <14>;
+               };
+
+               gpio@15 {
+                       reg = <15>;
+               };
+       };
+};
+
+&i2c10 {
+       status = "okay";
+
+       eeprom@50 {
+               compatible = "atmel,24c64";
+               reg = <0x50>;
+       };
+
+       tmp423a@4c {
+               compatible = "ti,tmp423";
+               reg = <0x4c>;
+       };
+
+       ir35221@71 {
+               compatible = "infineon,ir35221";
+               reg = <0x71>;
+       };
+
+       ir35221@72 {
+               compatible = "infineon,ir35221";
+               reg = <0x72>;
+       };
+
+       pca3: pca9539@74 {
+               compatible = "nxp,pca9539";
+               reg = <0x74>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               gpio-controller;
+               #gpio-cells = <2>;
+
+               gpio@0 {
+                       reg = <0>;
+               };
+
+               gpio@1 {
+                       reg = <1>;
+               };
+
+               gpio@2 {
+                       reg = <2>;
+               };
+
+               gpio@3 {
+                       reg = <3>;
+               };
+
+               gpio@4 {
+                       reg = <4>;
+               };
+
+               gpio@5 {
+                       reg = <5>;
+               };
+
+               gpio@6 {
+                       reg = <6>;
+               };
+
+               gpio@7 {
+                       reg = <7>;
+               };
+
+               gpio@8 {
+                       reg = <8>;
+               };
+
+               gpio@9 {
+                       reg = <9>;
+               };
+
+               gpio@10 {
+                       reg = <10>;
+               };
+
+               gpio@11 {
+                       reg = <11>;
+               };
+
+               gpio@12 {
+                       reg = <12>;
+               };
+
+               gpio@13 {
+                       reg = <13>;
+               };
+
+               gpio@14 {
+                       reg = <14>;
+               };
+
+               gpio@15 {
+                       reg = <15>;
+               };
+       };
+};
+
+&i2c11 {
+       /* MUX
+        *   -> PCIe Slot 0
+        *   -> PCIe Slot 1
+        *   -> PCIe Slot 2
+        *   -> PCIe Slot 3
+        */
+       status = "okay";
+};
+
+&i2c12 {
+       status = "okay";
+
+       tmp275@48 {
+               compatible = "ti,tmp275";
+               reg = <0x48>;
+       };
+
+       tmp275@4a {
+               compatible = "ti,tmp275";
+               reg = <0x4a>;
+       };
+};
+
+&i2c13 {
+       status = "okay";
+};
+
+&vuart {
+       status = "okay";
+};
+
+&gfx {
+       status = "okay";
+       memory-region = <&gfx_memory>;
+};
+
+&pinctrl {
+       aspeed,external-nodes = <&gfx &lhc>;
+};
+
+&wdt1 {
+       aspeed,reset-type = "none";
+       aspeed,external-signal;
+       aspeed,ext-push-pull;
+       aspeed,ext-active-high;
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_wdtrst1_default>;
+};
+
+&wdt2 {
+       aspeed,alt-boot;
+};
+
+&ibt {
+       status = "okay";
+};
+
+&adc {
+       status = "okay";
+};
+
+#include "ibm-power9-dual.dtsi"
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts b/arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts
new file mode 100644 (file)
index 0000000..0b9e29c
--- /dev/null
@@ -0,0 +1,224 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright 2019 YADRO
+/dts-v1/;
+
+#include "aspeed-g4.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+
+/ {
+       model = "Vesnin BMC";
+       compatible = "yadro,vesnin-bmc", "aspeed,ast2400";
+
+       chosen {
+               stdout-path = &uart5;
+               bootargs = "console=ttyS4,115200 earlyprintk";
+       };
+
+       memory {
+               reg = <0x40000000 0x20000000>;
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               vga_memory: framebuffer@5f000000 {
+                       no-map;
+                       reg = <0x5f000000 0x01000000>; /* 16MB */
+               };
+               flash_memory: region@5c000000 {
+                       no-map;
+                       reg = <0x5c000000 0x02000000>; /* 32M */
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               heartbeat {
+                       gpios = <&gpio ASPEED_GPIO(R, 4) GPIO_ACTIVE_LOW>;
+               };
+               power_red {
+                       gpios = <&gpio ASPEED_GPIO(N, 1) GPIO_ACTIVE_LOW>;
+               };
+
+               id_blue {
+                       gpios = <&gpio ASPEED_GPIO(O, 0) GPIO_ACTIVE_LOW>;
+               };
+
+               alarm_red {
+                       gpios = <&gpio ASPEED_GPIO(N, 6) GPIO_ACTIVE_LOW>;
+               };
+
+               alarm_yel {
+                       gpios = <&gpio ASPEED_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys";
+
+               button_checkstop {
+                       label = "checkstop";
+                       linux,code = <74>;
+                       gpios = <&gpio ASPEED_GPIO(P, 5) GPIO_ACTIVE_LOW>;
+               };
+
+               button_identify {
+                       label = "identify";
+                       linux,code = <152>;
+                       gpios = <&gpio ASPEED_GPIO(O, 7) GPIO_ACTIVE_LOW>;
+               };
+       };
+};
+
+&fmc {
+       status = "okay";
+       flash@0 {
+               status = "okay";
+               m25p,fast-read;
+        label = "bmc";
+#include "openbmc-flash-layout.dtsi"
+       };
+};
+
+&spi {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_spi1debug_default>;
+
+       flash@0 {
+               status = "okay";
+               label = "pnor";
+               m25p,fast-read;
+       };
+};
+
+&mac0 {
+       status = "okay";
+
+       use-ncsi;
+       no-hw-checksum;
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_rmii1_default>;
+};
+
+
+&uart5 {
+       status = "okay";
+};
+
+&lpc_ctrl {
+       status = "okay";
+       memory-region = <&flash_memory>;
+       flash = <&spi>;
+};
+
+&ibt {
+       status = "okay";
+};
+
+&uart3 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
+};
+
+&i2c0 {
+       status = "okay";
+
+       eeprom@50 {
+               compatible = "atmel,24c256";
+               reg = <0x50>;
+               pagesize = <64>;
+       };
+};
+
+&i2c1 {
+       status = "okay";
+
+       tmp75@49 {
+               compatible = "ti,tmp75";
+               reg = <0x49>;
+       };
+};
+
+&i2c2 {
+       status = "okay";
+};
+
+&i2c3 {
+       status = "okay";
+};
+
+&i2c4 {
+       status = "okay";
+
+       occ-hwmon@50 {
+               compatible = "ibm,p8-occ-hwmon";
+               reg = <0x50>;
+       };
+};
+
+&i2c5 {
+       status = "okay";
+
+       occ-hwmon@51 {
+               compatible = "ibm,p8-occ-hwmon";
+               reg = <0x51>;
+       };
+};
+
+&i2c6 {
+       status = "okay";
+
+       w83795g@2f {
+               compatible = "nuvoton,w83795g";
+               reg = <0x2f>;
+       };
+};
+
+&i2c7 {
+       status = "okay";
+
+       occ-hwmon@56 {
+               compatible = "ibm,p8-occ-hwmon";
+               reg = <0x56>;
+       };
+};
+
+&i2c9 {
+       status = "okay";
+};
+
+&i2c10 {
+       status = "okay";
+};
+
+&i2c11 {
+       status = "okay";
+
+       occ-hwmon@57 {
+               compatible = "ibm,p8-occ-hwmon";
+               reg = <0x57>;
+       };
+};
+
+&i2c12 {
+       status = "okay";
+
+       rtc@68 {
+               compatible = "maxim,ds3231";
+               reg = <0x68>;
+       };
+};
+
+&i2c13 {
+       status = "okay";
+};
+
+&vuart {
+       status = "okay";
+};
index f1356ca794d8b866cfa41e1d362095c42df2c8ce..31ea34e14c79a2016d7582e2e46e591e0f77d2ae 100644 (file)
                        compatible = "shared-dma-pool";
                        reusable;
                };
+
+               video_engine_memory: jpegbuffer {
+                       size = <0x02000000>;    /* 32MM */
+                       alignment = <0x01000000>;
+                       compatible = "shared-dma-pool";
+                       reusable;
+               };
        };
 
        gpio-keys {
 &vhub {
        status = "okay";
 };
+
+&video {
+       status = "okay";
+       memory-region = <&video_engine_memory>;
+};
+
+#include "ibm-power9-dual.dtsi"
index 2c5aa90a546d7f99e811a2fbd6da567d8c757af1..30624378316dad4415b00efc93372ccc6d14a896 100644 (file)
@@ -7,6 +7,14 @@
        model = "Zaius BMC";
        compatible = "ingrasys,zaius-bmc", "aspeed,ast2500";
 
+       aliases {
+               i2c15 = &i2cpcie0;
+               i2c16 = &i2cpcie1;
+               i2c17 = &i2cpcie2;
+               i2c19 = &i2cpcie3;
+               i2c20 = &i2cpcie4;
+       };
+
        chosen {
                stdout-path = &uart5;
                bootargs = "console=ttyS4,115200 earlyprintk";
                reg = <0x71>;
                #address-cells = <1>;
                #size-cells = <0>;
+
+               i2cpcie0: i2c@0 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0>;
+               };
+               i2cpcie1: i2c@1 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <1>;
+               };
+               i2cpcie2: i2c@2 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <2>;
+               };
+               i2ctpm: i2c@3 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <3>;
+               };
        };
 
        /* MUX1 PCA9546A @71h
                reg = <0x71>;
                #address-cells = <1>;
                #size-cells = <0>;
+
+               i2cpcie3: i2c@0 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                 &nbs