Blackfin: add EVT_OVERRIDE/IPRIO core MMR helpers
authorMike Frysinger <vapier@gentoo.org>
Wed, 28 Jul 2010 19:50:47 +0000 (19:50 +0000)
committerMike Frysinger <vapier@gentoo.org>
Fri, 6 Aug 2010 16:55:54 +0000 (12:55 -0400)
These were partially defined, so fill out the def/cdef pieces properly.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
arch/blackfin/include/asm/cdef_LPBlackfin.h
arch/blackfin/include/asm/def_LPBlackfin.h

index 8778e0f03730fe9a5db7d2d1997e49be7f01b566..6c39d94b44d0c6c9ef7b0b47f27bf0f2a3f3cb6b 100644 (file)
 #define bfin_write_EVT14(val)                bfin_write32(EVT14,val)
 #define bfin_read_EVT15()                    bfin_read32(EVT15)
 #define bfin_write_EVT15(val)                bfin_write32(EVT15,val)
+#define bfin_read_EVT_OVERRIDE()             bfin_read32(EVT_OVERRIDE)
+#define bfin_write_EVT_OVERRIDE(val)         bfin_write32(EVT_OVERRIDE,val)
 #define bfin_read_IMASK()                    bfin_read32(IMASK)
 #define bfin_write_IMASK(val)                bfin_write32(IMASK,val)
 #define bfin_read_IPEND()                    bfin_read32(IPEND)
 #define bfin_write_IPEND(val)                bfin_write32(IPEND,val)
 #define bfin_read_ILAT()                     bfin_read32(ILAT)
 #define bfin_write_ILAT(val)                 bfin_write32(ILAT,val)
+#define bfin_read_IPRIO()                    bfin_read32(IPRIO)
+#define bfin_write_IPRIO(val)                bfin_write32(IPRIO,val)
 
 /*Core Timer Registers*/
 #define bfin_read_TCNTL()                    bfin_read32(TCNTL)
 #define bfin_read_PFCNTR1()                  bfin_read32(PFCNTR1)
 #define bfin_write_PFCNTR1(val)              bfin_write32(PFCNTR1,val)
 
-/*
-#define IPRIO                  0xFFE02110
-*/
-
 #endif                         /* _CDEF_LPBLACKFIN_H */
index 4e562850021c849b1362fafd24ef4a55cc5736b6..e3f0f4c49819e4a0d3823d6344f71fbf61a2ffc6 100644 (file)
 #define EVT13              0xFFE02034  /* Event Vector 13 ESR Address */
 #define EVT14              0xFFE02038  /* Event Vector 14 ESR Address */
 #define EVT15              0xFFE0203C  /* Event Vector 15 ESR Address */
+#define EVT_OVERRIDE       0xFFE02100  /* Event Vector Override Register */
 #define IMASK              0xFFE02104  /* Interrupt Mask Register */
 #define IPEND              0xFFE02108  /* Interrupt Pending Register */
 #define ILAT               0xFFE0210C  /* Interrupt Latch Register */