Merge branch 'devel-stable' into devel
authorRussell King <rmk+kernel@arm.linux.org.uk>
Mon, 17 May 2010 16:24:04 +0000 (17:24 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Mon, 17 May 2010 16:24:04 +0000 (17:24 +0100)
Conflicts:
arch/arm/Kconfig
arch/arm/include/asm/system.h
arch/arm/mm/Kconfig

26 files changed:
1  2 
MAINTAINERS
arch/arm/Kconfig
arch/arm/Makefile
arch/arm/common/clkdev.c
arch/arm/include/asm/system.h
arch/arm/kernel/smp.c
arch/arm/mach-at91/Makefile
arch/arm/mach-integrator/cpu.c
arch/arm/mach-integrator/impd1.c
arch/arm/mach-integrator/integrator_cp.c
arch/arm/mach-integrator/pci_v3.c
arch/arm/mach-iop32x/n2100.c
arch/arm/mach-omap2/devices.c
arch/arm/mach-omap2/omap_hwmod.c
arch/arm/mach-realview/core.c
arch/arm/mach-u300/mmc.c
arch/arm/mach-versatile/core.c
arch/arm/mm/Kconfig
arch/arm/mm/alignment.c
arch/arm/mm/cache-l2x0.c
arch/arm/mm/fault-armv.c
arch/arm/mm/init.c
arch/arm/mm/mmu.c
arch/arm/plat-nomadik/gpio.c
arch/arm/plat-pxa/Makefile
drivers/usb/gadget/at91_udc.c

diff --cc MAINTAINERS
Simple merge
index 2b3157b5089afeb5870aa1150c7213e7072a2eb6,ae0ecdaf353ccc6d108e59ffe73348dfe5e5b2c0..492f8134490003e1a67c89fbb2bc88254c0b7051
@@@ -239,8 -253,7 +239,9 @@@ config ARCH_REALVIE
        select GENERIC_TIME
        select GENERIC_CLOCKEVENTS
        select ARCH_WANT_OPTIONAL_GPIOLIB
 +      select PLAT_VERSATILE
 +      select ARM_TIMER_SP804
+       select GPIO_PL061 if GPIOLIB
        help
          This enables support for ARM Ltd RealView boards.
  
Simple merge
Simple merge
index 02f5d99adbc04de0562178f76f16a39fdda9053a,4ace45ec3ef84f5d15d72db4b96f89a5e87fa3be..5f4f48002734c2aa173ed8b8c0cd2294b64a8250
@@@ -137,10 -139,12 +139,12 @@@ extern unsigned int user_debug
  #define dmb() __asm__ __volatile__ ("" : : : "memory")
  #endif
  
- #if defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP)
- #define mb()          dmb()
+ #ifdef CONFIG_ARCH_HAS_BARRIERS
+ #include <mach/barriers.h>
 -#elif __LINUX_ARM_ARCH__ >= 7 || defined(CONFIG_SMP)
++#elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP)
+ #define mb()          do { dsb(); outer_sync(); } while (0)
  #define rmb()         dmb()
- #define wmb()         dmb()
+ #define wmb()         mb()
  #else
  #define mb()  do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
  #define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0)
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
index 60baba65635e5ad9d4e67aae93402f9bc8e3e39b,3b1a4ee01815044b965f109745e4d358c5d98c7c..3dff8641b03fa7a639d5f886345dad1e84706445
  #include <linux/amba/clcd.h>
  #include <linux/amba/pl061.h>
  #include <linux/amba/mmci.h>
 -#include <linux/clocksource.h>
 -#include <linux/clockchips.h>
 -#include <linux/cnt32_to_63.h>
  #include <linux/io.h>
+ #include <linux/gfp.h>
  
  #include <asm/clkdev.h>
  #include <asm/system.h>
index 33027301639ebf840f5344a3d42c4be1a416bd63,3e62aae2225aabc6e642def4dc82bdb25a7dd6ad..346ae14824a5ea96365f6e9b66fa8f78cd8cd4bc
@@@ -754,10 -762,10 +762,11 @@@ config CACHE_FEROCEON_L2_WRITETHROUG
  config CACHE_L2X0
        bool "Enable the L2x0 outer cache controller"
        depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
 -                 REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || ARCH_NOMADIK || ARCH_OMAP4
 +                 REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || \
 +                 ARCH_NOMADIK || ARCH_OMAP4 || ARCH_U8500 || ARCH_VEXPRESS_CA9X4
        default y
        select OUTER_CACHE
+       select OUTER_CACHE_SYNC
        help
          This option enables the L2x0 PrimeCell.
  
@@@ -783,21 -791,8 +792,27 @@@ config ARM_L1_CACHE_SHIF
        default 6 if ARM_L1_CACHE_SHIFT_6
        default 5
  
 +config ARM_DMA_MEM_BUFFERABLE
 +      bool "Use non-cacheable memory for DMA" if CPU_V6 && !CPU_V7
 +      default y if CPU_V6 || CPU_V7
 +      help
 +        Historically, the kernel has used strongly ordered mappings to
 +        provide DMA coherent memory.  With the advent of ARMv7, mapping
 +        memory with differing types results in unpredictable behaviour,
 +        so on these CPUs, this option is forced on.
 +
 +        Multiple mappings with differing attributes is also unpredictable
 +        on ARMv6 CPUs, but since they do not have aggressive speculative
 +        prefetch, no harm appears to occur.
 +
 +        However, drivers may be missing the necessary barriers for ARMv6,
 +        and therefore turning this on may result in unpredictable driver
 +        behaviour.  Therefore, we offer this as an option.
 +
 +        You are recommended say 'Y' here and debug any affected drivers.
++
+ config ARCH_HAS_BARRIERS
+       bool
+       help
+         This option allows the use of custom mandatory barriers
+         included via the mach/barriers.h file.
Simple merge
index 78f0fc8595e2bb4b21a39bb6af0155fef93e6bf9,21ad68ba22bab8a3acd859cbba4df0fc36c93b72..9819869d2bc90954967a5a1ca0e636c883c09e2f
@@@ -252,8 -234,7 +261,9 @@@ void __init l2x0_init(void __iomem *bas
        outer_cache.inv_range = l2x0_inv_range;
        outer_cache.clean_range = l2x0_clean_range;
        outer_cache.flush_range = l2x0_flush_range;
+       outer_cache.sync = l2x0_cache_sync;
  
 -      printk(KERN_INFO "L2X0 cache controller enabled\n");
 +      printk(KERN_INFO "%s cache controller enabled\n", type);
 +      printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x\n",
 +                       ways, cache_id, aux);
  }
Simple merge
index 105d1d4f420b78a48bfa91eada3c7e64b75f909e,0ed29bfeba1cc0d6896fe3877e8653c26d1867f8..1ba6cf5a2c025b3dd22c84e0b190455e8c574ab3
@@@ -15,7 -15,9 +15,8 @@@
  #include <linux/mman.h>
  #include <linux/nodemask.h>
  #include <linux/initrd.h>
 -#include <linux/sort.h>
  #include <linux/highmem.h>
+ #include <linux/gfp.h>
  
  #include <asm/mach-types.h>
  #include <asm/sections.h>
Simple merge
Simple merge
Simple merge
Simple merge