drm/amd/powerplay: force to update all clock tables on OD reset

On OD reset, the clock tables in SMU need to be reset to default.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
index 346cf61d55f644781fb5111aa7a86bc7509cf82e..b298aba1206beff0b49ffed80f7bd9dcae9e3e70 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
@@ -5176,6 +5176,10 @@ static int vega10_odn_edit_dpm_table(struct pp_hwmgr *hwmgr,
                memcpy(&(data->dpm_table), &(data->golden_dpm_table), sizeof(struct vega10_dpm_table));
                vega10_odn_initial_default_setting(hwmgr);
                vega10_odn_update_power_state(hwmgr);
+               /* force to update all clock tables */
+               data->need_update_dpm_table = DPMTABLE_UPDATE_SCLK |
+                                             DPMTABLE_UPDATE_MCLK |
+                                             DPMTABLE_UPDATE_SOCCLK;
                return 0;
        } else if (PP_OD_COMMIT_DPM_TABLE == type) {
                vega10_check_dpm_table_updated(hwmgr);