Merge tag 'drm-intel-next-fixes-2018-02-07' of git://anongit.freedesktop.org/drm...
authorDave Airlie <airlied@redhat.com>
Wed, 7 Feb 2018 22:21:37 +0000 (08:21 +1000)
committerDave Airlie <airlied@redhat.com>
Wed, 7 Feb 2018 22:21:37 +0000 (08:21 +1000)
Fix for pcode timeouts on BXT and GLK, cmdparser fixes and fixes
for new vbt version on CFL and CNL.

GVT contains vGPU reset enhancement, which refines vGPU reset flow
and the support of virtual aperture read/write when x-no-mmap=on
is set in KVM, which is required by a test case from Redhat and
also another fix for virtual OpRegion.

* tag 'drm-intel-next-fixes-2018-02-07' of git://anongit.freedesktop.org/drm/drm-intel:
  drm/i915/bios: add DP max link rate to VBT child device struct
  drm/i915/cnp: Properly handle VBT ddc pin out of bounds.
  drm/i915/cnp: Ignore VBT request for know invalid DDC pin.
  drm/i915/cmdparser: Do not check past the cmd length.
  drm/i915/cmdparser: Check reg_table_count before derefencing.
  drm/i915/bxt, glk: Increase PCODE timeouts during CDCLK freq changing
  drm/i915/gvt: Use KVM r/w to access guest opregion
  drm/i915/gvt: Fix aperture read/write emulation when enable x-no-mmap=on
  drm/i915/gvt: only reset execlist state of one engine during VM engine reset
  drm/i915/gvt: refine intel_vgpu_submission_ops as per engine ops

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
drivers/gpu/drm/amd/amdgpu/vega10_ih.c
drivers/gpu/drm/amd/amdgpu/vi.c
drivers/gpu/drm/radeon/radeon_uvd.c
drivers/gpu/drm/ttm/ttm_bo.c
drivers/gpu/drm/ttm/ttm_bo_vm.c

index bb40d2529a307eb9f71973e1d0628e3766da984c..239bf2a4b3c68be7bfd09510a7196e1967cd8326 100644 (file)
@@ -179,8 +179,12 @@ static int amdgpu_gfx_kiq_acquire(struct amdgpu_device *adev,
 
                amdgpu_gfx_bit_to_queue(adev, queue_bit, &mec, &pipe, &queue);
 
-               /* Using pipes 2/3 from MEC 2 seems cause problems */
-               if (mec == 1 && pipe > 1)
+               /*
+                * 1. Using pipes 2/3 from MEC 2 seems cause problems.
+                * 2. It must use queue id 0, because CGPG_IDLE/SAVE/LOAD/RUN
+                * only can be issued on queue 0.
+                */
+               if ((mec == 1 && pipe > 1) || queue != 0)
                        continue;
 
                ring->me = mec + 1;
index 6fc16eecf2dce5fc448afaa1681fbb086259ea35..5afbc5e714d0849b43389d6c0cd8e360d4c72b47 100644 (file)
@@ -2262,12 +2262,12 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
 {
        const unsigned align = min(AMDGPU_VM_PTB_ALIGN_SIZE,
                AMDGPU_VM_PTE_COUNT(adev) * 8);
+       uint64_t init_pde_value = 0, flags;
        unsigned ring_instance;
        struct amdgpu_ring *ring;
        struct drm_sched_rq *rq;
+       unsigned long size;
        int r, i;
-       u64 flags;
-       uint64_t init_pde_value = 0;
 
        vm->va = RB_ROOT_CACHED;
        for (i = 0; i < AMDGPU_MAX_VMHUBS; i++)
@@ -2318,29 +2318,21 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
                flags |= (AMDGPU_GEM_CREATE_NO_CPU_ACCESS |
                                AMDGPU_GEM_CREATE_SHADOW);
 
-       r = amdgpu_bo_create(adev,
-                            amdgpu_vm_bo_size(adev, adev->vm_manager.root_level),
-                            align, true,
-                            AMDGPU_GEM_DOMAIN_VRAM,
-                            flags,
-                            NULL, NULL, init_pde_value, &vm->root.base.bo);
+       size = amdgpu_vm_bo_size(adev, adev->vm_manager.root_level);
+       r = amdgpu_bo_create(adev, size, align, true, AMDGPU_GEM_DOMAIN_VRAM,
+                            flags, NULL, NULL, init_pde_value,
+                            &vm->root.base.bo);
        if (r)
                goto error_free_sched_entity;
 
+       r = amdgpu_bo_reserve(vm->root.base.bo, true);
+       if (r)
+               goto error_free_root;
+
        vm->root.base.vm = vm;
        list_add_tail(&vm->root.base.bo_list, &vm->root.base.bo->va);
-       INIT_LIST_HEAD(&vm->root.base.vm_status);
-
-       if (vm->use_cpu_for_update) {
-               r = amdgpu_bo_reserve(vm->root.base.bo, false);
-               if (r)
-                       goto error_free_root;
-
-               r = amdgpu_bo_kmap(vm->root.base.bo, NULL);
-               amdgpu_bo_unreserve(vm->root.base.bo);
-               if (r)
-                       goto error_free_root;
-       }
+       list_add_tail(&vm->root.base.vm_status, &vm->evicted);
+       amdgpu_bo_unreserve(vm->root.base.bo);
 
        if (pasid) {
                unsigned long flags;
index b69ceafb78883e648609dab5927ed7049c720690..ee14d78be2a9000689359f0e21e42c3cfc60f6a4 100644 (file)
@@ -278,9 +278,9 @@ static bool vega10_ih_prescreen_iv(struct amdgpu_device *adev)
        /* Track retry faults in per-VM fault FIFO. */
        spin_lock(&adev->vm_manager.pasid_lock);
        vm = idr_find(&adev->vm_manager.pasid_idr, pasid);
-       spin_unlock(&adev->vm_manager.pasid_lock);
-       if (WARN_ON_ONCE(!vm)) {
+       if (!vm) {
                /* VM not found, process it normally */
+               spin_unlock(&adev->vm_manager.pasid_lock);
                amdgpu_ih_clear_fault(adev, key);
                return true;
        }
@@ -288,9 +288,11 @@ static bool vega10_ih_prescreen_iv(struct amdgpu_device *adev)
        r = kfifo_put(&vm->faults, key);
        if (!r) {
                /* FIFO is full. Ignore it until there is space */
+               spin_unlock(&adev->vm_manager.pasid_lock);
                amdgpu_ih_clear_fault(adev, key);
                goto ignore_iv;
        }
+       spin_unlock(&adev->vm_manager.pasid_lock);
 
        /* It's the first fault for this address, process it normally */
        return true;
index da2b99c2d95f06953d285b0e6bbd4093e768f423..1e3e05a11f7a47ab476677b00f8731c79608f914 100644 (file)
@@ -1049,7 +1049,6 @@ static int vi_common_early_init(void *handle)
                        AMD_CG_SUPPORT_GFX_CP_LS |
                        AMD_CG_SUPPORT_GFX_CGTS |
                        AMD_CG_SUPPORT_GFX_CGTS_LS |
-                       AMD_CG_SUPPORT_GFX_CGCG |
                        AMD_CG_SUPPORT_GFX_CGLS |
                        AMD_CG_SUPPORT_BIF_LS |
                        AMD_CG_SUPPORT_HDP_MGCG |
index d34d1cf33895766c55a122adad041be62e42c70c..95f4db70dd22322c20c5a289882c3a4ca5eaab54 100644 (file)
@@ -995,7 +995,7 @@ int radeon_uvd_calc_upll_dividers(struct radeon_device *rdev,
                /* calc dclk divider with current vco freq */
                dclk_div = radeon_uvd_calc_upll_post_div(vco_freq, dclk,
                                                         pd_min, pd_even);
-               if (vclk_div > pd_max)
+               if (dclk_div > pd_max)
                        break; /* vco is too big, it has to stop */
 
                /* calc score with current vco freq */
index 893003fc76a14d430f1367f4ef4458b21fcdca3e..2fef09a56d16b62d472b4577fe746a0dff4a2928 100644 (file)
@@ -1727,7 +1727,7 @@ int ttm_bo_swapout(struct ttm_bo_global *glob, struct ttm_operation_ctx *ctx)
        kref_get(&bo->list_kref);
 
        if (!list_empty(&bo->ddestroy)) {
-               ret = ttm_bo_cleanup_refs(bo, false, false, true);
+               ret = ttm_bo_cleanup_refs(bo, false, false, locked);
                kref_put(&bo->list_kref, ttm_bo_release_list);
                return ret;
        }
index 08a3c324242e6fe705dc989e9888ac3b4fa23137..60fcef1593dd643af7c11f7dd546cba8d11d2115 100644 (file)
@@ -316,7 +316,7 @@ static void ttm_bo_vm_close(struct vm_area_struct *vma)
 
 static int ttm_bo_vm_access_kmap(struct ttm_buffer_object *bo,
                                 unsigned long offset,
-                                void *buf, int len, int write)
+                                uint8_t *buf, int len, int write)
 {
        unsigned long page = offset >> PAGE_SHIFT;
        unsigned long bytes_left = len;
@@ -345,6 +345,7 @@ static int ttm_bo_vm_access_kmap(struct ttm_buffer_object *bo,
                ttm_bo_kunmap(&map);
 
                page++;
+               buf += bytes;
                bytes_left -= bytes;
                offset = 0;
        } while (bytes_left);