Merge branch 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm
authorLinus Torvalds <torvalds@linux-foundation.org>
Tue, 12 Sep 2017 13:10:44 +0000 (06:10 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Tue, 12 Sep 2017 13:10:44 +0000 (06:10 -0700)
Pull ARM updates from Russell King:
 "Low priority fixes and updates for ARM:

   - add some missing includes

   - efficiency improvements in system call entry code when tracing is
     enabled

   - ensure ARMv6+ is always built as EABI

   - export save_stack_trace_tsk()

   - fix fatal signal handling during mm fault

   - build translation table base address register from scratch

   - appropriately align the .data section to a word boundary where we
     rely on that data being word aligned"

* 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: 8691/1: Export save_stack_trace_tsk()
  ARM: 8692/1: mm: abort uaccess retries upon fatal signal
  ARM: 8690/1: lpae: build TTB control register value from scratch in v7_ttb_setup
  ARM: align .data section
  ARM: always enable AEABI for ARMv6+
  ARM: avoid saving and restoring registers unnecessarily
  ARM: move PC value into r9
  ARM: obtain thread info structure later
  ARM: use aliases for registers in entry-common
  ARM: 8689/1: scu: add missing errno include
  ARM: 8688/1: pm: add missing types include

20 files changed:
arch/arm/Kconfig
arch/arm/include/asm/smp_scu.h
arch/arm/include/asm/suspend.h
arch/arm/include/debug/omap2plus.S
arch/arm/kernel/entry-armv.S
arch/arm/kernel/entry-common.S
arch/arm/kernel/head.S
arch/arm/kernel/hyp-stub.S
arch/arm/kernel/iwmmxt.S
arch/arm/kernel/sleep.S
arch/arm/kernel/stacktrace.c
arch/arm/mach-exynos/sleep.S
arch/arm/mach-omap2/sleep34xx.S
arch/arm/mach-omap2/sleep44xx.S
arch/arm/mach-pxa/mioa701_bootresume.S
arch/arm/mach-rockchip/sleep.S
arch/arm/mm/cache-v4wb.S
arch/arm/mm/fault.c
arch/arm/mm/proc-v7-3level.S
arch/arm/mm/proc-xscale.S

index f1b3f1d575d47b0b6a19daeaab685daf143f2f44..7888c9803eb00b3ad1d166923182d5d1f4294bda 100644 (file)
@@ -1531,7 +1531,6 @@ config THUMB2_KERNEL
        bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
        depends on (CPU_V7 || CPU_V7M) && !CPU_V6 && !CPU_V6K
        default y if CPU_THUMBONLY
-       select AEABI
        select ARM_ASM_UNIFIED
        select ARM_UNWIND
        help
@@ -1594,7 +1593,8 @@ config ARM_PATCH_IDIV
          code to do integer division.
 
 config AEABI
-       bool "Use the ARM EABI to compile the kernel"
+       bool "Use the ARM EABI to compile the kernel" if !CPU_V7 && !CPU_V7M && !CPU_V6 && !CPU_V6K
+       default CPU_V7 || CPU_V7M || CPU_V6 || CPU_V6K
        help
          This option allows for the kernel to be compiled using the latest
          ARM ABI (aka EABI).  This is only useful if you are using a user
index bfe163c40024de7d6ccc81097451cfc409cc42c8..5983f6bc62d57784b007f3ccad4e80cad47e5828 100644 (file)
@@ -7,6 +7,7 @@
 
 #ifndef __ASSEMBLER__
 
+#include <linux/errno.h>
 #include <asm/cputype.h>
 
 static inline bool scu_a9_has_base(void)
index 6c7182f32cefeb247068e80af9944b4ff01e3727..a61905c86732973665f101be08cffac5a7d4c946 100644 (file)
@@ -1,6 +1,8 @@
 #ifndef __ASM_ARM_SUSPEND_H
 #define __ASM_ARM_SUSPEND_H
 
+#include <linux/types.h>
+
 struct sleep_save_sp {
        u32 *save_ptr_stash;
        u32 save_ptr_stash_phys;
index 8be08d907a16990a3516d32d085188fcc962822b..192a7583999ce7c5ebc26f012342e831d7d657fb 100644 (file)
@@ -22,6 +22,7 @@
 #define UART_OFFSET(addr)      ((addr) & 0x00ffffff)
 
                .pushsection .data
+               .align  2
 omap_uart_phys:        .word   0
 omap_uart_virt:        .word   0
 omap_uart_lsr: .word   0
index c731f0d2b2af1549dea68dcce2035ce398b81604..fbc707626b3e9e6794400e41ba1b08916cdf8d4a 100644 (file)
@@ -721,6 +721,7 @@ do_fpe:
  */
 
        .pushsection .data
+       .align  2
 ENTRY(fp_enter)
        .word   no_fp
        .popsection
@@ -1224,6 +1225,7 @@ vector_addrexcptn:
        W(b)    vector_fiq
 
        .data
+       .align  2
 
        .globl  cr_alignment
 cr_alignment:
index e33c32d561934c36b84d294d85ff27fa05aa0ec2..ca3614dc6938e1595f71a095f53456eb26701bec 100644 (file)
 
 #include "entry-header.S"
 
+saved_psr      .req    r8
+#if defined(CONFIG_TRACE_IRQFLAGS) || defined(CONFIG_CONTEXT_TRACKING)
+saved_pc       .req    r9
+#define TRACE(x...) x
+#else
+saved_pc       .req    lr
+#define TRACE(x...)
+#endif
 
        .align  5
 #if !(IS_ENABLED(CONFIG_TRACE_IRQFLAGS) || IS_ENABLED(CONFIG_CONTEXT_TRACKING))
@@ -146,16 +154,17 @@ ENTRY(vector_swi)
  ARM(  stmdb   r8, {sp, lr}^           )       @ Calling sp, lr
  THUMB(        mov     r8, sp                  )
  THUMB(        store_user_sp_lr r8, r10, S_SP  )       @ calling sp, lr
-       mrs     r8, spsr                        @ called from non-FIQ mode, so ok.
-       str     lr, [sp, #S_PC]                 @ Save calling PC
-       str     r8, [sp, #S_PSR]                @ Save CPSR
+       mrs     saved_psr, spsr                 @ called from non-FIQ mode, so ok.
+ TRACE(        mov     saved_pc, lr            )
+       str     saved_pc, [sp, #S_PC]           @ Save calling PC
+       str     saved_psr, [sp, #S_PSR]         @ Save CPSR
        str     r0, [sp, #S_OLD_R0]             @ Save OLD_R0
 #endif
        zero_fp
        alignment_trap r10, ip, __cr_alignment
-       enable_irq
-       ct_user_exit
-       get_thread_info tsk
+       asm_trace_hardirqs_on save=0
+       enable_irq_notrace
+       ct_user_exit save=0
 
        /*
         * Get the system call number.
@@ -168,11 +177,11 @@ ENTRY(vector_swi)
         * value to determine if it is an EABI or an old ABI call.
         */
 #ifdef CONFIG_ARM_THUMB
-       tst     r8, #PSR_T_BIT
+       tst     saved_psr, #PSR_T_BIT
        movne   r10, #0                         @ no thumb OABI emulation
- USER( ldreq   r10, [lr, #-4]          )       @ get SWI instruction
+ USER( ldreq   r10, [saved_pc, #-4]    )       @ get SWI instruction
 #else
- USER( ldr     r10, [lr, #-4]          )       @ get SWI instruction
+ USER( ldr     r10, [saved_pc, #-4]    )       @ get SWI instruction
 #endif
  ARM_BE8(rev   r10, r10)                       @ little endian instruction
 
@@ -183,15 +192,17 @@ ENTRY(vector_swi)
         */
 #elif defined(CONFIG_ARM_THUMB)
        /* Legacy ABI only, possibly thumb mode. */
-       tst     r8, #PSR_T_BIT                  @ this is SPSR from save_user_regs
+       tst     saved_psr, #PSR_T_BIT           @ this is SPSR from save_user_regs
        addne   scno, r7, #__NR_SYSCALL_BASE    @ put OS number in
- USER( ldreq   scno, [lr, #-4]         )
+ USER( ldreq   scno, [saved_pc, #-4]   )
 
 #else
        /* Legacy ABI only. */
- USER( ldr     scno, [lr, #-4]         )       @ get SWI instruction
+ USER( ldr     scno, [saved_pc, #-4]   )       @ get SWI instruction
 #endif
 
+       /* saved_psr and saved_pc are now dead */
+
        uaccess_disable tbl
 
        adr     tbl, sys_call_table             @ load syscall table pointer
@@ -210,6 +221,12 @@ ENTRY(vector_swi)
        bic     scno, scno, #0xff000000         @ mask off SWI op-code
        eor     scno, scno, #__NR_SYSCALL_BASE  @ check OS number
 #endif
+       get_thread_info tsk
+       /*
+        * Reload the registers that may have been corrupted on entry to
+        * the syscall assembly (by tracing or context tracking.)
+        */
+ TRACE(        ldmia   sp, {r0 - r3}           )
 
 local_restart:
        ldr     r10, [tsk, #TI_FLAGS]           @ check for syscall tracing
@@ -239,8 +256,9 @@ local_restart:
         * current task.
         */
 9001:
-       sub     lr, lr, #4
+       sub     lr, saved_pc, #4
        str     lr, [sp, #S_PC]
+       get_thread_info tsk
        b       ret_fast_syscall
 #endif
 ENDPROC(vector_swi)
index 04286fd9e09ce7a27259c4d375a05a965e3be0ea..6b1148cafffdbe09070f996343287a4db9bb1baa 100644 (file)
@@ -556,6 +556,7 @@ ENDPROC(__fixup_smp)
        .word   __smpalt_end
 
        .pushsection .data
+       .align  2
        .globl  smp_on_up
 smp_on_up:
        ALT_SMP(.long   1)
@@ -716,6 +717,7 @@ ENTRY(fixup_pv_table)
 ENDPROC(fixup_pv_table)
 
        .data
+       .align  2
        .globl  __pv_phys_pfn_offset
        .type   __pv_phys_pfn_offset, %object
 __pv_phys_pfn_offset:
index ec7e7377d423ddd5fa9d0bd3be0b2eb45a26209f..60146e32619a5912bf12b5277397f2e19213b2a8 100644 (file)
@@ -31,6 +31,7 @@
  * zeroing of .bss would clobber it.
  */
 .data
+       .align  2
 ENTRY(__boot_cpu_mode)
        .long   0
 .text
index 49fadbda8c63ab336d205d6fd538a13dc269fb79..81cd4d43b3ec8eded3415dce5e6c5c5d591d9d36 100644 (file)
@@ -367,6 +367,7 @@ ENTRY(iwmmxt_task_release)
 ENDPROC(iwmmxt_task_release)
 
        .data
+       .align  2
 concan_owner:
        .word   0
 
index 0f6c1000582c359881b6985c57d010037cb4ac17..9f08d214d05a91c216abe7542a9bf6340dc0f812 100644 (file)
@@ -171,6 +171,7 @@ mpidr_hash_ptr:
        .long   mpidr_hash - .                  @ mpidr_hash struct offset
 
        .data
+       .align  2
        .type   sleep_save_sp, #object
 ENTRY(sleep_save_sp)
        .space  SLEEP_SAVE_SP_SZ                @ struct sleep_save_sp
index 3a2fa203637a99d8da93962da8e151f07d1bf0fc..65228bf4c6dfee221e4e3a38112c0d59ecda65f9 100644 (file)
@@ -171,6 +171,7 @@ void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace)
 {
        __save_stack_trace(tsk, trace, 1);
 }
+EXPORT_SYMBOL(save_stack_trace_tsk);
 
 void save_stack_trace(struct stack_trace *trace)
 {
index cf950790fbdceb470643b5e8c152394deb2d46e5..4292cae43f3c3ce564dcd1d4a6a8a74cd8239a6e 100644 (file)
@@ -124,6 +124,7 @@ _cp15_save_diag:
 #endif /* CONFIG_CACHE_L2X0 */
 
        .data
+       .align  2
        .globl cp15_save_diag
 cp15_save_diag:
        .long   0       @ cp15 diagnostic
index 1b9f0520dea9154afa31f9668241e03f211fdc6a..fa5fd24f524c5cb233dfb72d73c23929084d7caa 100644 (file)
@@ -530,10 +530,12 @@ l2dis_3630_offset:
        .long   l2dis_3630 - .
 
        .data
+       .align  2
 l2dis_3630:
        .word   0
 
        .data
+       .align  2
 l2_inv_api_params:
        .word   0x1, 0x00
 
index c7a3b4aab4b5441249ddd9a7fdc362ef9370d737..56dfa2d5d0a8fc2b1f6c251f762aec2385464423 100644 (file)
@@ -385,6 +385,7 @@ ppa_zero_params_offset:
 ENDPROC(omap_do_wfi)
 
        .data
+       .align  2
 ppa_zero_params:
        .word           0
 
index 81591491ab947b09f7128fc12e66e14d3d17d77b..42d93f40a59fa9c78a58d365d87fd2d56700174e 100644 (file)
@@ -16,6 +16,7 @@
  *       insist on it to be truly read-only.
  */
        .data
+       .align  2
 ENTRY(mioa701_bootstrap)
 0:
        b       1f
@@ -34,4 +35,5 @@ ENTRY(mioa701_jumpaddr)
 
 ENTRY(mioa701_bootstrap_lg)
        .data
+       .align  2
        .word   2b-0b
index 2eec9a341f05b0a82c73a7d0ec7c16d8f744d39f..9927f06f52fef64263bd1b34c35e5fd856646fda 100644 (file)
@@ -23,7 +23,7 @@
  * ddr to sram for system resumeing.
  * so it is ".data section".
  */
-.align
+       .align  2
 
 ENTRY(rockchip_slp_cpu_resume)
        setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1  @ set svc, irqs off
index 2522f8c8fbb17278195ee0802a821d7aea7e3995..a5084ec70c6e67d75ccad63f8dd255ba0f275e68 100644 (file)
@@ -47,6 +47,7 @@
 #define CACHE_DLIMIT   (CACHE_DSIZE * 4)
 
        .data
+       .align  2
 flush_base:
        .long   FLUSH_BASE
        .text
index ff8b0aa2dfde887f7c48065f84c581c06fe1c4b8..42f585379e19c97fcb6abe1004d9b469f90215ce 100644 (file)
@@ -315,8 +315,11 @@ retry:
         * signal first. We do not need to release the mmap_sem because
         * it would already be released in __lock_page_or_retry in
         * mm/filemap.c. */
-       if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
+       if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current)) {
+               if (!user_mode(regs))
+                       goto no_context;
                return 0;
+       }
 
        /*
         * Major/minor page fault accounting is only done on the
index 5e5720e8bc5f219ebaa138eae369c32cba5b1615..7d16bbc4102bd22569062a50444901a879af2203 100644 (file)
@@ -129,8 +129,7 @@ ENDPROC(cpu_v7_set_pte_ext)
        .macro  v7_ttb_setup, zero, ttbr0l, ttbr0h, ttbr1, tmp
        ldr     \tmp, =swapper_pg_dir           @ swapper_pg_dir virtual address
        cmp     \ttbr1, \tmp, lsr #12           @ PHYS_OFFSET > PAGE_OFFSET?
-       mrc     p15, 0, \tmp, c2, c0, 2         @ TTB control egister
-       orr     \tmp, \tmp, #TTB_EAE
+       mov     \tmp, #TTB_EAE                  @ for TTB control egister
        ALT_SMP(orr     \tmp, \tmp, #TTB_FLAGS_SMP)
        ALT_UP(orr      \tmp, \tmp, #TTB_FLAGS_UP)
        ALT_SMP(orr     \tmp, \tmp, #TTB_FLAGS_SMP << 16)
index b6bbfdb6dfdc3d1681a562ef4eb96f95d33d6b03..3d75b7972fd13500baee28f30c48817428f286e9 100644 (file)
        .endm
 
        .data
+       .align  2
 clean_addr:    .word   CLEAN_ADDR
 
        .text