Merge branch 'for-2.6.25' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus...
authorLinus Torvalds <torvalds@linux-foundation.org>
Thu, 31 Jan 2008 02:37:27 +0000 (13:37 +1100)
committerLinus Torvalds <torvalds@linux-foundation.org>
Thu, 31 Jan 2008 02:37:27 +0000 (13:37 +1100)
* 'for-2.6.25' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (454 commits)
  [POWERPC] Cell IOMMU fixed mapping support
  [POWERPC] Split out the ioid fetching/checking logic
  [POWERPC] Add support to cell_iommu_setup_page_tables() for multiple windows
  [POWERPC] Split out the IOMMU logic from cell_dma_dev_setup()
  [POWERPC] Split cell_iommu_setup_hardware() into two parts
  [POWERPC] Split out the logic that allocates struct iommus
  [POWERPC] Allocate the hash table under 1G on cell
  [POWERPC] Add set_dma_ops() to match get_dma_ops()
  [POWERPC] 83xx: Clean up / convert mpc83xx board DTS files to v1 format.
  [POWERPC] 85xx: Only invalidate TLB0 and TLB1
  [POWERPC] 83xx: Fix typo in mpc837x compatible entries
  [POWERPC] 85xx: convert sbc85* boards to use machine_device_initcall
  [POWERPC] 83xx: rework platform Kconfig
  [POWERPC] 85xx: rework platform Kconfig
  [POWERPC] 86xx: Remove unused IRQ defines
  [POWERPC] QE: Explicitly set address-cells and size cells for muram
  [POWERPC] Convert StorCenter DTS file to /dts-v1/ format.
  [POWERPC] 86xx: Convert all 86xx DTS files to /dts-v1/ format.
  [PPC] Remove 85xx from arch/ppc
  [PPC] Remove 83xx from arch/ppc
  ...

612 files changed:
Documentation/kernel-parameters.txt
Documentation/powerpc/00-INDEX
Documentation/powerpc/booting-without-of.txt
Documentation/powerpc/qe_firmware.txt [new file with mode: 0644]
arch/powerpc/Kconfig
arch/powerpc/Kconfig.debug
arch/powerpc/Makefile
arch/powerpc/boot/.gitignore
arch/powerpc/boot/4xx.c
arch/powerpc/boot/4xx.h
arch/powerpc/boot/Makefile
arch/powerpc/boot/bamboo.c
arch/powerpc/boot/cuboot-52xx.c
arch/powerpc/boot/cuboot-824x.c [new file with mode: 0644]
arch/powerpc/boot/cuboot-83xx.c
arch/powerpc/boot/cuboot-85xx-cpm2.c [new file with mode: 0644]
arch/powerpc/boot/cuboot-85xx.c
arch/powerpc/boot/cuboot-8xx.c
arch/powerpc/boot/cuboot-hpc2.c
arch/powerpc/boot/cuboot-katmai.c [new file with mode: 0644]
arch/powerpc/boot/cuboot-pq2.c
arch/powerpc/boot/cuboot-rainier.c [new file with mode: 0644]
arch/powerpc/boot/cuboot-sequoia.c
arch/powerpc/boot/cuboot-taishan.c [new file with mode: 0644]
arch/powerpc/boot/cuboot-warp.c [new file with mode: 0644]
arch/powerpc/boot/dcr.h
arch/powerpc/boot/devtree.c
arch/powerpc/boot/dtc-src/.gitignore [new file with mode: 0644]
arch/powerpc/boot/dtc-src/Makefile.dtc [new file with mode: 0644]
arch/powerpc/boot/dtc-src/checks.c [new file with mode: 0644]
arch/powerpc/boot/dtc-src/data.c [new file with mode: 0644]
arch/powerpc/boot/dtc-src/dtc-lexer.l [new file with mode: 0644]
arch/powerpc/boot/dtc-src/dtc-lexer.lex.c_shipped [new file with mode: 0644]
arch/powerpc/boot/dtc-src/dtc-parser.tab.c_shipped [new file with mode: 0644]
arch/powerpc/boot/dtc-src/dtc-parser.tab.h_shipped [new file with mode: 0644]
arch/powerpc/boot/dtc-src/dtc-parser.y [new file with mode: 0644]
arch/powerpc/boot/dtc-src/dtc.c [new file with mode: 0644]
arch/powerpc/boot/dtc-src/dtc.h [new file with mode: 0644]
arch/powerpc/boot/dtc-src/flattree.c [new file with mode: 0644]
arch/powerpc/boot/dtc-src/fstree.c [new file with mode: 0644]
arch/powerpc/boot/dtc-src/livetree.c [new file with mode: 0644]
arch/powerpc/boot/dtc-src/srcpos.c [new file with mode: 0644]
arch/powerpc/boot/dtc-src/srcpos.h [new file with mode: 0644]
arch/powerpc/boot/dtc-src/treesource.c [new file with mode: 0644]
arch/powerpc/boot/dtc-src/version_gen.h [new file with mode: 0644]
arch/powerpc/boot/dts/adder875-redboot.dts [new file with mode: 0644]
arch/powerpc/boot/dts/adder875-uboot.dts [new file with mode: 0644]
arch/powerpc/boot/dts/bamboo.dts
arch/powerpc/boot/dts/cm5200.dts [new file with mode: 0644]
arch/powerpc/boot/dts/ebony.dts
arch/powerpc/boot/dts/ep405.dts [new file with mode: 0644]
arch/powerpc/boot/dts/ep8248e.dts [new file with mode: 0644]
arch/powerpc/boot/dts/haleakala.dts [new file with mode: 0644]
arch/powerpc/boot/dts/katmai.dts [new file with mode: 0644]
arch/powerpc/boot/dts/kilauea.dts
arch/powerpc/boot/dts/kuroboxHD.dts
arch/powerpc/boot/dts/kuroboxHG.dts
arch/powerpc/boot/dts/lite5200.dts
arch/powerpc/boot/dts/lite5200b.dts
arch/powerpc/boot/dts/makalu.dts [new file with mode: 0644]
arch/powerpc/boot/dts/motionpro.dts [new file with mode: 0644]
arch/powerpc/boot/dts/mpc8313erdb.dts
arch/powerpc/boot/dts/mpc8315erdb.dts [new file with mode: 0644]
arch/powerpc/boot/dts/mpc832x_mds.dts
arch/powerpc/boot/dts/mpc832x_rdb.dts
arch/powerpc/boot/dts/mpc8349emitx.dts
arch/powerpc/boot/dts/mpc8349emitxgp.dts
arch/powerpc/boot/dts/mpc834x_mds.dts
arch/powerpc/boot/dts/mpc836x_mds.dts
arch/powerpc/boot/dts/mpc8377_mds.dts [new file with mode: 0644]
arch/powerpc/boot/dts/mpc8377_rdb.dts [new file with mode: 0644]
arch/powerpc/boot/dts/mpc8378_mds.dts [new file with mode: 0644]
arch/powerpc/boot/dts/mpc8378_rdb.dts [new file with mode: 0644]
arch/powerpc/boot/dts/mpc8379_mds.dts [new file with mode: 0644]
arch/powerpc/boot/dts/mpc8379_rdb.dts [new file with mode: 0644]
arch/powerpc/boot/dts/mpc8540ads.dts
arch/powerpc/boot/dts/mpc8541cds.dts
arch/powerpc/boot/dts/mpc8544ds.dts
arch/powerpc/boot/dts/mpc8548cds.dts
arch/powerpc/boot/dts/mpc8555cds.dts
arch/powerpc/boot/dts/mpc8560ads.dts
arch/powerpc/boot/dts/mpc8568mds.dts
arch/powerpc/boot/dts/mpc8572ds.dts
arch/powerpc/boot/dts/mpc8610_hpcd.dts
arch/powerpc/boot/dts/mpc8641_hpcn.dts
arch/powerpc/boot/dts/mpc866ads.dts
arch/powerpc/boot/dts/rainier.dts [new file with mode: 0644]
arch/powerpc/boot/dts/sbc8349.dts [new file with mode: 0644]
arch/powerpc/boot/dts/sbc8548.dts [new file with mode: 0644]
arch/powerpc/boot/dts/sbc8560.dts [new file with mode: 0644]
arch/powerpc/boot/dts/sequoia.dts
arch/powerpc/boot/dts/storcenter.dts [new file with mode: 0644]
arch/powerpc/boot/dts/stx_gp3_8560.dts [new file with mode: 0644]
arch/powerpc/boot/dts/taishan.dts [new file with mode: 0644]
arch/powerpc/boot/dts/tqm5200.dts [new file with mode: 0644]
arch/powerpc/boot/dts/tqm8540.dts [new file with mode: 0644]
arch/powerpc/boot/dts/tqm8541.dts [new file with mode: 0644]
arch/powerpc/boot/dts/tqm8555.dts [new file with mode: 0644]
arch/powerpc/boot/dts/tqm8560.dts [new file with mode: 0644]
arch/powerpc/boot/dts/walnut.dts
arch/powerpc/boot/dts/warp.dts [new file with mode: 0644]
arch/powerpc/boot/ebony.c
arch/powerpc/boot/ep405.c [new file with mode: 0644]
arch/powerpc/boot/ep8248e.c [new file with mode: 0644]
arch/powerpc/boot/ep88xc.c
arch/powerpc/boot/flatdevtree.c [deleted file]
arch/powerpc/boot/flatdevtree.h [deleted file]
arch/powerpc/boot/flatdevtree_misc.c [deleted file]
arch/powerpc/boot/holly.c
arch/powerpc/boot/libfdt-wrapper.c [new file with mode: 0644]
arch/powerpc/boot/libfdt/Makefile.libfdt [new file with mode: 0644]
arch/powerpc/boot/libfdt/fdt.c [new file with mode: 0644]
arch/powerpc/boot/libfdt/fdt.h [new file with mode: 0644]
arch/powerpc/boot/libfdt/fdt_ro.c [new file with mode: 0644]
arch/powerpc/boot/libfdt/fdt_rw.c [new file with mode: 0644]
arch/powerpc/boot/libfdt/fdt_strerror.c [new file with mode: 0644]
arch/powerpc/boot/libfdt/fdt_sw.c [new file with mode: 0644]
arch/powerpc/boot/libfdt/fdt_wip.c [new file with mode: 0644]
arch/powerpc/boot/libfdt/libfdt.h [new file with mode: 0644]
arch/powerpc/boot/libfdt/libfdt_internal.h [new file with mode: 0644]
arch/powerpc/boot/libfdt_env.h [new file with mode: 0644]
arch/powerpc/boot/main.c
arch/powerpc/boot/ops.h
arch/powerpc/boot/prpmc2800.c
arch/powerpc/boot/ps3.c
arch/powerpc/boot/redboot-8xx.c [new file with mode: 0644]
arch/powerpc/boot/redboot.h [new file with mode: 0644]
arch/powerpc/boot/reg.h
arch/powerpc/boot/serial.c
arch/powerpc/boot/treeboot-walnut.c
arch/powerpc/boot/wrapper
arch/powerpc/configs/adder875-redboot_defconfig [new file with mode: 0644]
arch/powerpc/configs/adder875-uboot_defconfig [new file with mode: 0644]
arch/powerpc/configs/bamboo_defconfig
arch/powerpc/configs/celleb_defconfig
arch/powerpc/configs/ebony_defconfig
arch/powerpc/configs/ep405_defconfig [new file with mode: 0644]
arch/powerpc/configs/ep8248e_defconfig [new file with mode: 0644]
arch/powerpc/configs/katmai_defconfig [new file with mode: 0644]
arch/powerpc/configs/kilauea_defconfig
arch/powerpc/configs/makalu_defconfig [new file with mode: 0644]
arch/powerpc/configs/mpc5200_defconfig [new file with mode: 0644]
arch/powerpc/configs/mpc8313_rdb_defconfig
arch/powerpc/configs/mpc8315_rdb_defconfig [new file with mode: 0644]
arch/powerpc/configs/mpc834x_itx_defconfig
arch/powerpc/configs/mpc837x_mds_defconfig [new file with mode: 0644]
arch/powerpc/configs/mpc837x_rdb_defconfig [new file with mode: 0644]
arch/powerpc/configs/mpc83xx_defconfig [new file with mode: 0644]
arch/powerpc/configs/mpc85xx_defconfig [new file with mode: 0644]
arch/powerpc/configs/mpc8610_hpcd_defconfig
arch/powerpc/configs/pasemi_defconfig
arch/powerpc/configs/ppc64_defconfig
arch/powerpc/configs/ps3_defconfig
arch/powerpc/configs/rainier_defconfig [new file with mode: 0644]
arch/powerpc/configs/sbc834x_defconfig [new file with mode: 0644]
arch/powerpc/configs/sbc8548_defconfig [moved from arch/ppc/configs/mpc834x_sys_defconfig with 55% similarity]
arch/powerpc/configs/sbc8560_defconfig [new file with mode: 0644]
arch/powerpc/configs/sequoia_defconfig
arch/powerpc/configs/storcenter_defconfig [new file with mode: 0644]
arch/powerpc/configs/stx_gp3_defconfig [moved from arch/ppc/configs/stx_gp3_defconfig with 54% similarity]
arch/powerpc/configs/taishan_defconfig [moved from arch/powerpc/configs/lite5200_defconfig with 68% similarity]
arch/powerpc/configs/tqm8540_defconfig [moved from arch/ppc/configs/TQM8540_defconfig with 66% similarity]
arch/powerpc/configs/tqm8541_defconfig [moved from arch/ppc/configs/TQM8541_defconfig with 65% similarity]
arch/powerpc/configs/tqm8555_defconfig [moved from arch/ppc/configs/TQM8555_defconfig with 65% similarity]
arch/powerpc/configs/tqm8560_defconfig [moved from arch/ppc/configs/TQM8560_defconfig with 66% similarity]
arch/powerpc/configs/walnut_defconfig
arch/powerpc/configs/warp_defconfig [new file with mode: 0644]
arch/powerpc/kernel/Makefile
arch/powerpc/kernel/btext.c
arch/powerpc/kernel/cpu_setup_44x.S
arch/powerpc/kernel/cputable.c
arch/powerpc/kernel/crash.c
arch/powerpc/kernel/dma_64.c
arch/powerpc/kernel/head_44x.S
arch/powerpc/kernel/head_64.S
arch/powerpc/kernel/head_booke.h
arch/powerpc/kernel/head_fsl_booke.S
arch/powerpc/kernel/ibmebus.c
arch/powerpc/kernel/iommu.c
arch/powerpc/kernel/isa-bridge.c
arch/powerpc/kernel/legacy_serial.c
arch/powerpc/kernel/lparcfg.c
arch/powerpc/kernel/misc.S
arch/powerpc/kernel/misc_32.S
arch/powerpc/kernel/misc_64.S
arch/powerpc/kernel/module_32.c
arch/powerpc/kernel/module_64.c
arch/powerpc/kernel/of_device.c
arch/powerpc/kernel/of_platform.c
arch/powerpc/kernel/pci-common.c
arch/powerpc/kernel/pci_32.c
arch/powerpc/kernel/pci_64.c
arch/powerpc/kernel/pci_dn.c
arch/powerpc/kernel/ppc_ksyms.c
arch/powerpc/kernel/prom.c
arch/powerpc/kernel/prom_init.c
arch/powerpc/kernel/prom_parse.c
arch/powerpc/kernel/rio.c [moved from arch/ppc/kernel/rio.c with 100% similarity]
arch/powerpc/kernel/rtas_pci.c
arch/powerpc/kernel/setup-common.c
arch/powerpc/kernel/signal_32.c
arch/powerpc/kernel/smp.c
arch/powerpc/kernel/systbl_chk.c [new file with mode: 0644]
arch/powerpc/kernel/systbl_chk.sh [new file with mode: 0644]
arch/powerpc/kernel/time.c
arch/powerpc/kernel/traps.c
arch/powerpc/kernel/udbg.c
arch/powerpc/kernel/udbg_16550.c
arch/powerpc/math-emu/op-4.h
arch/powerpc/mm/Makefile
arch/powerpc/mm/fault.c
arch/powerpc/mm/fsl_booke_mmu.c
arch/powerpc/mm/hash_low_64.S
arch/powerpc/mm/hash_utils_64.c
arch/powerpc/mm/hugetlbpage.c
arch/powerpc/mm/lmb.c
arch/powerpc/mm/mem.c
arch/powerpc/mm/slb.c
arch/powerpc/mm/slb_low.S
arch/powerpc/mm/subpage-prot.c [new file with mode: 0644]
arch/powerpc/oprofile/op_model_cell.c
arch/powerpc/platforms/40x/Kconfig
arch/powerpc/platforms/40x/Makefile
arch/powerpc/platforms/40x/ep405.c [new file with mode: 0644]
arch/powerpc/platforms/40x/kilauea.c
arch/powerpc/platforms/40x/makalu.c [new file with mode: 0644]
arch/powerpc/platforms/40x/virtex.c
arch/powerpc/platforms/40x/walnut.c
arch/powerpc/platforms/44x/Kconfig
arch/powerpc/platforms/44x/Makefile
arch/powerpc/platforms/44x/bamboo.c
arch/powerpc/platforms/44x/ebony.c
arch/powerpc/platforms/44x/katmai.c [new file with mode: 0644]
arch/powerpc/platforms/44x/rainier.c [new file with mode: 0644]
arch/powerpc/platforms/44x/sequoia.c
arch/powerpc/platforms/44x/taishan.c [new file with mode: 0644]
arch/powerpc/platforms/44x/warp-nand.c [new file with mode: 0644]
arch/powerpc/platforms/44x/warp.c [new file with mode: 0644]
arch/powerpc/platforms/52xx/Kconfig
arch/powerpc/platforms/52xx/Makefile
arch/powerpc/platforms/52xx/efika.c
arch/powerpc/platforms/52xx/lite5200.c
arch/powerpc/platforms/52xx/lite5200_pm.c
arch/powerpc/platforms/52xx/mpc5200_simple.c [new file with mode: 0644]
arch/powerpc/platforms/52xx/mpc52xx_common.c
arch/powerpc/platforms/52xx/mpc52xx_pci.c
arch/powerpc/platforms/52xx/mpc52xx_pic.c
arch/powerpc/platforms/52xx/mpc52xx_pm.c
arch/powerpc/platforms/82xx/Kconfig
arch/powerpc/platforms/82xx/Makefile
arch/powerpc/platforms/82xx/ep8248e.c [new file with mode: 0644]
arch/powerpc/platforms/82xx/mpc8272_ads.c
arch/powerpc/platforms/82xx/pq2.c
arch/powerpc/platforms/82xx/pq2fads.c
arch/powerpc/platforms/83xx/Kconfig
arch/powerpc/platforms/83xx/Makefile
arch/powerpc/platforms/83xx/mpc831x_rdb.c [moved from arch/powerpc/platforms/83xx/mpc8313_rdb.c with 58% similarity]
arch/powerpc/platforms/83xx/mpc832x_mds.c
arch/powerpc/platforms/83xx/mpc832x_rdb.c
arch/powerpc/platforms/83xx/mpc834x_itx.c
arch/powerpc/platforms/83xx/mpc834x_mds.c
arch/powerpc/platforms/83xx/mpc836x_mds.c
arch/powerpc/platforms/83xx/mpc837x_mds.c [new file with mode: 0644]
arch/powerpc/platforms/83xx/mpc837x_rdb.c [new file with mode: 0644]
arch/powerpc/platforms/83xx/mpc83xx.h
arch/powerpc/platforms/83xx/pci.c
arch/powerpc/platforms/83xx/sbc834x.c [new file with mode: 0644]
arch/powerpc/platforms/83xx/usb.c
arch/powerpc/platforms/85xx/Kconfig
arch/powerpc/platforms/85xx/Makefile
arch/powerpc/platforms/85xx/mpc85xx_ads.c
arch/powerpc/platforms/85xx/mpc85xx_cds.c
arch/powerpc/platforms/85xx/mpc85xx_ds.c
arch/powerpc/platforms/85xx/mpc85xx_mds.c
arch/powerpc/platforms/85xx/sbc8548.c [new file with mode: 0644]
arch/powerpc/platforms/85xx/sbc8560.c [new file with mode: 0644]
arch/powerpc/platforms/85xx/stx_gp3.c [new file with mode: 0644]
arch/powerpc/platforms/85xx/tqm85xx.c [new file with mode: 0644]
arch/powerpc/platforms/86xx/mpc8610_hpcd.c
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
arch/powerpc/platforms/8xx/Kconfig
arch/powerpc/platforms/8xx/Makefile
arch/powerpc/platforms/8xx/adder875.c [new file with mode: 0644]
arch/powerpc/platforms/8xx/ep88xc.c
arch/powerpc/platforms/8xx/m8xx_setup.c
arch/powerpc/platforms/8xx/mpc86xads.h
arch/powerpc/platforms/8xx/mpc86xads_setup.c
arch/powerpc/platforms/8xx/mpc885ads_setup.c
arch/powerpc/platforms/8xx/mpc8xx.h [new file with mode: 0644]
arch/powerpc/platforms/Kconfig
arch/powerpc/platforms/Kconfig.cputype
arch/powerpc/platforms/cell/Makefile
arch/powerpc/platforms/cell/cbe_cpufreq.c
arch/powerpc/platforms/cell/cbe_cpufreq_pmi.c
arch/powerpc/platforms/cell/cbe_regs.c
arch/powerpc/platforms/cell/io-workarounds.c
arch/powerpc/platforms/cell/iommu.c
arch/powerpc/platforms/cell/pmu.c
arch/powerpc/platforms/cell/setup.c
arch/powerpc/platforms/cell/smp.c
arch/powerpc/platforms/cell/spu_base.c
arch/powerpc/platforms/cell/spu_fault.c [new file with mode: 0644]
arch/powerpc/platforms/cell/spu_manage.c
arch/powerpc/platforms/cell/spufs/Makefile
arch/powerpc/platforms/cell/spufs/backing_ops.c
arch/powerpc/platforms/cell/spufs/context.c
arch/powerpc/platforms/cell/spufs/coredump.c
arch/powerpc/platforms/cell/spufs/fault.c
arch/powerpc/platforms/cell/spufs/file.c
arch/powerpc/platforms/cell/spufs/hw_ops.c
arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
arch/powerpc/platforms/cell/spufs/run.c
arch/powerpc/platforms/cell/spufs/sched.c
arch/powerpc/platforms/cell/spufs/spufs.h
arch/powerpc/platforms/cell/spufs/switch.c
arch/powerpc/platforms/celleb/Kconfig
arch/powerpc/platforms/celleb/io-workarounds.c
arch/powerpc/platforms/celleb/iommu.c
arch/powerpc/platforms/celleb/pci.c
arch/powerpc/platforms/celleb/scc_epci.c
arch/powerpc/platforms/celleb/scc_uhc.c
arch/powerpc/platforms/celleb/setup.c
arch/powerpc/platforms/chrp/pci.c
arch/powerpc/platforms/chrp/setup.c
arch/powerpc/platforms/embedded6xx/Kconfig
arch/powerpc/platforms/embedded6xx/Makefile
arch/powerpc/platforms/embedded6xx/holly.c
arch/powerpc/platforms/embedded6xx/ls_uart.c
arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
arch/powerpc/platforms/embedded6xx/storcenter.c [new file with mode: 0644]
arch/powerpc/platforms/iseries/Makefile
arch/powerpc/platforms/iseries/iommu.c
arch/powerpc/platforms/iseries/lpevents.c
arch/powerpc/platforms/iseries/pci.c
arch/powerpc/platforms/iseries/pci.h
arch/powerpc/platforms/iseries/setup.c
arch/powerpc/platforms/iseries/setup.h
arch/powerpc/platforms/iseries/vpdinfo.c [deleted file]
arch/powerpc/platforms/maple/Kconfig
arch/powerpc/platforms/maple/pci.c
arch/powerpc/platforms/maple/setup.c
arch/powerpc/platforms/pasemi/Kconfig
arch/powerpc/platforms/pasemi/Makefile
arch/powerpc/platforms/pasemi/cpufreq.c
arch/powerpc/platforms/pasemi/electra_ide.c [deleted file]
arch/powerpc/platforms/pasemi/gpio_mdio.c
arch/powerpc/platforms/pasemi/idle.c
arch/powerpc/platforms/pasemi/pasemi.h
arch/powerpc/platforms/pasemi/powersave.S
arch/powerpc/platforms/pasemi/setup.c
arch/powerpc/platforms/powermac/low_i2c.c
arch/powerpc/platforms/powermac/pci.c
arch/powerpc/platforms/powermac/pfunc_base.c
arch/powerpc/platforms/powermac/pic.c
arch/powerpc/platforms/powermac/pmac.h
arch/powerpc/platforms/powermac/setup.c
arch/powerpc/platforms/powermac/time.c
arch/powerpc/platforms/ps3/Kconfig
arch/powerpc/platforms/ps3/device-init.c
arch/powerpc/platforms/ps3/mm.c
arch/powerpc/platforms/ps3/platform.h
arch/powerpc/platforms/ps3/repository.c
arch/powerpc/platforms/ps3/spu.c
arch/powerpc/platforms/ps3/system-bus.c
arch/powerpc/platforms/pseries/eeh.c
arch/powerpc/platforms/pseries/eeh_driver.c
arch/powerpc/platforms/pseries/iommu.c
arch/powerpc/platforms/pseries/pci_dlpar.c
arch/powerpc/platforms/pseries/plpar_wrappers.h
arch/powerpc/platforms/pseries/smp.c
arch/powerpc/platforms/pseries/xics.c
arch/powerpc/platforms/pseries/xics.h
arch/powerpc/sysdev/Kconfig [new file with mode: 0644]
arch/powerpc/sysdev/Makefile
arch/powerpc/sysdev/axonram.c
arch/powerpc/sysdev/bestcomm/bestcomm.c
arch/powerpc/sysdev/bestcomm/bestcomm.h
arch/powerpc/sysdev/commproc.h [deleted file]
arch/powerpc/sysdev/cpm1.c [moved from arch/powerpc/sysdev/commproc.c with 92% similarity]
arch/powerpc/sysdev/cpm2.c [moved from arch/powerpc/sysdev/cpm2_common.c with 95% similarity]
arch/powerpc/sysdev/fsl_pci.c
arch/powerpc/sysdev/fsl_rio.c [moved from arch/ppc/syslib/ppc85xx_rio.c with 100% similarity]
arch/powerpc/sysdev/fsl_rio.h [moved from arch/ppc/syslib/ppc85xx_rio.h with 100% similarity]
arch/powerpc/sysdev/fsl_soc.c
arch/powerpc/sysdev/grackle.c
arch/powerpc/sysdev/ipic.c
arch/powerpc/sysdev/ipic.h
arch/powerpc/sysdev/micropatch.c
arch/powerpc/sysdev/mmio_nvram.c
arch/powerpc/sysdev/mpc8xx_pic.c
arch/powerpc/sysdev/mpic.c
arch/powerpc/sysdev/mpic.h
arch/powerpc/sysdev/mpic_pasemi_msi.c [new file with mode: 0644]
arch/powerpc/sysdev/mv64x60_dev.c
arch/powerpc/sysdev/mv64x60_pci.c
arch/powerpc/sysdev/mv64x60_udbg.c
arch/powerpc/sysdev/of_rtc.c [new file with mode: 0644]
arch/powerpc/sysdev/pmi.c
arch/powerpc/sysdev/ppc4xx_pci.c [new file with mode: 0644]
arch/powerpc/sysdev/ppc4xx_pci.h [new file with mode: 0644]
arch/powerpc/sysdev/qe_lib/Kconfig
arch/powerpc/sysdev/qe_lib/qe.c
arch/powerpc/sysdev/qe_lib/ucc_slow.c
arch/powerpc/sysdev/tsi108_dev.c
arch/powerpc/sysdev/uic.c
arch/powerpc/sysdev/xilinx_intc.c
arch/powerpc/xmon/setjmp.S
arch/powerpc/xmon/xmon.c
arch/ppc/8260_io/enet.c
arch/ppc/8xx_io/commproc.c
arch/ppc/8xx_io/enet.c
arch/ppc/8xx_io/fec.c
arch/ppc/8xx_io/micropatch.c
arch/ppc/Kconfig
arch/ppc/Makefile
arch/ppc/boot/simple/iic.c
arch/ppc/boot/simple/m8xx_tty.c
arch/ppc/configs/mpc8540_ads_defconfig [deleted file]
arch/ppc/configs/mpc8548_cds_defconfig [deleted file]
arch/ppc/configs/mpc8555_cds_defconfig [deleted file]
arch/ppc/configs/mpc8560_ads_defconfig [deleted file]
arch/ppc/kernel/Makefile
arch/ppc/kernel/asm-offsets.c
arch/ppc/kernel/entry.S
arch/ppc/kernel/head_44x.S
arch/ppc/kernel/head_booke.h
arch/ppc/kernel/head_fsl_booke.S [deleted file]
arch/ppc/kernel/misc.S
arch/ppc/kernel/ppc_ksyms.c
arch/ppc/kernel/setup.c
arch/ppc/kernel/traps.c
arch/ppc/mm/44x_mmu.c
arch/ppc/mm/Makefile
arch/ppc/mm/fsl_booke_mmu.c [deleted file]
arch/ppc/mm/init.c
arch/ppc/mm/mmu_context.c
arch/ppc/mm/mmu_decl.h
arch/ppc/mm/pgtable.c
arch/ppc/mm/ppc_mmu.c
arch/ppc/platforms/83xx/Makefile [deleted file]
arch/ppc/platforms/83xx/mpc834x_sys.c [deleted file]
arch/ppc/platforms/83xx/mpc834x_sys.h [deleted file]
arch/ppc/platforms/85xx/Kconfig [deleted file]
arch/ppc/platforms/85xx/Makefile [deleted file]
arch/ppc/platforms/85xx/mpc8540_ads.c [deleted file]
arch/ppc/platforms/85xx/mpc8540_ads.h [deleted file]
arch/ppc/platforms/85xx/mpc8555_cds.h [deleted file]
arch/ppc/platforms/85xx/mpc8560_ads.c [deleted file]
arch/ppc/platforms/85xx/mpc8560_ads.h [deleted file]
arch/ppc/platforms/85xx/mpc85xx_ads_common.c [deleted file]
arch/ppc/platforms/85xx/mpc85xx_ads_common.h [deleted file]
arch/ppc/platforms/85xx/mpc85xx_cds_common.c [deleted file]
arch/ppc/platforms/85xx/mpc85xx_cds_common.h [deleted file]
arch/ppc/platforms/85xx/sbc8560.c [deleted file]
arch/ppc/platforms/85xx/sbc8560.h [deleted file]
arch/ppc/platforms/85xx/sbc85xx.c [deleted file]
arch/ppc/platforms/85xx/sbc85xx.h [deleted file]
arch/ppc/platforms/85xx/stx_gp3.c [deleted file]
arch/ppc/platforms/85xx/stx_gp3.h [deleted file]
arch/ppc/platforms/85xx/tqm85xx.c [deleted file]
arch/ppc/platforms/85xx/tqm85xx.h [deleted file]
arch/ppc/platforms/ev64260.c
arch/ppc/platforms/mpc866ads_setup.c
arch/ppc/platforms/mpc885ads_setup.c
arch/ppc/platforms/prep_pci.c
arch/ppc/syslib/Makefile
arch/ppc/syslib/gt64260_pic.c
arch/ppc/syslib/ipic.c [deleted file]
arch/ppc/syslib/ipic.h [deleted file]
arch/ppc/syslib/mpc52xx_pic.c
arch/ppc/syslib/mpc52xx_setup.c
arch/ppc/syslib/mpc83xx_devices.c [deleted file]
arch/ppc/syslib/mpc83xx_sys.c [deleted file]
arch/ppc/syslib/mpc85xx_devices.c [deleted file]
arch/ppc/syslib/mpc85xx_sys.c [deleted file]
arch/ppc/syslib/mpc8xx_devices.c
arch/ppc/syslib/mv64360_pic.c
arch/ppc/syslib/ocp.c
arch/ppc/syslib/open_pic.c
arch/ppc/syslib/ppc83xx_pci.h [deleted file]
arch/ppc/syslib/ppc83xx_setup.c [deleted file]
arch/ppc/syslib/ppc83xx_setup.h [deleted file]
arch/ppc/syslib/ppc85xx_common.c [deleted file]
arch/ppc/syslib/ppc85xx_common.h [deleted file]
arch/ppc/syslib/ppc85xx_setup.c [deleted file]
arch/ppc/syslib/ppc85xx_setup.h [deleted file]
arch/ppc/syslib/ppc8xx_pic.c
arch/ppc/syslib/ppc8xx_pic.h
arch/ppc/syslib/ppc_sys.c
arch/ppc/xmon/start.c
arch/ppc/xmon/start_8xx.c
drivers/ata/Kconfig
drivers/ata/Makefile
drivers/ata/pata_mpc52xx.c
drivers/ata/pata_of_platform.c [new file with mode: 0644]
drivers/ata/pata_platform.c
drivers/char/hw_random/Kconfig
drivers/char/hw_random/pasemi-rng.c
drivers/edac/pasemi_edac.c
drivers/macintosh/adb.c
drivers/macintosh/mediabay.c
drivers/macintosh/therm_adt746x.c
drivers/macintosh/therm_pm72.c
drivers/macintosh/therm_windtunnel.c
drivers/macintosh/via-pmu-backlight.c
drivers/macintosh/via-pmu.c
drivers/net/Kconfig
drivers/net/fec_8xx/fec_8xx-netta.c
drivers/net/fec_8xx/fec_main.c
drivers/net/fec_8xx/fec_mii.c
drivers/net/fec_mpc52xx.c
drivers/net/fec_mpc52xx_phy.c
drivers/net/fs_enet/fs_enet-main.c
drivers/net/fs_enet/fs_enet.h
drivers/net/fs_enet/mac-fcc.c
drivers/net/fs_enet/mac-fec.c
drivers/net/fs_enet/mac-scc.c
drivers/net/ibm_newemac/core.c
drivers/net/phy/Kconfig
drivers/net/phy/fixed.c
drivers/net/ps3_gelic_net.c
drivers/net/ucc_geth.c
drivers/net/ucc_geth_mii.c
drivers/of/base.c
drivers/of/device.c
drivers/pci/Makefile
drivers/pci/hotplug/rpadlpar_core.c
drivers/ps3/Makefile
drivers/ps3/ps3-lpm.c [new file with mode: 0644]
drivers/ps3/ps3-sys-manager.c
drivers/ps3/ps3-vuart.c
drivers/rapidio/rio.c
drivers/serial/Kconfig
drivers/serial/Makefile
drivers/serial/cpm_uart/cpm_uart_cpm1.c
drivers/serial/cpm_uart/cpm_uart_cpm1.h
drivers/serial/cpm_uart/cpm_uart_cpm2.c
drivers/serial/mpc52xx_uart.c
drivers/serial/uartlite.c
drivers/serial/ucc_uart.c [new file with mode: 0644]
drivers/spi/mpc52xx_psc_spi.c
drivers/spi/spi_mpc83xx.c
drivers/usb/host/ohci-ppc-of.c
include/asm-powerpc/8xx_immap.h
include/asm-powerpc/cpm.h
include/asm-powerpc/cpm1.h [moved from include/asm-powerpc/commproc.h with 89% similarity]
include/asm-powerpc/cpm2.h
include/asm-powerpc/cputable.h
include/asm-powerpc/cputhreads.h [new file with mode: 0644]
include/asm-powerpc/dcr-native.h
include/asm-powerpc/dcr-regs.h [new file with mode: 0644]
include/asm-powerpc/dma-mapping.h
include/asm-powerpc/firmware.h
include/asm-powerpc/immap_86xx.h
include/asm-powerpc/immap_qe.h
include/asm-powerpc/io.h
include/asm-powerpc/iommu.h
include/asm-powerpc/ipic.h
include/asm-powerpc/irq.h
include/asm-powerpc/iseries/hv_lp_event.h
include/asm-powerpc/kexec.h
include/asm-powerpc/lmb.h
include/asm-powerpc/machdep.h
include/asm-powerpc/mmu-hash64.h
include/asm-powerpc/mpc52xx.h
include/asm-powerpc/mpc52xx_psc.h
include/asm-powerpc/mpc8260.h
include/asm-powerpc/mpc8xx.h
include/asm-powerpc/mpic.h
include/asm-powerpc/nvram.h
include/asm-powerpc/of_platform.h
include/asm-powerpc/pci-bridge.h
include/asm-powerpc/pci.h
include/asm-powerpc/pgalloc-64.h
include/asm-powerpc/pgtable-64k.h
include/asm-powerpc/ppc-pci.h
include/asm-powerpc/prom.h
include/asm-powerpc/ps3.h
include/asm-powerpc/ptrace.h
include/asm-powerpc/qe.h
include/asm-powerpc/reg.h
include/asm-powerpc/reg_booke.h
include/asm-powerpc/setjmp.h [new file with mode: 0644]
include/asm-powerpc/smu.h
include/asm-powerpc/sparsemem.h
include/asm-powerpc/spu.h
include/asm-powerpc/spu_csa.h
include/asm-powerpc/spu_priv1.h
include/asm-powerpc/systbl.h
include/asm-powerpc/system.h
include/asm-powerpc/udbg.h
include/asm-powerpc/unistd.h
include/asm-ppc/8xx_immap.h
include/asm-ppc/cpm1.h [moved from include/asm-ppc/commproc.h with 98% similarity]
include/asm-ppc/cpm2.h
include/asm-ppc/immap_85xx.h [deleted file]
include/asm-ppc/mmu.h
include/asm-ppc/mmu_context.h
include/asm-ppc/mpc52xx_psc.h
include/asm-ppc/mpc83xx.h [deleted file]
include/asm-ppc/mpc85xx.h [deleted file]
include/asm-ppc/pgtable.h
include/asm-ppc/ppc_sys.h
include/asm-ppc/ppcboot.h
include/asm-ppc/reg_booke.h
include/asm-ppc/serial.h
include/linux/of.h
include/linux/of_device.h
include/linux/pata_platform.h
include/linux/phy_fixed.h
include/linux/pmu.h
kernel/sys_ni.c

index 5d171b7b8393b95c857f9aad5945939a2c999e21..92c40d174355505555642cbe3a0ea137881dcbd4 100644 (file)
@@ -717,6 +717,7 @@ and is between 256 and 4096 characters. It is defined in the file
                        See Documentation/isdn/README.HiSax.
 
        hugepages=      [HW,X86-32,IA-64] Maximal number of HugeTLB pages.
+       hugepagesz=     [HW,IA-64,PPC] The size of the HugeTLB pages.
 
        i8042.direct    [HW] Put keyboard port into non-translated mode
        i8042.dumbkbd   [HW] Pretend that controller can only read data from
index 94a3c577b083a7e4c9b31b6f7c403773b6d84a8c..3be84aa38dfe11fdeb544b76956ac4c01bfb0892 100644 (file)
@@ -28,3 +28,6 @@ sound.txt
        - info on sound support under Linux/PPC
 zImage_layout.txt
        - info on the kernel images for Linux/PPC
+qe_firmware.txt
+       - describes the layout of firmware binaries for the Freescale QUICC
+         Engine and the code that parses and uploads the microcode therein.
index e9a3cb1d6b06b18a3e0bba0d5a0bf85dc3fde77f..b5e46efeba84bd3715cfea3cf5d4c84be6010332 100644 (file)
@@ -52,7 +52,11 @@ Table of Contents
       i) Freescale QUICC Engine module (QE)
       j) CFI or JEDEC memory-mapped NOR flash
       k) Global Utilities Block
-      l) Xilinx IP cores
+      l) Freescale Communications Processor Module
+      m) Chipselect/Local Bus
+      n) 4xx/Axon EMAC ethernet nodes
+      o) Xilinx IP cores
+      p) Freescale Synchronous Serial Interface
 
   VII - Specifying interrupt information for devices
     1) interrupts property
@@ -671,10 +675,10 @@ device or bus to be described by the device tree.
 
 In general, the format of an address for a device is defined by the
 parent bus type, based on the #address-cells and #size-cells
-property. In the absence of such a property, the parent's parent
-values are used, etc... The kernel requires the root node to have
-those properties defining addresses format for devices directly mapped
-on the processor bus.
+properties.  Note that the parent's parent definitions of #address-cells
+and #size-cells are not inhereted so every node with children must specify
+them.  The kernel requires the root node to have those properties defining
+addresses format for devices directly mapped on the processor bus.
 
 Those 2 properties define 'cells' for representing an address and a
 size. A "cell" is a 32-bit number. For example, if both contain 2
@@ -711,13 +715,14 @@ define a bus type with a more complex address format, including things
 like address space bits, you'll have to add a bus translator to the
 prom_parse.c file of the recent kernels for your bus type.
 
-The "reg" property only defines addresses and sizes (if #size-cells
-is non-0) within a given bus. In order to translate addresses upward
+The "reg" property only defines addresses and sizes (if #size-cells is
+non-0) within a given bus. In order to translate addresses upward
 (that is into parent bus addresses, and possibly into CPU physical
 addresses), all busses must contain a "ranges" property. If the
 "ranges" property is missing at a given level, it's assumed that
-translation isn't possible. The format of the "ranges" property for a
-bus is a list of:
+translation isn't possible, i.e., the registers are not visible on the
+parent bus.  The format of the "ranges" property for a bus is a list
+of:
 
        bus address, parent bus address, size
 
@@ -735,6 +740,10 @@ fit in a single 32-bit word.   New 32-bit powerpc boards should use a
 1/1 format, unless the processor supports physical addresses greater
 than 32-bits, in which case a 2/1 format is recommended.
 
+Alternatively, the "ranges" property may be empty, indicating that the
+registers are visible on the parent bus using an identity mapping
+translation.  In other words, the parent bus address space is the same
+as the child bus address space.
 
 2) Note about "compatible" properties
 -------------------------------------
@@ -1218,16 +1227,14 @@ platforms are moved over to use the flattened-device-tree model.
 
   Required properties:
     - reg : Offset and length of the register set for the device
-    - device_type : Should be "mdio"
     - compatible : Should define the compatible device type for the
-      mdio.  Currently, this is most likely to be "gianfar"
+      mdio.  Currently, this is most likely to be "fsl,gianfar-mdio"
 
   Example:
 
        mdio@24520 {
                reg = <24520 20>;
-               device_type = "mdio"; 
-               compatible = "gianfar";
+               compatible = "fsl,gianfar-mdio";
 
                ethernet-phy@0 {
                        ......
@@ -1254,6 +1261,10 @@ platforms are moved over to use the flattened-device-tree model.
       services interrupts for this device.
     - phy-handle : The phandle for the PHY connected to this ethernet
       controller.
+    - fixed-link : <a b c d e> where a is emulated phy id - choose any,
+      but unique to the all specified fixed-links, b is duplex - 0 half,
+      1 full, c is link speed - d#10/d#100/d#1000, d is pause - 0 no
+      pause, 1 pause, e is asym_pause - 0 no asym_pause, 1 asym_pause.
 
   Recommended properties:
 
@@ -1408,7 +1419,6 @@ platforms are moved over to use the flattened-device-tree model.
 
    Example multi port host USB controller device node :
        usb@22000 {
-               device_type = "usb";
                compatible = "fsl-usb2-mph";
                reg = <22000 1000>;
                #address-cells = <1>;
@@ -1422,7 +1432,6 @@ platforms are moved over to use the flattened-device-tree model.
 
    Example dual role USB controller device node :
        usb@23000 {
-               device_type = "usb";
                compatible = "fsl-usb2-dr";
                reg = <23000 1000>;
                #address-cells = <1>;
@@ -1534,7 +1543,7 @@ platforms are moved over to use the flattened-device-tree model.
    i) Root QE device
 
    Required properties:
-   - device_type : should be "qe";
+   - compatible : should be "fsl,qe";
    - model : precise model of the QE, Can be "QE", "CPM", or "CPM2"
    - reg : offset and length of the device registers.
    - bus-frequency : the clock frequency for QUICC Engine.
@@ -1548,8 +1557,7 @@ platforms are moved over to use the flattened-device-tree model.
                #address-cells = <1>;
                #size-cells = <1>;
                #interrupt-cells = <2>;
-               device_type = "qe";
-               model = "QE";
+               compatible = "fsl,qe";
                ranges = <0 e0100000 00100000>;
                reg = <e0100000 480>;
                brg-frequency = <0>;
@@ -1560,8 +1568,8 @@ platforms are moved over to use the flattened-device-tree model.
    ii) SPI (Serial Peripheral Interface)
 
    Required properties:
-   - device_type : should be "spi".
-   - compatible : should be "fsl_spi".
+   - cell-index : SPI controller index.
+   - compatible : should be "fsl,spi".
    - mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
    - reg : Offset and length of the register set for the device
    - interrupts : <a b> where a is the interrupt number and b is a
@@ -1574,8 +1582,8 @@ platforms are moved over to use the flattened-device-tree model.
 
    Example:
        spi@4c0 {
-               device_type = "spi";
-               compatible = "fsl_spi";
+               cell-index = <0>;
+               compatible = "fsl,spi";
                reg = <4c0 40>;
                interrupts = <82 0>;
                interrupt-parent = <700>;
@@ -1586,7 +1594,6 @@ platforms are moved over to use the flattened-device-tree model.
    iii) USB (Universal Serial Bus Controller)
 
    Required properties:
-   - device_type : should be "usb".
    - compatible : could be "qe_udc" or "fhci-hcd".
    - mode : the could be "host" or "slave".
    - reg : Offset and length of the register set for the device
@@ -1600,7 +1607,6 @@ platforms are moved over to use the flattened-device-tree model.
 
    Example(slave):
        usb@6c0 {
-               device_type = "usb";
                compatible = "qe_udc";
                reg = <6c0 40>;
                interrupts = <8b 0>;
@@ -1613,7 +1619,7 @@ platforms are moved over to use the flattened-device-tree model.
 
    Required properties:
    - device_type : should be "network", "hldc", "uart", "transparent"
-    "bisync" or "atm".
+     "bisync", "atm", or "serial".
    - compatible : could be "ucc_geth" or "fsl_atm" and so on.
    - model : should be "UCC".
    - device-id : the ucc number(1-8), corresponding to UCCx in UM.
@@ -1626,6 +1632,26 @@ platforms are moved over to use the flattened-device-tree model.
    - interrupt-parent : the phandle for the interrupt controller that
      services interrupts for this device.
    - pio-handle : The phandle for the Parallel I/O port configuration.
+   - port-number : for UART drivers, the port number to use, between 0 and 3.
+     This usually corresponds to the /dev/ttyQE device, e.g. <0> = /dev/ttyQE0.
+     The port number is added to the minor number of the device.  Unlike the
+     CPM UART driver, the port-number is required for the QE UART driver.
+   - soft-uart : for UART drivers, if specified this means the QE UART device
+     driver should use "Soft-UART" mode, which is needed on some SOCs that have
+     broken UART hardware.  Soft-UART is provided via a microcode upload.
+   - rx-clock-name: the UCC receive clock source
+     "none": clock source is disabled
+     "brg1" through "brg16": clock source is BRG1-BRG16, respectively
+     "clk1" through "clk24": clock source is CLK1-CLK24, respectively
+   - tx-clock-name: the UCC transmit clock source
+     "none": clock source is disabled
+     "brg1" through "brg16": clock source is BRG1-BRG16, respectively
+     "clk1" through "clk24": clock source is CLK1-CLK24, respectively
+   The following two properties are deprecated.  rx-clock has been replaced
+   with rx-clock-name, and tx-clock has been replaced with tx-clock-name.
+   Drivers that currently use the deprecated properties should continue to
+   do so, in order to support older device trees, but they should be updated
+   to check for the new properties first.
    - rx-clock : represents the UCC receive clock source.
      0x00 : clock source is disabled;
      0x1~0x10 : clock source is BRG1~BRG16 respectively;
@@ -1754,7 +1780,7 @@ platforms are moved over to use the flattened-device-tree model.
    vii) Multi-User RAM (MURAM)
 
    Required properties:
-   - device_type : should be "muram".
+   - compatible : should be "fsl,qe-muram", "fsl,cpm-muram".
    - mode : the could be "host" or "slave".
    - ranges : Should be defined as specified in 1) to describe the
       translation of MURAM addresses.
@@ -1764,14 +1790,42 @@ platforms are moved over to use the flattened-device-tree model.
    Example:
 
        muram@10000 {
-               device_type = "muram";
+               compatible = "fsl,qe-muram", "fsl,cpm-muram";
                ranges = <0 00010000 0000c000>;
 
                data-only@0{
+                       compatible = "fsl,qe-muram-data",
+                                    "fsl,cpm-muram-data";
                        reg = <0 c000>;
                };
        };
 
+   viii) Uploaded QE firmware
+
+        If a new firwmare has been uploaded to the QE (usually by the
+        boot loader), then a 'firmware' child node should be added to the QE
+        node.  This node provides information on the uploaded firmware that
+        device drivers may need.
+
+        Required properties:
+        - id: The string name of the firmware.  This is taken from the 'id'
+              member of the qe_firmware structure of the uploaded firmware.
+              Device drivers can search this string to determine if the
+              firmware they want is already present.
+        - extended-modes: The Extended Modes bitfield, taken from the
+                          firmware binary.  It is a 64-bit number represented
+                          as an array of two 32-bit numbers.
+        - virtual-traps: The virtual traps, taken from the firmware binary.
+                         It is an array of 8 32-bit numbers.
+
+        Example:
+
+               firmware {
+                       id = "Soft-UART";
+                       extended-modes = <0 0>;
+                       virtual-traps = <0 0 0 0 0 0 0 0>;
+               }
+
    j) CFI or JEDEC memory-mapped NOR flash
 
     Flash chips (Memory Technology Devices) are often used for solid state
@@ -2075,8 +2129,7 @@ platforms are moved over to use the flattened-device-tree model.
 
    Example:
        localbus@f0010100 {
-               compatible = "fsl,mpc8272ads-localbus",
-                            "fsl,mpc8272-localbus",
+               compatible = "fsl,mpc8272-localbus",
                             "fsl,pq2-localbus";
                #address-cells = <2>;
                #size-cells = <1>;
@@ -2254,7 +2307,7 @@ platforms are moved over to use the flattened-device-tree model.
                           available.
                           For Axon: 0x0000012a
 
-   l) Xilinx IP cores
+   o) Xilinx IP cores
 
    The Xilinx EDK toolchain ships with a set of IP cores (devices) for use
    in Xilinx Spartan and Virtex FPGAs.  The devices cover the whole range
@@ -2276,7 +2329,7 @@ platforms are moved over to use the flattened-device-tree model.
    properties of the device node.  In general, device nodes for IP-cores
    will take the following form:
 
-       (name)@(base-address) {
+       (name): (generic-name)@(base-address) {
                compatible = "xlnx,(ip-core-name)-(HW_VER)"
                             [, (list of compatible devices), ...];
                reg = <(baseaddr) (size)>;
@@ -2286,6 +2339,9 @@ platforms are moved over to use the flattened-device-tree model.
                xlnx,(parameter2) = <(int-value)>;
        };
 
+       (generic-name):   an open firmware-style name that describes the
+                       generic class of device.  Preferably, this is one word, such
+                       as 'serial' or 'ethernet'.
        (ip-core-name): the name of the ip block (given after the BEGIN
                        directive in system.mhs).  Should be in lowercase
                        and all underscores '_' converted to dashes '-'.
@@ -2294,9 +2350,9 @@ platforms are moved over to use the flattened-device-tree model.
                        dropped from the parameter name, the name is converted
                        to lowercase and all underscore '_' characters are
                        converted to dashes '-'.
-       (baseaddr):     the C_BASEADDR parameter.
+       (baseaddr):     the baseaddr parameter value (often named C_BASEADDR).
        (HW_VER):       from the HW_VER parameter.
-       (size):         equals C_HIGHADDR - C_BASEADDR + 1
+       (size):         the address range size (often C_HIGHADDR - C_BASEADDR + 1).
 
    Typically, the compatible list will include the exact IP core version
    followed by an older IP core version which implements the same
@@ -2326,11 +2382,11 @@ platforms are moved over to use the flattened-device-tree model.
 
    becomes the following device tree node:
 
-       opb-uartlite-0@ec100000 {
+       opb_uartlite_0: serial@ec100000 {
                device_type = "serial";
                compatible = "xlnx,opb-uartlite-1.00.b";
                reg = <ec100000 10000>;
-               interrupt-parent = <&opb-intc>;
+               interrupt-parent = <&opb_intc_0>;
                interrupts = <1 0>; // got this from the opb_intc parameters
                current-speed = <d#115200>;     // standard serial device prop
                clock-frequency = <d#50000000>; // standard serial device prop
@@ -2339,16 +2395,19 @@ platforms are moved over to use the flattened-device-tree model.
                xlnx,use-parity = <0>;
        };
 
-   Some IP cores actually implement 2 or more logical devices.  In this case,
-   the device should still describe the whole IP core with a single node
-   and add a child node for each logical device.  The ranges property can
-   be used to translate from parent IP-core to the registers of each device.
-   (Note: this makes the assumption that both logical devices have the same
-   bus binding.  If this is not true, then separate nodes should be used for
-   each logical device).  The 'cell-index' property can be used to enumerate
-   logical devices within an IP core.  For example, the following is the
-   system.mhs entry for the dual ps2 controller found on the ml403 reference
-   design.
+   Some IP cores actually implement 2 or more logical devices.  In
+   this case, the device should still describe the whole IP core with
+   a single node and add a child node for each logical device.  The
+   ranges property can be used to translate from parent IP-core to the
+   registers of each device.  In addition, the parent node should be
+   compatible with the bus type 'xlnx,compound', and should contain
+   #address-cells and #size-cells, as with any other bus.  (Note: this
+   makes the assumption that both logical devices have the same bus
+   binding.  If this is not true, then separate nodes should be used
+   for each logical device).  The 'cell-index' property can be used to
+   enumerate logical devices within an IP core.  For example, the
+   following is the system.mhs entry for the dual ps2 controller found
+   on the ml403 reference design.
 
        BEGIN opb_ps2_dual_ref
                PARAMETER INSTANCE = opb_ps2_dual_ref_0
@@ -2370,21 +2429,24 @@ platforms are moved over to use the flattened-device-tree model.
 
    It would result in the following device tree nodes:
 
-       opb_ps2_dual_ref_0@a9000000 {
+       opb_ps2_dual_ref_0: opb-ps2-dual-ref@a9000000 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "xlnx,compound";
                ranges = <0 a9000000 2000>;
                // If this device had extra parameters, then they would
                // go here.
                ps2@0 {
                        compatible = "xlnx,opb-ps2-dual-ref-1.00.a";
                        reg = <0 40>;
-                       interrupt-parent = <&opb-intc>;
+                       interrupt-parent = <&opb_intc_0>;
                        interrupts = <3 0>;
                        cell-index = <0>;
                };
                ps2@1000 {
                        compatible = "xlnx,opb-ps2-dual-ref-1.00.a";
                        reg = <1000 40>;
-                       interrupt-parent = <&opb-intc>;
+                       interrupt-parent = <&opb_intc_0>;
                        interrupts = <3 0>;
                        cell-index = <0>;
                };
@@ -2447,17 +2509,18 @@ platforms are moved over to use the flattened-device-tree model.
 
    Gives this device tree (some properties removed for clarity):
 
-       plb-v34-0 {
+       plb@0 {
                #address-cells = <1>;
                #size-cells = <1>;
+               compatible = "xlnx,plb-v34-1.02.a";
                device_type = "ibm,plb";
                ranges; // 1:1 translation
 
-               plb-bram-if-cntrl-0@ffff0000 {
+               plb_bram_if_cntrl_0: bram@ffff0000 {
                        reg = <ffff0000 10000>;
                }
 
-               opb-v20-0 {
+               opb@20000000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <20000000 20000000 20000000
@@ -2465,11 +2528,11 @@ platforms are moved over to use the flattened-device-tree model.
                                  80000000 80000000 40000000
                                  c0000000 c0000000 20000000>;
 
-                       opb-uart16550-0@a0000000 {
+                       opb_uart16550_0: serial@a0000000 {
                                reg = <a00000000 2000>;
                        };
 
-                       opb-intc-0@d1000fc0 {
+                       opb_intc_0: interrupt-controller@d1000fc0 {
                                reg = <d1000fc0 20>;
                        };
                };
@@ -2514,6 +2577,204 @@ platforms are moved over to use the flattened-device-tree model.
       Requred properties:
        - current-speed : Baud rate of uartlite
 
+    p) Freescale Synchronous Serial Interface
+
+       The SSI is a serial device that communicates with audio codecs.  It can
+       be programmed in AC97, I2S, left-justified, or right-justified modes.
+
+       Required properties:
+       - compatible      : compatible list, containing "fsl,ssi"
+       - cell-index      : the SSI, <0> = SSI1, <1> = SSI2, and so on
+       - reg             : offset and length of the register set for the device
+       - interrupts      : <a b> where a is the interrupt number and b is a
+                            field that represents an encoding of the sense and
+                           level information for the interrupt.  This should be
+                           encoded based on the information in section 2)
+                           depending on the type of interrupt controller you
+                           have.
+       - interrupt-parent : the phandle for the interrupt controller that
+                            services interrupts for this device.
+       - fsl,mode        : the operating mode for the SSI interface
+                           "i2s-slave" - I2S mode, SSI is clock slave
+                           "i2s-master" - I2S mode, SSI is clock master
+                           "lj-slave" - left-justified mode, SSI is clock slave
+                           "lj-master" - l.j. mode, SSI is clock master
+                           "rj-slave" - right-justified mode, SSI is clock slave
+                           "rj-master" - r.j., SSI is clock master
+                           "ac97-slave" - AC97 mode, SSI is clock slave
+                           "ac97-master" - AC97 mode, SSI is clock master
+
+       Optional properties:
+       - codec-handle    : phandle to a 'codec' node that defines an audio
+                           codec connected to this SSI.  This node is typically
+                           a child of an I2C or other control node.
+
+       Child 'codec' node required properties:
+       - compatible      : compatible list, contains the name of the codec
+
+       Child 'codec' node optional properties:
+       - clock-frequency  : The frequency of the input clock, which typically
+                            comes from an on-board dedicated oscillator.
+
+    * Freescale 83xx DMA Controller
+
+    Freescale PowerPC 83xx have on chip general purpose DMA controllers.
+
+    Required properties:
+
+    - compatible        : compatible list, contains 2 entries, first is
+                        "fsl,CHIP-dma", where CHIP is the processor
+                        (mpc8349, mpc8360, etc.) and the second is
+                        "fsl,elo-dma"
+    - reg               : <registers mapping for DMA general status reg>
+    - ranges           : Should be defined as specified in 1) to describe the
+                         DMA controller channels.
+    - cell-index        : controller index.  0 for controller @ 0x8100
+    - interrupts        : <interrupt mapping for DMA IRQ>
+    - interrupt-parent  : optional, if needed for interrupt mapping
+
+
+    - DMA channel nodes:
+           - compatible        : compatible list, contains 2 entries, first is
+                                "fsl,CHIP-dma-channel", where CHIP is the processor
+                                (mpc8349, mpc8350, etc.) and the second is
+                                "fsl,elo-dma-channel"
+           - reg               : <registers mapping for channel>
+           - cell-index        : dma channel index starts at 0.
+
+    Optional properties:
+           - interrupts        : <interrupt mapping for DMA channel IRQ>
+                                 (on 83xx this is expected to be identical to
+                                  the interrupts property of the parent node)
+           - interrupt-parent  : optional, if needed for interrupt mapping
+
+  Example:
+       dma@82a8 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
+               reg = <82a8 4>;
+               ranges = <0 8100 1a4>;
+               interrupt-parent = <&ipic>;
+               interrupts = <47 8>;
+               cell-index = <0>;
+               dma-channel@0 {
+                       compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+                       cell-index = <0>;
+                       reg = <0 80>;
+               };
+               dma-channel@80 {
+                       compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+                       cell-index = <1>;
+                       reg = <80 80>;
+               };
+               dma-channel@100 {
+                       compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+                       cell-index = <2>;
+                       reg = <100 80>;
+               };
+               dma-channel@180 {
+                       compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+                       cell-index = <3>;
+                       reg = <180 80>;
+               };
+       };
+
+   * Freescale 85xx/86xx DMA Controller
+
+    Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
+
+    Required properties:
+
+    - compatible        : compatible list, contains 2 entries, first is
+                        "fsl,CHIP-dma", where CHIP is the processor
+                        (mpc8540, mpc8540, etc.) and the second is
+                        "fsl,eloplus-dma"
+    - reg               : <registers mapping for DMA general status reg>
+    - cell-index        : controller index.  0 for controller @ 0x21000,
+                                             1 for controller @ 0xc000
+    - ranges           : Should be defined as specified in 1) to describe the
+                         DMA controller channels.
+
+    - DMA channel nodes:
+           - compatible        : compatible list, contains 2 entries, first is
+                                "fsl,CHIP-dma-channel", where CHIP is the processor
+                                (mpc8540, mpc8560, etc.) and the second is
+                                "fsl,eloplus-dma-channel"
+           - cell-index        : dma channel index starts at 0.
+           - reg               : <registers mapping for channel>
+           - interrupts        : <interrupt mapping for DMA channel IRQ>
+           - interrupt-parent  : optional, if needed for interrupt mapping
+
+  Example:
+       dma@21300 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
+               reg = <21300 4>;
+               ranges = <0 21100 200>;
+               cell-index = <0>;
+               dma-channel@0 {
+                       compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
+                       reg = <0 80>;
+                       cell-index = <0>;
+                       interrupt-parent = <&mpic>;
+                       interrupts = <14 2>;
+               };
+               dma-channel@80 {
+                       compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
+                       reg = <80 80>;
+                       cell-index = <1>;
+                       interrupt-parent = <&mpic>;
+                       interrupts = <15 2>;
+               };
+               dma-channel@100 {
+                       compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
+                       reg = <100 80>;
+                       cell-index = <2>;
+                       interrupt-parent = <&mpic>;
+                       interrupts = <16 2>;
+               };
+               dma-channel@180 {
+                       compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
+                       reg = <180 80>;
+                       cell-index = <3>;
+                       interrupt-parent = <&mpic>;
+                       interrupts = <17 2>;
+               };
+       };
+
+    * Freescale 8xxx/3.0 Gb/s SATA nodes
+
+    SATA nodes are defined to describe on-chip Serial ATA controllers.
+    Each SATA port should have its own node.
+
+    Required properties:
+    - compatible        : compatible list, contains 2 entries, first is
+                        "fsl,CHIP-sata", where CHIP is the processor
+                        (mpc8315, mpc8379, etc.) and the second is
+                        "fsl,pq-sata"
+    - interrupts        : <interrupt mapping for SATA IRQ>
+    - cell-index        : controller index.
+                              1 for controller @ 0x18000
+                              2 for controller @ 0x19000
+                              3 for controller @ 0x1a000
+                              4 for controller @ 0x1b000
+
+    Optional properties:
+    - interrupt-parent  : optional, if needed for interrupt mapping
+    - reg               : <registers mapping>
+
+   Example:
+
+       sata@18000 {
+               compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
+               reg = <0x18000 0x1000>;
+               cell-index = <1>;
+               interrupts = <2c 8>;
+               interrupt-parent = < &ipic >;
+        };
+
    More devices will be defined as this spec matures.
 
 VII - Specifying interrupt information for devices
diff --git a/Documentation/powerpc/qe_firmware.txt b/Documentation/powerpc/qe_firmware.txt
new file mode 100644 (file)
index 0000000..8962664
--- /dev/null
@@ -0,0 +1,295 @@
+          Freescale QUICC Engine Firmware Uploading
+          -----------------------------------------
+
+(c) 2007 Timur Tabi <timur at freescale.com>,
+    Freescale Semiconductor
+
+Table of Contents
+=================
+
+  I - Software License for Firmware
+
+  II - Microcode Availability
+
+  III - Description and Terminology
+
+  IV - Microcode Programming Details
+
+  V - Firmware Structure Layout
+
+  VI - Sample Code for Creating Firmware Files
+
+Revision Information
+====================
+
+November 30, 2007: Rev 1.0 - Initial version
+
+I - Software License for Firmware
+=================================
+
+Each firmware file comes with its own software license.  For information on
+the particular license, please see the license text that is distributed with
+the firmware.
+
+II - Microcode Availability
+===========================
+
+Firmware files are distributed through various channels.  Some are available on
+http://opensource.freescale.com.  For other firmware files, please contact
+your Freescale representative or your operating system vendor.
+
+III - Description and Terminology
+================================
+
+In this document, the term 'microcode' refers to the sequence of 32-bit
+integers that compose the actual QE microcode.
+
+The term 'firmware' refers to a binary blob that contains the microcode as
+well as other data that
+
+       1) describes the microcode's purpose
+       2) describes how and where to upload the microcode
+       3) specifies the values of various registers
+       4) includes additional data for use by specific device drivers
+
+Firmware files are binary files that contain only a firmware.
+
+IV - Microcode Programming Details
+===================================
+
+The QE architecture allows for only one microcode present in I-RAM for each
+RISC processor.  To replace any current microcode, a full QE reset (which
+disables the microcode) must be performed first.
+
+QE microcode is uploaded using the following procedure:
+
+1) The microcode is placed into I-RAM at a specific location, using the
+   IRAM.IADD and IRAM.IDATA registers.
+
+2) The CERCR.CIR bit is set to 0 or 1, depending on whether the firmware
+   needs split I-RAM.  Split I-RAM is only meaningful for SOCs that have
+   QEs with multiple RISC processors, such as the 8360.  Splitting the I-RAM
+   allows each processor to run a different microcode, effectively creating an
+   asymmetric multiprocessing (AMP) system.
+
+3) The TIBCR trap registers are loaded with the addresses of the trap handlers
+   in the microcode.
+
+4) The RSP.ECCR register is programmed with the value provided.
+
+5) If necessary, device drivers that need the virtual traps and extended mode
+   data will use them.
+
+Virtual Microcode Traps
+
+These virtual traps are conditional branches in the microcode.  These are
+"soft" provisional introduced in the ROMcode in order to enable higher
+flexibility and save h/w traps If new features are activated or an issue is
+being fixed in the RAM package utilizing they should be activated.  This data
+structure signals the microcode which of these virtual traps is active.
+
+This structure contains 6 words that the application should copy to some
+specific been defined.  This table describes the structure.
+
+       ---------------------------------------------------------------
+       | Offset in |                  | Destination Offset | Size of |
+       |   array   |     Protocol     |   within PRAM      | Operand |
+       --------------------------------------------------------------|
+       |     0     | Ethernet         |      0xF8          | 4 bytes |
+       |           | interworking     |                    |         |
+       ---------------------------------------------------------------
+       |     4     | ATM              |      0xF8          | 4 bytes |
+       |           | interworking     |                    |         |
+       ---------------------------------------------------------------
+       |     8     | PPP              |      0xF8          | 4 bytes |
+       |           | interworking     |                    |         |
+       ---------------------------------------------------------------
+       |     12    | Ethernet RX      |      0x22          | 1 byte  |
+       |           | Distributor Page |                    |         |
+       ---------------------------------------------------------------
+       |     16    | ATM Globtal      |      0x28          | 1 byte  |
+       |           | Params Table     |                    |         |
+       ---------------------------------------------------------------
+       |     20    | Insert Frame     |      0xF8          | 4 bytes |
+       ---------------------------------------------------------------
+
+
+Extended Modes
+
+This is a double word bit array (64 bits) that defines special functionality
+which has an impact on the softwarew drivers.  Each bit has its own impact
+and has special instructions for the s/w associated with it.  This structure is
+described in this table:
+
+       -----------------------------------------------------------------------
+       | Bit #  |     Name     |   Description                               |
+       -----------------------------------------------------------------------
+       |   0    | General      | Indicates that prior to each host command   |
+       |        | push command | given by the application, the software must |
+       |        |              | assert a special host command (push command)|
+       |        |              | CECDR = 0x00800000.                         |
+       |        |              | CECR = 0x01c1000f.                          |
+       -----------------------------------------------------------------------
+       |   1    | UCC ATM      | Indicates that after issuing ATM RX INIT    |
+       |        | RX INIT      | command, the host must issue another special|
+       |        | push command | command (push command) and immediately      |
+       |        |              | following that re-issue the ATM RX INIT     |
+       |        |              | command. (This makes the sequence of        |
+       |        |              | initializing the ATM receiver a sequence of |
+       |        |              | three host commands)                        |
+       |        |              | CECDR = 0x00800000.                         |
+       |        |              | CECR = 0x01c1000f.                          |
+       -----------------------------------------------------------------------
+       |   2    | Add/remove   | Indicates that following the specific host  |
+       |        | command      | command: "Add/Remove entry in Hash Lookup   |
+       |        | validation   | Table" used in Interworking setup, the user |
+       |        |              | must issue another command.                 |
+       |        |              | CECDR = 0xce000003.                         |
+       |        |              | CECR = 0x01c10f58.                          |
+       -----------------------------------------------------------------------
+       |   3    | General push | Indicates that the s/w has to initialize    |
+       |        | command      | some pointers in the Ethernet thread pages  |
+       |        |              | which are used when Header Compression is   |
+       |        |              | activated.  The full details of these       |
+       |        |              | pointers is located in the software drivers.|
+       -----------------------------------------------------------------------
+       |   4    | General push | Indicates that after issuing Ethernet TX    |
+       |        | command      | INIT command, user must issue this command  |
+       |        |              | for each SNUM of Ethernet TX thread.        |
+       |        |              | CECDR = 0x00800003.                         |
+       |        |              | CECR = 0x7'b{0}, 8'b{Enet TX thread SNUM},  |
+       |        |              |        1'b{1}, 12'b{0}, 4'b{1}              |
+       -----------------------------------------------------------------------
+       | 5 - 31 |     N/A      | Reserved, set to zero.                      |
+       -----------------------------------------------------------------------
+
+V - Firmware Structure Layout
+==============================
+
+QE microcode from Freescale is typically provided as a header file.  This
+header file contains macros that define the microcode binary itself as well as
+some other data used in uploading that microcode.  The format of these files
+do not lend themselves to simple inclusion into other code.  Hence,
+the need for a more portable format.  This section defines that format.
+
+Instead of distributing a header file, the microcode and related data are
+embedded into a binary blob.  This blob is passed to the qe_upload_firmware()
+function, which parses the blob and performs everything necessary to upload
+the microcode.
+
+All integers are big-endian.  See the comments for function
+qe_upload_firmware() for up-to-date implementation information.
+
+This structure supports versioning, where the version of the structure is
+embedded into the structure itself.  To ensure forward and backwards
+compatibility, all versions of the structure must use the same 'qe_header'
+structure at the beginning.
+
+'header' (type: struct qe_header):
+       The 'length' field is the size, in bytes, of the entire structure,
+       including all the microcode embedded in it, as well as the CRC (if
+       present).
+
+       The 'magic' field is an array of three bytes that contains the letters
+       'Q', 'E', and 'F'.  This is an identifier that indicates that this
+       structure is a QE Firmware structure.
+
+       The 'version' field is a single byte that indicates the version of this
+       structure.  If the layout of the structure should ever need to be
+       changed to add support for additional types of microcode, then the
+       version number should also be changed.
+
+The 'id' field is a null-terminated string(suitable for printing) that
+identifies the firmware.
+
+The 'count' field indicates the number of 'microcode' structures.  There
+must be one and only one 'microcode' structure for each RISC processor.
+Therefore, this field also represents the number of RISC processors for this
+SOC.
+
+The 'soc' structure contains the SOC numbers and revisions used to match
+the microcode to the SOC itself.  Normally, the microcode loader should
+check the data in this structure with the SOC number and revisions, and
+only upload the microcode if there's a match.  However, this check is not
+made on all platforms.
+
+Although it is not recommended, you can specify '0' in the soc.model
+field to skip matching SOCs altogether.
+
+The 'model' field is a 16-bit number that matches the actual SOC. The
+'major' and 'minor' fields are the major and minor revision numbrs,
+respectively, of the SOC.
+
+For example, to match the 8323, revision 1.0:
+     soc.model = 8323
+     soc.major = 1
+     soc.minor = 0
+
+'padding' is neccessary for structure alignment.  This field ensures that the
+'extended_modes' field is aligned on a 64-bit boundary.
+
+'extended_modes' is a bitfield that defines special functionality which has an
+impact on the device drivers.  Each bit has its own impact and has special
+instructions for the driver associated with it.  This field is stored in
+the QE library and available to any driver that calles qe_get_firmware_info().
+
+'vtraps' is an array of 8 words that contain virtual trap values for each
+virtual traps.  As with 'extended_modes', this field is stored in the QE
+library and available to any driver that calles qe_get_firmware_info().
+
+'microcode' (type: struct qe_microcode):
+       For each RISC processor there is one 'microcode' structure.  The first
+       'microcode' structure is for the first RISC, and so on.
+
+       The 'id' field is a null-terminated string suitable for printing that
+       identifies this particular microcode.
+
+       'traps' is an array of 16 words that contain hardware trap values
+       for each of the 16 traps.  If trap[i] is 0, then this particular
+       trap is to be ignored (i.e. not written to TIBCR[i]).  The entire value
+       is written as-is to the TIBCR[i] register, so be sure to set the EN
+       and T_IBP bits if necessary.
+
+       'eccr' is the value to program into the ECCR register.
+
+       'iram_offset' is the offset into IRAM to start writing the
+       microcode.
+
+       'count' is the number of 32-bit words in the microcode.
+
+       'code_offset' is the offset, in bytes, from the beginning of this
+       structure where the microcode itself can be found.  The first
+       microcode binary should be located immediately after the 'microcode'
+       array.
+
+       'major', 'minor', and 'revision' are the major, minor, and revision
+       version numbers, respectively, of the microcode.  If all values are 0,
+       then these fields are ignored.
+
+       'reserved' is necessary for structure alignment.  Since 'microcode'
+       is an array, the 64-bit 'extended_modes' field needs to be aligned
+       on a 64-bit boundary, and this can only happen if the size of
+       'microcode' is a multiple of 8 bytes.  To ensure that, we add
+       'reserved'.
+
+After the last microcode is a 32-bit CRC.  It can be calculated using
+this algorithm:
+
+u32 crc32(const u8 *p, unsigned int len)
+{
+       unsigned int i;
+       u32 crc = 0;
+
+       while (len--) {
+          crc ^= *p++;
+          for (i = 0; i < 8; i++)
+                  crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0);
+       }
+       return crc;
+}
+
+VI - Sample Code for Creating Firmware Files
+============================================
+
+A Python program that creates firmware binaries from the header files normally
+distributed by Freescale can be found on http://opensource.freescale.com.
index bb16443b6817b95390df4051bef4977f801b8bba..9c44af3db8d9e542f88f4c1c3df3caee21c447f0 100644 (file)
@@ -148,6 +148,9 @@ config DEFAULT_UIMAGE
          Used to allow a board to specify it wants a uImage built by default
        default n
 
+config REDBOOT
+       bool
+
 config PPC64_SWSUSP
        bool
        depends on PPC64 && (BROKEN || (PPC_PMAC64 && EXPERIMENTAL))
@@ -168,11 +171,13 @@ config PPC_DCR
 
 config PPC_OF_PLATFORM_PCI
        bool
+       depends on PCI
        depends on PPC64 # not supported on 32 bits yet
        default n
 
 source "init/Kconfig"
 
+source "arch/powerpc/sysdev/Kconfig"
 source "arch/powerpc/platforms/Kconfig"
 
 menu "Kernel options"
@@ -348,6 +353,14 @@ config PPC_64K_PAGES
          while on hardware with such support, it will be used to map
          normal application pages.
 
+config PPC_SUBPAGE_PROT
+       bool "Support setting protections for 4k subpages"
+       depends on PPC_64K_PAGES
+       help
+         This option adds support for a system call to allow user programs
+         to set access permissions (read/write, readonly, or no access)
+         on the 4k subpages of each 64k page.
+
 config SCHED_SMT
        bool "SMT (Hyperthreading) scheduler support"
        depends on PPC64 && SMP
@@ -425,7 +438,7 @@ endmenu
 
 config ISA_DMA_API
        bool
-       default y
+       default !PPC_ISERIES || PCI
 
 menu "Bus options"
 
@@ -475,7 +488,7 @@ config MCA
 config PCI
        bool "PCI support" if 40x || CPM2 || PPC_83xx || PPC_85xx || PPC_86xx \
                || PPC_MPC52xx || (EMBEDDED && (PPC_PSERIES || PPC_ISERIES)) \
-               || PPC_PS3
+               || PPC_PS3 || 44x
        default y if !40x && !CPM2 && !8xx && !PPC_83xx \
                && !PPC_85xx && !PPC_86xx
        default PCI_PERMEDIA if !4xx && !CPM2 && !8xx
index 6a79fe43e229e9036a25b8792eb45246f44db30c..db7cc34c24d4d983030adeebb029be70925587e3 100644 (file)
@@ -151,6 +151,13 @@ config BOOTX_TEXT
 
 config PPC_EARLY_DEBUG
        bool "Early debugging (dangerous)"
+       help
+         Say Y to enable some early debugging facilities that may be available
+         for your processor/board combination. Those facilities are hacks
+         intended to debug problems early during boot, this should not be
+         enabled in a production kernel.
+         Note that enabling this will also cause the kernel default log level
+         to be pushed to max automatically very early during boot
 
 choice
        prompt "Early debugging console"
@@ -218,7 +225,16 @@ config PPC_EARLY_DEBUG_44x
        depends on 44x
        help
          Select this to enable early debugging for IBM 44x chips via the
-         inbuilt serial port.
+         inbuilt serial port.  If you enable this, ensure you set
+          PPC_EARLY_DEBUG_44x_PHYSLOW below to suit your target board.
+
+config PPC_EARLY_DEBUG_40x
+       bool "Early serial debugging for IBM/AMCC 40x CPUs"
+       depends on 40x
+       help
+         Select this to enable early debugging for IBM 40x chips via the
+         inbuilt serial port. This works on chips with a 16550 compatible
+         UART. Xilinx chips with uartlite cannot use this option.
 
 config PPC_EARLY_DEBUG_CPM
        bool "Early serial debugging for Freescale CPM-based serial ports"
@@ -235,12 +251,20 @@ config PPC_EARLY_DEBUG_44x_PHYSLOW
        hex "Low 32 bits of early debug UART physical address"
        depends on PPC_EARLY_DEBUG_44x
        default "0x40000200"
+       help
+         You probably want 0x40000200 for ebony boards and
+          0x40000300 for taishan
 
 config PPC_EARLY_DEBUG_44x_PHYSHIGH
        hex "EPRN of early debug UART physical address"
        depends on PPC_EARLY_DEBUG_44x
        default "0x1"
 
+config PPC_EARLY_DEBUG_40x_PHYSADDR
+       hex "Early debug UART physical address"
+       depends on PPC_EARLY_DEBUG_40x
+       default "0xef600300"
+
 config PPC_EARLY_DEBUG_CPM_ADDR
        hex "CPM UART early debug transmit descriptor address"
        depends on PPC_EARLY_DEBUG_CPM
index bd87626c1f6041664ed777fcd4349116bb32ea32..f70df9b64f8f601c420e857d0fba4a4f9b85276d 100644 (file)
@@ -167,6 +167,9 @@ boot := arch/$(ARCH)/boot
 $(BOOT_TARGETS): vmlinux
        $(Q)$(MAKE) ARCH=ppc64 $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
 
+bootwrapper_install:
+       $(Q)$(MAKE) ARCH=ppc64 $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
+
 define archhelp
   @echo '* zImage          - Compressed kernel image (arch/$(ARCH)/boot/zImage.*)'
   @echo '  install         - Install kernel using'
index 65f4118cbe78b9f852820f2963498341fb3b6a57..5ef2bdf8d18926db9de9f37d595c3e43770fc039 100644 (file)
@@ -1,4 +1,5 @@
 addnote
+dtc
 empty.c
 hack-coff
 infblock.c
@@ -30,6 +31,7 @@ zImage.*lds
 zImage.miboot
 zImage.pmac
 zImage.pseries
+zImage.redboot*
 zImage.sandpoint
 zImage.vmode
 zconf.h
index ebf9e217612d65bee7d489ed55b7a77b2bd0d6da..758edf1c58156e1b44e25fa6deb931d86aa274fc 100644 (file)
 #include "dcr.h"
 
 /* Read the 4xx SDRAM controller to get size of system memory. */
-void ibm4xx_fixup_memsize(void)
+void ibm4xx_sdram_fixup_memsize(void)
 {
        int i;
        unsigned long memsize, bank_config;
 
        memsize = 0;
        for (i = 0; i < ARRAY_SIZE(sdram_bxcr); i++) {
-               mtdcr(DCRN_SDRAM0_CFGADDR, sdram_bxcr[i]);
-               bank_config = mfdcr(DCRN_SDRAM0_CFGDATA);
-
+               bank_config = SDRAM0_READ(sdram_bxcr[i]);
                if (bank_config & SDRAM_CONFIG_BANK_ENABLE)
                        memsize += SDRAM_CONFIG_BANK_SIZE(bank_config);
        }
@@ -39,6 +37,69 @@ void ibm4xx_fixup_memsize(void)
        dt_fixup_memory(0, memsize);
 }
 
+/* Read the 440SPe MQ controller to get size of system memory. */
+#define DCRN_MQ0_B0BAS         0x40
+#define DCRN_MQ0_B1BAS         0x41
+#define DCRN_MQ0_B2BAS         0x42
+#define DCRN_MQ0_B3BAS         0x43
+
+static u64 ibm440spe_decode_bas(u32 bas)
+{
+       u64 base = ((u64)(bas & 0xFFE00000u)) << 2;
+
+       /* open coded because I'm paranoid about invalid values */
+       switch ((bas >> 4) & 0xFFF) {
+       case 0:
+               return 0;
+       case 0xffc:
+               return base + 0x000800000ull;
+       case 0xff8:
+               return base + 0x001000000ull;
+       case 0xff0:
+               return base + 0x002000000ull;
+       case 0xfe0:
+               return base + 0x004000000ull;
+       case 0xfc0:
+               return base + 0x008000000ull;
+       case 0xf80:
+               return base + 0x010000000ull;
+       case 0xf00:
+               return base + 0x020000000ull;
+       case 0xe00:
+               return base + 0x040000000ull;
+       case 0xc00:
+               return base + 0x080000000ull;
+       case 0x800:
+               return base + 0x100000000ull;
+       }
+       printf("Memory BAS value 0x%08x unsupported !\n", bas);
+       return 0;
+}
+
+void ibm440spe_fixup_memsize(void)
+{
+       u64 banktop, memsize = 0;
+
+       /* Ultimately, we should directly construct the memory node
+        * so we are able to handle holes in the memory address space
+        */
+       banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B0BAS));
+       if (banktop > memsize)
+               memsize = banktop;
+       banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B1BAS));
+       if (banktop > memsize)
+               memsize = banktop;
+       banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B2BAS));
+       if (banktop > memsize)
+               memsize = banktop;
+       banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B3BAS));
+       if (banktop > memsize)
+               memsize = banktop;
+
+       dt_fixup_memory(0, memsize);
+}
+
+
 /* 4xx DDR1/2 Denali memory controller support */
 /* DDR0 registers */
 #define DDR0_02                        2
@@ -77,19 +138,13 @@ void ibm4xx_fixup_memsize(void)
 
 #define DDR_GET_VAL(val, mask, shift)  (((val) >> (shift)) & (mask))
 
-static inline u32 mfdcr_sdram0(u32 reg)
-{
-        mtdcr(DCRN_SDRAM0_CFGADDR, reg);
-        return mfdcr(DCRN_SDRAM0_CFGDATA);
-}
-
 void ibm4xx_denali_fixup_memsize(void)
 {
        u32 val, max_cs, max_col, max_row;
        u32 cs, col, row, bank, dpath;
        unsigned long memsize;
 
-       val = mfdcr_sdram0(DDR0_02);
+       val = SDRAM0_READ(DDR0_02);
        if (!DDR_GET_VAL(val, DDR_START, DDR_START_SHIFT))
                fatal("DDR controller is not initialized\n");
 
@@ -99,12 +154,12 @@ void ibm4xx_denali_fixup_memsize(void)
        max_row = DDR_GET_VAL(val, DDR_MAX_ROW_REG, DDR_MAX_ROW_REG_SHIFT);
 
        /* get CS value */
-       val = mfdcr_sdram0(DDR0_10);
+       val = SDRAM0_READ(DDR0_10);
 
        val = DDR_GET_VAL(val, DDR_CS_MAP, DDR_CS_MAP_SHIFT);
        cs = 0;
        while (val) {
-               if (val && 0x1)
+               if (val & 0x1)
                        cs++;
                val = val >> 1;
        }
@@ -115,15 +170,15 @@ void ibm4xx_denali_fixup_memsize(void)
                fatal("DDR wrong CS configuration\n");
 
        /* get data path bytes */
-       val = mfdcr_sdram0(DDR0_14);
+       val = SDRAM0_READ(DDR0_14);
 
        if (DDR_GET_VAL(val, DDR_REDUC, DDR_REDUC_SHIFT))
                dpath = 8; /* 64 bits */
        else
                dpath = 4; /* 32 bits */
 
-       /* get adress pins (rows) */
-       val = mfdcr_sdram0(DDR0_42);
+       /* get address pins (rows) */
+       val = SDRAM0_READ(DDR0_42);
 
        row = DDR_GET_VAL(val, DDR_APIN, DDR_APIN_SHIFT);
        if (row > max_row)
@@ -131,7 +186,7 @@ void ibm4xx_denali_fixup_memsize(void)
        row = max_row - row;
 
        /* get collomn size and banks */
-       val = mfdcr_sdram0(DDR0_43);
+       val = SDRAM0_READ(DDR0_43);
 
        col = DDR_GET_VAL(val, DDR_COL_SZ, DDR_COL_SZ_SHIFT);
        if (col > max_col)
@@ -179,13 +234,17 @@ void ibm40x_dbcr_reset(void)
 #define EMAC_RESET 0x20000000
 void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1)
 {
-       /* Quiesce the MAL and EMAC(s) since PIBS/OpenBIOS don't do this for us */
+       /* Quiesce the MAL and EMAC(s) since PIBS/OpenBIOS don't
+        * do this for us
+        */
        if (emac0)
                *emac0 = EMAC_RESET;
        if (emac1)
                *emac1 = EMAC_RESET;
 
        mtdcr(DCRN_MAL0_CFG, MAL_RESET);
+       while (mfdcr(DCRN_MAL0_CFG) & MAL_RESET)
+               ; /* loop until reset takes effect */
 }
 
 /* Read 4xx EBC bus bridge registers to get mappings of the peripheral
@@ -217,84 +276,335 @@ void ibm4xx_fixup_ebc_ranges(const char *ebc)
        setprop(devp, "ranges", ranges, (p - ranges) * sizeof(u32));
 }
 
-#define SPRN_CCR1 0x378
-void ibm440ep_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
+/* Calculate 440GP clocks */
+void ibm440gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk)
 {
-       u32 cpu, plb, opb, ebc, tb, uart0, m, vco;
-       u32 reg;
-       u32 fwdva, fwdvb, fbdv, lfbdv, opbdv0, perdv0, spcid0, prbdv0, tmp;
-
-       mtdcr(DCRN_CPR0_ADDR, CPR0_PLLD0);
-       reg = mfdcr(DCRN_CPR0_DATA);
-       tmp = (reg & 0x000F0000) >> 16;
-       fwdva = tmp ? tmp : 16;
-       tmp = (reg & 0x00000700) >> 8;
-       fwdvb = tmp ? tmp : 8;
-       tmp = (reg & 0x1F000000) >> 24;
-       fbdv = tmp ? tmp : 32;
-       lfbdv = (reg & 0x0000007F);
-
-       mtdcr(DCRN_CPR0_ADDR, CPR0_OPBD0);
-       reg = mfdcr(DCRN_CPR0_DATA);
-       tmp = (reg & 0x03000000) >> 24;
-       opbdv0 = tmp ? tmp : 4;
-
-       mtdcr(DCRN_CPR0_ADDR, CPR0_PERD0);
-       reg = mfdcr(DCRN_CPR0_DATA);
-       tmp = (reg & 0x07000000) >> 24;
-       perdv0 = tmp ? tmp : 8;
-
-       mtdcr(DCRN_CPR0_ADDR, CPR0_PRIMBD0);
-       reg = mfdcr(DCRN_CPR0_DATA);
-       tmp = (reg & 0x07000000) >> 24;
-       prbdv0 = tmp ? tmp : 8;
-
-       mtdcr(DCRN_CPR0_ADDR, CPR0_SCPID);
-       reg = mfdcr(DCRN_CPR0_DATA);
-       tmp = (reg & 0x03000000) >> 24;
-       spcid0 = tmp ? tmp : 4;
-
-       /* Calculate M */
-       mtdcr(DCRN_CPR0_ADDR, CPR0_PLLC0);
-       reg = mfdcr(DCRN_CPR0_DATA);
-       tmp = (reg & 0x03000000) >> 24;
-       if (tmp == 0) { /* PLL output */
-               tmp = (reg & 0x20000000) >> 29;
-               if (!tmp) /* PLLOUTA */
-                       m = fbdv * lfbdv * fwdva;
+       u32 sys0 = mfdcr(DCRN_CPC0_SYS0);
+       u32 cr0 = mfdcr(DCRN_CPC0_CR0);
+       u32 cpu, plb, opb, ebc, tb, uart0, uart1, m;
+       u32 opdv = CPC0_SYS0_OPDV(sys0);
+       u32 epdv = CPC0_SYS0_EPDV(sys0);
+
+       if (sys0 & CPC0_SYS0_BYPASS) {
+               /* Bypass system PLL */
+               cpu = plb = sys_clk;
+       } else {
+               if (sys0 & CPC0_SYS0_EXTSL)
+                       /* PerClk */
+                       m = CPC0_SYS0_FWDVB(sys0) * opdv * epdv;
                else
-                       m = fbdv * lfbdv * fwdvb;
+                       /* CPU clock */
+                       m = CPC0_SYS0_FBDV(sys0) * CPC0_SYS0_FWDVA(sys0);
+               cpu = sys_clk * m / CPC0_SYS0_FWDVA(sys0);
+               plb = sys_clk * m / CPC0_SYS0_FWDVB(sys0);
        }
-       else if (tmp == 1) /* CPU output */
-               m = fbdv * fwdva;
+
+       opb = plb / opdv;
+       ebc = opb / epdv;
+
+       /* FIXME: Check if this is for all 440GP, or just Ebony */
+       if ((mfpvr() & 0xf0000fff) == 0x40000440)
+               /* Rev. B 440GP, use external system clock */
+               tb = sys_clk;
        else
-               m = perdv0 * opbdv0 * fwdvb;
+               /* Rev. C 440GP, errata force us to use internal clock */
+               tb = cpu;
 
-       vco = (m * sysclk) + (m >> 1);
-       cpu = vco / fwdva;
-       plb = vco / fwdvb / prbdv0;
-       opb = plb / opbdv0;
-       ebc = plb / perdv0;
+       if (cr0 & CPC0_CR0_U0EC)
+               /* External UART clock */
+               uart0 = ser_clk;
+       else
+               /* Internal UART clock */
+               uart0 = plb / CPC0_CR0_UDIV(cr0);
+
+       if (cr0 & CPC0_CR0_U1EC)
+               /* External UART clock */
+               uart1 = ser_clk;
+       else
+               /* Internal UART clock */
+               uart1 = plb / CPC0_CR0_UDIV(cr0);
 
-       /* FIXME */
-       uart0 = ser_clk;
+       printf("PPC440GP: SysClk = %dMHz (%x)\n\r",
+              (sys_clk + 500000) / 1000000, sys_clk);
+
+       dt_fixup_cpu_clocks(cpu, tb, 0);
+
+       dt_fixup_clock("/plb", plb);
+       dt_fixup_clock("/plb/opb", opb);
+       dt_fixup_clock("/plb/opb/ebc", ebc);
+       dt_fixup_clock("/plb/opb/serial@40000200", uart0);
+       dt_fixup_clock("/plb/opb/serial@40000300", uart1);
+}
+
+#define SPRN_CCR1 0x378
+
+static inline u32 __fix_zero(u32 v, u32 def)
+{
+       return v ? v : def;
+}
+
+static unsigned int __ibm440eplike_fixup_clocks(unsigned int sys_clk,
+                                               unsigned int tmr_clk,
+                                               int per_clk_from_opb)
+{
+       /* PLL config */
+       u32 pllc  = CPR0_READ(DCRN_CPR0_PLLC);
+       u32 plld  = CPR0_READ(DCRN_CPR0_PLLD);
+
+       /* Dividers */
+       u32 fbdv   = __fix_zero((plld >> 24) & 0x1f, 32);
+       u32 fwdva  = __fix_zero((plld >> 16) & 0xf, 16);
+       u32 fwdvb  = __fix_zero((plld >> 8) & 7, 8);
+       u32 lfbdv  = __fix_zero(plld & 0x3f, 64);
+       u32 pradv0 = __fix_zero((CPR0_READ(DCRN_CPR0_PRIMAD) >> 24) & 7, 8);
+       u32 prbdv0 = __fix_zero((CPR0_READ(DCRN_CPR0_PRIMBD) >> 24) & 7, 8);
+       u32 opbdv0 = __fix_zero((CPR0_READ(DCRN_CPR0_OPBD) >> 24) & 3, 4);
+       u32 perdv0 = __fix_zero((CPR0_READ(DCRN_CPR0_PERD) >> 24) & 3, 4);
+
+       /* Input clocks for primary dividers */
+       u32 clk_a, clk_b;
+
+       /* Resulting clocks */
+       u32 cpu, plb, opb, ebc, vco;
+
+       /* Timebase */
+       u32 ccr1, tb = tmr_clk;
+
+       if (pllc & 0x40000000) {
+               u32 m;
+
+               /* Feedback path */
+               switch ((pllc >> 24) & 7) {
+               case 0:
+                       /* PLLOUTx */
+                       m = ((pllc & 0x20000000) ? fwdvb : fwdva) * lfbdv;
+                       break;
+               case 1:
+                       /* CPU */
+                       m = fwdva * pradv0;
+                       break;
+               case 5:
+                       /* PERClk */
+                       m = fwdvb * prbdv0 * opbdv0 * perdv0;
+                       break;
+               default:
+                       printf("WARNING ! Invalid PLL feedback source !\n");
+                       goto bypass;
+               }
+               m *= fbdv;
+               vco = sys_clk * m;
+               clk_a = vco / fwdva;
+               clk_b = vco / fwdvb;
+       } else {
+bypass:
+               /* Bypass system PLL */
+               vco = 0;
+               clk_a = clk_b = sys_clk;
+       }
+
+       cpu = clk_a / pradv0;
+       plb = clk_b / prbdv0;
+       opb = plb / opbdv0;
+       ebc = (per_clk_from_opb ? opb : plb) / perdv0;
 
        /* Figure out timebase.  Either CPU or default TmrClk */
-       asm volatile (
-                       "mfspr  %0,%1\n"
-                       :
-                       "=&r"(reg) : "i"(SPRN_CCR1));
-       if (reg & 0x0080)
-               tb = 25000000; /* TmrClk is 25MHz */
-       else
+       ccr1 = mfspr(SPRN_CCR1);
+
+       /* If passed a 0 tmr_clk, force CPU clock */
+       if (tb == 0) {
+               ccr1 &= ~0x80u;
+               mtspr(SPRN_CCR1, ccr1);
+       }
+       if ((ccr1 & 0x0080) == 0)
                tb = cpu;
 
        dt_fixup_cpu_clocks(cpu, tb, 0);
        dt_fixup_clock("/plb", plb);
        dt_fixup_clock("/plb/opb", opb);
        dt_fixup_clock("/plb/opb/ebc", ebc);
+
+       return plb;
+}
+
+static void eplike_fixup_uart_clk(int index, const char *path,
+                                 unsigned int ser_clk,
+                                 unsigned int plb_clk)
+{
+       unsigned int sdr;
+       unsigned int clock;
+
+       switch (index) {
+       case 0:
+               sdr = SDR0_READ(DCRN_SDR0_UART0);
+               break;
+       case 1:
+               sdr = SDR0_READ(DCRN_SDR0_UART1);
+               break;
+       case 2:
+               sdr = SDR0_READ(DCRN_SDR0_UART2);
+               break;
+       case 3:
+               sdr = SDR0_READ(DCRN_SDR0_UART3);
+               break;
+       default:
+               return;
+       }
+
+       if (sdr & 0x00800000u)
+               clock = ser_clk;
+       else
+               clock = plb_clk / __fix_zero(sdr & 0xff, 256);
+
+       dt_fixup_clock(path, clock);
+}
+
+void ibm440ep_fixup_clocks(unsigned int sys_clk,
+                          unsigned int ser_clk,
+                          unsigned int tmr_clk)
+{
+       unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 0);
+
+       /* serial clocks beed fixup based on int/ext */
+       eplike_fixup_uart_clk(0, "/plb/opb/serial@ef600300", ser_clk, plb_clk);
+       eplike_fixup_uart_clk(1, "/plb/opb/serial@ef600400", ser_clk, plb_clk);
+       eplike_fixup_uart_clk(2, "/plb/opb/serial@ef600500", ser_clk, plb_clk);
+       eplike_fixup_uart_clk(3, "/plb/opb/serial@ef600600", ser_clk, plb_clk);
+}
+
+void ibm440gx_fixup_clocks(unsigned int sys_clk,
+                          unsigned int ser_clk,
+                          unsigned int tmr_clk)
+{
+       unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 1);
+
+       /* serial clocks beed fixup based on int/ext */
+       eplike_fixup_uart_clk(0, "/plb/opb/serial@40000200", ser_clk, plb_clk);
+       eplike_fixup_uart_clk(1, "/plb/opb/serial@40000300", ser_clk, plb_clk);
+}
+
+void ibm440spe_fixup_clocks(unsigned int sys_clk,
+                           unsigned int ser_clk,
+                           unsigned int tmr_clk)
+{
+       unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 1);
+
+       /* serial clocks beed fixup based on int/ext */
+       eplike_fixup_uart_clk(0, "/plb/opb/serial@10000200", ser_clk, plb_clk);
+       eplike_fixup_uart_clk(1, "/plb/opb/serial@10000300", ser_clk, plb_clk);
+       eplike_fixup_uart_clk(2, "/plb/opb/serial@10000600", ser_clk, plb_clk);
+}
+
+void ibm405gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk)
+{
+       u32 pllmr = mfdcr(DCRN_CPC0_PLLMR);
+       u32 cpc0_cr0 = mfdcr(DCRN_405_CPC0_CR0);
+       u32 cpc0_cr1 = mfdcr(DCRN_405_CPC0_CR1);
+       u32 psr = mfdcr(DCRN_405_CPC0_PSR);
+       u32 cpu, plb, opb, ebc, tb, uart0, uart1, m;
+       u32 fwdv, fwdvb, fbdv, cbdv, opdv, epdv, ppdv, udiv;
+
+       fwdv = (8 - ((pllmr & 0xe0000000) >> 29));
+       fbdv = (pllmr & 0x1e000000) >> 25;
+       if (fbdv == 0)
+               fbdv = 16;
+       cbdv = ((pllmr & 0x00060000) >> 17) + 1; /* CPU:PLB */
+       opdv = ((pllmr & 0x00018000) >> 15) + 1; /* PLB:OPB */
+       ppdv = ((pllmr & 0x00001800) >> 13) + 1; /* PLB:PCI */
+       epdv = ((pllmr & 0x00001800) >> 11) + 2; /* PLB:EBC */
+       udiv = ((cpc0_cr0 & 0x3e) >> 1) + 1;
+
+       /* check for 405GPr */
+       if ((mfpvr() & 0xfffffff0) == (0x50910951 & 0xfffffff0)) {
+               fwdvb = 8 - (pllmr & 0x00000007);
+               if (!(psr & 0x00001000)) /* PCI async mode enable == 0 */
+                       if (psr & 0x00000020) /* New mode enable */
+                               m = fwdvb * 2 * ppdv;
+                       else
+                               m = fwdvb * cbdv * ppdv;
+               else if (psr & 0x00000020) /* New mode enable */
+                       if (psr & 0x00000800) /* PerClk synch mode */
+                               m = fwdvb * 2 * epdv;
+                       else
+                               m = fbdv * fwdv;
+               else if (epdv == fbdv)
+                       m = fbdv * cbdv * epdv;
+               else
+                       m = fbdv * fwdvb * cbdv;
+
+               cpu = sys_clk * m / fwdv;
+               plb = sys_clk * m / (fwdvb * cbdv);
+       } else {
+               m = fwdv * fbdv * cbdv;
+               cpu = sys_clk * m / fwdv;
+               plb = cpu / cbdv;
+       }
+       opb = plb / opdv;
+       ebc = plb / epdv;
+
+       if (cpc0_cr0 & 0x80)
+               /* uart0 uses the external clock */
+               uart0 = ser_clk;
+       else
+               uart0 = cpu / udiv;
+
+       if (cpc0_cr0 & 0x40)
+               /* uart1 uses the external clock */
+               uart1 = ser_clk;
+       else
+               uart1 = cpu / udiv;
+
+       /* setup the timebase clock to tick at the cpu frequency */
+       cpc0_cr1 = cpc0_cr1 & ~0x00800000;
+       mtdcr(DCRN_405_CPC0_CR1, cpc0_cr1);
+       tb = cpu;
+
+       dt_fixup_cpu_clocks(cpu, tb, 0);
+       dt_fixup_clock("/plb", plb);
+       dt_fixup_clock("/plb/opb", opb);
+       dt_fixup_clock("/plb/ebc", ebc);
+       dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
+       dt_fixup_clock("/plb/opb/serial@ef600400", uart1);
+}
+
+
+void ibm405ep_fixup_clocks(unsigned int sys_clk)
+{
+       u32 pllmr0 = mfdcr(DCRN_CPC0_PLLMR0);
+       u32 pllmr1 = mfdcr(DCRN_CPC0_PLLMR1);
+       u32 cpc0_ucr = mfdcr(DCRN_CPC0_UCR);
+       u32 cpu, plb, opb, ebc, uart0, uart1;
+       u32 fwdva, fwdvb, fbdv, cbdv, opdv, epdv;
+       u32 pllmr0_ccdv, tb, m;
+
+       fwdva = 8 - ((pllmr1 & 0x00070000) >> 16);
+       fwdvb = 8 - ((pllmr1 & 0x00007000) >> 12);
+       fbdv = (pllmr1 & 0x00f00000) >> 20;
+       if (fbdv == 0)
+               fbdv = 16;
+
+       cbdv = ((pllmr0 & 0x00030000) >> 16) + 1; /* CPU:PLB */
+       epdv = ((pllmr0 & 0x00000300) >> 8) + 2;  /* PLB:EBC */
+       opdv = ((pllmr0 & 0x00003000) >> 12) + 1; /* PLB:OPB */
+
+       m = fbdv * fwdvb;
+
+       pllmr0_ccdv = ((pllmr0 & 0x00300000) >> 20) + 1;
+       if (pllmr1 & 0x80000000)
+               cpu = sys_clk * m / (fwdva * pllmr0_ccdv);
+       else
+               cpu = sys_clk / pllmr0_ccdv;
+
+       plb = cpu / cbdv;
+       opb = plb / opdv;
+       ebc = plb / epdv;
+       tb = cpu;
+       uart0 = cpu / (cpc0_ucr & 0x0000007f);
+       uart1 = cpu / ((cpc0_ucr & 0x00007f00) >> 8);
+
+       dt_fixup_cpu_clocks(cpu, tb, 0);
+       dt_fixup_clock("/plb", plb);
+       dt_fixup_clock("/plb/opb", opb);
+       dt_fixup_clock("/plb/ebc", ebc);
        dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
-       dt_fixup_clock("/plb/opb/serial@ef600400", uart0);
-       dt_fixup_clock("/plb/opb/serial@ef600500", uart0);
-       dt_fixup_clock("/plb/opb/serial@ef600600", uart0);
+       dt_fixup_clock("/plb/opb/serial@ef600400", uart1);
 }
index adba6a599a9348275a306243546939ba9051d1fc..2606e64f0c4b02b1d6cd85d801d8c762a32a6386 100644 (file)
 #ifndef _POWERPC_BOOT_4XX_H_
 #define _POWERPC_BOOT_4XX_H_
 
-void ibm4xx_fixup_memsize(void);
+void ibm4xx_sdram_fixup_memsize(void);
+void ibm440spe_fixup_memsize(void);
 void ibm4xx_denali_fixup_memsize(void);
 void ibm44x_dbcr_reset(void);
 void ibm40x_dbcr_reset(void);
 void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1);
 void ibm4xx_fixup_ebc_ranges(const char *ebc);
-void ibm440ep_fixup_clocks(unsigned int sysclk, unsigned int ser_clk);
+
+void ibm405gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk);
+void ibm405ep_fixup_clocks(unsigned int sys_clk);
+void ibm440gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk);
+void ibm440ep_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk,
+                          unsigned int tmr_clk);
+void ibm440gx_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk,
+                          unsigned int tmr_clk);
+void ibm440spe_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk,
+                           unsigned int tmr_clk);
 
 #endif /* _POWERPC_BOOT_4XX_H_ */
index 4b1d98b8135ef5db6da95654bf4f430e4704e4f3..122a27078998e817931fb9a92d4e1950eb414bd9 100644 (file)
@@ -33,12 +33,15 @@ ifeq ($(call cc-option-yn, -fstack-protector),y)
 BOOTCFLAGS     += -fno-stack-protector
 endif
 
-BOOTCFLAGS     += -I$(obj) -I$(srctree)/$(obj)
+BOOTCFLAGS     += -I$(obj) -I$(srctree)/$(obj) -I$(srctree)/$(src)/libfdt
 
 $(obj)/4xx.o: BOOTCFLAGS += -mcpu=440
 $(obj)/ebony.o: BOOTCFLAGS += -mcpu=440
+$(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=440
+$(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=440
 $(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
 
+
 zlib       := inffast.c inflate.c inftrees.c
 zlibheader := inffast.h inffixed.h inflate.h inftrees.h infutil.h
 zliblinuxheader := zlib.h zconf.h zutil.h
@@ -46,17 +49,21 @@ zliblinuxheader := zlib.h zconf.h zutil.h
 $(addprefix $(obj)/,$(zlib) gunzip_util.o main.o): \
        $(addprefix $(obj)/,$(zliblinuxheader)) $(addprefix $(obj)/,$(zlibheader))
 
-src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c flatdevtree_misc.c \
+src-libfdt := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c
+src-wlib := string.S crt0.S stdio.c main.c \
+               $(addprefix libfdt/,$(src-libfdt)) libfdt-wrapper.c \
                ns16550.c serial.c simple_alloc.c div64.S util.S \
                gunzip_util.c elf_util.c $(zlib) devtree.c oflib.c ofconsole.c \
                4xx.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c bamboo.c \
                cpm-serial.c stdlib.c mpc52xx-psc.c planetcore.c uartlite.c \
                fsl-soc.c mpc8xx.c pq2.c
-src-plat := of.c cuboot-52xx.c cuboot-83xx.c cuboot-85xx.c holly.c \
+src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c \
                cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
                ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
                cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c \
-               fixed-head.S ep88xc.c cuboot-hpc2.c
+               fixed-head.S ep88xc.c cuboot-hpc2.c ep405.c cuboot-taishan.c \
+               cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
+               cuboot-warp.c cuboot-85xx-cpm2.c
 src-boot := $(src-wlib) $(src-plat) empty.c
 
 src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -101,23 +108,60 @@ quiet_cmd_bootar = BOOTAR  $@
       cmd_bootar = $(CROSS32AR) -cr $@.$$$$ $(filter-out FORCE,$^); mv $@.$$$$ $@
 
 $(patsubst %.c,%.o, $(filter %.c, $(src-boot))): %.o: %.c FORCE
+       $(Q)mkdir -p $(dir $@)
        $(call if_changed_dep,bootcc)
 $(patsubst %.S,%.o, $(filter %.S, $(src-boot))): %.o: %.S FORCE
+       $(Q)mkdir -p $(dir $@)
        $(call if_changed_dep,bootas)
 
 $(obj)/wrapper.a: $(obj-wlib) FORCE
        $(call if_changed,bootar)
 
-hostprogs-y    := addnote addRamDisk hack-coff mktree
+hostprogs-y    := addnote addRamDisk hack-coff mktree dtc
 
 targets                += $(patsubst $(obj)/%,%,$(obj-boot) wrapper.a)
 extra-y                := $(obj)/wrapper.a $(obj-plat) $(obj)/empty.o \
                   $(obj)/zImage.lds $(obj)/zImage.coff.lds $(obj)/zImage.ps3.lds
 
 wrapper                :=$(srctree)/$(src)/wrapper
-wrapperbits    := $(extra-y) $(addprefix $(obj)/,addnote hack-coff mktree) \
+wrapperbits    := $(extra-y) $(addprefix $(obj)/,addnote hack-coff mktree dtc) \
                        $(wrapper) FORCE
 
+#############
+# Bits for building dtc
+# DTC_GENPARSER      := 1    # Uncomment to rebuild flex/bison output
+
+dtc-objs := dtc.o flattree.o fstree.o data.o livetree.o treesource.o srcpos.o checks.o
+dtc-objs += dtc-lexer.lex.o dtc-parser.tab.o
+dtc-objs := $(addprefix dtc-src/, $(dtc-objs))
+
+# prerequisites on generated files needs to be explicit
+$(obj)/dtc-src/dtc-parser.tab.o: $(obj)/dtc-src/dtc-parser.tab.c $(obj)/dtc-src/dtc-parser.tab.h
+$(obj)/dtc-src/dtc-lexer.lex.o:  $(obj)/dtc-src/dtc-lexer.lex.c $(obj)/dtc-src/dtc-parser.tab.h
+
+HOSTCFLAGS += -I$(src)/dtc-src/ -I$(src)/libfdt/
+
+targets += dtc-src/dtc-parser.tab.c
+targets += dtc-src/dtc-lexer.lex.c
+
+ifdef DTC_GENPARSER
+BISON = bison
+FLEX = flex
+
+quiet_cmd_bison = BISON   $@
+      cmd_bison = $(BISON) -o$@ -d $<; cp $@ $@_shipped
+quiet_cmd_flex = FLEX    $@
+      cmd_flex = $(FLEX) -o$@ $<; cp $@ $@_shipped
+
+$(obj)/dtc-src/dtc-parser.tab.c: $(src)/dtc-src/dtc-parser.y FORCE
+     $(call if_changed,bison)
+
+$(obj)/dtc-src/dtc-parser.tab.h: $(obj)/dtc-src/dtc-parser.tab.c
+
+$(obj)/dtc-src/dtc-lexer.lex.c: $(src)/dtc-src/dtc-lexer.l FORCE
+     $(call if_changed,flex)
+endif
+
 #############
 # Bits for building various flavours of zImage
 
@@ -150,15 +194,29 @@ image-$(CONFIG_DEFAULT_UIMAGE)            += uImage
 ifneq ($(CONFIG_DEVICE_TREE),"")
 image-$(CONFIG_PPC_8xx)                        += cuImage.8xx
 image-$(CONFIG_PPC_EP88XC)             += zImage.ep88xc
+image-$(CONFIG_EP405)                  += zImage.ep405
 image-$(CONFIG_8260)                   += cuImage.pq2
+image-$(CONFIG_EP8248E)                        += zImage.ep8248e
 image-$(CONFIG_PPC_MPC52xx)            += cuImage.52xx
+image-$(CONFIG_STORCENTER)             += cuImage.824x
 image-$(CONFIG_PPC_83xx)               += cuImage.83xx
 image-$(CONFIG_PPC_85xx)               += cuImage.85xx
+ifeq ($(CONFIG_CPM2),y)
+image-$(CONFIG_PPC_85xx)               += cuImage.85xx-cpm2
+endif
 image-$(CONFIG_MPC7448HPC2)            += cuImage.hpc2
 image-$(CONFIG_EBONY)                  += treeImage.ebony cuImage.ebony
 image-$(CONFIG_BAMBOO)                 += treeImage.bamboo cuImage.bamboo
 image-$(CONFIG_SEQUOIA)                        += cuImage.sequoia
+image-$(CONFIG_RAINIER)                        += cuImage.rainier
 image-$(CONFIG_WALNUT)                 += treeImage.walnut
+image-$(CONFIG_TAISHAN)                        += cuImage.taishan
+image-$(CONFIG_KATMAI)                 += cuImage.katmai
+image-$(CONFIG_WARP)                   += cuImage.warp
+endif
+
+ifneq ($(CONFIG_REDBOOT),"")
+image-$(CONFIG_PPC_8xx)                        += zImage.redboot-8xx
 endif
 
 # For 32-bit powermacs, build the COFF and miboot images
@@ -243,3 +301,51 @@ clean-kernel := vmlinux.strip vmlinux.bin
 clean-kernel += $(addsuffix .gz,$(clean-kernel))
 # If not absolute clean-files are relative to $(obj).
 clean-files += $(addprefix $(objtree)/, $(clean-kernel))
+
+WRAPPER_OBJDIR := /usr/lib/kernel-wrapper
+WRAPPER_DTSDIR := /usr/lib/kernel-wrapper/dts
+WRAPPER_BINDIR := /usr/sbin
+INSTALL := install
+
+extra-installed                := $(patsubst $(obj)/%, $(DESTDIR)$(WRAPPER_OBJDIR)/%, $(extra-y))
+hostprogs-installed    := $(patsubst %, $(DESTDIR)$(WRAPPER_BINDIR)/%, $(hostprogs-y))
+wrapper-installed      := $(DESTDIR)$(WRAPPER_BINDIR)/wrapper
+dts-installed          := $(patsubst $(obj)/dts/%, $(DESTDIR)$(WRAPPER_DTSDIR)/%, $(wildcard $(obj)/dts/*.dts))
+
+all-installed          := $(extra-installed) $(hostprogs-installed) $(wrapper-installed) $(dts-installed)
+
+quiet_cmd_mkdir           = MKDIR   $(patsubst $(INSTALL_HDR_PATH)/%,%,$@)
+      cmd_mkdir           = mkdir -p $@
+
+quiet_cmd_install        = INSTALL $(patsubst $(DESTDIR)$(WRAPPER_OBJDIR)/%,%,$@)
+      cmd_install        = $(INSTALL)  -m0644 $(patsubst $(DESTDIR)$(WRAPPER_OBJDIR)/%,$(obj)/%,$@) $@
+
+quiet_cmd_install_dts    = INSTALL $(patsubst $(DESTDIR)$(WRAPPER_DTSDIR)/%,dts/%,$@)
+      cmd_install_dts    = $(INSTALL)  -m0644 $(patsubst $(DESTDIR)$(WRAPPER_DTSDIR)/%,$(srctree)/$(obj)/dts/%,$@) $@
+
+quiet_cmd_install_exe    = INSTALL $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,%,$@)
+      cmd_install_exe    = $(INSTALL)  -m0755 $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,$(obj)/%,$@) $@
+
+quiet_cmd_install_wrapper = INSTALL $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,%,$@)
+      cmd_install_wrapper = $(INSTALL)  -m0755 $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,$(srctree)/$(obj)/%,$@) $@ ;\
+                               sed -i $@ -e 's%^object=.*%object=$(WRAPPER_OBJDIR)%' \
+                                         -e 's%^objbin=.*%objbin=$(WRAPPER_BINDIR)%' \
+
+
+$(DESTDIR)$(WRAPPER_OBJDIR) $(DESTDIR)$(WRAPPER_DTSDIR) $(DESTDIR)$(WRAPPER_BINDIR):
+       $(call cmd,mkdir)
+
+$(extra-installed)     : $(DESTDIR)$(WRAPPER_OBJDIR)/% : $(obj)/% | $(DESTDIR)$(WRAPPER_OBJDIR)
+       $(call cmd,install)
+
+$(hostprogs-installed)  : $(DESTDIR)$(WRAPPER_BINDIR)/% : $(obj)/% | $(DESTDIR)$(WRAPPER_BINDIR)
+       $(call cmd,install_exe)
+
+$(dts-installed)       : $(DESTDIR)$(WRAPPER_DTSDIR)/% : $(srctree)/$(obj)/dts/% | $(DESTDIR)$(WRAPPER_DTSDIR)
+       $(call cmd,install_dts)
+
+$(wrapper-installed): $(DESTDIR)$(WRAPPER_BINDIR) $(srctree)/$(obj)/wrapper | $(DESTDIR)$(WRAPPER_BINDIR)
+       $(call cmd,install_wrapper)
+
+$(obj)/bootwrapper_install: $(all-installed)
+
index f61fcdab1c7c59bf0f649f1e0e434a06431b6612..54b33f1500e24dcf9ae87ce597013f31216e8a84 100644 (file)
@@ -30,8 +30,8 @@ static void bamboo_fixups(void)
 {
        unsigned long sysclk = 33333333;
 
-       ibm440ep_fixup_clocks(sysclk, 11059200);
-       ibm4xx_fixup_memsize();
+       ibm440ep_fixup_clocks(sysclk, 11059200, 25000000);
+       ibm4xx_sdram_fixup_memsize();
        ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00);
        dt_fixup_mac_addresses(bamboo_mac0, bamboo_mac1);
 }
@@ -42,6 +42,6 @@ void bamboo_init(void *mac0, void *mac1)
        platform_ops.exit = ibm44x_dbcr_reset;
        bamboo_mac0 = mac0;
        bamboo_mac1 = mac1;
-       ft_init(_dtb_start, 0, 32);
+       fdt_init(_dtb_start);
        serial_console_init();
 }
index 9256a26d40e4c8f1033d72f976bd961f619e77ea..a8611546a656338820ffb2d83448c03954f331cb 100644 (file)
@@ -53,7 +53,7 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
                    unsigned long r6, unsigned long r7)
 {
        CUBOOT_INIT();
-       ft_init(_dtb_start, _dtb_end - _dtb_start, 32);
+       fdt_init(_dtb_start);
        serial_console_init();
        platform_ops.fixups = platform_fixups;
 }
diff --git a/arch/powerpc/boot/cuboot-824x.c b/arch/powerpc/boot/cuboot-824x.c
new file mode 100644 (file)
index 0000000..ced90c5
--- /dev/null
@@ -0,0 +1,53 @@
+/*
+ * Old U-boot compatibility for 824x
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "stdio.h"
+#include "cuboot.h"
+
+#define TARGET_824x
+#include "ppcboot.h"
+
+static bd_t bd;
+
+
+static void platform_fixups(void)
+{
+       void *soc;
+
+       dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
+       dt_fixup_mac_addresses(bd.bi_enetaddr);
+       dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq);
+
+       soc = find_node_by_devtype(NULL, "soc");
+       if (soc) {
+               void *serial = NULL;
+
+               setprop(soc, "bus-frequency", &bd.bi_busfreq,
+                       sizeof(bd.bi_busfreq));
+
+               while ((serial = find_node_by_devtype(serial, "serial"))) {
+                       if (get_parent(serial) != soc)
+                               continue;
+
+                       setprop(serial, "clock-frequency", &bd.bi_busfreq,
+                               sizeof(bd.bi_busfreq));
+               }
+       }
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                   unsigned long r6, unsigned long r7)
+{
+       CUBOOT_INIT();
+       fdt_init(_dtb_start);
+       serial_console_init();
+       platform_ops.fixups = platform_fixups;
+}
index a0505509abcc40ed3eff8121e8a8b56f4e40bdf0..61af1c1e8255cf53486e5bb01d4894a57c1c06a2 100644 (file)
@@ -24,7 +24,8 @@ static void platform_fixups(void)
        void *soc;
 
        dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
-       dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr);
+       dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
+       dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
        dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq);
 
        /* Unfortunately, the specific model number is encoded in the
@@ -52,7 +53,7 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
                    unsigned long r6, unsigned long r7)
 {
        CUBOOT_INIT();
-       ft_init(_dtb_start, _dtb_end - _dtb_start, 32);
+       fdt_init(_dtb_start);
        serial_console_init();
        platform_ops.fixups = platform_fixups;
 }
diff --git a/arch/powerpc/boot/cuboot-85xx-cpm2.c b/arch/powerpc/boot/cuboot-85xx-cpm2.c
new file mode 100644 (file)
index 0000000..723872d
--- /dev/null
@@ -0,0 +1,66 @@
+/*
+ * Old U-boot compatibility for 85xx
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "stdio.h"
+#include "cuboot.h"
+
+#define TARGET_85xx
+#define TARGET_CPM2
+#include "ppcboot.h"
+
+static bd_t bd;
+
+static void platform_fixups(void)
+{
+       void *devp;
+
+       dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
+       dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
+       dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
+       dt_fixup_mac_address_by_alias("ethernet2", bd.bi_enet2addr);
+       dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 8, bd.bi_busfreq);
+
+       /* Unfortunately, the specific model number is encoded in the
+        * soc node name in existing dts files -- once that is fixed,
+        * this can do a simple path lookup.
+        */
+       devp = find_node_by_devtype(NULL, "soc");
+       if (devp) {
+               void *serial = NULL;
+
+               setprop(devp, "bus-frequency", &bd.bi_busfreq,
+                       sizeof(bd.bi_busfreq));
+
+               while ((serial = find_node_by_devtype(serial, "serial"))) {
+                       if (get_parent(serial) != devp)
+                               continue;
+
+                       setprop(serial, "clock-frequency", &bd.bi_busfreq,
+                               sizeof(bd.bi_busfreq));
+               }
+       }
+
+       devp = find_node_by_compatible(NULL, "fsl,cpm2-brg");
+       if (devp)
+               setprop(devp, "clock-frequency", &bd.bi_brgfreq,
+                       sizeof(bd.bi_brgfreq));
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                   unsigned long r6, unsigned long r7)
+{
+       CUBOOT_INIT();
+       fdt_init(_dtb_start);
+       serial_console_init();
+       platform_ops.fixups = platform_fixups;
+}
index 345dcbecef0fc81d14a41e1d14bf85bec2410afb..6776a1a29f13f530279ff9dd41e59ee3727c1a70 100644 (file)
@@ -24,8 +24,9 @@ static void platform_fixups(void)
        void *soc;
 
        dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
-       dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr,
-                              bd.bi_enet2addr);
+       dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
+       dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
+       dt_fixup_mac_address_by_alias("ethernet2", bd.bi_enet2addr);
        dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 8, bd.bi_busfreq);
 
        /* Unfortunately, the specific model number is encoded in the
@@ -53,7 +54,7 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
                    unsigned long r6, unsigned long r7)
 {
        CUBOOT_INIT();
-       ft_init(_dtb_start, _dtb_end - _dtb_start, 32);
+       fdt_init(_dtb_start);
        serial_console_init();
        platform_ops.fixups = platform_fixups;
 }
index 0e82015a5f95d42add314aa7e5c6fb3cbaa0b0aa..c202c8868bd6df3b3ad5e448e0d983dc0036098f 100644 (file)
@@ -41,7 +41,7 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
                    unsigned long r6, unsigned long r7)
 {
        CUBOOT_INIT();
-       ft_init(_dtb_start, _dtb_end - _dtb_start, 32);
+       fdt_init(_dtb_start);
        serial_console_init();
        platform_ops.fixups = platform_fixups;
 }
index d333898bca308fa41985537f1491a99f1b296edc..1b8953259d75d39ad6d464c47f977c05bb47b293 100644 (file)
@@ -42,7 +42,7 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
                unsigned long r6, unsigned long r7)
 {
        CUBOOT_INIT();
-       ft_init(_dtb_start, _dtb_end - _dtb_start, 32);
+       fdt_init(_dtb_start);
        serial_console_init();
        platform_ops.fixups = platform_fixups;
 }
diff --git a/arch/powerpc/boot/cuboot-katmai.c b/arch/powerpc/boot/cuboot-katmai.c
new file mode 100644 (file)
index 0000000..c021167
--- /dev/null
@@ -0,0 +1,56 @@
+/*
+ * Old U-boot compatibility for Katmai
+ *
+ * Author: Hugh Blemings <hugh@au.ibm.com>
+ *
+ * Copyright 2007 Hugh Blemings, IBM Corporation.
+ *   Based on cuboot-ebony.c which is:
+ * Copyright 2007 David Gibson, IBM Corporation.
+ *   Based on cuboot-83xx.c, which is:
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "stdio.h"
+#include "reg.h"
+#include "dcr.h"
+#include "4xx.h"
+#include "44x.h"
+#include "cuboot.h"
+
+#define TARGET_44x
+#include "ppcboot.h"
+
+static bd_t bd;
+
+BSS_STACK(4096);
+
+static void katmai_fixups(void)
+{
+       unsigned long sysclk = 33333000;
+
+       /* 440SP Clock logic is all but identical to 440GX
+        * so we just use that code for now at least
+        */
+       ibm440spe_fixup_clocks(sysclk, 6 * 1843200, 0);
+
+       ibm440spe_fixup_memsize();
+
+       dt_fixup_mac_address(0, bd.bi_enetaddr);
+
+       ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                  unsigned long r6, unsigned long r7)
+{
+       CUBOOT_INIT();
+
+       platform_ops.fixups = katmai_fixups;
+       fdt_init(_dtb_start);
+       serial_console_init();
+}
index 61574f3272ddb9f8429f30b6c533e91e5c408de0..f56ac6cae9f3b291c1744a21958dc27d2e487a28 100644 (file)
@@ -255,7 +255,7 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
                    unsigned long r6, unsigned long r7)
 {
        CUBOOT_INIT();
-       ft_init(_dtb_start, _dtb_end - _dtb_start, 32);
+       fdt_init(_dtb_start);
        serial_console_init();
        platform_ops.fixups = pq2_platform_fixups;
 }
diff --git a/arch/powerpc/boot/cuboot-rainier.c b/arch/powerpc/boot/cuboot-rainier.c
new file mode 100644 (file)
index 0000000..cf452b6
--- /dev/null
@@ -0,0 +1,56 @@
+/*
+ * Old U-boot compatibility for Rainier
+ *
+ * Valentine Barshak <vbarshak@ru.mvista.com>
+ * Copyright 2007 MontaVista Software, Inc
+ *
+ * Based on Ebony code by David Gibson <david@gibson.dropbear.id.au>
+ * Copyright IBM Corporation, 2007
+ *
+ * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ * Copyright IBM Corporation, 2007
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2 of the License
+ */
+
+#include <stdarg.h>
+#include <stddef.h>
+#include "types.h"
+#include "elf.h"
+#include "string.h"
+#include "stdio.h"
+#include "page.h"
+#include "ops.h"
+#include "dcr.h"
+#include "4xx.h"
+#include "44x.h"
+#include "cuboot.h"
+
+#define TARGET_4xx
+#define TARGET_44x
+#include "ppcboot.h"
+
+static bd_t bd;
+
+
+static void rainier_fixups(void)
+{
+       unsigned long sysclk = 33333333;
+
+       ibm440ep_fixup_clocks(sysclk, 11059200, 50000000);
+       ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
+       ibm4xx_denali_fixup_memsize();
+       dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                   unsigned long r6, unsigned long r7)
+{
+       CUBOOT_INIT();
+       platform_ops.fixups = rainier_fixups;
+       platform_ops.exit = ibm44x_dbcr_reset;
+       fdt_init(_dtb_start);
+       serial_console_init();
+}
index ec635e0bd4ec240630a585421aa04759a92f8d74..f555575a44ded1e2bf0adfd23856d9edebb3fd48 100644 (file)
@@ -39,7 +39,7 @@ static void sequoia_fixups(void)
 {
        unsigned long sysclk = 33333333;
 
-       ibm440ep_fixup_clocks(sysclk, 11059200);
+       ibm440ep_fixup_clocks(sysclk, 11059200, 50000000);
        ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
        ibm4xx_denali_fixup_memsize();
        dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
@@ -51,6 +51,6 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
        CUBOOT_INIT();
        platform_ops.fixups = sequoia_fixups;
        platform_ops.exit = ibm44x_dbcr_reset;
-       ft_init(_dtb_start, 0, 32);
+       fdt_init(_dtb_start);
        serial_console_init();
 }
diff --git a/arch/powerpc/boot/cuboot-taishan.c b/arch/powerpc/boot/cuboot-taishan.c
new file mode 100644 (file)
index 0000000..f66455a
--- /dev/null
@@ -0,0 +1,54 @@
+/*
+ * Old U-boot compatibility for Taishan
+ *
+ * Author: Hugh Blemings <hugh@au.ibm.com>
+ *
+ * Copyright 2007 Hugh Blemings, IBM Corporation.
+ *   Based on cuboot-ebony.c which is:
+ * Copyright 2007 David Gibson, IBM Corporation.
+ *   Based on cuboot-83xx.c, which is:
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "stdio.h"
+#include "cuboot.h"
+#include "reg.h"
+#include "dcr.h"
+#include "4xx.h"
+
+#define TARGET_44x
+#include "ppcboot.h"
+
+static bd_t bd;
+
+BSS_STACK(4096);
+
+static void taishan_fixups(void)
+{
+       /* FIXME: sysclk should be derived by reading the FPGA
+          registers */
+       unsigned long sysclk = 33000000;
+
+       ibm440gx_fixup_clocks(sysclk, 6 * 1843200, 25000000);
+
+       ibm4xx_sdram_fixup_memsize();
+
+       dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr);
+
+       ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                  unsigned long r6, unsigned long r7)
+{
+       CUBOOT_INIT();
+
+       platform_ops.fixups = taishan_fixups;
+       fdt_init(_dtb_start);
+       serial_console_init();
+}
diff --git a/arch/powerpc/boot/cuboot-warp.c b/arch/powerpc/boot/cuboot-warp.c
new file mode 100644 (file)
index 0000000..bdedebe
--- /dev/null
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2008 PIKA Technologies
+ *   Sean MacLennan <smaclennan@pikatech.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "4xx.h"
+#include "cuboot.h"
+
+#define TARGET_44x
+#include "ppcboot.h"
+
+static bd_t bd;
+
+static void warp_fixups(void)
+{
+       unsigned long sysclk = 66000000;
+
+       ibm440ep_fixup_clocks(sysclk, 11059200, 50000000);
+       ibm4xx_sdram_fixup_memsize();
+       ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
+       dt_fixup_mac_addresses(&bd.bi_enetaddr);
+}
+
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                  unsigned long r6, unsigned long r7)
+{
+       CUBOOT_INIT();
+
+       platform_ops.fixups = warp_fixups;
+       platform_ops.exit = ibm44x_dbcr_reset;
+       fdt_init(_dtb_start);
+       serial_console_init();
+}
index 83b88aa92888eced19d6f154848fddb43411562c..95b9f5344016a619d97d413d738dc89394c28511 100644 (file)
 #define DCRN_SDRAM0_CFGADDR                            0x010
 #define DCRN_SDRAM0_CFGDATA                            0x011
 
+#define SDRAM0_READ(offset) ({\
+       mtdcr(DCRN_SDRAM0_CFGADDR, offset); \
+       mfdcr(DCRN_SDRAM0_CFGDATA); })
+#define SDRAM0_WRITE(offset, data) ({\
+       mtdcr(DCRN_SDRAM0_CFGADDR, offset); \
+       mtdcr(DCRN_SDRAM0_CFGDATA, data); })
+
 #define        SDRAM0_B0CR                             0x40
 #define        SDRAM0_B1CR                             0x44
 #define        SDRAM0_B2CR                             0x48
 #define        SDRAM0_B3CR                             0x4c
 
-static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR, SDRAM0_B2CR, SDRAM0_B3CR };
+static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR,
+                                           SDRAM0_B2CR, SDRAM0_B3CR };
 
 #define                        SDRAM_CONFIG_BANK_ENABLE        0x00000001
 #define                        SDRAM_CONFIG_SIZE_MASK          0x000e0000
@@ -138,5 +146,54 @@ static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR, SDRAM0_B2C
 #define DCRN_CPC0_PLLMR 0xb0
 #define DCRN_405_CPC0_CR0 0xb1
 #define DCRN_405_CPC0_CR1 0xb2
+#define DCRN_405_CPC0_PSR 0xb4
+
+/* 405EP Clocking/Power Management/Chip Control regs */
+#define DCRN_CPC0_PLLMR0  0xf0
+#define DCRN_CPC0_PLLMR1  0xf4
+#define DCRN_CPC0_UCR     0xf5
+
+/* 440GX Clock control etc */
+
+
+#define DCRN_CPR0_CLKUPD                               0x020
+#define DCRN_CPR0_PLLC                                 0x040
+#define DCRN_CPR0_PLLD                                 0x060
+#define DCRN_CPR0_PRIMAD                               0x080
+#define DCRN_CPR0_PRIMBD                               0x0a0
+#define DCRN_CPR0_OPBD                                 0x0c0
+#define DCRN_CPR0_PERD                                 0x0e0
+#define DCRN_CPR0_MALD                                 0x100
+
+#define DCRN_SDR0_CONFIG_ADDR  0xe
+#define DCRN_SDR0_CONFIG_DATA  0xf
+
+/* SDR read/write helper macros */
+#define SDR0_READ(offset) ({\
+       mtdcr(DCRN_SDR0_CONFIG_ADDR, offset); \
+       mfdcr(DCRN_SDR0_CONFIG_DATA); })
+#define SDR0_WRITE(offset, data) ({\
+       mtdcr(DCRN_SDR0_CONFIG_ADDR, offset); \
+       mtdcr(DCRN_SDR0_CONFIG_DATA, data); })
+
+#define DCRN_SDR0_UART0                0x0120
+#define DCRN_SDR0_UART1                0x0121
+#define DCRN_SDR0_UART2                0x0122
+#define DCRN_SDR0_UART3                0x0123
+
+
+/* CPRs read/write helper macros - based off include/asm-ppc/ibm44x.h */
+
+#define DCRN_CPR0_CFGADDR                              0xc
+#define DCRN_CPR0_CFGDATA                              0xd
+
+#define CPR0_READ(offset) ({\
+       mtdcr(DCRN_CPR0_CFGADDR, offset); \
+       mfdcr(DCRN_CPR0_CFGDATA); })
+#define CPR0_WRITE(offset, data) ({\
+       mtdcr(DCRN_CPR0_CFGADDR, offset); \
+       mtdcr(DCRN_CPR0_CFGDATA, data); })
+
+
 
 #endif /* _PPC_BOOT_DCR_H_ */
index e5dfe449731393cb7aec718b4fd169964309def0..60f561e307a99090b423bc3e02e90891e9d51b48 100644 (file)
@@ -88,6 +88,20 @@ void dt_fixup_clock(const char *path, u32 freq)
        }
 }
 
+void dt_fixup_mac_address_by_alias(const char *alias, const u8 *addr)
+{
+       void *devp = find_node_by_alias(alias);
+
+       if (devp) {
+               printf("%s: local-mac-address <-"
+                      " %02x:%02x:%02x:%02x:%02x:%02x\n\r", alias,
+                      addr[0], addr[1], addr[2],
+                      addr[3], addr[4], addr[5]);
+
+               setprop(devp, "local-mac-address", addr, 6);
+       }
+}
+
 void dt_fixup_mac_address(u32 index, const u8 *addr)
 {
        void *devp = find_node_by_prop_value(NULL, "linux,network-index",
diff --git a/arch/powerpc/boot/dtc-src/.gitignore b/arch/powerpc/boot/dtc-src/.gitignore
new file mode 100644 (file)
index 0000000..a7c3f94
--- /dev/null
@@ -0,0 +1,3 @@
+dtc-lexer.lex.c
+dtc-parser.tab.c
+dtc-parser.tab.h
diff --git a/arch/powerpc/boot/dtc-src/Makefile.dtc b/arch/powerpc/boot/dtc-src/Makefile.dtc
new file mode 100644 (file)
index 0000000..d607fdb
--- /dev/null
@@ -0,0 +1,25 @@
+# Makefile.dtc
+#
+# This is not a complete Makefile of itself.  Instead, it is designed to
+# be easily embeddable into other systems of Makefiles.
+#
+DTC_SRCS = dtc.c flattree.c fstree.c data.c livetree.c treesource.c srcpos.c \
+       checks.c
+DTC_EXTRA = dtc.h srcpos.h
+DTC_LEXFILES = dtc-lexer.l
+DTC_BISONFILES = dtc-parser.y
+
+DTC_LEX_SRCS = $(DTC_LEXFILES:%.l=%.lex.c)
+DTC_BISON_SRCS = $(DTC_BISONFILES:%.y=%.tab.c)
+DTC_BISON_INCLUDES = $(DTC_BISONFILES:%.y=%.tab.h)
+
+DTC_GEN_SRCS = $(DTC_LEX_SRCS) $(DTC_BISON_SRCS)
+DTC_GEN_ALL = $(DTC_GEN_SRCS) $(DTC_BISON_INCLUDES)
+DTC_OBJS = $(DTC_SRCS:%.c=%.o) $(DTC_GEN_SRCS:%.c=%.o)
+
+DTC_CLEANFILES = $(DTC_GEN_ALL)
+
+# We assume the containing Makefile system can do auto-dependencies for most
+# things, but we supply the dependencies on generated header files explicitly
+
+$(addprefix $(DTC_objdir)/,$(DTC_GEN_SRCS:%.c=%.o)): $(addprefix $(DTC_objdir)/,$(DTC_BISON_INCLUDES))
diff --git a/arch/powerpc/boot/dtc-src/checks.c b/arch/powerpc/boot/dtc-src/checks.c
new file mode 100644 (file)
index 0000000..2ce961c
--- /dev/null
@@ -0,0 +1,750 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2007.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#include "dtc.h"
+
+#ifdef TRACE_CHECKS
+#define TRACE(c, ...) \
+       do { \
+               fprintf(stderr, "=== %s: ", (c)->name); \
+               fprintf(stderr, __VA_ARGS__); \
+               fprintf(stderr, "\n"); \
+       } while (0)
+#else
+#define TRACE(c, fmt, ...)     do { } while (0)
+#endif
+
+enum checklevel {
+       IGNORE = 0,
+       WARN = 1,
+       ERROR = 2,
+};
+
+enum checkstatus {
+       UNCHECKED = 0,
+       PREREQ,
+       PASSED,
+       FAILED,
+};
+
+struct check;
+
+typedef void (*tree_check_fn)(struct check *c, struct node *dt);
+typedef void (*node_check_fn)(struct check *c, struct node *dt, struct node *node);
+typedef void (*prop_check_fn)(struct check *c, struct node *dt,
+                             struct node *node, struct property *prop);
+
+struct check {
+       const char *name;
+       tree_check_fn tree_fn;
+       node_check_fn node_fn;
+       prop_check_fn prop_fn;
+       void *data;
+       enum checklevel level;
+       enum checkstatus status;
+       int inprogress;
+       int num_prereqs;
+       struct check **prereq;
+};
+
+#define CHECK(nm, tfn, nfn, pfn, d, lvl, ...) \
+       static struct check *nm##_prereqs[] = { __VA_ARGS__ }; \
+       static struct check nm = { \
+               .name = #nm, \
+               .tree_fn = (tfn), \
+               .node_fn = (nfn), \
+               .prop_fn = (pfn), \
+               .data = (d), \
+               .level = (lvl), \
+               .status = UNCHECKED, \
+               .num_prereqs = ARRAY_SIZE(nm##_prereqs), \
+               .prereq = nm##_prereqs, \
+       };
+
+#define TREE_CHECK(nm, d, lvl, ...) \
+       CHECK(nm, check_##nm, NULL, NULL, d, lvl, __VA_ARGS__)
+#define NODE_CHECK(nm, d, lvl, ...) \
+       CHECK(nm, NULL, check_##nm, NULL, d, lvl, __VA_ARGS__)
+#define PROP_CHECK(nm, d, lvl, ...) \
+       CHECK(nm, NULL, NULL, check_##nm, d, lvl, __VA_ARGS__)
+#define BATCH_CHECK(nm, lvl, ...) \
+       CHECK(nm, NULL, NULL, NULL, NULL, lvl, __VA_ARGS__)
+
+#ifdef __GNUC__
+static inline void check_msg(struct check *c, const char *fmt, ...) __attribute__((format (printf, 2, 3)));
+#endif
+static inline void check_msg(struct check *c, const char *fmt, ...)
+{
+       va_list ap;
+       va_start(ap, fmt);
+
+       if ((c->level < WARN) || (c->level <= quiet))
+               return; /* Suppress message */
+
+       fprintf(stderr, "%s (%s): ",
+               (c->level == ERROR) ? "ERROR" : "Warning", c->name);
+       vfprintf(stderr, fmt, ap);
+       fprintf(stderr, "\n");
+}
+
+#define FAIL(c, ...) \
+       do { \
+               TRACE((c), "\t\tFAILED at %s:%d", __FILE__, __LINE__); \
+               (c)->status = FAILED; \
+               check_msg((c), __VA_ARGS__); \
+       } while (0)
+
+static void check_nodes_props(struct check *c, struct node *dt, struct node *node)
+{
+       struct node *child;
+       struct property *prop;
+
+       TRACE(c, "%s", node->fullpath);
+       if (c->node_fn)
+               c->node_fn(c, dt, node);
+
+       if (c->prop_fn)
+               for_each_property(node, prop) {
+                       TRACE(c, "%s\t'%s'", node->fullpath, prop->name);
+                       c->prop_fn(c, dt, node, prop);
+               }
+
+       for_each_child(node, child)
+               check_nodes_props(c, dt, child);
+}
+
+static int run_check(struct check *c, struct node *dt)
+{
+       int error = 0;
+       int i;
+
+       assert(!c->inprogress);
+
+       if (c->status != UNCHECKED)
+               goto out;
+
+       c->inprogress = 1;
+
+       for (i = 0; i < c->num_prereqs; i++) {
+               struct check *prq = c->prereq[i];
+               error |= run_check(prq, dt);
+               if (prq->status != PASSED) {
+                       c->status = PREREQ;
+                       check_msg(c, "Failed prerequisite '%s'",
+                                 c->prereq[i]->name);
+               }
+       }
+
+       if (c->status != UNCHECKED)
+               goto out;
+
+       if (c->node_fn || c->prop_fn)
+               check_nodes_props(c, dt, dt);
+
+       if (c->tree_fn)
+               c->tree_fn(c, dt);
+       if (c->status == UNCHECKED)
+               c->status = PASSED;
+
+       TRACE(c, "\tCompleted, status %d", c->status);
+
+out:
+       c->inprogress = 0;
+       if ((c->status != PASSED) && (c->level == ERROR))
+               error = 1;
+       return error;
+}
+
+/*
+ * Utility check functions
+ */
+
+static void check_is_string(struct check *c, struct node *root,
+                           struct node *node)
+{
+       struct property *prop;
+       char *propname = c->data;
+
+       prop = get_property(node, propname);
+       if (!prop)
+               return; /* Not present, assumed ok */
+
+       if (!data_is_one_string(prop->val))
+               FAIL(c, "\"%s\" property in %s is not a string",
+                    propname, node->fullpath);
+}
+#define CHECK_IS_STRING(nm, propname, lvl) \
+       CHECK(nm, NULL, check_is_string, NULL, (propname), (lvl))
+
+static void check_is_cell(struct check *c, struct node *root,
+                         struct node *node)
+{
+       struct property *prop;
+       char *propname = c->data;
+
+       prop = get_property(node, propname);
+       if (!prop)
+               return; /* Not present, assumed ok */
+
+       if (prop->val.len != sizeof(cell_t))
+               FAIL(c, "\"%s\" property in %s is not a single cell",
+                    propname, node->fullpath);
+}
+#define CHECK_IS_CELL(nm, propname, lvl) \
+       CHECK(nm, NULL, check_is_cell, NULL, (propname), (lvl))
+
+/*
+ * Structural check functions
+ */
+
+static void check_duplicate_node_names(struct check *c, struct node *dt,
+                                      struct node *node)
+{
+       struct node *child, *child2;
+
+       for_each_child(node, child)
+               for (child2 = child->next_sibling;
+                    child2;
+                    child2 = child2->next_sibling)
+                       if (streq(child->name, child2->name))
+                               FAIL(c, "Duplicate node name %s",
+                                    child->fullpath);
+}
+NODE_CHECK(duplicate_node_names, NULL, ERROR);
+
+static void check_duplicate_property_names(struct check *c, struct node *dt,
+                                          struct node *node)
+{
+       struct property *prop, *prop2;
+
+       for_each_property(node, prop)
+               for (prop2 = prop->next; prop2; prop2 = prop2->next)
+                       if (streq(prop->name, prop2->name))
+                               FAIL(c, "Duplicate property name %s in %s",
+                                    prop->name, node->fullpath);
+}
+NODE_CHECK(duplicate_property_names, NULL, ERROR);
+
+static void check_explicit_phandles(struct check *c, struct node *root,
+                                         struct node *node)
+{
+       struct property *prop;
+       struct node *other;
+       cell_t phandle;
+
+       prop = get_property(node, "linux,phandle");
+       if (! prop)
+               return; /* No phandle, that's fine */
+
+       if (prop->val.len != sizeof(cell_t)) {
+               FAIL(c, "%s has bad length (%d) linux,phandle property",
+                    node->fullpath, prop->val.len);
+               return;
+       }
+
+       phandle = propval_cell(prop);
+       if ((phandle == 0) || (phandle == -1)) {
+               FAIL(c, "%s has invalid linux,phandle value 0x%x",
+                    node->fullpath, phandle);
+               return;
+       }
+
+       other = get_node_by_phandle(root, phandle);
+       if (other) {
+               FAIL(c, "%s has duplicated phandle 0x%x (seen before at %s)",
+                    node->fullpath, phandle, other->fullpath);
+               return;
+       }
+
+       node->phandle = phandle;
+}
+NODE_CHECK(explicit_phandles, NULL, ERROR);
+
+static void check_name_properties(struct check *c, struct node *root,
+                                 struct node *node)
+{
+       struct property *prop;
+
+       prop = get_property(node, "name");
+       if (!prop)
+               return; /* No name property, that's fine */
+
+       if ((prop->val.len != node->basenamelen+1)
+           || (memcmp(prop->val.val, node->name, node->basenamelen) != 0))
+               FAIL(c, "\"name\" property in %s is incorrect (\"%s\" instead"
+                    " of base node name)", node->fullpath, prop->val.val);
+}
+CHECK_IS_STRING(name_is_string, "name", ERROR);
+NODE_CHECK(name_properties, NULL, ERROR, &name_is_string);
+
+/*
+ * Reference fixup functions
+ */
+
+static void fixup_phandle_references(struct check *c, struct node *dt,
+                                    struct node *node, struct property *prop)
+{
+      struct marker *m = prop->val.markers;
+      struct node *refnode;
+      cell_t phandle;
+
+      for_each_marker_of_type(m, REF_PHANDLE) {
+             assert(m->offset + sizeof(cell_t) <= prop->val.len);
+
+             refnode = get_node_by_ref(dt, m->ref);
+             if (! refnode) {
+                     FAIL(c, "Reference to non-existent node or label \"%s\"\n",
+                          m->ref);
+                     continue;
+             }
+
+             phandle = get_node_phandle(dt, refnode);
+             *((cell_t *)(prop->val.val + m->offset)) = cpu_to_be32(phandle);
+      }
+}
+CHECK(phandle_references, NULL, NULL, fixup_phandle_references, NULL, ERROR,
+      &duplicate_node_names, &explicit_phandles);
+
+static void fixup_path_references(struct check *c, struct node *dt,
+                                 struct node *node, struct property *prop)
+{
+       struct marker *m = prop->val.markers;
+       struct node *refnode;
+       char *path;
+
+       for_each_marker_of_type(m, REF_PATH) {
+               assert(m->offset <= prop->val.len);
+
+               refnode = get_node_by_ref(dt, m->ref);
+               if (!refnode) {
+                       FAIL(c, "Reference to non-existent node or label \"%s\"\n",
+                            m->ref);
+                       continue;
+               }
+
+               path = refnode->fullpath;
+               prop->val = data_insert_at_marker(prop->val, m, path,
+                                                 strlen(path) + 1);
+       }
+}
+CHECK(path_references, NULL, NULL, fixup_path_references, NULL, ERROR,
+      &duplicate_node_names);
+
+/*
+ * Semantic checks
+ */
+CHECK_IS_CELL(address_cells_is_cell, "#address-cells", WARN);
+CHECK_IS_CELL(size_cells_is_cell, "#size-cells", WARN);
+CHECK_IS_CELL(interrupt_cells_is_cell, "#interrupt-cells", WARN);
+
+CHECK_IS_STRING(device_type_is_string, "device_type", WARN);
+CHECK_IS_STRING(model_is_string, "model", WARN);
+CHECK_IS_STRING(status_is_string, "status", WARN);
+
+static void fixup_addr_size_cells(struct check *c, struct node *dt,
+                                 struct node *node)
+{
+       struct property *prop;
+
+       node->addr_cells = -1;
+       node->size_cells = -1;
+
+       prop = get_property(node, "#address-cells");
+       if (prop)
+               node->addr_cells = propval_cell(prop);
+
+       prop = get_property(node, "#size-cells");
+       if (prop)
+               node->size_cells = propval_cell(prop);
+}
+CHECK(addr_size_cells, NULL, fixup_addr_size_cells, NULL, NULL, WARN,
+      &address_cells_is_cell, &size_cells_is_cell);
+
+#define node_addr_cells(n) \
+       (((n)->addr_cells == -1) ? 2 : (n)->addr_cells)
+#define node_size_cells(n) \
+       (((n)->size_cells == -1) ? 1 : (n)->size_cells)
+
+static void check_reg_format(struct check *c, struct node *dt,
+                            struct node *node)
+{
+       struct property *prop;
+       int addr_cells, size_cells, entrylen;
+
+       prop = get_property(node, "reg");
+       if (!prop)
+               return; /* No "reg", that's fine */
+
+       if (!node->parent) {
+               FAIL(c, "Root node has a \"reg\" property");
+               return;
+       }
+
+       if (prop->val.len == 0)
+               FAIL(c, "\"reg\" property in %s is empty", node->fullpath);
+
+       addr_cells = node_addr_cells(node->parent);
+       size_cells = node_size_cells(node->parent);
+       entrylen = (addr_cells + size_cells) * sizeof(cell_t);
+
+       if ((prop->val.len % entrylen) != 0)
+               FAIL(c, "\"reg\" property in %s has invalid length (%d bytes) "
+                    "(#address-cells == %d, #size-cells == %d)",
+                    node->fullpath, prop->val.len, addr_cells, size_cells);
+}
+NODE_CHECK(reg_format, NULL, WARN, &addr_size_cells);
+
+static void check_ranges_format(struct check *c, struct node *dt,
+                               struct node *node)
+{
+       struct property *prop;
+       int c_addr_cells, p_addr_cells, c_size_cells, p_size_cells, entrylen;
+
+       prop = get_property(node, "ranges");
+       if (!prop)
+               return;
+
+       if (!node->parent) {
+               FAIL(c, "Root node has a \"ranges\" property");
+               return;
+       }
+
+       p_addr_cells = node_addr_cells(node->parent);
+       p_size_cells = node_size_cells(node->parent);
+       c_addr_cells = node_addr_cells(node);
+       c_size_cells = node_size_cells(node);
+       entrylen = (p_addr_cells + c_addr_cells + c_size_cells) * sizeof(cell_t);
+
+       if (prop->val.len == 0) {
+               if (p_addr_cells != c_addr_cells)
+                       FAIL(c, "%s has empty \"ranges\" property but its "
+                            "#address-cells (%d) differs from %s (%d)",
+                            node->fullpath, c_addr_cells, node->parent->fullpath,
+                            p_addr_cells);
+               if (p_size_cells != c_size_cells)
+                       FAIL(c, "%s has empty \"ranges\" property but its "
+                            "#size-cells (%d) differs from %s (%d)",
+                            node->fullpath, c_size_cells, node->parent->fullpath,
+                            p_size_cells);
+       } else if ((prop->val.len % entrylen) != 0) {
+               FAIL(c, "\"ranges\" property in %s has invalid length (%d bytes) "
+                    "(parent #address-cells == %d, child #address-cells == %d, "
+                    "#size-cells == %d)", node->fullpath, prop->val.len,
+                    p_addr_cells, c_addr_cells, c_size_cells);
+       }
+}
+NODE_CHECK(ranges_format, NULL, WARN, &addr_size_cells);
+
+/*
+ * Style checks
+ */
+static void check_avoid_default_addr_size(struct check *c, struct node *dt,
+                                         struct node *node)
+{
+       struct property *reg, *ranges;
+
+       if (!node->parent)
+               return; /* Ignore root node */
+
+       reg = get_property(node, "reg");
+       ranges = get_property(node, "ranges");
+
+       if (!reg && !ranges)
+               return;
+
+       if ((node->parent->addr_cells == -1))
+               FAIL(c, "Relying on default #address-cells value for %s",
+                    node->fullpath);
+
+       if ((node->parent->size_cells == -1))
+               FAIL(c, "Relying on default #size-cells value for %s",
+                    node->fullpath);
+}
+NODE_CHECK(avoid_default_addr_size, NULL, WARN, &addr_size_cells);
+
+static void check_obsolete_chosen_interrupt_controller(struct check *c,
+                                                      struct node *dt)
+{
+       struct node *chosen;
+       struct property *prop;
+
+       chosen = get_node_by_path(dt, "/chosen");
+       if (!chosen)
+               return;
+
+       prop = get_property(chosen, "interrupt-controller");
+       if (prop)
+               FAIL(c, "/chosen has obsolete \"interrupt-controller\" "
+                    "property");
+}
+TREE_CHECK(obsolete_chosen_interrupt_controller, NULL, WARN);
+
+static struct check *check_table[] = {
+       &duplicate_node_names, &duplicate_property_names,
+       &name_is_string, &name_properties,
+       &explicit_phandles,
+       &phandle_references, &path_references,
+
+       &address_cells_is_cell, &size_cells_is_cell, &interrupt_cells_is_cell,
+       &device_type_is_string, &model_is_string, &status_is_string,
+
+       &addr_size_cells, &reg_format, &ranges_format,
+
+       &avoid_default_addr_size,
+       &obsolete_chosen_interrupt_controller,
+};
+
+int check_semantics(struct node *dt, int outversion, int boot_cpuid_phys);
+
+void process_checks(int force, struct boot_info *bi,
+                   int checkflag, int outversion, int boot_cpuid_phys)
+{
+       struct node *dt = bi->dt;
+       int i;
+       int error = 0;
+
+       for (i = 0; i < ARRAY_SIZE(check_table); i++) {
+               struct check *c = check_table[i];
+
+               if (c->level != IGNORE)
+                       error = error || run_check(c, dt);
+       }
+
+       if (error) {
+               if (!force) {
+                       fprintf(stderr, "ERROR: Input tree has errors, aborting "
+                               "(use -f to force output)\n");
+                       exit(2);
+               } else if (quiet < 3) {
+                       fprintf(stderr, "Warning: Input tree has errors, "
+                               "output forced\n");
+               }
+       }
+
+       if (checkflag) {
+               if (error) {
+                       fprintf(stderr, "Warning: Skipping semantic checks due to structural errors\n");
+               } else {
+                       if (!check_semantics(bi->dt, outversion,
+                                            boot_cpuid_phys))
+                               fprintf(stderr, "Warning: Input tree has semantic errors\n");
+               }
+       }
+}
+
+/*
+ * Semantic check functions
+ */
+
+#define ERRMSG(...) if (quiet < 2) fprintf(stderr, "ERROR: " __VA_ARGS__)
+#define WARNMSG(...) if (quiet < 1) fprintf(stderr, "Warning: " __VA_ARGS__)
+
+#define DO_ERR(...) do {ERRMSG(__VA_ARGS__); ok = 0; } while (0)
+
+#define CHECK_HAVE(node, propname) \
+       do { \
+               if (! (prop = get_property((node), (propname)))) \
+                       DO_ERR("Missing \"%s\" property in %s\n", (propname), \
+                               (node)->fullpath); \
+       } while (0);
+
+#define CHECK_HAVE_WARN(node, propname) \
+       do { \
+               if (! (prop  = get_property((node), (propname)))) \
+                       WARNMSG("%s has no \"%s\" property\n", \
+                               (node)->fullpath, (propname)); \
+       } while (0)
+
+#define CHECK_HAVE_STRING(node, propname) \
+       do { \
+               CHECK_HAVE((node), (propname)); \
+               if (prop && !data_is_one_string(prop->val)) \
+                       DO_ERR("\"%s\" property in %s is not a string\n", \
+                               (propname), (node)->fullpath); \
+       } while (0)
+
+#define CHECK_HAVE_STREQ(node, propname, value) \
+       do { \
+               CHECK_HAVE_STRING((node), (propname)); \
+               if (prop && !streq(prop->val.val, (value))) \
+                       DO_ERR("%s has wrong %s, %s (should be %s\n", \
+                               (node)->fullpath, (propname), \
+                               prop->val.val, (value)); \
+       } while (0)
+
+#define CHECK_HAVE_ONECELL(node, propname) \
+       do { \
+               CHECK_HAVE((node), (propname)); \
+               if (prop && (prop->val.len != sizeof(cell_t))) \
+                       DO_ERR("\"%s\" property in %s has wrong size %d (should be 1 cell)\n", (propname), (node)->fullpath, prop->val.len); \
+       } while (0)
+
+#define CHECK_HAVE_WARN_ONECELL(node, propname) \
+       do { \
+               CHECK_HAVE_WARN((node), (propname)); \
+               if (prop && (prop->val.len != sizeof(cell_t))) \
+                       DO_ERR("\"%s\" property in %s has wrong size %d (should be 1 cell)\n", (propname), (node)->fullpath, prop->val.len); \
+       } while (0)
+
+#define CHECK_HAVE_WARN_PHANDLE(xnode, propname, root) \
+       do { \
+               struct node *ref; \
+               CHECK_HAVE_WARN_ONECELL((xnode), (propname)); \
+               if (prop) {\
+                       cell_t phandle = propval_cell(prop); \
+                       if ((phandle == 0) || (phandle == -1)) { \
+                               DO_ERR("\"%s\" property in %s contains an invalid phandle %x\n", (propname), (xnode)->fullpath, phandle); \
+                       } else { \
+                               ref = get_node_by_phandle((root), propval_cell(prop)); \
+                               if (! ref) \
+                                       DO_ERR("\"%s\" property in %s refers to non-existant phandle %x\n", (propname), (xnode)->fullpath, propval_cell(prop)); \
+                       } \
+               } \
+       } while (0)
+
+#define CHECK_HAVE_WARN_STRING(node, propname) \
+       do { \
+               CHECK_HAVE_WARN((node), (propname)); \
+               if (prop && !data_is_one_string(prop->val)) \
+                       DO_ERR("\"%s\" property in %s is not a string\n", \
+                               (propname), (node)->fullpath); \
+       } while (0)
+
+static int check_root(struct node *root)
+{
+       struct property *prop;
+       int ok = 1;
+
+       CHECK_HAVE_STRING(root, "model");
+       CHECK_HAVE_WARN(root, "compatible");
+
+       return ok;
+}
+
+static int check_cpus(struct node *root, int outversion, int boot_cpuid_phys)
+{
+       struct node *cpus, *cpu;
+       struct property *prop;
+       struct node *bootcpu = NULL;
+       int ok = 1;
+
+       cpus = get_subnode(root, "cpus");
+       if (! cpus) {
+               ERRMSG("Missing /cpus node\n");
+               return 0;
+       }
+
+       if (cpus->addr_cells != 1)
+               DO_ERR("%s has bad #address-cells value %d (should be 1)\n",
+                      cpus->fullpath, cpus->addr_cells);
+       if (cpus->size_cells != 0)
+               DO_ERR("%s has bad #size-cells value %d (should be 0)\n",
+                      cpus->fullpath, cpus->size_cells);
+
+       for_each_child(cpus, cpu) {
+               CHECK_HAVE_STREQ(cpu, "device_type", "cpu");
+
+               CHECK_HAVE_ONECELL(cpu, "reg");
+               if (prop) {
+                       cell_t unitnum;
+                       char *eptr;
+
+                       unitnum = strtol(get_unitname(cpu), &eptr, 16);
+                       if (*eptr) {
+                               WARNMSG("%s has bad format unit name %s (should be CPU number\n",
+                                       cpu->fullpath, get_unitname(cpu));
+                       } else if (unitnum != propval_cell(prop)) {
+                               WARNMSG("%s unit name \"%s\" does not match \"reg\" property <%x>\n",
+                                      cpu->fullpath, get_unitname(cpu),
+                                      propval_cell(prop));
+                       }
+               }
+
+/*             CHECK_HAVE_ONECELL(cpu, "d-cache-line-size"); */
+/*             CHECK_HAVE_ONECELL(cpu, "i-cache-line-size"); */
+               CHECK_HAVE_ONECELL(cpu, "d-cache-size");
+               CHECK_HAVE_ONECELL(cpu, "i-cache-size");
+
+               CHECK_HAVE_WARN_ONECELL(cpu, "clock-frequency");
+               CHECK_HAVE_WARN_ONECELL(cpu, "timebase-frequency");
+
+               prop = get_property(cpu, "linux,boot-cpu");
+               if (prop) {
+                       if (prop->val.len)
+                               WARNMSG("\"linux,boot-cpu\" property in %s is non-empty\n",
+                                       cpu->fullpath);
+                       if (bootcpu)
+                               DO_ERR("Multiple boot cpus (%s and %s)\n",
+                                      bootcpu->fullpath, cpu->fullpath);
+                       else
+                               bootcpu = cpu;
+               }
+       }
+
+       if (outversion < 2) {
+               if (! bootcpu)
+                       WARNMSG("No cpu has \"linux,boot-cpu\" property\n");
+       } else {
+               if (bootcpu)
+                       WARNMSG("\"linux,boot-cpu\" property is deprecated in blob version 2 or higher\n");
+               if (boot_cpuid_phys == 0xfeedbeef)
+                       WARNMSG("physical boot CPU not set.  Use -b option to set\n");
+       }
+
+       return ok;
+}
+
+static int check_memory(struct node *root)
+{
+       struct node *mem;
+       struct property *prop;
+       int nnodes = 0;
+       int ok = 1;
+
+       for_each_child(root, mem) {
+               if (! strneq(mem->name, "memory", mem->basenamelen))
+                       continue;
+
+               nnodes++;
+
+               CHECK_HAVE_STREQ(mem, "device_type", "memory");
+               CHECK_HAVE(mem, "reg");
+       }
+
+       if (nnodes == 0) {
+               ERRMSG("No memory nodes\n");
+               return 0;
+       }
+
+       return ok;
+}
+
+int check_semantics(struct node *dt, int outversion, int boot_cpuid_phys)
+{
+       int ok = 1;
+
+       ok = ok && check_root(dt);
+       ok = ok && check_cpus(dt, outversion, boot_cpuid_phys);
+       ok = ok && check_memory(dt);
+       if (! ok)
+               return 0;
+
+       return 1;
+}
diff --git a/arch/powerpc/boot/dtc-src/data.c b/arch/powerpc/boot/dtc-src/data.c
new file mode 100644 (file)
index 0000000..a94718c
--- /dev/null
@@ -0,0 +1,321 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+#include "dtc.h"
+
+void data_free(struct data d)
+{
+       struct marker *m, *nm;
+
+       m = d.markers;
+       while (m) {
+               nm = m->next;
+               free(m->ref);
+               free(m);
+               m = nm;
+       }
+
+       assert(!d.val || d.asize);
+
+       if (d.val)
+               free(d.val);
+}
+
+struct data data_grow_for(struct data d, int xlen)
+{
+       struct data nd;
+       int newsize;
+
+       /* we must start with an allocated datum */
+       assert(!d.val || d.asize);
+
+       if (xlen == 0)
+               return d;
+
+       nd = d;
+
+       newsize = xlen;
+
+       while ((d.len + xlen) > newsize)
+               newsize *= 2;
+
+       nd.asize = newsize;
+       nd.val = xrealloc(d.val, newsize);
+
+       assert(nd.asize >= (d.len + xlen));
+
+       return nd;
+}
+
+struct data data_copy_mem(const char *mem, int len)
+{
+       struct data d;
+
+       d = data_grow_for(empty_data, len);
+
+       d.len = len;
+       memcpy(d.val, mem, len);
+
+       return d;
+}
+
+static char get_oct_char(const char *s, int *i)
+{
+       char x[4];
+       char *endx;
+       long val;
+
+       x[3] = '\0';
+       x[0] = s[(*i)];
+       if (x[0]) {
+               x[1] = s[(*i)+1];
+               if (x[1])
+                       x[2] = s[(*i)+2];
+       }
+
+       val = strtol(x, &endx, 8);
+       if ((endx - x) == 0)
+               fprintf(stderr, "Empty \\nnn escape\n");
+
+       (*i) += endx - x;
+       return val;
+}
+
+static char get_hex_char(const char *s, int *i)
+{
+       char x[3];
+       char *endx;
+       long val;
+
+       x[2] = '\0';
+       x[0] = s[(*i)];
+       if (x[0])
+               x[1] = s[(*i)+1];
+
+       val = strtol(x, &endx, 16);
+       if ((endx - x) == 0)
+               fprintf(stderr, "Empty \\x escape\n");
+
+       (*i) += endx - x;
+       return val;
+}
+
+struct data data_copy_escape_string(const char *s, int len)
+{
+       int i = 0;
+       struct data d;
+       char *q;
+
+       d = data_grow_for(empty_data, strlen(s)+1);
+
+       q = d.val;
+       while (i < len) {
+               char c = s[i++];
+
+               if (c != '\\') {
+                       q[d.len++] = c;
+                       continue;
+               }
+
+               c = s[i++];
+               assert(c);
+               switch (c) {
+               case 'a':
+                       q[d.len++] = '\a';
+                       break;
+               case 'b':
+                       q[d.len++] = '\b';
+                       break;
+               case 't':
+                       q[d.len++] = '\t';
+                       break;
+               case 'n':
+                       q[d.len++] = '\n';
+                       break;
+               case 'v':
+                       q[d.len++] = '\v';
+                       break;
+               case 'f':
+                       q[d.len++] = '\f';
+                       break;
+               case 'r':
+                       q[d.len++] = '\r';
+                       break;
+               case '0':
+               case '1':
+               case '2':
+               case '3':
+               case '4':
+               case '5':
+               case '6':
+               case '7':
+                       i--; /* need to re-read the first digit as
+                             * part of the octal value */
+                       q[d.len++] = get_oct_char(s, &i);
+                       break;
+               case 'x':
+                       q[d.len++] = get_hex_char(s, &i);
+                       break;
+               default:
+                       q[d.len++] = c;
+               }
+       }
+
+       q[d.len++] = '\0';
+       return d;
+}
+
+struct data data_copy_file(FILE *f, size_t len)
+{
+       struct data d;
+
+       d = data_grow_for(empty_data, len);
+
+       d.len = len;
+       fread(d.val, len, 1, f);
+
+       return d;
+}
+
+struct data data_append_data(struct data d, const void *p, int len)
+{
+       d = data_grow_for(d, len);
+       memcpy(d.val + d.len, p, len);
+       d.len += len;
+       return d;
+}
+
+struct data data_insert_at_marker(struct data d, struct marker *m,
+                                 const void *p, int len)
+{
+       d = data_grow_for(d, len);
+       memmove(d.val + m->offset + len, d.val + m->offset, d.len - m->offset);
+       memcpy(d.val + m->offset, p, len);
+       d.len += len;
+
+       /* Adjust all markers after the one we're inserting at */
+       m = m->next;
+       for_each_marker(m)
+               m->offset += len;
+       return d;
+}
+
+struct data data_append_markers(struct data d, struct marker *m)
+{
+       struct marker **mp = &d.markers;
+
+       /* Find the end of the markerlist */
+       while (*mp)
+               mp = &((*mp)->next);
+       *mp = m;
+       return d;
+}
+
+struct data data_merge(struct data d1, struct data d2)
+{
+       struct data d;
+       struct marker *m2 = d2.markers;
+
+       d = data_append_markers(data_append_data(d1, d2.val, d2.len), m2);
+
+       /* Adjust for the length of d1 */
+       for_each_marker(m2)
+               m2->offset += d1.len;
+
+       d2.markers = NULL; /* So data_free() doesn't clobber them */
+       data_free(d2);
+
+       return d;
+}
+
+struct data data_append_cell(struct data d, cell_t word)
+{
+       cell_t beword = cpu_to_be32(word);
+
+       return data_append_data(d, &beword, sizeof(beword));
+}
+
+struct data data_append_re(struct data d, const struct fdt_reserve_entry *re)
+{
+       struct fdt_reserve_entry bere;
+
+       bere.address = cpu_to_be64(re->address);
+       bere.size = cpu_to_be64(re->size);
+
+       return data_append_data(d, &bere, sizeof(bere));
+}
+
+struct data data_append_addr(struct data d, u64 addr)
+{
+       u64 beaddr = cpu_to_be64(addr);
+
+       return data_append_data(d, &beaddr, sizeof(beaddr));
+}
+
+struct data data_append_byte(struct data d, uint8_t byte)
+{
+       return data_append_data(d, &byte, 1);
+}
+
+struct data data_append_zeroes(struct data d, int len)
+{
+       d = data_grow_for(d, len);
+
+       memset(d.val + d.len, 0, len);
+       d.len += len;
+       return d;
+}
+
+struct data data_append_align(struct data d, int align)
+{
+       int newlen = ALIGN(d.len, align);
+       return data_append_zeroes(d, newlen - d.len);
+}
+
+struct data data_add_marker(struct data d, enum markertype type, char *ref)
+{
+       struct marker *m;
+
+       m = xmalloc(sizeof(*m));
+       m->offset = d.len;
+       m->type = type;
+       m->ref = ref;
+       m->next = NULL;
+
+       return data_append_markers(d, m);
+}
+
+int data_is_one_string(struct data d)
+{
+       int i;
+       int len = d.len;
+
+       if (len == 0)
+               return 0;
+
+       for (i = 0; i < len-1; i++)
+               if (d.val[i] == '\0')
+                       return 0;
+
+       if (d.val[len-1] != '\0')
+               return 0;
+
+       return 1;
+}
diff --git a/arch/powerpc/boot/dtc-src/dtc-lexer.l b/arch/powerpc/boot/dtc-src/dtc-lexer.l
new file mode 100644 (file)
index 0000000..c811b22
--- /dev/null
@@ -0,0 +1,328 @@
+/*
+ * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation.  2005.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ *  General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307
+ *                                                                   USA
+ */
+
+%option noyywrap nounput yylineno
+
+%x INCLUDE
+%x BYTESTRING
+%x PROPNODENAME
+%s V1
+
+PROPNODECHAR   [a-zA-Z0-9,._+*#?@-]
+PATHCHAR       ({PROPNODECHAR}|[/])
+LABEL          [a-zA-Z_][a-zA-Z0-9_]*
+
+%{
+#include "dtc.h"
+#include "srcpos.h"
+#include "dtc-parser.tab.h"
+
+
+/*#define LEXDEBUG     1*/
+
+#ifdef LEXDEBUG
+#define DPRINT(fmt, ...)       fprintf(stderr, fmt, ##__VA_ARGS__)
+#else
+#define DPRINT(fmt, ...)       do { } while (0)
+#endif
+
+static int dts_version; /* = 0 */
+
+#define BEGIN_DEFAULT()        if (dts_version == 0) { \
+                               DPRINT("<INITIAL>\n"); \
+                               BEGIN(INITIAL); \
+                       } else { \
+                               DPRINT("<V1>\n"); \
+                               BEGIN(V1); \
+                       }
+%}
+
+%%
+<*>"/include/"         BEGIN(INCLUDE);
+
+<INCLUDE>\"[^"\n]*\"   {
+                       yytext[strlen(yytext) - 1] = 0;
+                       if (!push_input_file(yytext + 1)) {
+                               /* Some unrecoverable error.*/
+                               exit(1);
+                       }
+                       BEGIN_DEFAULT();
+               }
+
+
+<*><<EOF>>             {
+                       if (!pop_input_file()) {
+                               yyterminate();
+                       }
+               }
+
+<*>\"([^\\"]|\\.)*\"   {
+                       yylloc.filenum = srcpos_filenum;
+                       yylloc.first_line = yylineno;
+                       DPRINT("String: %s\n", yytext);
+                       yylval.data = data_copy_escape_string(yytext+1,
+                                       yyleng-2);
+                       yylloc.first_line = yylineno;
+                       return DT_STRING;
+               }
+
+<*>"/dts-v1/"  {
+                       yylloc.filenum = srcpos_filenum;
+                       yylloc.first_line = yylineno;
+                       DPRINT("Keyword: /dts-v1/\n");
+                       dts_version = 1;
+                       BEGIN_DEFAULT();
+                       return DT_V1;
+               }
+
+<*>"/memreserve/"      {
+                       yylloc.filenum = srcpos_filenum;
+                       yylloc.first_line = yylineno;
+                       DPRINT("Keyword: /memreserve/\n");
+                       BEGIN_DEFAULT();
+                       return DT_MEMRESERVE;
+               }
+
+<*>{LABEL}:    {
+                       yylloc.filenum = srcpos_filenum;
+                       yylloc.first_line = yylineno;
+                       DPRINT("Label: %s\n", yytext);
+                       yylval.labelref = strdup(yytext);
+                       yylval.labelref[yyleng-1] = '\0';
+                       return DT_LABEL;
+               }
+
+<INITIAL>[bodh]# {
+                       yylloc.filenum = srcpos_filenum;
+                       yylloc.first_line = yylineno;
+                       if (*yytext == 'b')
+                               yylval.cbase = 2;
+                       else if (*yytext == 'o')
+                               yylval.cbase = 8;
+                       else if (*yytext == 'd')
+                               yylval.cbase = 10;
+                       else
+                               yylval.cbase = 16;
+                       DPRINT("Base: %d\n", yylval.cbase);
+                       return DT_BASE;
+               }
+
+<INITIAL>[0-9a-fA-F]+  {
+                       yylloc.filenum = srcpos_filenum;
+                       yylloc.first_line = yylineno;
+                       yylval.literal = strdup(yytext);
+                       DPRINT("Literal: '%s'\n", yylval.literal);
+                       return DT_LEGACYLITERAL;
+               }
+
+<V1>[0-9]+|0[xX][0-9a-fA-F]+      {
+                       yylloc.filenum = srcpos_filenum;
+                       yylloc.first_line = yylineno;
+                       yylval.literal = strdup(yytext);
+                       DPRINT("Literal: '%s'\n", yylval.literal);
+                       return DT_LITERAL;
+               }
+
+\&{LABEL}      {       /* label reference */
+                       yylloc.filenum = srcpos_filenum;
+                       yylloc.first_line = yylineno;
+                       DPRINT("Ref: %s\n", yytext+1);
+                       yylval.labelref = strdup(yytext+1);
+                       return DT_REF;
+               }
+
+"&{/"{PATHCHAR}+\}     {       /* new-style path reference */
+                       yylloc.filenum = srcpos_filenum;
+                       yylloc.first_line = yylineno;
+                       yytext[yyleng-1] = '\0';
+                       DPRINT("Ref: %s\n", yytext+2);
+                       yylval.labelref = strdup(yytext+2);
+                       return DT_REF;
+               }
+
+<INITIAL>"&/"{PATHCHAR}+ {     /* old-style path reference */
+                       yylloc.filenum = srcpos_filenum;
+                       yylloc.first_line = yylineno;
+                       DPRINT("Ref: %s\n", yytext+1);
+                       yylval.labelref = strdup(yytext+1);
+                       return DT_REF;
+               }
+
+<BYTESTRING>[0-9a-fA-F]{2} {
+                       yylloc.filenum = srcpos_filenum;
+                       yylloc.first_line = yylineno;
+                       yylval.byte = strtol(yytext, NULL, 16);
+                       DPRINT("Byte: %02x\n", (int)yylval.byte);
+                       return DT_BYTE;
+               }
+
+<BYTESTRING>"]"        {
+                       yylloc.filenum = srcpos_filenum;
+                       yylloc.first_line = yylineno;
+                       DPRINT("/BYTESTRING\n");
+                       BEGIN_DEFAULT();
+                       return ']';
+               }
+
+<PROPNODENAME>{PROPNODECHAR}+ {
+                       yylloc.filenum = srcpos_filenum;
+                       yylloc.first_line = yylineno;
+                       DPRINT("PropNodeName: %s\n", yytext);
+                       yylval.propnodename = strdup(yytext);
+                       BEGIN_DEFAULT();
+                       return DT_PROPNODENAME;
+               }
+
+
+<*>[[:space:]]+        /* eat whitespace */
+
+<*>"/*"([^*]|\*+[^*/])*\*+"/"  {
+                       yylloc.filenum = srcpos_filenum;
+                       yylloc.first_line = yylineno;
+                       DPRINT("Comment: %s\n", yytext);
+                       /* eat comments */
+               }
+
+<*>"//".*\n    /* eat line comments */
+
+<*>.           {
+                       yylloc.filenum = srcpos_filenum;
+                       yylloc.first_line = yylineno;
+                       DPRINT("Char: %c (\\x%02x)\n", yytext[0],
+                               (unsigned)yytext[0]);
+                       if (yytext[0] == '[') {
+                               DPRINT("<BYTESTRING>\n");
+                               BEGIN(BYTESTRING);
+                       }
+                       if ((yytext[0] == '{')
+                           || (yytext[0] == ';')) {
+                               DPRINT("<PROPNODENAME>\n");
+                               BEGIN(PROPNODENAME);
+                       }
+                       return yytext[0];
+               }
+
+%%
+
+
+/*
+ * Stack of nested include file contexts.
+ */
+
+struct incl_file {
+       int filenum;
+       FILE *file;
+       YY_BUFFER_STATE yy_prev_buf;
+       int yy_prev_lineno;
+       struct incl_file *prev;
+};
+
+struct incl_file *incl_file_stack;
+
+
+/*
+ * Detect infinite include recursion.
+ */
+#define MAX_INCLUDE_DEPTH      (100)
+
+static int incl_depth = 0;
+
+
+int push_input_file(const char *filename)
+{
+       FILE *f;
+       struct incl_file *incl_file;
+
+       if (!filename) {
+               yyerror("No include file name given.");
+               return 0;
+       }
+
+       if (incl_depth++ >= MAX_INCLUDE_DEPTH) {
+               yyerror("Includes nested too deeply");
+               return 0;
+       }
+
+       f = dtc_open_file(filename);
+
+       incl_file = malloc(sizeof(struct incl_file));
+       if (!incl_file) {
+               yyerror("Can not allocate include file space.");
+               return 0;
+       }
+
+       /*
+        * Save current context.
+        */
+       incl_file->yy_prev_buf = YY_CURRENT_BUFFER;
+       incl_file->yy_prev_lineno = yylineno;
+       incl_file->filenum = srcpos_filenum;
+       incl_file->file = yyin;
+       incl_file->prev = incl_file_stack;
+
+       incl_file_stack = incl_file;
+
+       /*
+        * Establish new context.
+        */
+       srcpos_filenum = lookup_file_name(filename, 0);
+       yylineno = 1;
+       yyin = f;
+       yy_switch_to_buffer(yy_create_buffer(yyin, YY_BUF_SIZE));
+
+       return 1;
+}
+
+
+int pop_input_file(void)
+{
+       struct incl_file *incl_file;
+
+       if (incl_file_stack == 0)
+               return 0;
+
+       fclose(yyin);
+
+       /*
+        * Pop.
+        */
+       --incl_depth;
+       incl_file = incl_file_stack;
+       incl_file_stack = incl_file->prev;
+
+       /*
+        * Recover old context.
+        */
+       yy_delete_buffer(YY_CURRENT_BUFFER);
+       yy_switch_to_buffer(incl_file->yy_prev_buf);
+       yylineno = incl_file->yy_prev_lineno;
+       srcpos_filenum = incl_file->filenum;
+       yyin = incl_file->file;
+
+       /*
+        * Free old state.
+        */
+       free(incl_file);
+
+       if (YY_CURRENT_BUFFER == 0)
+               return 0;
+
+       return 1;
+}
diff --git a/arch/powerpc/boot/dtc-src/dtc-lexer.lex.c_shipped b/arch/powerpc/boot/dtc-src/dtc-lexer.lex.c_shipped
new file mode 100644 (file)
index 0000000..d0f7424
--- /dev/null
@@ -0,0 +1,2174 @@
+#line 2 "dtc-lexer.lex.c"
+
+#line 4 "dtc-lexer.lex.c"
+
+#define  YY_INT_ALIGNED short int
+
+/* A lexical scanner generated by flex */
+
+#define FLEX_SCANNER
+#define YY_FLEX_MAJOR_VERSION 2
+#define YY_FLEX_MINOR_VERSION 5
+#define YY_FLEX_SUBMINOR_VERSION 33
+#if YY_FLEX_SUBMINOR_VERSION > 0
+#define FLEX_BETA
+#endif
+
+/* First, we deal with  platform-specific or compiler-specific issues. */
+
+/* begin standard C headers. */
+#include <stdio.h>
+#include <string.h>
+#include <errno.h>
+#include <stdlib.h>
+
+/* end standard C headers. */
+
+/* flex integer type definitions */
+
+#ifndef FLEXINT_H
+#define FLEXINT_H
+
+/* C99 systems have <inttypes.h>. Non-C99 systems may or may not. */
+
+#if __STDC_VERSION__ >= 199901L
+
+/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
+ * if you want the limit (max/min) macros for int types. 
+ */
+#ifndef __STDC_LIMIT_MACROS
+#define __STDC_LIMIT_MACROS 1
+#endif
+
+#include <inttypes.h>
+typedef int8_t flex_int8_t;
+typedef uint8_t flex_uint8_t;
+typedef int16_t flex_int16_t;
+typedef uint16_t flex_uint16_t;
+typedef int32_t flex_int32_t;
+typedef uint32_t flex_uint32_t;
+#else
+typedef signed char flex_int8_t;
+typedef short int flex_int16_t;
+typedef int flex_int32_t;
+typedef unsigned char flex_uint8_t; 
+typedef unsigned short int flex_uint16_t;
+typedef unsigned int flex_uint32_t;
+#endif /* ! C99 */
+
+/* Limits of integral types. */
+#ifndef INT8_MIN
+#define INT8_MIN               (-128)
+#endif
+#ifndef INT16_MIN
+#define INT16_MIN              (-32767-1)
+#endif
+#ifndef INT32_MIN
+#define INT32_MIN              (-2147483647-1)
+#endif
+#ifndef INT8_MAX
+#define INT8_MAX               (127)
+#endif
+#ifndef INT16_MAX
+#define INT16_MAX              (32767)
+#endif
+#ifndef INT32_MAX
+#define INT32_MAX              (2147483647)
+#endif
+#ifndef UINT8_MAX
+#define UINT8_MAX              (255U)
+#endif
+#ifndef UINT16_MAX
+#define UINT16_MAX             (65535U)
+#endif
+#ifndef UINT32_MAX
+#define UINT32_MAX             (4294967295U)
+#endif
+
+#endif /* ! FLEXINT_H */
+
+#ifdef __cplusplus
+
+/* The "const" storage-class-modifier is valid. */
+#define YY_USE_CONST
+
+#else  /* ! __cplusplus */
+
+#if __STDC__
+
+#define YY_USE_CONST
+
+#endif /* __STDC__ */
+#endif /* ! __cplusplus */
+
+#ifdef YY_USE_CONST
+#define yyconst const
+#else
+#define yyconst
+#endif
+
+/* Returned upon end-of-file. */
+#define YY_NULL 0
+
+/* Promotes a possibly negative, possibly signed char to an unsigned
+ * integer for use as an array index.  If the signed char is negative,
+ * we want to instead treat it as an 8-bit unsigned char, hence the
+ * double cast.
+ */
+#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c)
+
+/* Enter a start condition.  This macro really ought to take a parameter,
+ * but we do it the disgusting crufty way forced on us by the ()-less
+ * definition of BEGIN.
+ */
+#define BEGIN (yy_start) = 1 + 2 *
+
+/* Translate the current start state into a value that can be later handed
+ * to BEGIN to return to the state.  The YYSTATE alias is for lex
+ * compatibility.
+ */
+#define YY_START (((yy_start) - 1) / 2)
+#define YYSTATE YY_START
+
+/* Action number for EOF rule of a given start state. */
+#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1)
+
+/* Special action meaning "start processing a new file". */
+#define YY_NEW_FILE yyrestart(yyin  )
+
+#define YY_END_OF_BUFFER_CHAR 0
+
+/* Size of default input buffer. */
+#ifndef YY_BUF_SIZE
+#define YY_BUF_SIZE 16384
+#endif
+
+/* The state buf must be large enough to hold one state per character in the main buffer.
+ */
+#define YY_STATE_BUF_SIZE   ((YY_BUF_SIZE + 2) * sizeof(yy_state_type))
+
+#ifndef YY_TYPEDEF_YY_BUFFER_STATE
+#define YY_TYPEDEF_YY_BUFFER_STATE
+typedef struct yy_buffer_state *YY_BUFFER_STATE;
+#endif
+
+extern int yyleng;
+
+extern FILE *yyin, *yyout;
+
+#define EOB_ACT_CONTINUE_SCAN 0
+#define EOB_ACT_END_OF_FILE 1
+#define EOB_ACT_LAST_MATCH 2
+
+    /* Note: We specifically omit the test for yy_rule_can_match_eol because it requires
+     *       access to the local variable yy_act. Since yyless() is a macro, it would break
+     *       existing scanners that call yyless() from OUTSIDE yylex. 
+     *       One obvious solution it to make yy_act a global. I tried that, and saw
+     *       a 5% performance hit in a non-yylineno scanner, because yy_act is
+     *       normally declared as a register variable-- so it is not worth it.
+     */
+    #define  YY_LESS_LINENO(n) \
+            do { \
+                int yyl;\
+                for ( yyl = n; yyl < yyleng; ++yyl )\
+                    if ( yytext[yyl] == '\n' )\
+                        --yylineno;\
+            }while(0)
+    
+/* Return all but the first "n" matched characters back to the input stream. */
+#define yyless(n) \
+       do \
+               { \
+               /* Undo effects of setting up yytext. */ \
+        int yyless_macro_arg = (n); \
+        YY_LESS_LINENO(yyless_macro_arg);\
+               *yy_cp = (yy_hold_char); \
+               YY_RESTORE_YY_MORE_OFFSET \
+               (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \
+               YY_DO_BEFORE_ACTION; /* set up yytext again */ \
+               } \
+       while ( 0 )
+
+#define unput(c) yyunput( c, (yytext_ptr)  )
+
+/* The following is because we cannot portably get our hands on size_t
+ * (without autoconf's help, which isn't available because we want
+ * flex-generated scanners to compile on their own).
+ */
+
+#ifndef YY_TYPEDEF_YY_SIZE_T
+#define YY_TYPEDEF_YY_SIZE_T
+typedef unsigned int yy_size_t;
+#endif
+
+#ifndef YY_STRUCT_YY_BUFFER_STATE
+#define YY_STRUCT_YY_BUFFER_STATE
+struct yy_buffer_state
+       {
+       FILE *yy_input_file;
+
+       char *yy_ch_buf;                /* input buffer */
+       char *yy_buf_pos;               /* current position in input buffer */
+
+       /* Size of input buffer in bytes, not including room for EOB
+        * characters.
+        */
+       yy_size_t yy_buf_size;
+
+       /* Number of characters read into yy_ch_buf, not including EOB
+        * characters.
+        */
+       int yy_n_chars;
+
+       /* Whether we "own" the buffer - i.e., we know we created it,
+        * and can realloc() it to grow it, and should free() it to
+        * delete it.
+        */
+       int yy_is_our_buffer;
+
+       /* Whether this is an "interactive" input source; if so, and
+        * if we're using stdio for input, then we want to use getc()
+        * instead of fread(), to make sure we stop fetching input after
+        * each newline.
+        */
+       int yy_is_interactive;
+
+       /* Whether we're considered to be at the beginning of a line.
+        * If so, '^' rules will be active on the next match, otherwise
+        * not.
+        */
+       int yy_at_bol;
+
+    int yy_bs_lineno; /**< The line count. */
+    int yy_bs_column; /**< The column count. */
+    
+       /* Whether to try to fill the input buffer when we reach the
+        * end of it.
+        */
+       int yy_fill_buffer;
+
+       int yy_buffer_status;
+
+#define YY_BUFFER_NEW 0
+#define YY_BUFFER_NORMAL 1
+       /* When an EOF's been seen but there's still some text to process
+        * then we mark the buffer as YY_EOF_PENDING, to indicate that we
+        * shouldn't try reading from the input source any more.  We might
+        * still have a bunch of tokens to match, though, because of
+        * possible backing-up.
+        *
+        * When we actually see the EOF, we change the status to "new"
+        * (via yyrestart()), so that the user can continue scanning by
+        * just pointing yyin at a new input file.
+        */
+#define YY_BUFFER_EOF_PENDING 2
+
+       };
+#endif /* !YY_STRUCT_YY_BUFFER_STATE */
+
+/* Stack of input buffers. */
+static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */