Merge master.kernel.org:/pub/scm/linux/kernel/git/cooloney/blackfin-2.6
authorLinus Torvalds <torvalds@woody.linux-foundation.org>
Thu, 12 Jul 2007 20:25:24 +0000 (13:25 -0700)
committerLinus Torvalds <torvalds@woody.linux-foundation.org>
Thu, 12 Jul 2007 20:25:24 +0000 (13:25 -0700)
* master.kernel.org:/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (30 commits)
  Blackfin serial driver: supporting BF548-EZKIT serial port
  Video Console: Blackfin doesnt support VGA console
  Blackfin arch: Add peripheral io API to gpio header file
  Blackfin arch: set up gpio interrupt IRQ_PJ9 for BF54x ATAPI PATA driver
  Blackfin arch: add missing CONFIG_LARGE_ALLOCS when upstream merging
  Blackfin arch: as pointed out by Robert P. J. Day, update the CPU_FREQ name to match current Kconfig
  Blackfin arch: extract the entry point from the linked kernel
  Blackfin arch: clean up some coding style issues
  Blackfin arch: combine the common code of free_initrd_mem and free_initmem
  Blackfin arch: Add Support for Peripheral PortMux and resouce allocation
  Blackfin arch: use PAGE_SIZE when doing aligns rather than hardcoded values
  Blackfin arch: fix bug set dma_address properly in dma_map_sg
  Blackfin arch: Disable CACHELINE_ALIGNED_L1 for BF54x by default
  Blackfin arch: Port the dm9000 driver to Blackfin by using the correct low-level io routines
  Blackfin arch: There is no CDPRIO Bit in the EBIU_AMGCTL Register of BF54x arch
  Blackfin arch: scrub dead code
  Blackfin arch: Fix Warning add some defines in BF54x header file
  Blackfin arch: add BF54x missing GPIO access functions
  Blackfin arch: Some memory and code optimizations - Fix SYS_IRQS
  Blackfin arch: Enable BF54x PIN/GPIO interrupts
  ...

121 files changed:
Documentation/blackfin/kgdb.txt [new file with mode: 0644]
arch/blackfin/Kconfig
arch/blackfin/Makefile
arch/blackfin/boot/Makefile
arch/blackfin/configs/BF548-EZKIT_defconfig [new file with mode: 0644]
arch/blackfin/kernel/Makefile
arch/blackfin/kernel/asm-offsets.c
arch/blackfin/kernel/bfin_dma_5xx.c
arch/blackfin/kernel/bfin_gpio.c
arch/blackfin/kernel/bfin_ksyms.c
arch/blackfin/kernel/cacheinit.c [new file with mode: 0644]
arch/blackfin/kernel/cplbinit.c [new file with mode: 0644]
arch/blackfin/kernel/dma-mapping.c
arch/blackfin/kernel/dualcore_test.c
arch/blackfin/kernel/fixed_code.S [new file with mode: 0644]
arch/blackfin/kernel/flat.c
arch/blackfin/kernel/irqchip.c
arch/blackfin/kernel/kgdb.c [new file with mode: 0644]
arch/blackfin/kernel/module.c
arch/blackfin/kernel/process.c
arch/blackfin/kernel/ptrace.c
arch/blackfin/kernel/setup.c
arch/blackfin/kernel/signal.c
arch/blackfin/kernel/sys_bfin.c
arch/blackfin/kernel/time.c
arch/blackfin/kernel/traps.c
arch/blackfin/kernel/vmlinux.lds.S
arch/blackfin/lib/strcmp.c
arch/blackfin/lib/strcpy.c
arch/blackfin/lib/strncmp.c
arch/blackfin/lib/strncpy.c
arch/blackfin/mach-bf533/Makefile
arch/blackfin/mach-bf533/boards/cm_bf533.c
arch/blackfin/mach-bf533/boards/ezkit.c
arch/blackfin/mach-bf533/boards/generic_board.c
arch/blackfin/mach-bf533/boards/stamp.c
arch/blackfin/mach-bf533/cpu.c
arch/blackfin/mach-bf533/dma.c [new file with mode: 0644]
arch/blackfin/mach-bf533/head.S
arch/blackfin/mach-bf533/ints-priority.c
arch/blackfin/mach-bf537/Makefile
arch/blackfin/mach-bf537/boards/cm_bf537.c
arch/blackfin/mach-bf537/boards/eth_mac.c
arch/blackfin/mach-bf537/boards/generic_board.c
arch/blackfin/mach-bf537/boards/pnav10.c
arch/blackfin/mach-bf537/boards/stamp.c
arch/blackfin/mach-bf537/dma.c [new file with mode: 0644]
arch/blackfin/mach-bf537/head.S
arch/blackfin/mach-bf537/ints-priority.c
arch/blackfin/mach-bf548/Kconfig [new file with mode: 0644]
arch/blackfin/mach-bf548/Makefile [new file with mode: 0644]
arch/blackfin/mach-bf548/boards/Makefile [new file with mode: 0644]
arch/blackfin/mach-bf548/boards/ezkit.c [new file with mode: 0644]
arch/blackfin/mach-bf548/boards/led.S [new file with mode: 0644]
arch/blackfin/mach-bf548/cpu.c [new file with mode: 0644]
arch/blackfin/mach-bf548/dma.c [new file with mode: 0644]
arch/blackfin/mach-bf548/gpio.c [new file with mode: 0644]
arch/blackfin/mach-bf548/head.S [new file with mode: 0644]
arch/blackfin/mach-bf548/ints-priority.c [new file with mode: 0644]
arch/blackfin/mach-bf561/Makefile
arch/blackfin/mach-bf561/boards/cm_bf561.c
arch/blackfin/mach-bf561/boards/ezkit.c
arch/blackfin/mach-bf561/boards/generic_board.c
arch/blackfin/mach-bf561/boards/tepla.c
arch/blackfin/mach-bf561/coreb.c
arch/blackfin/mach-bf561/dma.c [new file with mode: 0644]
arch/blackfin/mach-bf561/head.S
arch/blackfin/mach-bf561/ints-priority.c
arch/blackfin/mach-common/Makefile
arch/blackfin/mach-common/cacheinit.S
arch/blackfin/mach-common/cplbinfo.c
arch/blackfin/mach-common/entry.S
arch/blackfin/mach-common/interrupt.S
arch/blackfin/mach-common/ints-priority-dc.c
arch/blackfin/mach-common/ints-priority-sc.c
arch/blackfin/mach-common/pm.c
arch/blackfin/mm/blackfin_sram.c
arch/blackfin/mm/init.c
arch/blackfin/oprofile/common.c
arch/blackfin/oprofile/op_model_bf533.c
arch/blackfin/oprofile/timer_int.c
drivers/net/Kconfig
drivers/net/dm9000.c
drivers/serial/Kconfig
drivers/serial/bfin_5xx.c
drivers/video/console/Kconfig
include/asm-blackfin/Kbuild
include/asm-blackfin/bfin-global.h
include/asm-blackfin/cplbinit.h
include/asm-blackfin/fixed_code.h [new file with mode: 0644]
include/asm-blackfin/gpio.h
include/asm-blackfin/hardirq.h
include/asm-blackfin/kgdb.h [new file with mode: 0644]
include/asm-blackfin/mach-bf533/dma.h
include/asm-blackfin/mach-bf533/portmux.h [new file with mode: 0644]
include/asm-blackfin/mach-bf537/dma.h
include/asm-blackfin/mach-bf537/portmux.h [new file with mode: 0644]
include/asm-blackfin/mach-bf548/anomaly.h [new file with mode: 0644]
include/asm-blackfin/mach-bf548/bf548.h [new file with mode: 0644]
include/asm-blackfin/mach-bf548/bfin_serial_5xx.h [new file with mode: 0644]
include/asm-blackfin/mach-bf548/blackfin.h [new file with mode: 0644]
include/asm-blackfin/mach-bf548/cdefBF54x_base.h
include/asm-blackfin/mach-bf548/defBF542.h
include/asm-blackfin/mach-bf548/defBF544.h
include/asm-blackfin/mach-bf548/defBF548.h
include/asm-blackfin/mach-bf548/defBF549.h
include/asm-blackfin/mach-bf548/defBF54x_base.h
include/asm-blackfin/mach-bf548/dma.h [new file with mode: 0644]
include/asm-blackfin/mach-bf548/gpio.h [new file with mode: 0644]
include/asm-blackfin/mach-bf548/irq.h [new file with mode: 0644]
include/asm-blackfin/mach-bf548/mem_init.h [new file with mode: 0644]
include/asm-blackfin/mach-bf548/mem_map.h [new file with mode: 0644]
include/asm-blackfin/mach-bf548/portmux.h [new file with mode: 0644]
include/asm-blackfin/mach-bf561/cdefBF561.h
include/asm-blackfin/mach-bf561/dma.h
include/asm-blackfin/mach-bf561/portmux.h [new file with mode: 0644]
include/asm-blackfin/mach-common/cdef_LPBlackfin.h
include/asm-blackfin/mman.h
include/asm-blackfin/page.h
include/asm-blackfin/portmux.h [new file with mode: 0644]
include/asm-blackfin/trace.h [new file with mode: 0644]

diff --git a/Documentation/blackfin/kgdb.txt b/Documentation/blackfin/kgdb.txt
new file mode 100644 (file)
index 0000000..84f6a48
--- /dev/null
@@ -0,0 +1,155 @@
+                       A Simple Guide to Configure KGDB
+
+                       Sonic Zhang <sonic.zhang@analog.com>
+                               Aug. 24th 2006
+
+
+This KGDB patch enables the kernel developer to do source level debugging on
+the kernel for the Blackfin architecture.  The debugging works over either the
+ethernet interface or one of the uarts.  Both software breakpoints and
+hardware breakpoints are supported in this version.
+http://docs.blackfin.uclinux.org/doku.php?id=kgdb
+
+
+2 known issues:
+1. This bug:
+       http://blackfin.uclinux.org/tracker/index.php?func=detail&aid=544&group_id=18&atid=145
+   The GDB client for Blackfin uClinux causes incorrect values of local
+   variables to be displayed when the user breaks the running of kernel in GDB.
+2. Because of a hardware bug in Blackfin 533 v1.0.3:
+       05000067 - Watchpoints (Hardware Breakpoints) are not supported
+   Hardware breakpoints cannot be set properly.
+
+
+Debug over Ethernet:
+1. Compile and install the cross platform version of gdb for blackfin, which
+   can be found at $(BINROOT)/bfin-elf-gdb.
+
+2. Apply this patch to the 2.6.x kernel.  Select the menuconfig option under
+   "Kernel hacking" -> "Kernel debugging" -> "KGDB: kernel debug with remote gdb".
+   With this selected, option "Full Symbolic/Source Debugging support" and 
+   "Compile the kernel with frame pointers" are also selected.
+
+3. Select option "KGDB: connect over (Ethernet)".  Add "kgdboe=@target-IP/,@host-IP/" to
+   the option "Compiled-in Kernel Boot Parameter" under "Kernel hacking".
+
+4. Connect minicom to the serial port and boot the kernel image.
+
+5. Configure the IP "/> ifconfig eth0 target-IP"
+
+6. Start GDB client "bfin-elf-gdb vmlinux".
+
+7. Connect to the target "(gdb) target remote udp:target-IP:6443".
+
+8. Set software breakpoint "(gdb) break sys_open".
+
+9. Continue "(gdb) c".
+
+10. Run ls in the target console "/> ls".
+
+11. Breakpoint hits. "Breakpoint 1: sys_open(..."
+
+12. Display local variables and function paramters.
+    (*) This operation gives wrong results, see known issue 1.
+
+13. Single stepping "(gdb) si".
+
+14. Remove breakpoint 1. "(gdb) del 1"
+
+15. Set hardware breakpoint "(gdb) hbreak sys_open".
+
+16. Continue "(gdb) c".
+
+17. Run ls in the target console "/> ls".
+
+18. Hardware breakpoint hits. "Breakpoint 1: sys_open(...".
+    (*) This hardware breakpoint will not be hit, see known issue 2.
+
+19. Continue "(gdb) c".
+
+20. Interrupt the target in GDB "Ctrl+C".
+
+21. Detach from the target "(gdb) detach".
+
+22. Exit GDB "(gdb) quit".
+
+
+Debug over the UART:
+
+1. Compile and install the cross platform version of gdb for blackfin, which
+   can be found at $(BINROOT)/bfin-elf-gdb.
+
+2. Apply this patch to the 2.6.x kernel.  Select the menuconfig option under
+   "Kernel hacking" -> "Kernel debugging" -> "KGDB: kernel debug with remote gdb".
+   With this selected, option "Full Symbolic/Source Debugging support" and 
+   "Compile the kernel with frame pointers" are also selected.
+
+3. Select option "KGDB: connect over (UART)".  Set "KGDB: UART port number" to be
+   a different one from the console.  Don't forget to change the mode of
+   blackfin serial driver to PIO.  Otherwise kgdb works incorrectly on UART.
+4. If you want connect to kgdb when the kernel boots, enable
+   "KGDB: Wait for gdb connection early" 
+
+5. Compile kernel.
+
+6. Connect minicom to the serial port of the console and boot the kernel image.
+
+7. Start GDB client "bfin-elf-gdb vmlinux".
+
+8. Set the baud rate in GDB "(gdb) set remotebaud 57600".
+
+9. Connect to the target on the second serial port "(gdb) target remote /dev/ttyS1".
+
+10. Set software breakpoint "(gdb) break sys_open".
+
+11. Continue "(gdb) c". 
+
+12. Run ls in the target console "/> ls". 
+
+13. A breakpoint is hit. "Breakpoint 1: sys_open(..."
+
+14. All other operations are the same as that in KGDB over Ethernet. 
+
+
+Debug over the same UART as console:
+
+1. Compile and install the cross platform version of gdb for blackfin, which
+   can be found at $(BINROOT)/bfin-elf-gdb.
+
+2. Apply this patch to the 2.6.x kernel.  Select the menuconfig option under
+   "Kernel hacking" -> "Kernel debugging" -> "KGDB: kernel debug with remote gdb".
+   With this selected, option "Full Symbolic/Source Debugging support" and 
+   "Compile the kernel with frame pointers" are also selected.
+
+3. Select option "KGDB: connect over UART".  Set "KGDB: UART port number" to console.
+   Don't forget to change the mode of blackfin serial driver to PIO.
+   Otherwise kgdb works incorrectly on UART.
+4. If you want connect to kgdb when the kernel boots, enable
+   "KGDB: Wait for gdb connection early" 
+
+5. Connect minicom to the serial port and boot the kernel image. 
+
+6. (Optional) Ask target to wait for gdb connection by entering Ctrl+A. In minicom, you should enter Ctrl+A+A.
+
+7. Start GDB client "bfin-elf-gdb vmlinux".
+
+8. Set the baud rate in GDB "(gdb) set remotebaud 57600".
+
+9. Connect to the target "(gdb) target remote /dev/ttyS0".
+
+10. Set software breakpoint "(gdb) break sys_open".
+
+11. Continue "(gdb) c". Then enter Ctrl+C twice to stop GDB connection.
+
+12. Run ls in the target console "/> ls". Dummy string can be seen on the console.
+
+13. Then connect the gdb to target again. "(gdb) target remote /dev/ttyS0".
+    Now you will find a breakpoint is hit. "Breakpoint 1: sys_open(..."
+
+14. All other operations are the same as that in KGDB over Ethernet.  The only
+    difference is that after continue command in GDB, please stop GDB
+    connection by 2 "Ctrl+C"s and connect again after breakpoints are hit or
+    Ctrl+A is entered.
index d98bafcaca59a3a88b47ad3dbde222f67ae18982..017defaa525b2b8981889437824df7ae4220c246 100644 (file)
@@ -71,6 +71,7 @@ config GENERIC_CALIBRATE_DELAY
 
 config IRQCHIP_DEMUX_GPIO
        bool
+       depends on (BF53x || BF561 || BF54x)
        default y
 
 source "init/Kconfig"
@@ -114,6 +115,26 @@ config BF537
        help
          BF537 Processor Support.
 
+config BF542
+       bool "BF542"
+       help
+         BF542 Processor Support.
+
+config BF544
+       bool "BF544"
+       help
+         BF544 Processor Support.
+
+config BF548
+       bool "BF548"
+       help
+         BF548 Processor Support.
+
+config BF549
+       bool "BF549"
+       help
+         BF549 Processor Support.
+
 config BF561
        bool "BF561"
        help
@@ -125,6 +146,11 @@ choice
        prompt "Silicon Rev"
        default BF_REV_0_2 if BF537
        default BF_REV_0_3 if BF533
+       default BF_REV_0_0 if BF549
+
+config BF_REV_0_0
+       bool "0.0"
+       depends on (BF549)
 
 config BF_REV_0_2
        bool "0.2"
@@ -150,6 +176,16 @@ config BF_REV_NONE
 
 endchoice
 
+config BF53x
+       bool
+       depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
+       default y
+
+config BF54x
+       bool
+       depends on (BF542 || BF544 || BF548 || BF549)
+       default y
+
 config BFIN_DUAL_CORE
        bool
        depends on (BF561)
@@ -198,6 +234,12 @@ config BFIN537_BLUETECHNIX_CM
        help
          CM-BF537 support for EVAL- and DEV-Board.
 
+config BFIN548_EZKIT
+       bool "BF548-EZKIT"
+       depends on (BF548 || BF549)
+         help
+         BFIN548-EZKIT board Support.
+
 config BFIN561_BLUETECHNIX_CM
        bool "Bluetechnix CM-BF561"
        depends on (BF561)
@@ -265,6 +307,7 @@ config BFIN_SHARED_FLASH_ENET
 source "arch/blackfin/mach-bf533/Kconfig"
 source "arch/blackfin/mach-bf561/Kconfig"
 source "arch/blackfin/mach-bf537/Kconfig"
+source "arch/blackfin/mach-bf548/Kconfig"
 
 menu "Board customizations"
 
@@ -497,7 +540,8 @@ config IP_CHECKSUM_L1
 
 config CACHELINE_ALIGNED_L1
        bool "Locate cacheline_aligned data to L1 Data Memory"
-       default y
+       default y if !BF54x
+       default n if BF54x
        depends on !BF531
        help
          If enabled cacheline_anligned data is linked
@@ -541,9 +585,17 @@ endchoice
 
 source "mm/Kconfig"
 
+config LARGE_ALLOCS
+       bool "Allow allocating large blocks (> 1MB) of memory"
+       help
+         Allow the slab memory allocator to keep chains for very large
+         memory sizes - upto 32MB. You may need this if your system has
+         a lot of RAM, and you need to able to allocate very large
+         contiguous chunks. If unsure, say N.
+
 config BFIN_DMA_5XX
        bool "Enable DMA Support"
-       depends on (BF533 || BF532 || BF531 || BF537 || BF536 || BF534 || BF561)
+       depends on (BF533 || BF532 || BF531 || BF537 || BF536 || BF534 || BF561 || BF54x)
        default y
        help
          DMA driver for BF5xx.
@@ -686,6 +738,7 @@ config C_AMCKEN
 
 config C_CDPRIO
        bool "DMA has priority over core for ext. accesses"
+       depends on !BF54x
        default n
 
 config C_B0PEN
@@ -839,7 +892,7 @@ endchoice
 
 endmenu
 
-if (BF537 || BF533)
+if (BF537 || BF533 || BF54x)
 
 menu "CPU Frequency scaling"
 
index 6971a4418dfe5886083427c07031fc1e554d5f28..1b75672dfc8f8800484463b326f623d6b8bde412 100644 (file)
@@ -24,6 +24,8 @@ machine-$(CONFIG_BF533) := bf533
 machine-$(CONFIG_BF534) := bf537
 machine-$(CONFIG_BF536) := bf537
 machine-$(CONFIG_BF537) := bf537
+machine-$(CONFIG_BF548) := bf548
+machine-$(CONFIG_BF549) := bf548
 machine-$(CONFIG_BF561) := bf561
 MACHINE := $(machine-y)
 export MACHINE
index 49e8098d4c212b7635e30e86070bc4fa151d357e..8cd33560e8179922b34f454ffddcdc8e911d24cb 100644 (file)
@@ -13,7 +13,8 @@ extra-y += vmlinux.bin vmlinux.gz
 
 quiet_cmd_uimage = UIMAGE  $@
       cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A $(ARCH) -O linux -T kernel \
-                   -C gzip -a $(CONFIG_BOOT_LOAD) -e $(CONFIG_BOOT_LOAD) -n 'Linux-$(KERNELRELEASE)' \
+                   -C gzip -n 'Linux-$(KERNELRELEASE)' -a $(CONFIG_BOOT_LOAD) \
+                   -e $(shell $(NM) vmlinux | awk '$$NF == "__start" {print $$1}') \
                    -d $< $@
 
 $(obj)/vmlinux.bin: vmlinux FORCE
diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig
new file mode 100644 (file)
index 0000000..ac8390f
--- /dev/null
@@ -0,0 +1,1100 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.21.5
+#
+# CONFIG_MMU is not set
+# CONFIG_FPU is not set
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
+CONFIG_BLACKFIN=y
+CONFIG_ZONE_DMA=y
+CONFIG_BFIN=y
+CONFIG_SEMAPHORE_SLEEPERS=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+# CONFIG_GENERIC_TIME is not set
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_FORCE_MAX_ZONEORDER=14
+CONFIG_IRQCHIP_DEMUX_GPIO=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SYSVIPC=y
+# CONFIG_IPC_NS is not set
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_UTS_NS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_SYSFS_DEPRECATED=y
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_BIG_ORDER_ALLOC_NOFAIL_MAGIC=3
+# CONFIG_NP2 is not set
+CONFIG_SLAB=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_RT_MUTEXES=y
+CONFIG_TINY_SHMEM=y
+CONFIG_BASE_SMALL=0
+# CONFIG_SLOB is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+
+#
+# Block layer
+#
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+
+#
+# Blackfin Processor Options
+#
+
+#
+# Processor and Board Settings
+#
+# CONFIG_BF531 is not set
+# CONFIG_BF532 is not set
+# CONFIG_BF533 is not set
+# CONFIG_BF534 is not set
+# CONFIG_BF536 is not set
+# CONFIG_BF537 is not set
+# CONFIG_BF542 is not set
+# CONFIG_BF544 is not set
+# CONFIG_BF548 is not set
+CONFIG_BF549=y
+# CONFIG_BF561 is not set
+CONFIG_BF_REV_0_0=y
+# CONFIG_BF_REV_0_2 is not set
+# CONFIG_BF_REV_0_3 is not set
+# CONFIG_BF_REV_0_4 is not set
+# CONFIG_BF_REV_0_5 is not set
+# CONFIG_BF_REV_ANY is not set
+# CONFIG_BF_REV_NONE is not set
+CONFIG_BF54x=y
+CONFIG_BFIN_SINGLE_CORE=y
+# CONFIG_BFIN533_EZKIT is not set
+# CONFIG_BFIN533_STAMP is not set
+# CONFIG_BFIN537_STAMP is not set
+# CONFIG_BFIN533_BLUETECHNIX_CM is not set
+# CONFIG_BFIN537_BLUETECHNIX_CM is not set
+CONFIG_BFIN548_EZKIT=y
+# CONFIG_BFIN561_BLUETECHNIX_CM is not set
+# CONFIG_BFIN561_EZKIT is not set
+# CONFIG_BFIN561_TEPLA is not set
+# CONFIG_PNAV10 is not set
+# CONFIG_GENERIC_BOARD is not set
+CONFIG_IRQ_PLL_WAKEUP=7
+CONFIG_IRQ_TIMER0=11
+CONFIG_IRQ_TIMER1=11
+CONFIG_IRQ_TIMER2=11
+CONFIG_IRQ_TIMER3=11
+CONFIG_IRQ_TIMER4=11
+CONFIG_IRQ_TIMER5=11
+CONFIG_IRQ_TIMER6=11
+CONFIG_IRQ_TIMER7=11
+CONFIG_IRQ_TIMER8=11
+CONFIG_IRQ_TIMER9=11
+CONFIG_IRQ_TIMER10=11
+CONFIG_IRQ_RTC=8
+CONFIG_IRQ_SPORT0_RX=9
+CONFIG_IRQ_SPORT0_TX=9
+CONFIG_IRQ_SPORT1_RX=9
+CONFIG_IRQ_SPORT1_TX=9
+CONFIG_IRQ_UART0_RX=10
+CONFIG_IRQ_UART0_TX=10
+CONFIG_IRQ_UART1_RX=10
+CONFIG_IRQ_UART1_TX=10
+
+#
+# BF548 Specific Configuration
+#
+
+#
+# Interrupt Priority Assignment
+#
+
+#
+# Priority
+#
+CONFIG_IRQ_DMAC0_ERR=7
+CONFIG_IRQ_EPPI0_ERR=7
+CONFIG_IRQ_SPORT0_ERR=7
+CONFIG_IRQ_SPORT1_ERR=7
+CONFIG_IRQ_SPI0_ERR=7
+CONFIG_IRQ_UART0_ERR=7
+CONFIG_IRQ_EPPI0=8
+CONFIG_IRQ_SPI0=10
+CONFIG_IRQ_PINT0=12
+CONFIG_IRQ_PINT1=12
+CONFIG_IRQ_MDMAS0=13
+CONFIG_IRQ_MDMAS1=13
+CONFIG_IRQ_WATCHDOG=13
+CONFIG_IRQ_DMAC1_ERR=7
+CONFIG_IRQ_SPORT2_ERR=7
+CONFIG_IRQ_SPORT3_ERR=7
+CONFIG_IRQ_MXVR_DATA=7
+CONFIG_IRQ_SPI1_ERR=7
+CONFIG_IRQ_SPI2_ERR=7
+CONFIG_IRQ_UART1_ERR=7
+CONFIG_IRQ_UART2_ERR=7
+CONFIG_IRQ_CAN0_ERR=7
+CONFIG_IRQ_SPORT2_RX=9
+CONFIG_IRQ_SPORT2_TX=9
+CONFIG_IRQ_SPORT3_RX=9
+CONFIG_IRQ_SPORT3_TX=9
+CONFIG_IRQ_EPPI1=9
+CONFIG_IRQ_EPPI2=9
+CONFIG_IRQ_SPI1=10
+CONFIG_IRQ_SPI2=10
+CONFIG_IRQ_ATAPI_RX=10
+CONFIG_IRQ_ATAPI_TX=10
+CONFIG_IRQ_TWI0=11
+CONFIG_IRQ_TWI1=11
+CONFIG_IRQ_CAN0_RX=11
+CONFIG_IRQ_CAN0_TX=11
+CONFIG_IRQ_MDMAS2=13
+CONFIG_IRQ_MDMAS3=13
+CONFIG_IRQ_MXVR_ERR=11
+CONFIG_IRQ_MXVR_MSG=11
+CONFIG_IRQ_MXVR_PKT=11
+CONFIG_IRQ_EPPI1_ERR=7
+CONFIG_IRQ_EPPI2_ERR=7
+CONFIG_IRQ_UART3_ERR=7
+CONFIG_IRQ_HOST_ERR=7
+CONFIG_IRQ_PIXC_ERR=7
+CONFIG_IRQ_NFC_ERR=7
+CONFIG_IRQ_ATAPI_ERR=7
+CONFIG_IRQ_CAN1_ERR=7
+CONFIG_IRQ_HS_DMA_ERR=7
+CONFIG_IRQ_PIXC_IN0=8
+CONFIG_IRQ_PIXC_IN1=8
+CONFIG_IRQ_PIXC_OUT=8
+CONFIG_IRQ_SDH=8
+CONFIG_IRQ_CNT=8
+CONFIG_IRQ_KEY=8
+CONFIG_IRQ_CAN1_RX=11
+CONFIG_IRQ_CAN1_TX=11
+CONFIG_IRQ_SDH_MASK0=11
+CONFIG_IRQ_SDH_MASK1=11
+CONFIG_IRQ_USB_INT0=11
+CONFIG_IRQ_USB_INT1=11
+CONFIG_IRQ_USB_INT2=11
+CONFIG_IRQ_USB_DMA=11
+CONFIG_IRQ_OTPSEC=11
+CONFIG_IRQ_PINT2=11
+CONFIG_IRQ_PINT3=11
+
+#
+# Board customizations
+#
+# CONFIG_CMDLINE_BOOL is not set
+
+#
+# Board Setup
+#
+CONFIG_CLKIN_HZ=25000000
+CONFIG_MEM_SIZE=64
+CONFIG_MEM_ADD_WIDTH=10
+CONFIG_BOOT_LOAD=0x1000
+
+#
+# Blackfin Kernel Optimizations
+#
+
+#
+# Timer Tick
+#
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+
+#
+# Memory Optimizations
+#
+CONFIG_I_ENTRY_L1=y
+CONFIG_EXCPT_IRQ_SYSC_L1=y
+CONFIG_DO_IRQ_L1=y
+CONFIG_CORE_TIMER_IRQ_L1=y
+CONFIG_IDLE_L1=y
+CONFIG_SCHEDULE_L1=y
+CONFIG_ARITHMETIC_OPS_L1=y
+CONFIG_ACCESS_OK_L1=y
+CONFIG_MEMSET_L1=y
+CONFIG_MEMCPY_L1=y
+CONFIG_SYS_BFIN_SPINLOCK_L1=y
+# CONFIG_IP_CHECKSUM_L1 is not set
+CONFIG_CACHELINE_ALIGNED_L1=y
+# CONFIG_SYSCALL_TAB_L1 is not set
+# CONFIG_CPLB_SWITCH_TAB_L1 is not set
+CONFIG_RAMKERNEL=y
+# CONFIG_ROMKERNEL is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_LARGE_ALLOCS=y
+CONFIG_BFIN_DMA_5XX=y
+# CONFIG_DMA_UNCACHED_2M is not set
+CONFIG_DMA_UNCACHED_1M=y
+# CONFIG_DMA_UNCACHED_NONE is not set
+
+#
+# Cache Support
+#
+CONFIG_BLKFIN_CACHE=y
+CONFIG_BLKFIN_DCACHE=y
+# CONFIG_BLKFIN_DCACHE_BANKA is not set
+# CONFIG_BLKFIN_CACHE_LOCK is not set
+# CONFIG_BLKFIN_WB is not set
+CONFIG_BLKFIN_WT=y
+CONFIG_L1_MAX_PIECE=16
+
+#
+# Clock Settings
+#
+# CONFIG_BFIN_KERNEL_CLOCK is not set
+
+#
+# Asynchonous Memory Configuration
+#
+
+#
+# EBIU_AMBCTL Global Control
+#
+CONFIG_C_AMCKEN=y
+CONFIG_C_CDPRIO=y
+# CONFIG_C_AMBEN is not set
+# CONFIG_C_AMBEN_B0 is not set
+# CONFIG_C_AMBEN_B0_B1 is not set
+# CONFIG_C_AMBEN_B0_B1_B2 is not set
+CONFIG_C_AMBEN_ALL=y
+
+#
+# EBIU_AMBCTL Control
+#
+CONFIG_BANK_0=0x7BB0
+CONFIG_BANK_1=0x7BB0
+CONFIG_BANK_2=0x7BB0
+CONFIG_BANK_3=0x99B3
+
+#
+# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
+#
+# CONFIG_PCI is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# PCI Hotplug Support
+#
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF_FDPIC=y
+CONFIG_BINFMT_FLAT=y
+CONFIG_BINFMT_ZFLAT=y
+# CONFIG_BINFMT_SHARED_FLAT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_NETDEBUG is not set
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETLABEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+
+#
+# Connector - unified userspace <-> kernelspace linker
+#
+# CONFIG_CONNECTOR is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+# CONFIG_MTD_CHAR is not set
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_RAM=y
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+
+#
+# Mapping drivers for chip access
+#
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+# CONFIG_MTD_BF5xx is not set
+CONFIG_MTD_UCLINUX=y
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+
+#
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+# CONFIG_PNPACPI is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+
+#
+# Misc devices
+#
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_NETLINK is not set
+
+#
+# Serial ATA (prod) and Parallel ATA (experimental) drivers
+#
+# CONFIG_ATA is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# I2O device support
+#
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# PHY device support
+#
+# CONFIG_PHYLIB is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_SMC91X is not set
+# CONFIG_SMSC911X is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+
+#
+# Token Ring devices
+#
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_UINPUT is not set
+# CONFIG_BF53X_PFBUTTONS is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_AD9960 is not set
+# CONFIG_SPI_ADC_BF533 is not set
+# CONFIG_BF5xx_PFLAGS is not set
+# CONFIG_BF5xx_PPIFCD is not set
+# CONFIG_BF5xx_TIMERS is not set
+# CONFIG_BF5xx_PPI is not set
+# CONFIG_BFIN_SPORT is not set
+# CONFIG_BFIN_TIMER_LATENCY is not set
+# CONFIG_BF5xx_FBDMA is not set
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_BFIN=y
+CONFIG_SERIAL_BFIN_CONSOLE=y
+# CONFIG_SERIAL_BFIN_DMA is not set
+CONFIG_SERIAL_BFIN_PIO=y
+# CONFIG_SERIAL_BFIN_UART0 is not set
+CONFIG_SERIAL_BFIN_UART1=y
+# CONFIG_BFIN_UART1_CTSRTS is not set
+# CONFIG_SERIAL_BFIN_UART2 is not set
+# CONFIG_SERIAL_BFIN_UART3 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_BFIN_SPORT is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+
+#
+# CAN, the car bus and industrial fieldbus
+#
+# CONFIG_CAN4LINUX is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
+#
+# Hardware Monitoring support
+#
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_ABITUGURU is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+# CONFIG_FB is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# HID Devices
+#
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+# CONFIG_USB is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# LED devices
+#
+# CONFIG_NEW_LEDS is not set
+
+#
+# LED drivers
+#
+
+#
+# LED Triggers
+#
+
+#
+# InfiniBand support
+#
+
+#
+# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
+#
+
+#
+# Real Time Clock
+#
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+
+#
+# RTC drivers
+#
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_TEST is not set
+# CONFIG_RTC_DRV_V3020 is not set
+CONFIG_RTC_DRV_BFIN=y
+
+#
+# DMA Engine support
+#
+# CONFIG_DMA_ENGINE is not set
+
+#
+# DMA Clients
+#
+
+#
+# DMA Devices
+#
+
+#
+# Auxiliary Display support
+#
+
+#
+# Virtualization
+#
+
+#
+# PBX support
+#
+# CONFIG_PBX is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+# CONFIG_EXT2_FS_POSIX_ACL is not set
+# CONFIG_EXT2_FS_SECURITY is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_YAFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+# CONFIG_NFS_FS is not set
+# CONFIG_NFSD is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Distributed Lock Manager
+#
+# CONFIG_DLM is not set
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+CONFIG_FRAME_POINTER=y
+CONFIG_FORCED_INLINING=y
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+CONFIG_DEBUG_HWERR=y
+# CONFIG_DEBUG_ICACHE_CHECK is not set
+# CONFIG_DEBUG_KERNEL_START is not set
+# CONFIG_DEBUG_SERIAL_EARLY_INIT is not set
+CONFIG_DEBUG_HUNT_FOR_ZERO=y
+# CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE is not set
+CONFIG_CPLB_INFO=y
+CONFIG_ACCESS_CHECK=y
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+CONFIG_SECURITY=y
+# CONFIG_SECURITY_NETWORK is not set
+CONFIG_SECURITY_CAPABILITIES=y
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
index f3b7d2f9d49c38b3ba4a444d21049df0958bb43e..f429ebc3a9613ff8d263a4d46cbba4cdb01aa108 100644 (file)
@@ -6,9 +6,12 @@ extra-y := init_task.o vmlinux.lds
 
 obj-y := \
        entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \
-       sys_bfin.o time.o traps.o irqchip.o dma-mapping.o bfin_gpio.o \
-       flat.o
+       sys_bfin.o time.o traps.o irqchip.o dma-mapping.o flat.o \
+       fixed_code.o cplbinit.o cacheinit.o
 
+obj-$(CONFIG_BF53x)                 += bfin_gpio.o
+obj-$(CONFIG_BF561)                 += bfin_gpio.o
 obj-$(CONFIG_MODULES)                += module.o
 obj-$(CONFIG_BFIN_DMA_5XX)           += bfin_dma_5xx.o
 obj-$(CONFIG_DUAL_CORE_TEST_MODULE)  += dualcore_test.o
+obj-$(CONFIG_KGDB)                   += kgdb.o
index e455f4504509518c9791163fd05d20d443434735..b56b2741cdea6746c0a445408c5d40f40786fec5 100644 (file)
 #include <linux/kernel_stat.h>
 #include <linux/ptrace.h>
 #include <linux/hardirq.h>
-#include <asm/irq.h>
-#include <asm/thread_info.h>
+#include <linux/irq.h>
+#include <linux/thread_info.h>
 
-#define DEFINE(sym, val) \
-        asm volatile("\n->" #sym " %0 " #val : : "i" (val))
+#define DEFINE(sym, val) asm volatile("\n->" #sym " %0 " #val : : "i" (val))
 
 int main(void)
 {
index 069a896a8f260e67c7354066b6c05020811383cc..7cf02f02a1dbed0243cfda428d9768687f0ab808 100644 (file)
@@ -34,6 +34,7 @@
 #include <linux/kernel.h>
 #include <linux/param.h>
 
+#include <asm/blackfin.h>
 #include <asm/dma.h>
 #include <asm/cacheflush.h>
 
 ***************************************************************************/
 
 static struct dma_channel dma_ch[MAX_BLACKFIN_DMA_CHANNEL];
-#if defined (CONFIG_BF561)
-static struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
-       (struct dma_register *) DMA1_0_NEXT_DESC_PTR,
-       (struct dma_register *) DMA1_1_NEXT_DESC_PTR,
-       (struct dma_register *) DMA1_2_NEXT_DESC_PTR,
-       (struct dma_register *) DMA1_3_NEXT_DESC_PTR,
-       (struct dma_register *) DMA1_4_NEXT_DESC_PTR,
-       (struct dma_register *) DMA1_5_NEXT_DESC_PTR,
-       (struct dma_register *) DMA1_6_NEXT_DESC_PTR,
-       (struct dma_register *) DMA1_7_NEXT_DESC_PTR,
-       (struct dma_register *) DMA1_8_NEXT_DESC_PTR,
-       (struct dma_register *) DMA1_9_NEXT_DESC_PTR,
-       (struct dma_register *) DMA1_10_NEXT_DESC_PTR,
-       (struct dma_register *) DMA1_11_NEXT_DESC_PTR,
-       (struct dma_register *) DMA2_0_NEXT_DESC_PTR,
-       (struct dma_register *) DMA2_1_NEXT_DESC_PTR,
-       (struct dma_register *) DMA2_2_NEXT_DESC_PTR,
-       (struct dma_register *) DMA2_3_NEXT_DESC_PTR,
-       (struct dma_register *) DMA2_4_NEXT_DESC_PTR,
-       (struct dma_register *) DMA2_5_NEXT_DESC_PTR,
-       (struct dma_register *) DMA2_6_NEXT_DESC_PTR,
-       (struct dma_register *) DMA2_7_NEXT_DESC_PTR,
-       (struct dma_register *) DMA2_8_NEXT_DESC_PTR,
-       (struct dma_register *) DMA2_9_NEXT_DESC_PTR,
-       (struct dma_register *) DMA2_10_NEXT_DESC_PTR,
-       (struct dma_register *) DMA2_11_NEXT_DESC_PTR,
-       (struct dma_register *) MDMA1_D0_NEXT_DESC_PTR,
-       (struct dma_register *) MDMA1_S0_NEXT_DESC_PTR,
-       (struct dma_register *) MDMA1_D1_NEXT_DESC_PTR,
-       (struct dma_register *) MDMA1_S1_NEXT_DESC_PTR,
-       (struct dma_register *) MDMA2_D0_NEXT_DESC_PTR,
-       (struct dma_register *) MDMA2_S0_NEXT_DESC_PTR,
-       (struct dma_register *) MDMA2_D1_NEXT_DESC_PTR,
-       (struct dma_register *) MDMA2_S1_NEXT_DESC_PTR,
-       (struct dma_register *) IMDMA_D0_NEXT_DESC_PTR,
-       (struct dma_register *) IMDMA_S0_NEXT_DESC_PTR,
-       (struct dma_register *) IMDMA_D1_NEXT_DESC_PTR,
-       (struct dma_register *) IMDMA_S1_NEXT_DESC_PTR,
-};
-#else
-static struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
-       (struct dma_register *) DMA0_NEXT_DESC_PTR,
-       (struct dma_register *) DMA1_NEXT_DESC_PTR,
-       (struct dma_register *) DMA2_NEXT_DESC_PTR,
-       (struct dma_register *) DMA3_NEXT_DESC_PTR,
-       (struct dma_register *) DMA4_NEXT_DESC_PTR,
-       (struct dma_register *) DMA5_NEXT_DESC_PTR,
-       (struct dma_register *) DMA6_NEXT_DESC_PTR,
-       (struct dma_register *) DMA7_NEXT_DESC_PTR,
-#if (defined(CONFIG_BF537) || defined(CONFIG_BF534) || defined(CONFIG_BF536))
-       (struct dma_register *) DMA8_NEXT_DESC_PTR,
-       (struct dma_register *) DMA9_NEXT_DESC_PTR,
-       (struct dma_register *) DMA10_NEXT_DESC_PTR,
-       (struct dma_register *) DMA11_NEXT_DESC_PTR,
-#endif
-       (struct dma_register *) MDMA_D0_NEXT_DESC_PTR,
-       (struct dma_register *) MDMA_S0_NEXT_DESC_PTR,
-       (struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
-       (struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
-};
-#endif
 
 /*------------------------------------------------------------------------------
  *       Set the Buffer Clear bit in the Configuration register of specific DMA
@@ -138,149 +78,6 @@ static int __init blackfin_dma_init(void)
 
 arch_initcall(blackfin_dma_init);
 
-/*
- *     Form the channel find the irq number for that channel.
- */
-#if !defined(CONFIG_BF561)
-
-static int bf533_channel2irq(unsigned int channel)
-{
-       int ret_irq = -1;
-
-       switch (channel) {
-       case CH_PPI:
-               ret_irq = IRQ_PPI;
-               break;
-
-#if (defined(CONFIG_BF537) || defined(CONFIG_BF534) || defined(CONFIG_BF536))
-       case CH_EMAC_RX:
-               ret_irq = IRQ_MAC_RX;
-               break;
-
-       case CH_EMAC_TX:
-               ret_irq = IRQ_MAC_TX;
-               break;
-
-       case CH_UART1_RX:
-               ret_irq = IRQ_UART1_RX;
-               break;
-
-       case CH_UART1_TX:
-               ret_irq = IRQ_UART1_TX;
-               break;
-#endif
-
-       case CH_SPORT0_RX:
-               ret_irq = IRQ_SPORT0_RX;
-               break;
-
-       case CH_SPORT0_TX:
-               ret_irq = IRQ_SPORT0_TX;
-               break;
-
-       case CH_SPORT1_RX:
-               ret_irq = IRQ_SPORT1_RX;
-               break;
-
-       case CH_SPORT1_TX:
-               ret_irq = IRQ_SPORT1_TX;
-               break;
-
-       case CH_SPI:
-               ret_irq = IRQ_SPI;
-               break;
-
-       case CH_UART_RX:
-               ret_irq = IRQ_UART_RX;
-               break;
-
-       case CH_UART_TX:
-               ret_irq = IRQ_UART_TX;
-               break;
-
-       case CH_MEM_STREAM0_SRC:
-       case CH_MEM_STREAM0_DEST:
-               ret_irq = IRQ_MEM_DMA0;
-               break;
-
-       case CH_MEM_STREAM1_SRC:
-       case CH_MEM_STREAM1_DEST:
-               ret_irq = IRQ_MEM_DMA1;
-               break;
-       }
-       return ret_irq;
-}
-
-# define channel2irq(channel) bf533_channel2irq(channel)
-
-#else
-
-static int bf561_channel2irq(unsigned int channel)
-{
-       int ret_irq = -1;
-
-       switch (channel) {
-       case CH_PPI0:
-               ret_irq = IRQ_PPI0;
-               break;
-       case CH_PPI1:
-               ret_irq = IRQ_PPI1;
-               break;
-       case CH_SPORT0_RX:
-               ret_irq = IRQ_SPORT0_RX;
-               break;
-       case CH_SPORT0_TX:
-               ret_irq = IRQ_SPORT0_TX;
-               break;
-       case CH_SPORT1_RX:
-               ret_irq = IRQ_SPORT1_RX;
-               break;
-       case CH_SPORT1_TX:
-               ret_irq = IRQ_SPORT1_TX;
-               break;
-       case CH_SPI:
-               ret_irq = IRQ_SPI;
-               break;
-       case CH_UART_RX:
-               ret_irq = IRQ_UART_RX;
-               break;
-       case CH_UART_TX:
-               ret_irq = IRQ_UART_TX;
-               break;
-
-       case CH_MEM_STREAM0_SRC:
-       case CH_MEM_STREAM0_DEST:
-               ret_irq = IRQ_MEM_DMA0;
-               break;
-       case CH_MEM_STREAM1_SRC:
-       case CH_MEM_STREAM1_DEST:
-               ret_irq = IRQ_MEM_DMA1;
-               break;
-       case CH_MEM_STREAM2_SRC:
-       case CH_MEM_STREAM2_DEST:
-               ret_irq = IRQ_MEM_DMA2;
-               break;
-       case CH_MEM_STREAM3_SRC:
-       case CH_MEM_STREAM3_DEST:
-               ret_irq = IRQ_MEM_DMA3;
-               break;
-
-       case CH_IMEM_STREAM0_SRC:
-       case CH_IMEM_STREAM0_DEST:
-               ret_irq = IRQ_IMEM_DMA0;
-               break;
-       case CH_IMEM_STREAM1_SRC:
-       case CH_IMEM_STREAM1_DEST:
-               ret_irq = IRQ_IMEM_DMA1;
-               break;
-       }
-       return ret_irq;
-}
-
-# define channel2irq(channel) bf561_channel2irq(channel)
-
-#endif
-
 /*------------------------------------------------------------------------------
  *     Request the specific DMA channel from the system.
  *-----------------------------------------------------------------------------*/
@@ -535,7 +332,7 @@ set_bfin_dma_config(char direction, char flow_mode,
 }
 EXPORT_SYMBOL(set_bfin_dma_config);
 
-void set_dma_sg(unsigned int channel, struct dmasg * sg, int nr_sg)
+void set_dma_sg(unsigned int channel, struct dmasg *sg, int nr_sg)
 {
        BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
               && channel < MAX_BLACKFIN_DMA_CHANNEL));
@@ -604,7 +401,7 @@ static void *__dma_memcpy(void *dest, const void *src, size_t size)
 
        if (size <= 0)
                return NULL;
-       
+
        local_irq_save(flags);
 
        if ((unsigned long)src < memory_end)
@@ -748,7 +545,6 @@ void *dma_memcpy(void *dest, const void *src, size_t size)
        addr = __dma_memcpy(dest+bulk, src+bulk, rest);
        return addr;
 }
-
 EXPORT_SYMBOL(dma_memcpy);
 
 void *safe_dma_memcpy(void *dest, const void *src, size_t size)
@@ -761,14 +557,13 @@ EXPORT_SYMBOL(safe_dma_memcpy);
 
 void dma_outsb(void __iomem *addr, const void *buf, unsigned short len)
 {
-
        unsigned long flags;
-       
+
        local_irq_save(flags);
-       
-       blackfin_dcache_flush_range((unsigned int)buf,(unsigned int)(buf) + len);
 
-       bfin_write_MDMA_D0_START_ADDR(addr);
+       blackfin_dcache_flush_range((unsigned int)buf, (unsigned int)(buf) + len);
+
+       bfin_write_MDMA_D0_START_ADDR(addr);
        bfin_write_MDMA_D0_X_COUNT(len);
        bfin_write_MDMA_D0_X_MODIFY(0);
        bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
@@ -796,9 +591,9 @@ EXPORT_SYMBOL(dma_outsb);
 void dma_insb(const void __iomem *addr, void *buf, unsigned short len)
 {
        unsigned long flags;
-               
+
        local_irq_save(flags);
-       bfin_write_MDMA_D0_START_ADDR(buf);
+       bfin_write_MDMA_D0_START_ADDR(buf);
        bfin_write_MDMA_D0_X_COUNT(len);
        bfin_write_MDMA_D0_X_MODIFY(1);
        bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
@@ -827,12 +622,12 @@ EXPORT_SYMBOL(dma_insb);
 void dma_outsw(void __iomem *addr, const void  *buf, unsigned short len)
 {
        unsigned long flags;
-       
+
        local_irq_save(flags);
-               
-       blackfin_dcache_flush_range((unsigned int)buf,(unsigned int)(buf) + len);
 
-       bfin_write_MDMA_D0_START_ADDR(addr);
+       blackfin_dcache_flush_range((unsigned int)buf, (unsigned int)(buf) + len);
+
+       bfin_write_MDMA_D0_START_ADDR(addr);
        bfin_write_MDMA_D0_X_COUNT(len);
        bfin_write_MDMA_D0_X_MODIFY(0);
        bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
@@ -859,10 +654,10 @@ EXPORT_SYMBOL(dma_outsw);
 void dma_insw(const void __iomem *addr, void *buf, unsigned short len)
 {
        unsigned long flags;
-               
+
        local_irq_save(flags);
-       
-       bfin_write_MDMA_D0_START_ADDR(buf);
+
+       bfin_write_MDMA_D0_START_ADDR(buf);
        bfin_write_MDMA_D0_X_COUNT(len);
        bfin_write_MDMA_D0_X_MODIFY(2);
        bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
@@ -891,12 +686,12 @@ EXPORT_SYMBOL(dma_insw);
 void dma_outsl(void __iomem *addr, const void *buf, unsigned short len)
 {
        unsigned long flags;
-       
+
        local_irq_save(flags);
-       
-       blackfin_dcache_flush_range((unsigned int)buf,(unsigned int)(buf) + len);
 
-       bfin_write_MDMA_D0_START_ADDR(addr);
+       blackfin_dcache_flush_range((unsigned int)buf, (unsigned int)(buf) + len);
+
+       bfin_write_MDMA_D0_START_ADDR(addr);
        bfin_write_MDMA_D0_X_COUNT(len);
        bfin_write_MDMA_D0_X_MODIFY(0);
        bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
@@ -923,10 +718,10 @@ EXPORT_SYMBOL(dma_outsl);
 void dma_insl(const void __iomem *addr, void *buf, unsigned short len)
 {
        unsigned long flags;
-       
+
        local_irq_save(flags);
-       
-       bfin_write_MDMA_D0_START_ADDR(buf);
+
+       bfin_write_MDMA_D0_START_ADDR(buf);
        bfin_write_MDMA_D0_X_COUNT(len);
        bfin_write_MDMA_D0_X_MODIFY(4);
        bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
index bb1f4fb2467c119251d2b14417998500f6de4827..bafcfa52142ba0731f5caf3ecc71e672d7678285 100644 (file)
@@ -162,7 +162,7 @@ static void port_setup(unsigned short gpio, unsigned short usage)
 
 static void default_gpio(unsigned short gpio)
 {
-       unsigned short bank,bitmask;
+       unsigned short bank, bitmask;
 
        bank = gpio_bank(gpio);
        bitmask = gpio_bit(gpio);
@@ -183,7 +183,7 @@ static int __init bfin_gpio_init(void)
 
        printk(KERN_INFO "Blackfin GPIO Controller\n");
 
-       for (i = 0; i < MAX_BLACKFIN_GPIOS; i+=GPIO_BANKSIZE)
+       for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE)
                reserved_map[gpio_bank(i)] = 0;
 
 #if defined(BF537_FAMILY) && (defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE))
@@ -478,7 +478,7 @@ u32 gpio_pm_setup(void)
        u32 sic_iwr = 0;
        u16 bank, mask, i, gpio;
 
-       for (i = 0; i < MAX_BLACKFIN_GPIOS; i+=GPIO_BANKSIZE) {
+       for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
                mask = wakeup_map[gpio_bank(i)];
                bank = gpio_bank(i);
 
@@ -522,12 +522,11 @@ u32 gpio_pm_setup(void)
                return IWR_ENABLE_ALL;
 }
 
-
 void gpio_pm_restore(void)
 {
        u16 bank, mask, i;
 
-       for (i = 0; i < MAX_BLACKFIN_GPIOS; i+=GPIO_BANKSIZE) {
+       for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
                mask = wakeup_map[gpio_bank(i)];
                bank = gpio_bank(i);
 
@@ -591,7 +590,6 @@ int gpio_request(unsigned short gpio, const char *label)
 }
 EXPORT_SYMBOL(gpio_request);
 
-
 void gpio_free(unsigned short gpio)
 {
        unsigned long flags;
@@ -616,7 +614,6 @@ void gpio_free(unsigned short gpio)
 }
 EXPORT_SYMBOL(gpio_free);
 
-
 void gpio_direction_input(unsigned short gpio)
 {
        unsigned long flags;
index f64ecb638fab1a8b7d9169e317b8cdc3dc5cb947..70455949cfd207f91475d100d6f8787574b37ab2 100644 (file)
  */
 
 #include <linux/module.h>
-#include <asm/irq.h>
+#include <linux/irq.h>
+#include <linux/uaccess.h>
+
 #include <asm/checksum.h>
 #include <asm/cacheflush.h>
-#include <asm/uaccess.h>
 
 /* platform dependent support */
 
diff --git a/arch/blackfin/kernel/cacheinit.c b/arch/blackfin/kernel/cacheinit.c
new file mode 100644 (file)
index 0000000..4d41a40
--- /dev/null
@@ -0,0 +1,66 @@
+/*
+ *               Copyright 2004-2007 Analog Devices Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/cpu.h>
+
+#include <asm/cacheflush.h>
+#include <asm/blackfin.h>
+#include <asm/cplbinit.h>
+
+#if defined(CONFIG_BLKFIN_CACHE)
+void bfin_icache_init(void)
+{
+       unsigned long *table = icplb_table;
+       unsigned long ctrl;
+       int i;
+
+       for (i = 0; i < MAX_CPLBS; i++) {
+               unsigned long addr = *table++;
+               unsigned long data = *table++;
+               if (addr == (unsigned long)-1)
+                       break;
+               bfin_write32(ICPLB_ADDR0 + i * 4, addr);
+               bfin_write32(ICPLB_DATA0 + i * 4, data);
+       }
+       ctrl = bfin_read_IMEM_CONTROL();
+       ctrl |= IMC | ENICPLB;
+       bfin_write_IMEM_CONTROL(ctrl);
+}
+#endif
+
+#if defined(CONFIG_BLKFIN_DCACHE)
+void bfin_dcache_init(void)
+{
+       unsigned long *table = dcplb_table;
+       unsigned long ctrl;
+       int i;
+
+       for (i = 0; i < MAX_CPLBS; i++) {
+               unsigned long addr = *table++;
+               unsigned long data = *table++;
+               if (addr == (unsigned long)-1)
+                       break;
+               bfin_write32(DCPLB_ADDR0 + i * 4, addr);
+               bfin_write32(DCPLB_DATA0 + i * 4, data);
+       }
+       ctrl = bfin_read_DMEM_CONTROL();
+       ctrl |= DMEM_CNTR;
+       bfin_write_DMEM_CONTROL(ctrl);
+}
+#endif
diff --git a/arch/blackfin/kernel/cplbinit.c b/arch/blackfin/kernel/cplbinit.c
new file mode 100644 (file)
index 0000000..bbdb403
--- /dev/null
@@ -0,0 +1,433 @@
+/*
+ * Blackfin CPLB initialization
+ *
+ *               Copyright 2004-2007 Analog Devices Inc.
+ *
+ * Bugs:         Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/module.h>
+
+#include <asm/blackfin.h>
+#include <asm/cplbinit.h>
+
+u_long icplb_table[MAX_CPLBS+1];
+u_long dcplb_table[MAX_CPLBS+1];
+
+#ifdef CONFIG_CPLB_SWITCH_TAB_L1
+u_long ipdt_table[MAX_SWITCH_I_CPLBS+1]__attribute__((l1_data));
+u_long dpdt_table[MAX_SWITCH_D_CPLBS+1]__attribute__((l1_data));
+
+#ifdef CONFIG_CPLB_INFO
+u_long ipdt_swapcount_table[MAX_SWITCH_I_CPLBS]__attribute__((l1_data));
+u_long dpdt_swapcount_table[MAX_SWITCH_D_CPLBS]__attribute__((l1_data));
+#endif /* CONFIG_CPLB_INFO */
+
+#else
+
+u_long ipdt_table[MAX_SWITCH_I_CPLBS+1];
+u_long dpdt_table[MAX_SWITCH_D_CPLBS+1];
+
+#ifdef CONFIG_CPLB_INFO
+u_long ipdt_swapcount_table[MAX_SWITCH_I_CPLBS];
+u_long dpdt_swapcount_table[MAX_SWITCH_D_CPLBS];
+#endif /* CONFIG_CPLB_INFO */
+
+#endif /*CONFIG_CPLB_SWITCH_TAB_L1*/
+
+struct s_cplb {
+       struct cplb_tab init_i;
+       struct cplb_tab init_d;
+       struct cplb_tab switch_i;
+       struct cplb_tab switch_d;
+};
+
+#if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE)
+static struct cplb_desc cplb_data[] = {
+       {
+               .start = 0,
+               .end = SIZE_1K,
+               .psize = SIZE_1K,
+               .attr = INITIAL_T | SWITCH_T | I_CPLB | D_CPLB,
+               .i_conf = SDRAM_OOPS,
+               .d_conf = SDRAM_OOPS,
+#if defined(CONFIG_DEBUG_HUNT_FOR_ZERO)
+               .valid = 1,
+#else
+               .valid = 0,
+#endif
+               .name = "ZERO Pointer Saveguard",
+       },
+       {
+               .start = L1_CODE_START,
+               .end = L1_CODE_START + L1_CODE_LENGTH,
+               .psize = SIZE_4M,
+               .attr = INITIAL_T | SWITCH_T | I_CPLB,
+               .i_conf = L1_IMEMORY,
+               .d_conf = 0,
+               .valid = 1,
+               .name = "L1 I-Memory",
+       },
+       {
+               .start = L1_DATA_A_START,
+               .end = L1_DATA_B_START + L1_DATA_B_LENGTH,
+               .psize = SIZE_4M,
+               .attr = INITIAL_T | SWITCH_T | D_CPLB,
+               .i_conf = 0,
+               .d_conf = L1_DMEMORY,
+#if ((L1_DATA_A_LENGTH > 0) || (L1_DATA_B_LENGTH > 0))
+               .valid = 1,
+#else
+               .valid = 0,
+#endif
+               .name = "L1 D-Memory",
+       },
+       {
+               .start = 0,
+               .end = 0,  /* dynamic */
+               .psize = 0,
+               .attr = INITIAL_T | SWITCH_T | I_CPLB | D_CPLB,
+               .i_conf =  SDRAM_IGENERIC,
+               .d_conf =  SDRAM_DGENERIC,
+               .valid = 1,
+               .name = "SDRAM Kernel",
+       },
+       {
+               .start = 0, /* dynamic */
+               .end = 0, /* dynamic */
+               .psize = 0,
+               .attr = INITIAL_T | SWITCH_T | D_CPLB,
+               .i_conf =  SDRAM_IGENERIC,
+               .d_conf =  SDRAM_DNON_CHBL,
+               .valid = 1,
+               .name = "SDRAM RAM MTD",
+       },
+       {
+               .start = 0, /* dynamic */
+               .end = 0,   /* dynamic */
+               .psize = SIZE_1M,
+               .attr = INITIAL_T | SWITCH_T | D_CPLB,
+               .d_conf = SDRAM_DNON_CHBL,
+               .valid = 1,
+               .name = "SDRAM Uncached DMA ZONE",
+       },
+       {
+               .start = 0, /* dynamic */
+               .end = 0, /* dynamic */
+               .psize = 0,
+               .attr = SWITCH_T | D_CPLB,
+               .i_conf = 0, /* dynamic */
+               .d_conf = 0, /* dynamic */
+               .valid = 1,
+               .name = "SDRAM Reserved Memory",
+       },
+       {
+               .start = ASYNC_BANK0_BASE,
+               .end = ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE,
+               .psize = 0,
+               .attr = SWITCH_T | D_CPLB,
+               .d_conf = SDRAM_EBIU,
+               .valid = 1,
+               .name = "ASYNC Memory",
+       },
+       {
+#if defined(CONFIG_BF561)
+               .start = L2_SRAM,
+               .end = L2_SRAM_END,
+               .psize = SIZE_1M,
+               .attr = SWITCH_T | D_CPLB,
+               .i_conf = L2_MEMORY,
+               .d_conf = L2_MEMORY,
+               .valid = 1,
+#else
+               .valid = 0,
+#endif
+               .name = "L2 Memory",
+       }
+};
+
+static u16 __init lock_kernel_check(u32 start, u32 end)
+{
+       if ((start <= (u32) _stext && end >= (u32) _end)
+           || (start >= (u32) _stext && end <= (u32) _end))
+               return IN_KERNEL;
+       return 0;
+}
+
+static unsigned short __init
+fill_cplbtab(struct cplb_tab *table,
+            unsigned long start, unsigned long end,
+            unsigned long block_size, unsigned long cplb_data)
+{
+       int i;
+
+       switch (block_size) {
+       case SIZE_4M:
+               i = 3;
+               break;
+       case SIZE_1M:
+               i = 2;
+               break;
+       case SIZE_4K:
+               i = 1;
+               break;
+       case SIZE_1K:
+       default:
+               i = 0;
+               break;
+       }
+
+       cplb_data = (cplb_data & ~(3 << 16)) | (i << 16);
+
+       while ((start < end) && (table->pos < table->size)) {
+
+               table->tab[table->pos++] = start;
+
+               if (lock_kernel_check(start, start + block_size) == IN_KERNEL)
+                       table->tab[table->pos++] =
+                           cplb_data | CPLB_LOCK | CPLB_DIRTY;
+               else
+                       table->tab[table->pos++] = cplb_data;
+
+               start += block_size;
+       }
+       return 0;
+}
+
+static unsigned short __init
+close_cplbtab(struct cplb_tab *table)
+{
+
+       while (table->pos < table->size) {
+
+               table->tab[table->pos++] = 0;
+               table->tab[table->pos++] = 0; /* !CPLB_VALID */
+       }
+       return 0;
+}
+
+/* helper function */
+static void __fill_code_cplbtab(struct cplb_tab *t, int i, u32 a_start, u32 a_end)
+{
+       if (cplb_data[i].psize) {
+               fill_cplbtab(t,
+                               cplb_data[i].start,
+                               cplb_data[i].end,
+                               cplb_data[i].psize,
+                               cplb_data[i].i_conf);
+       } else {
+#if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263))
+               if (i == SDRAM_KERN) {
+                       fill_cplbtab(t,
+                                       cplb_data[i].start,
+                                       cplb_data[i].end,
+                                       SIZE_4M,
+                                       cplb_data[i].i_conf);
+               } else
+#endif
+               {
+                       fill_cplbtab(t,
+                                       cplb_data[i].start,
+                                       a_start,
+                                       SIZE_1M,
+                                       cplb_data[i].i_conf);
+                       fill_cplbtab(t,
+                                       a_start,
+                                       a_end,
+                                       SIZE_4M,
+                                       cplb_data[i].i_conf);
+                       fill_cplbtab(t, a_end,
+                                       cplb_data[i].end,
+                                       SIZE_1M,
+                                       cplb_data[i].i_conf);
+               }
+       }
+}
+
+static void __fill_data_cplbtab(struct cplb_tab *t, int i, u32 a_start, u32 a_end)
+{
+       if (cplb_data[i].psize) {
+               fill_cplbtab(t,
+                               cplb_data[i].start,
+                               cplb_data[i].end,
+                               cplb_data[i].psize,
+                               cplb_data[i].d_conf);
+       } else {
+               fill_cplbtab(t,
+                               cplb_data[i].start,
+                               a_start, SIZE_1M,
+                               cplb_data[i].d_conf);
+               fill_cplbtab(t, a_start,
+                               a_end, SIZE_4M,
+                               cplb_data[i].d_conf);
+               fill_cplbtab(t, a_end,
+                               cplb_data[i].end,
+                               SIZE_1M,
+                               cplb_data[i].d_conf);
+       }
+}
+
+void __init generate_cpl_tables(void)
+{
+
+       u16 i, j, process;
+       u32 a_start, a_end, as, ae, as_1m;
+
+       struct cplb_tab *t_i = NULL;
+       struct cplb_tab *t_d = NULL;
+       struct s_cplb cplb;
+
+       cplb.init_i.size = MAX_CPLBS;
+       cplb.init_d.size = MAX_CPLBS;
+       cplb.switch_i.size = MAX_SWITCH_I_CPLBS;
+       cplb.switch_d.size = MAX_SWITCH_D_CPLBS;
+
+       cplb.init_i.pos = 0;
+       cplb.init_d.pos = 0;
+       cplb.switch_i.pos = 0;
+       cplb.switch_d.pos = 0;
+
+       cplb.init_i.tab = icplb_table;
+       cplb.init_d.tab = dcplb_table;
+       cplb.switch_i.tab = ipdt_table;
+       cplb.switch_d.tab = dpdt_table;
+
+       cplb_data[SDRAM_KERN].end = memory_end;
+
+#ifdef CONFIG_MTD_UCLINUX
+       cplb_data[SDRAM_RAM_MTD].start = memory_mtd_start;
+       cplb_data[SDRAM_RAM_MTD].end = memory_mtd_start + mtd_size;
+       cplb_data[SDRAM_RAM_MTD].valid = mtd_size > 0;
+# if defined(CONFIG_ROMFS_FS)
+       cplb_data[SDRAM_RAM_MTD].attr |= I_CPLB;
+
+       /*
+        * The ROMFS_FS size is often not multiple of 1MB.
+        * This can cause multiple CPLB sets covering the same memory area.
+        * This will then cause multiple CPLB hit exceptions.
+        * Workaround: We ensure a contiguous memory area by extending the kernel
+        * memory section over the mtd section.
+        * For ROMFS_FS memory must be covered with ICPLBs anyways.
+        * So there is no difference between kernel and mtd memory setup.
+        */
+
+       cplb_data[SDRAM_KERN].end = memory_mtd_start + mtd_size;;
+       cplb_data[SDRAM_RAM_MTD].valid = 0;
+
+# endif
+#else
+       cplb_data[SDRAM_RAM_MTD].valid = 0;
+#endif
+
+       cplb_data[SDRAM_DMAZ].start = _ramend - DMA_UNCACHED_REGION;
+       cplb_data[SDRAM_DMAZ].end = _ramend;
+
+       cplb_data[RES_MEM].start = _ramend;
+       cplb_data[RES_MEM].end = physical_mem_end;
+
+       if (reserved_mem_dcache_on)
+               cplb_data[RES_MEM].d_conf = SDRAM_DGENERIC;
+       else
+               cplb_data[RES_MEM].d_conf = SDRAM_DNON_CHBL;
+
+       if (reserved_mem_icache_on)
+               cplb_data[RES_MEM].i_conf = SDRAM_IGENERIC;
+       else
+               cplb_data[RES_MEM].i_conf = SDRAM_INON_CHBL;
+
+       for (i = ZERO_P; i <= L2_MEM; i++) {
+               if (!cplb_data[i].valid)
+                       continue;
+
+               as_1m = cplb_data[i].start % SIZE_1M;
+
+               /* We need to make sure all sections are properly 1M aligned
+                * However between Kernel Memory and the Kernel mtd section, depending on the
+                * rootfs size, there can be overlapping memory areas.
+                */
+
+               if (as_1m && i != L1I_MEM && i != L1D_MEM) {
+#ifdef CONFIG_MTD_UCLINUX
+                       if (i == SDRAM_RAM_MTD) {
+                               if ((cplb_data[SDRAM_KERN].end + 1) > cplb_data[SDRAM_RAM_MTD].start)
+                                       cplb_data[SDRAM_RAM_MTD].start = (cplb_data[i].start & (-2*SIZE_1M)) + SIZE_1M;
+                               else
+                                       cplb_data[SDRAM_RAM_MTD].start = (cplb_data[i].start & (-2*SIZE_1M));
+                       } else
+#endif
+                               printk(KERN_WARNING "Unaligned Start of %s at 0x%X\n",
+                                      cplb_data[i].name, cplb_data[i].start);
+               }
+
+               as = cplb_data[i].start % SIZE_4M;
+               ae = cplb_data[i].end % SIZE_4M;
+
+               if (as)
+                       a_start = cplb_data[i].start + (SIZE_4M - (as));
+               else
+                       a_start = cplb_data[i].start;
+
+               a_end = cplb_data[i].end - ae;
+
+               for (j = INITIAL_T; j <= SWITCH_T; j++) {
+
+                       switch (j) {
+                       case INITIAL_T:
+                               if (cplb_data[i].attr & INITIAL_T) {
+                                       t_i = &cplb.init_i;
+                                       t_d = &cplb.init_d;
+                                       process = 1;
+                               } else
+                                       process = 0;
+                               break;
+                       case SWITCH_T:
+                               if (cplb_data[i].attr & SWITCH_T) {
+                                       t_i = &cplb.switch_i;
+                                       t_d = &cplb.switch_d;
+                                       process = 1;
+                               } else
+                                       process = 0;
+                               break;
+                       default:
+                                       process = 0;
+                               break;
+                       }
+
+                       if (!process)
+                               continue;
+                       if (cplb_data[i].attr & I_CPLB)
+                               __fill_code_cplbtab(t_i, i, a_start, a_end);
+
+                       if (cplb_data[i].attr & D_CPLB)
+                               __fill_data_cplbtab(t_d, i, a_start, a_end);
+               }
+       }
+
+/* close tables */
+
+       close_cplbtab(&cplb.init_i);
+       close_cplbtab(&cplb.init_d);
+
+       cplb.init_i.tab[cplb.init_i.pos] = -1;
+       cplb.init_d.tab[cplb.init_d.pos] = -1;
+       cplb.switch_i.tab[cplb.switch_i.pos] = -1;
+       cplb.switch_d.tab[cplb.switch_d.pos] = -1;
+
+}
+
+#endif
+
index 539eb24e062fbc17c3ea3e12f4b3763cb1572940..ea48d5b13f11469a18faebbd15461def98ef5d23 100644 (file)
@@ -34,8 +34,8 @@
 #include <linux/spinlock.h>
 #include <linux/device.h>
 #include <linux/dma-mapping.h>
+#include <linux/io.h>
 #include <asm/cacheflush.h>
-#include <asm/io.h>
 #include <asm/bfin-global.h>
 
 static spinlock_t dma_page_lock;
@@ -159,10 +159,13 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
 
        BUG_ON(direction == DMA_NONE);
 
-       for (i = 0; i < nents; i++)
-               invalidate_dcache_range(sg_dma_address(&sg[i]),
-                                       sg_dma_address(&sg[i]) +
-                                       sg_dma_len(&sg[i]));
+       for (i = 0; i < nents; i++, sg++) {
+               sg->dma_address = page_address(sg->page) + sg->offset;
+
+               invalidate_dcache_range(sg_dma_address(sg),
+                                       sg_dma_address(sg) +
+                                       sg_dma_len(sg));
+       }
 
        return nents;
 }
index 8b89c99f9dfa386ff99133773147bc60425339e0..0fcba74840b7ae157ead33a94ded8219a37c165b 100644 (file)
 #include <linux/init.h>
 #include <linux/module.h>
 
-static int *testarg = (int*)0xfeb00000;
+static int *testarg = (int *)0xfeb00000;
 
 static int test_init(void)
 {
        *testarg = 1;
-       printk("Dual core test module inserted: set testarg = [%d]\n @ [%p]\n",
+       printk(KERN_INFO "Dual core test module inserted: set testarg = [%d]\n @ [%p]\n",
               *testarg, testarg);
        return 0;
 }
 
 static void test_exit(void)
 {
-       printk("Dual core test module removed: testarg = [%d]\n", *testarg);
+       printk(KERN_INFO "Dual core test module removed: testarg = [%d]\n", *testarg);
 }
 
 module_init(test_init);
diff --git a/arch/blackfin/kernel/fixed_code.S b/arch/blackfin/kernel/fixed_code.S
new file mode 100644 (file)
index 0000000..d8b1ebc
--- /dev/null
@@ -0,0 +1,132 @@
+/*
+ * This file contains sequences of code that will be copied to a
+ * fixed location, defined in <asm/atomic_seq.h>.  The interrupt
+ * handlers ensure that these sequences appear to be atomic when
+ * executed from userspace.
+ * These are aligned to 16 bytes, so that we have some space to replace
+ * these sequences with something else (e.g. kernel traps if we ever do
+ * BF561 SMP).
+ */
+#include <linux/linkage.h>
+#include <linux/unistd.h>
+#include <asm/entry.h>
+
+.text
+ENTRY(_fixed_code_start)
+
+.align 16
+ENTRY(_sigreturn_stub)
+       P0 = __NR_rt_sigreturn;
+       EXCPT 0;
+       /* Speculative execution paranoia.  */
+0:     JUMP.S 0b;
+ENDPROC (_sigreturn_stub)
+
+.align 16
+       /*
+        * Atomic swap, 8 bit.
+        * Inputs:      P0: memory address to use
+        *              R1: value to store
+        * Output:      R0: old contents of the memory address, zero extended.
+        */
+ENTRY(_atomic_xchg32)
+       R0 = [P0];
+       [P0] = R1;
+       rts;
+ENDPROC (_atomic_xchg32)
+
+.align 16
+       /*
+        * Compare and swap, 32 bit.
+        * Inputs:      P0: memory address to use
+        *              R1: compare value
+        *              R2: new value to store
+        * The new value is stored if the contents of the memory
+        * address is equal to the compare value.
+        * Output:      R0: old contents of the memory address.
+        */
+ENTRY(_atomic_cas32)
+       R0 = [P0];
+       CC = R0 == R1;
+       IF !CC JUMP 1f;
+       [P0] = R2;
+1:
+       rts;
+ENDPROC (_atomic_cas32)
+
+.align 16
+       /*
+        * Atomic add, 32 bit.
+        * Inputs:      P0: memory address to use
+        *              R0: value to add
+        * Outputs:     R0: new contents of the memory address.
+        *              R1: previous contents of the memory address.
+        */
+ENTRY(_atomic_add32)
+       R1 = [P0];
+       R0 = R1 + R0;
+       [P0] = R0;
+       rts;
+ENDPROC (_atomic_add32)
+
+.align 16
+       /*
+        * Atomic sub, 32 bit.
+        * Inputs:      P0: memory address to use
+        *              R0: value to subtract
+        * Outputs:     R0: new contents of the memory address.
+        *              R1: previous contents of the memory address.
+        */
+ENTRY(_atomic_sub32)
+       R1 = [P0];
+       R0 = R1 - R0;
+       [P0] = R0;
+       rts;
+ENDPROC (_atomic_sub32)
+
+.align 16
+       /*
+        * Atomic ior, 32 bit.
+        * Inputs:      P0: memory address to use
+        *              R0: value to ior
+        * Outputs:     R0: new contents of the memory address.
+        *              R1: previous contents of the memory address.
+        */
+ENTRY(_atomic_ior32)
+       R1 = [P0];
+       R0 = R1 | R0;
+       [P0] = R0;
+       rts;
+ENDPROC (_atomic_ior32)
+
+.align 16
+       /*
+        * Atomic ior, 32 bit.
+        * Inputs:      P0: memory address to use
+        *              R0: value to ior
+        * Outputs:     R0: new contents of the memory address.
+        *              R1: previous contents of the memory address.
+        */
+ENTRY(_atomic_and32)
+       R1 = [P0];
+       R0 = R1 & R0;
+       [P0] = R0;
+       rts;
+ENDPROC (_atomic_ior32)
+
+.align 16
+       /*
+        * Atomic ior, 32 bit.
+        * Inputs:      P0: memory address to use
+        *              R0: value to ior
+        * Outputs:     R0: new contents of the memory address.
+        *              R1: previous contents of the memory address.
+        */
+ENTRY(_atomic_xor32)
+       R1 = [P0];
+       R0 = R1 ^ R0;
+       [P0] = R0;
+       rts;
+ENDPROC (_atomic_ior32)
+
+ENTRY(_fixed_code_end)
index a92587b628b570feca2940c9e882b164797db946..d188b24305364e4e348a592a2075734a8204a7e2 100644 (file)
@@ -36,24 +36,22 @@ unsigned long bfin_get_addr_from_rp(unsigned long *ptr,
        unsigned long val;
 
        switch (type) {
-               case FLAT_BFIN_RELOC_TYPE_16_BIT:
-               case FLAT_BFIN_RELOC_TYPE_16H_BIT:
-                       usptr = (unsigned short *)ptr;
-                       pr_debug("*usptr = %x", get_unaligned(usptr));
-                       val = get_unaligned(usptr);
-                       val += *persistent;
-                       break;
+       case FLAT_BFIN_RELOC_TYPE_16_BIT:
+       case FLAT_BFIN_RELOC_TYPE_16H_BIT:
+               usptr = (unsigned short *)ptr;
+               pr_debug("*usptr = %x", get_unaligned(usptr));
+               val = get_unaligned(usptr);
+               val += *persistent;
+               break;
 
-               case FLAT_BFIN_RELOC_TYPE_32_BIT:
-                       pr_debug("*ptr = %lx", get_unaligned(ptr));
-                       val = get_unaligned(ptr);
-                       break;
+       case FLAT_BFIN_RELOC_TYPE_32_BIT:
+               pr_debug("*ptr = %lx", get_unaligned(ptr));
+               val = get_unaligned(ptr);
+               break;
 
-               default:
-                       pr_debug("BINFMT_FLAT: Unknown relocation type %x\n",
-                               type);
-
-                       return 0;
+       default:
+               pr_debug("BINFMT_FLAT: Unknown relocation type %x\n", type);
+               return 0;
        }
 
        /*
@@ -81,21 +79,20 @@ void bfin_put_addr_at_rp(unsigned long *ptr, unsigned long addr,
        int type = (relval >> 26) & 7;
 
        switch (type) {
-               case FLAT_BFIN_RELOC_TYPE_16_BIT:
-                       put_unaligned(addr, usptr);
-                       pr_debug("new value %x at %p", get_unaligned(usptr),
-                               usptr);
-                       break;
+       case FLAT_BFIN_RELOC_TYPE_16_BIT:
+               put_unaligned(addr, usptr);
+               pr_debug("new value %x at %p", get_unaligned(usptr), usptr);
+               break;
 
-               case FLAT_BFIN_RELOC_TYPE_16H_BIT:
-                       put_unaligned(addr >> 16, usptr);
-                       pr_debug("new value %x", get_unaligned(usptr));
-                       break;
+       case FLAT_BFIN_RELOC_TYPE_16H_BIT:
+               put_unaligned(addr >> 16, usptr);
+               pr_debug("new value %x", get_unaligned(usptr));
+               break;
 
-               case FLAT_BFIN_RELOC_TYPE_32_BIT:
-                       put_unaligned(addr, ptr);
-                       pr_debug("new ptr =%lx", get_unaligned(ptr));
-                       break;
+       case FLAT_BFIN_RELOC_TYPE_32_BIT:
+               put_unaligned(addr, ptr);
+               pr_debug("new ptr =%lx", get_unaligned(ptr));
+               break;
        }
 }
 EXPORT_SYMBOL(bfin_put_addr_at_rp);
index 80996a1a94ca9996edb9dccde1925c398490cd8b..1fc001c7abdac10b22be68d12b89c6be3638a69f 100644 (file)
@@ -82,7 +82,7 @@ int show_interrupts(struct seq_file *p, void *v)
                        seq_printf(p, ", %s", action->name);
 
                seq_putc(p, '\n');
            unlock:
+ unlock:
                spin_unlock_irqrestore(&irq_desc[i].lock, flags);
        } else if (i == NR_IRQS) {
                seq_printf(p, "Err: %10lu\n", irq_err_count);
diff --git a/arch/blackfin/kernel/kgdb.c b/arch/blackfin/kernel/kgdb.c
new file mode 100644 (file)
index 0000000..a9c1551
--- /dev/null
@@ -0,0 +1,421 @@
+/*
+ * File:         arch/blackfin/kernel/kgdb.c
+ * Based on:
+ * Author:       Sonic Zhang
+ *
+ * Created:
+ * Description:
+ *
+ * Rev:          $Id: kgdb_bfin_linux-2.6.x.patch 4934 2007-02-13 09:32:11Z sonicz $
+ *
+ * Modified:
+ *               Copyright 2005-2006 Analog Devices Inc.
+ *
+ * Bugs:         Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/smp.h>
+#include <linux/spinlock.h>
+#include <linux/delay.h>
+#include <linux/ptrace.h>              /* for linux pt_regs struct */
+#include <linux/kgdb.h>
+#include <linux/console.h>
+#include <linux/init.h>
+#include <linux/debugger.h>
+#include <linux/errno.h>
+#include <linux/irq.h>
+#include <asm/system.h>
+#include <asm/traps.h>
+#include <asm/blackfin.h>
+
+/* Put the error code here just in case the user cares.  */
+int gdb_bf533errcode;
+/* Likewise, the vector number here (since GDB only gets the signal
+   number through the usual means, and that's not very specific).  */
+int gdb_bf533vector = -1;
+
+#if KGDB_MAX_NO_CPUS != 8
+#error change the definition of slavecpulocks
+#endif
+
+void regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
+{
+       gdb_regs[BFIN_R0] = regs->r0;
+       gdb_regs[BFIN_R1] = regs->r1;
+       gdb_regs[BFIN_R2] = regs->r2;
+       gdb_regs[BFIN_R3] = regs->r3;
+       gdb_regs[BFIN_R4] = regs->r4;
+       gdb_regs[BFIN_R5] = regs->r5;
+       gdb_regs[BFIN_R6] = regs->r6;
+       gdb_regs[BFIN_R7] = regs->r7;
+       gdb_regs[BFIN_P0] = regs->p0;
+       gdb_regs[BFIN_P1] = regs->p1;
+       gdb_regs[BFIN_P2] = regs->p2;
+       gdb_regs[BFIN_P3] = regs->p3;
+       gdb_regs[BFIN_P4] = regs->p4;
+       gdb_regs[BFIN_P5] = regs->p5;
+       gdb_regs[BFIN_SP] = regs->reserved;
+       gdb_regs[BFIN_FP] = regs->fp;
+       gdb_regs[BFIN_I0] = regs->i0;
+       gdb_regs[BFIN_I1] = regs->i1;
+       gdb_regs[BFIN_I2] = regs->i2;
+       gdb_regs[BFIN_I3] = regs->i3;
+       gdb_regs[BFIN_M0] = regs->m0;
+       gdb_regs[BFIN_M1] = regs->m1;
+       gdb_regs[BFIN_M2] = regs->m2;
+       gdb_regs[BFIN_M3] = regs->m3;
+       gdb_regs[BFIN_B0] = regs->b0;
+       gdb_regs[BFIN_B1] = regs->b1;
+       gdb_regs[BFIN_B2] = regs->b2;
+       gdb_regs[BFIN_B3] = regs->b3;
+       gdb_regs[BFIN_L0] = regs->l0;
+       gdb_regs[BFIN_L1] = regs->l1;
+       gdb_regs[BFIN_L2] = regs->l2;
+       gdb_regs[BFIN_L3] = regs->l3;
+       gdb_regs[BFIN_A0_DOT_X] = regs->a0x;
+       gdb_regs[BFIN_A0_DOT_W] = regs->a0w;
+       gdb_regs[BFIN_A1_DOT_X] = regs->a1x;
+       gdb_regs[BFIN_A1_DOT_W] = regs->a1w;
+       gdb_regs[BFIN_ASTAT] = regs->astat;
+       gdb_regs[BFIN_RETS] = regs->rets;
+       gdb_regs[BFIN_LC0] = regs->lc0;
+       gdb_regs[BFIN_LT0] = regs->lt0;
+       gdb_regs[BFIN_LB0] = regs->lb0;
+       gdb_regs[BFIN_LC1] = regs->lc1;
+       gdb_regs[BFIN_LT1] = regs->lt1;
+       gdb_regs[BFIN_LB1] = regs->lb1;
+       gdb_regs[BFIN_CYCLES] = 0;
+       gdb_regs[BFIN_CYCLES2] = 0;
+       gdb_regs[BFIN_USP] = regs->usp;
+       gdb_regs[BFIN_SEQSTAT] = regs->seqstat;
+       gdb_regs[BFIN_SYSCFG] = regs->syscfg;
+       gdb_regs[BFIN_RETI] = regs->pc;
+       gdb_regs[BFIN_RETX] = regs->retx;
+       gdb_regs[BFIN_RETN] = regs->retn;
+       gdb_regs[BFIN_RETE] = regs->rete;
+       gdb_regs[BFIN_PC] = regs->pc;
+       gdb_regs[BFIN_CC] = 0;
+       gdb_regs[BFIN_EXTRA1] = 0;
+       gdb_regs[BFIN_EXTRA2] = 0;
+       gdb_regs[BFIN_EXTRA3] = 0;
+       gdb_regs[BFIN_IPEND] = regs->ipend;
+}
+
+/*
+ * Extracts ebp, esp and eip values understandable by gdb from the values
+ * saved by switch_to.
+ * thread.esp points to ebp. flags and ebp are pushed in switch_to hence esp
+ * prior to entering switch_to is 8 greater then the value that is saved.
+ * If switch_to changes, change following code appropriately.
+ */
+void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
+{
+       gdb_regs[BFIN_SP] = p->thread.ksp;
+       gdb_regs[BFIN_PC] = p->thread.pc;
+       gdb_regs[BFIN_SEQSTAT] = p->thread.seqstat;
+}
+
+void gdb_regs_to_regs(unsigned long *gdb_regs, struct pt_regs *regs)
+{
+       regs->r0 = gdb_regs[BFIN_R0];
+       regs->r1 = gdb_regs[BFIN_R1];
+       regs->r2 = gdb_regs[BFIN_R2];
+       regs->r3 = gdb_regs[BFIN_R3];
+       regs->r4 = gdb_regs[BFIN_R4];
+       regs->r5 = gdb_regs[BFIN_R5];
+       regs->r6 = gdb_regs[BFIN_R6];
+       regs->r7 = gdb_regs[BFIN_R7];
+       regs->p0 = gdb_regs[BFIN_P0];
+       regs->p1 = gdb_regs[BFIN_P1];
+       regs->p2 = gdb_regs[BFIN_P2];
+       regs->p3 = gdb_regs[BFIN_P3];
+       regs->p4 = gdb_regs[BFIN_P4];
+       regs->p5 = gdb_regs[BFIN_P5];
+       regs->fp = gdb_regs[BFIN_FP];
+       regs->i0 = gdb_regs[BFIN_I0];
+       regs->i1 = gdb_regs[BFIN_I1];
+       regs->i2 = gdb_regs[BFIN_I2];
+       regs->i3 = gdb_regs[BFIN_I3];
+       regs->m0 = gdb_regs[BFIN_M0];
+       regs->m1 = gdb_regs[BFIN_M1];
+       regs->m2 = gdb_regs[BFIN_M2];
+       regs->m3 = gdb_regs[BFIN_M3];
+       regs->b0 = gdb_regs[BFIN_B0];
+       regs->b1 = gdb_regs[BFIN_B1];
+       regs->b2 = gdb_regs[BFIN_B2];
+       regs->b3 = gdb_regs[BFIN_B3];
+       regs->l0 = gdb_regs[BFIN_L0];
+       regs->l1 = gdb_regs[BFIN_L1];
+       regs->l2 = gdb_regs[BFIN_L2];
+       regs->l3 = gdb_regs[BFIN_L3];
+       regs->a0x = gdb_regs[BFIN_A0_DOT_X];
+       regs->a0w = gdb_regs[BFIN_A0_DOT_W];
+       regs->a1x = gdb_regs[BFIN_A1_DOT_X];
+       regs->a1w = gdb_regs[BFIN_A1_DOT_W];
+       regs->rets = gdb_regs[BFIN_RETS];
+       regs->lc0 = gdb_regs[BFIN_LC0];
+       regs->lt0 = gdb_regs[BFIN_LT0];
+       regs->lb0 = gdb_regs[BFIN_LB0];
+       regs->lc1 = gdb_regs[BFIN_LC1];
+       regs->lt1 = gdb_regs[BFIN_LT1];
+       regs->lb1 = gdb_regs[BFIN_LB1];
+       regs->usp = gdb_regs[BFIN_USP];
+       regs->syscfg = gdb_regs[BFIN_SYSCFG];
+       regs->retx = gdb_regs[BFIN_PC];
+       regs->retn = gdb_regs[BFIN_RETN];
+       regs->rete = gdb_regs[BFIN_RETE];
+       regs->pc = gdb_regs[BFIN_PC];
+
+#if 0                          /* can't change these */
+       regs->astat = gdb_regs[BFIN_ASTAT];
+       regs->seqstat = gdb_regs[BFIN_SEQSTAT];
+       regs->ipend = gdb_regs[BFIN_IPEND];
+#endif
+}
+
+struct hw_breakpoint {
+       unsigned int occupied:1;
+       unsigned int skip:1;
+       unsigned int enabled:1;
+       unsigned int type:1;
+       unsigned int dataacc:2;
+       unsigned short count;
+       unsigned int addr;
+} breakinfo[HW_BREAKPOINT_NUM];
+
+int kgdb_arch_init(void)
+{
+       kgdb_remove_all_hw_break();
+       return 0;
+}
+
+int kgdb_set_hw_break(unsigned long addr)
+{
+       int breakno;
+       for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++)
+               if (!breakinfo[breakno].occupied) {
+                       breakinfo[breakno].occupied = 1;
+                       breakinfo[breakno].enabled = 1;
+                       breakinfo[breakno].type = 1;
+                       breakinfo[breakno].addr = addr;
+                       return 0;
+               }
+
+       return -ENOSPC;
+}
+
+int kgdb_remove_hw_break(unsigned long addr)
+{
+       int breakno;
+       for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++)
+               if (breakinfo[breakno].addr == addr)
+                       memset(&(breakinfo[breakno]), 0, sizeof(struct hw_breakpoint));
+
+       return 0;
+}
+
+void kgdb_remove_all_hw_break(void)
+{
+       memset(breakinfo, 0, sizeof(struct hw_breakpoint)*8);
+}
+
+/*
+void kgdb_show_info(void)
+{
+       printk(KERN_DEBUG "hwd: wpia0=0x%x, wpiacnt0=%d, wpiactl=0x%x, wpstat=0x%x\n",
+               bfin_read_WPIA0(), bfin_read_WPIACNT0(),
+               bfin_read_WPIACTL(), bfin_read_WPSTAT());
+}
+*/
+
+void kgdb_correct_hw_break(void)
+{
+       int breakno;
+       int correctit;
+       uint32_t wpdactl = bfin_read_WPDACTL();
+
+       correctit = 0;
+       for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++) {
+               if (breakinfo[breakno].type == 1) {
+                       switch (breakno) {
+                       case 0:
+                               if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN0)) {
+                                       correctit = 1;
+                                       wpdactl &= ~(WPIREN01|EMUSW0);
+                                       wpdactl |= WPIAEN0|WPICNTEN0;
+                                       bfin_write_WPIA0(breakinfo[breakno].addr);
+                                       bfin_write_WPIACNT0(breakinfo[breakno].skip);
+                               } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN0)) {
+                                       correctit = 1;
+                                       wpdactl &= ~WPIAEN0;
+                               }
+                               break;
+
+                       case 1:
+                               if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN1)) {
+                                       correctit = 1;
+                                       wpdactl &= ~(WPIREN01|EMUSW1);
+                                       wpdactl |= WPIAEN1|WPICNTEN1;
+                                       bfin_write_WPIA1(breakinfo[breakno].addr);
+                                       bfin_write_WPIACNT1(breakinfo[breakno].skip);
+                               } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN1)) {
+                                       correctit = 1;
+                                       wpdactl &= ~WPIAEN1;
+                               }
+                               break;
+
+                       case 2:
+                               if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN2)) {
+                                       correctit = 1;
+                                       wpdactl &= ~(WPIREN23|EMUSW2);
+                                       wpdactl |= WPIAEN2|WPICNTEN2;
+                                       bfin_write_WPIA2(breakinfo[breakno].addr);
+                                       bfin_write_WPIACNT2(breakinfo[breakno].skip);
+                               } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN2)) {
+                                       correctit = 1;
+                                       wpdactl &= ~WPIAEN2;
+                               }
+                               break;
+
+                       case 3:
+                               if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN3)) {
+                                       correctit = 1;
+                                       wpdactl &= ~(WPIREN23|EMUSW3);
+                                       wpdactl |= WPIAEN3|WPICNTEN3;
+                                       bfin_write_WPIA3(breakinfo[breakno].addr);
+                                       bfin_write_WPIACNT3(breakinfo[breakno].skip);
+                               } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN3)) {
+                                       correctit = 1;
+                                       wpdactl &= ~WPIAEN3;
+                               }
+                               break;
+                       case 4:
+                               if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN4)) {
+                                       correctit = 1;
+                                       wpdactl &= ~(WPIREN45|EMUSW4);
+                                       wpdactl |= WPIAEN4|WPICNTEN4;
+                                       bfin_write_WPIA4(breakinfo[breakno].addr);
+                                       bfin_write_WPIACNT4(breakinfo[breakno].skip);
+                               } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN4)) {
+                                       correctit = 1;
+                                       wpdactl &= ~WPIAEN4;
+                               }
+                               break;
+                       case 5:
+                               if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN5)) {
+                                       correctit = 1;
+                                       wpdactl &= ~(WPIREN45|EMUSW5);
+                                       wpdactl |= WPIAEN5|WPICNTEN5;
+                                       bfin_write_WPIA5(breakinfo[breakno].addr);
+                                       bfin_write_WPIACNT5(breakinfo[breakno].skip);
+                               } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN5)) {
+                                       correctit = 1;
+                                       wpdactl &= ~WPIAEN5;
+                               }
+                               break;
+                       }
+               }
+       }
+       if (correctit) {
+               wpdactl &= ~WPAND;
+               wpdactl |= WPPWR;
+               /*printk("correct_hw_break: wpdactl=0x%x\n", wpdactl);*/
+               bfin_write_WPDACTL(wpdactl);
+               CSYNC();
+               /*kgdb_show_info();*/
+       }
+}
+
+void kgdb_disable_hw_debug(struct pt_regs *regs)
+{
+       /* Disable hardware debugging while we are in kgdb */
+       bfin_write_WPIACTL(bfin_read_WPIACTL() & ~0x1);
+       CSYNC();
+}
+
+void kgdb_post_master_code(struct pt_regs *regs, int eVector, int err_code)
+{
+       /* Master processor is completely in the debugger */
+       gdb_bf533vector = eVector;
+       gdb_bf533errcode = err_code;
+}
+
+int kgdb_arch_handle_exception(int exceptionVector, int signo,
+                              int err_code, char *remcom_in_buffer,
+                              char *remcom_out_buffer,
+                              struct pt_regs *linux_regs)
+{
+       long addr;
+       long breakno;
+       char *ptr;
+       int newPC;
+       int wp_status;
+
+       switch (remcom_in_buffer[0]) {
+       case 'c':
+       case 's':
+               if (kgdb_contthread && kgdb_contthread != current) {
+                       strcpy(remcom_out_buffer, "E00");
+                       break;
+               }
+
+               kgdb_contthread = NULL;
+
+               /* try to read optional parameter, pc unchanged if no parm */
+               ptr = &remcom_in_buffer[1];
+               if (kgdb_hex2long(&ptr, &addr)) {
+                       linux_regs->retx = addr;
+               }
+               newPC = linux_regs->retx;
+
+               /* clear the trace bit */
+               linux_regs->syscfg &= 0xfffffffe;
+
+               /* set the trace bit if we're stepping */
+               if (remcom_in_buffer[0] == 's') {
+                       linux_regs->syscfg |= 0x1;
+                       debugger_step = 1;
+               }
+
+               wp_status = bfin_read_WPSTAT();
+               CSYNC();
+
+               if (exceptionVector == VEC_WATCH) {
+                       for (breakno = 0; breakno < 6; ++breakno) {
+                               if (wp_status & (1 << breakno)) {
+                                       breakinfo->skip = 1;
+                                       break;
+                               }
+                       }
+               }
+               kgdb_correct_hw_break();
+
+               bfin_write_WPSTAT(0);
+
+               return 0;
+       }                       /* switch */
+       return -1;              /* this means that we do not want to exit from the handler */
+}
+
+struct kgdb_arch arch_kgdb_ops = {
+       .gdb_bpt_instr = {0xa1},
+       .flags = KGDB_HW_BREAKPOINT,
+};
index 372f756f1ad9cf4d0d717af332b988ecd51e294d..8b9fe29d03f4f4a02c91f3a2585b703bfa7b3bc9 100644 (file)
@@ -165,8 +165,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
 
        for (s = sechdrs; s < sechdrs_end; ++s) {
                if ((strcmp(".l1.text", secstrings + s->sh_name) == 0) ||
-                       ((strcmp(".text", secstrings + s->sh_name)==0) &&
-                        (hdr->e_flags & FLG_CODE_IN_L1) && (s->sh_size > 0))) {
+                   ((strcmp(".text", secstrings + s->sh_name) == 0) &&
+                    (hdr->e_flags & FLG_CODE_IN_L1) && (s->sh_size > 0))) {
                        mod->arch.text_l1 = s;
                        dest = l1_inst_sram_alloc(s->sh_size);
                        if (dest == NULL) {
@@ -179,9 +179,9 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
                        s->sh_flags &= ~SHF_ALLOC;
                        s->sh_addr = (unsigned long)dest;
                }
-               if ((strcmp(".l1.data", secstrings + s->sh_name) == 0)||
-                       ((strcmp(".data", secstrings + s->sh_name)==0) &&
-                        (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
+               if ((strcmp(".l1.data", secstrings + s->sh_name) == 0) ||
+                   ((strcmp(".data", secstrings + s->sh_name) == 0) &&
+                    (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
                        mod->arch.data_a_l1 = s;
                        dest = l1_data_sram_alloc(s->sh_size);
                        if (dest == NULL) {
@@ -195,8 +195,8 @@ module_frob_arch_sections(Elf_Ehdr * hdr, Elf_Shdr * sechdrs,
                        s->sh_addr = (unsigned long)dest;
                }
                if (strcmp(".l1.bss", secstrings + s->sh_name) == 0 ||
-                       ((strcmp(".bss", secstrings + s->sh_name)==0) &&
-                        (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
+                   ((strcmp(".bss", secstrings + s->sh_name) == 0) &&
+                    (hdr->e_flags & FLG_DATA_IN_L1) && (s->sh_size > 0))) {
                        mod->arch.bss_a_l1 = s;
                        dest = l1_data_sram_alloc(s->sh_size);
                        if (dest == NULL) {
@@ -326,7 +326,7 @@ apply_relocate_add(Elf_Shdr * sechdrs, const char *strtab,
                        pr_debug("before %x after %x\n", *location16,
                                       (value & 0xffff));
                        tmp = (value & 0xffff);
-                       if((unsigned long)location16 >= L1_CODE_START) {
+                       if ((unsigned long)location16 >= L1_CODE_START) {
                                dma_memcpy(location16, &tmp, 2);
                        } else
                                *location16 = tmp;
@@ -335,7 +335,7 @@ apply_relocate_add(Elf_Shdr * sechdrs, const char *strtab,
                        pr_debug("before %x after %x\n", *location16,
                                       ((value >> 16) & 0xffff));
                        tmp = ((value >> 16) & 0xffff);
-                       if((unsigned long)location16 >= L1_CODE_START) {
+                       if ((unsigned long)location16 >= L1_CODE_START) {
                                dma_memcpy(location16, &tmp, 2);
                        } else
                                *location16 = tmp;
@@ -404,8 +404,8 @@ module_finalize(const Elf_Ehdr * hdr,
                        continue;
 
                if ((sechdrs[i].sh_type == SHT_RELA) &&
-                   ((strcmp(".rela.l1.text", secstrings + sechdrs[i].sh_name) == 0)||
-                       ((strcmp(".rela.text", secstrings + sechdrs[i].sh_name) == 0) &&
+                   ((strcmp(".rela.l1.text", secstrings + sechdrs[i].sh_name) == 0) ||
+                   ((strcmp(".rela.text", secstrings + sechdrs[i].sh_name) == 0) &&
                         (hdr->e_flags & FLG_CODE_IN_L1)))) {
                        apply_relocate_add((Elf_Shdr *) sechdrs, strtab,
                                           symindex, i, mod);
@@ -417,13 +417,13 @@ module_finalize(const Elf_Ehdr * hdr,
 void module_arch_cleanup(struct module *mod)
 {
        if ((mod->arch.text_l1) && (mod->arch.text_l1->sh_addr))
-               l1_inst_sram_free((void*)mod->arch.text_l1->sh_addr);
+               l1_inst_sram_free((void *)mod->arch.text_l1->sh_addr);
        if ((mod->arch.data_a_l1) && (mod->arch.data_a_l1->sh_addr))
-               l1_data_sram_free((void*)mod->arch.data_a_l1->sh_addr);
+               l1_data_sram_free((void *)mod->arch.data_a_l1->sh_addr);
        if ((mod->arch.bss_a_l1) && (mod->arch.bss_a_l1->sh_addr))
-               l1_data_sram_free((void*)mod->arch.bss_a_l1->sh_addr);
+               l1_data_sram_free((void *)mod->arch.bss_a_l1->sh_addr);
        if ((mod->arch.data_b_l1) && (mod->arch.data_b_l1->sh_addr))
-               l1_data_B_sram_free((void*)mod->arch.data_b_l1->sh_addr);
+               l1_data_B_sram_free((void *)mod->arch.data_b_l1->sh_addr);
        if ((mod->arch.bss_b_l1) && (mod->arch.bss_b_l1->sh_addr))
-               l1_data_B_sram_free((void*)mod->arch.bss_b_l1->sh_addr);
+               l1_data_B_sram_free((void *)mod->arch.bss_b_l1->sh_addr);
 }
index 3eff7439d8d3f0e3a5bd542a307491f85a96a287..5a51dd6ab28095966fac101dc229fb600934765f 100644 (file)
 #include <linux/unistd.h>
 #include <linux/user.h>
 #include <linux/a.out.h>
+#include <linux/uaccess.h>
 
 #include <asm/blackfin.h>
-#include <asm/uaccess.h>
+#include <asm/fixed_code.h>
 
 #define        LED_ON  0
 #define        LED_OFF 1
@@ -173,8 +174,8 @@ void show_regs(struct pt_regs *regs)
        printk(KERN_NOTICE "R4: %08lx  R5: %08lx  R6: %08lx  R7: %08lx\n",
               regs->r4, regs->r5, regs->r6, regs->r7);
 
-       if (!(regs->ipend))
-               printk("USP: %08lx\n", rdusp());
+       if (!regs->ipend)
+               printk(KERN_NOTICE "USP: %08lx\n", rdusp());
 }
 
 /* Fill in the fpu structure for a core dump.  */
@@ -322,7 +323,7 @@ asmlinkage int sys_execve(char *name, char **argv, char **envp)
                goto out;
        error = do_execve(filename, argv, envp, regs);
        putname(filename);
     out:
+ out:
        unlock_kernel();
        return error;
 }
@@ -350,13 +351,77 @@ unsigned long get_wchan(struct task_struct *p)
        return 0;
 }
 
+void finish_atomic_sections (struct pt_regs *regs)
+{
+       if (regs->pc < ATOMIC_SEQS_START || regs->pc >= ATOMIC_SEQS_END)
+               return;
+
+       switch (regs->pc) {
+       case ATOMIC_XCHG32 + 2:
+               put_user(regs->r1, (int *)regs->p0);
+               regs->pc += 2;
+               break;
+
+       case ATOMIC_CAS32 + 2:
+       case ATOMIC_CAS32 + 4:
+               if (regs->r0 == regs->r1)
+                       put_user(regs->r2, (int *)regs->p0);
+               regs->pc = ATOMIC_CAS32 + 8;
+               break;
+       case ATOMIC_CAS32 + 6:
+               put_user(regs->r2, (int *)regs->p0);
+               regs->pc += 2;
+               break;
+
+       case ATOMIC_ADD32 + 2:
+               regs->r0 = regs->r1 + regs->r0;
+               /* fall through */
+       case ATOMIC_ADD32 + 4:
+               put_user(regs->r0, (int *)regs->p0);
+               regs->pc = ATOMIC_ADD32 + 6;
+               break;
+
+       case ATOMIC_SUB32 + 2:
+               regs->r0 = regs->r1 - regs->r0;
+               /* fall through */
+       case ATOMIC_SUB32 + 4:
+               put_user(regs->r0, (int *)regs->p0);
+               regs->pc = ATOMIC_SUB32 + 6;
+               break;
+
+       case ATOMIC_IOR32 + 2:
+               regs->r0 = regs->r1 | regs->r0;
+               /* fall through */
+       case ATOMIC_IOR32 + 4:
+               put_user(regs->r0, (int *)regs->p0);
+               regs->pc = ATOMIC_IOR32 + 6;
+               break;
+
+       case ATOMIC_AND32 + 2:
+               regs->r0 = regs->r1 & regs->r0;
+               /* fall through */
+       case ATOMIC_AND32 + 4:
+               put_user(regs->r0, (int *)regs->p0);
+               regs->pc = ATOMIC_AND32 + 6;
+               break;
+
+       case ATOMIC_XOR32 + 2:
+               regs->r0 = regs->r1 ^ regs->r0;
+               /* fall through */
+       case ATOMIC_XOR32 + 4:
+               put_user(regs->r0, (int *)regs->p0);
+               regs->pc = ATOMIC_XOR32 + 6;
+               break;
+       }
+}
+
 #if defined(CONFIG_ACCESS_CHECK)
 int _access_ok(unsigned long addr, unsigned long size)
 {
 
        if (addr > (addr + size))
                return 0;
-       if (segment_eq(get_fs(),KERNEL_DS))
+       if (segment_eq(get_fs(), KERNEL_DS))
                return 1;
 #ifdef CONFIG_MTD_UCLINUX
        if (addr >= memory_start && (addr + size) <= memory_end)
index e718bb4a1ef027fdc050f51d4303cbe11a8905d0..ed800c7456dd004a9863e2643a8a4aac720d2c9b 100644 (file)
@@ -36,8 +36,8 @@
 #include <linux/ptrace.h>
 #include <linux/user.h>
 #include <linux/signal.h>
+#include <linux/uaccess.h>
 
-#include <asm/uaccess.h>
 #include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/system.h>
@@ -122,7 +122,7 @@ static inline long get_reg(struct task_struct *task, int regno)
 static inline int
 put_reg(struct task_struct *task, int regno, unsigned long data)
 {
-       char * reg_ptr;
+       char *reg_ptr;
 
        struct pt_regs *regs =
            (struct pt_regs *)((unsigned long)task_stack_page(task) +
@@ -146,7 +146,7 @@ put_reg(struct task_struct *task, int regno, unsigned long data)
                break;
        default:
                if (regno <= 216)
-                       *(long *)(reg_ptr + regno) = data;
+                       *(long *)(reg_ptr + regno) = data;
        }
        return 0;
 }
index 83060f98d15d265cfcfbc50f657743f7e99255c4..f59dcee7bae3da76723a3432866fa08d8b7d9f0a 100644 (file)
@@ -42,6 +42,7 @@
 #include <asm/cacheflush.h>
 #include <asm/blackfin.h>
 #include <asm/cplbinit.h>
+#include <asm/fixed_code.h>
 
 u16 _bfin_swrst;
 
@@ -63,10 +64,6 @@ EXPORT_SYMBOL(mtd_size);
 
 char __initdata command_line[COMMAND_LINE_SIZE];
 
-#if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE)
-static void generate_cpl_tables(void);
-#endif
-
 void __init bf53x_cache_init(void)
 {
 #if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE)
@@ -197,6 +194,17 @@ void __init setup_arch(char **cmdline_p)
        /* this give a chance to get printk() working before crash. */
 #endif
 
+       printk(KERN_INFO "Hardware Trace ");
+       if (bfin_read_TBUFCTL() & 0x1 )
+               printk("Active ");
+       else
+               printk("Off ");
+       if (bfin_read_TBUFCTL() & 0x2)
+               printk("and Enabled\n");
+       else
+       printk("and Disabled\n");
+
+
 #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
        /* we need to initialize the Flashrom device here since we might
         * do things with flash early on in the boot
@@ -354,15 +362,15 @@ void __init setup_arch(char **cmdline_p)
               , _stext, _etext,
               __start_rodata, __end_rodata,
               _sdata, _edata,
-              (void*)&init_thread_union, (void*)((int)(&init_thread_union) + 0x2000),
+              (void *)&init_thread_union, (void *)((int)(&init_thread_union) + 0x2000),
               __init_begin, __init_end,
               __bss_start, __bss_stop,
-              (void*)_ramstart, (void*)memory_end
+              (void *)_ramstart, (void *)memory_end
 #ifdef CONFIG_MTD_UCLINUX
-              , (void*)memory_mtd_start, (void*)(memory_mtd_start + mtd_size)
+              , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
 #endif
 #if DMA_UNCACHED_REGION > 0
-              , (void*)(_ramend - DMA_UNCACHED_REGION), (void*)(_ramend)
+              , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
 #endif
               );
 
@@ -388,11 +396,11 @@ void __init setup_arch(char **cmdline_p)
        /* check the size of the l1 area */
        l1_length = _etext_l1 - _stext_l1;
        if (l1_length > L1_CODE_LENGTH)
-               panic("L1 memory overflow\n");
+               panic("L1 code memory overflow\n");
 
        l1_length = _ebss_l1 - _sdata_l1;
        if (l1_length > L1_DATA_A_LENGTH)
-               panic("L1 memory overflow\n");
+               panic("L1 data memory overflow\n");
 
 #ifdef BF561_FAMILY
        _bfin_swrst = bfin_read_SICA_SWRST();
@@ -400,10 +408,28 @@ void __init setup_arch(char **cmdline_p)
        _bfin_swrst = bfin_read_SWRST();
 #endif
 
-       bf53x_cache_init();
+       /* Copy atomic sequences to their fixed location, and sanity check that
+          these locations are the ones that we advertise to userspace.  */
+       memcpy((void *)FIXED_CODE_START, &fixed_code_start,
+              FIXED_CODE_END - FIXED_CODE_START);
+       BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
+              != SIGRETURN_STUB - FIXED_CODE_START);
+       BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
+              != ATOMIC_XCHG32 - FIXED_CODE_START);
+       BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
+              != ATOMIC_CAS32 - FIXED_CODE_START);
+       BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
+              != ATOMIC_ADD32 - FIXED_CODE_START);
+       BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
+              != ATOMIC_SUB32 - FIXED_CODE_START);
+       BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
+              != ATOMIC_IOR32 - FIXED_CODE_START);
+       BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
+              != ATOMIC_AND32 - FIXED_CODE_START);
+       BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
+              != ATOMIC_XOR32 - FIXED_CODE_START);
 
-       printk(KERN_INFO "Hardware Trace Enabled\n");
-       bfin_write_TBUFCTL(0x03);
+       bf53x_cache_init();
 }
 
 static int __init topology_init(void)
@@ -421,286 +447,6 @@ static int __init topology_init(void)
 
 subsys_initcall(topology_init);
 
-#if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE)
-static u16 __init lock_kernel_check(u32 start, u32 end)
-{
-       if ((start <= (u32) _stext && end >= (u32) _end)
-           || (start >= (u32) _stext && end <= (u32) _end))
-               return IN_KERNEL;
-       return 0;
-}
-
-static unsigned short __init
-fill_cplbtab(struct cplb_tab *table,
-            unsigned long start, unsigned long end,
-            unsigned long block_size, unsigned long cplb_data)
-{
-       int i;
-
-       switch (block_size) {
-       case SIZE_4M:
-               i = 3;
-               break;
-       case SIZE_1M:
-               i = 2;
-               break;
-       case SIZE_4K:
-               i = 1;
-               break;
-       case SIZE_1K:
-       default:
-               i = 0;
-               break;
-       }
-
-       cplb_data = (cplb_data & ~(3 << 16)) | (i << 16);
-
-       while ((start < end) && (table->pos < table->size)) {
-
-               table->tab[table->pos++] = start;
-
-               if (lock_kernel_check(start, start + block_size) == IN_KERNEL)
-                       table->tab[table->pos++] =
-                           cplb_data | CPLB_LOCK | CPLB_DIRTY;
-               else
-                       table->tab[table->pos++] = cplb_data;
-
-               start += block_size;
-       }
-       return 0;
-}
-
-static unsigned short __init
-close_cplbtab(struct cplb_tab *table)
-{
-
-       while (table->pos < table->size) {
-
-               table->tab[table->pos++] = 0;
-               table->tab[table->pos++] = 0; /* !CPLB_VALID */
-       }
-       return 0;
-}
-
-/* helper function */
-static void __fill_code_cplbtab(struct cplb_tab *t, int i,
-                               u32 a_start, u32 a_end)
-{
-       if (cplb_data[i].psize) {
-               fill_cplbtab(t,
-                               cplb_data[i].start,
-                               cplb_data[i].end,
-                               cplb_data[i].psize,
-                               cplb_data[i].i_conf);
-       } else {
-#if (defined(CONFIG_BLKFIN_CACHE) && defined(ANOMALY_05000263))
-               if (i == SDRAM_KERN) {
-                       fill_cplbtab(t,
-                                       cplb_data[i].start,
-                                       cplb_data[i].end,
-                                       SIZE_4M,
-                                       cplb_data[i].i_conf);
-               } else {
-#endif
-                       fill_cplbtab(t,
-                                       cplb_data[i].start,
-                                       a_start,
-                                       SIZE_1M,
-                                       cplb_data[i].i_conf);
-                       fill_cplbtab(t,
-                                       a_start,
-                                       a_end,
-                                       SIZE_4M,
-                                       cplb_data[i].i_conf);
-                       fill_cplbtab(t, a_end,
-                                       cplb_data[i].end,
-                                       SIZE_1M,
-                                       cplb_data[i].i_conf);
-               }
-       }
-}
-
-static void __fill_data_cplbtab(struct cplb_tab *t, int i,
-                               u32 a_start, u32 a_end)
-{
-       if (cplb_data[i].psize) {
-               fill_cplbtab(t,
-                               cplb_data[i].start,
-                               cplb_data[i].end,
-                               cplb_data[i].psize,
-                               cplb_data[i].d_conf);
-       } else {
-               fill_cplbtab(t,
-                               cplb_data[i].start,
-                               a_start, SIZE_1M,
-                               cplb_data[i].d_conf);
-               fill_cplbtab(t, a_start,
-                               a_end, SIZE_4M,
-                               cplb_data[i].d_conf);
-               fill_cplbtab(t, a_end,
-                               cplb_data[i].end,
-                               SIZE_1M,
-                               cplb_data[i].d_conf);
-       }
-}
-static void __init generate_cpl_tables(void)
-{
-
-       u16 i, j, process;
-       u32 a_start, a_end, as, ae, as_1m;
-
-       struct cplb_tab *t_i = NULL;
-       struct cplb_tab *t_d = NULL;
-       struct s_cplb cplb;
-
-       cplb.init_i.size = MAX_CPLBS;
-       cplb.init_d.size = MAX_CPLBS;
-       cplb.switch_i.size = MAX_SWITCH_I_CPLBS;
-       cplb.switch_d.size = MAX_SWITCH_D_CPLBS;
-
-       cplb.init_i.pos = 0;
-       cplb.init_d.pos = 0;
-       cplb.switch_i.pos = 0;
-       cplb.switch_d.pos = 0;
-
-       cplb.init_i.tab = icplb_table;
-       cplb.init_d.tab = dcplb_table;
-       cplb.switch_i.tab = ipdt_table;
-       cplb.switch_d.tab = dpdt_table;
-
-       cplb_data[SDRAM_KERN].end = memory_end;
-
-#ifdef CONFIG_MTD_UCLINUX
-       cplb_data[SDRAM_RAM_MTD].start = memory_mtd_start;
-       cplb_data[SDRAM_RAM_MTD].end = memory_mtd_start + mtd_size;
-       cplb_data[SDRAM_RAM_MTD].valid = mtd_size > 0;
-# if defined(CONFIG_ROMFS_FS)
-       cplb_data[SDRAM_RAM_MTD].attr |= I_CPLB;
-
-       /*
-        * The ROMFS_FS size is often not multiple of 1MB.
-        * This can cause multiple CPLB sets covering the same memory area.
-        * This will then cause multiple CPLB hit exceptions.
-        * Workaround: We ensure a contiguous memory area by extending the kernel
-        * memory section over the mtd section.
-        * For ROMFS_FS memory must be covered with ICPLBs anyways.
-        * So there is no difference between kernel and mtd memory setup.
-        */
-
-       cplb_data[SDRAM_KERN].end = memory_mtd_start + mtd_size;;
-       cplb_data[SDRAM_RAM_MTD].valid = 0;
-
-# endif
-#else
-       cplb_data[SDRAM_RAM_MTD].valid = 0;
-#endif
-
-       cplb_data[SDRAM_DMAZ].start = _ramend - DMA_UNCACHED_REGION;
-       cplb_data[SDRAM_DMAZ].end = _ramend;
-
-       cplb_data[RES_MEM].start = _ramend;
-       cplb_data[RES_MEM].end = physical_mem_end;
-
-       if (reserved_mem_dcache_on)
-               cplb_data[RES_MEM].d_conf = SDRAM_DGENERIC;
-       else
-               cplb_data[RES_MEM].d_conf = SDRAM_DNON_CHBL;
-
-       if (reserved_mem_icache_on)
-               cplb_data[RES_MEM].i_conf = SDRAM_IGENERIC;
-       else
-               cplb_data[RES_MEM].i_conf = SDRAM_INON_CHBL;
-
-       for (i = ZERO_P; i <= L2_MEM; i++) {
-               if (!cplb_data[i].valid)
-                       continue;
-
-               as_1m = cplb_data[i].start % SIZE_1M;
-
-               /*
-                * We need to make sure all sections are properly 1M aligned
-                * However between Kernel Memory and the Kernel mtd section,
-                * depending on the rootfs size, there can be overlapping
-                * memory areas.
-                */
-
-               if (as_1m && i != L1I_MEM && i != L1D_MEM) {
-#ifdef CONFIG_MTD_UCLINUX
-                       if (i == SDRAM_RAM_MTD) {
-                               if ((cplb_data[SDRAM_KERN].end + 1) >
-                                               cplb_data[SDRAM_RAM_MTD].start)
-                                       cplb_data[SDRAM_RAM_MTD].start =
-                                               (cplb_data[i].start &
-                                                (-2*SIZE_1M)) + SIZE_1M;
-                               else
-                                       cplb_data[SDRAM_RAM_MTD].start =
-                                               (cplb_data[i].start &
-                                                (-2*SIZE_1M));
-                       } else
-#endif
-                               printk(KERN_WARNING
-                                       "Unaligned Start of %s at 0x%X\n",
-                                       cplb_data[i].name, cplb_data[i].start);
-               }
-
-               as = cplb_data[i].start % SIZE_4M;
-               ae = cplb_data[i].end % SIZE_4M;
-
-               if (as)
-                       a_start = cplb_data[i].start + (SIZE_4M - (as));
-               else
-                       a_start = cplb_data[i].start;
-
-               a_end = cplb_data[i].end - ae;
-
-               for (j = INITIAL_T; j <= SWITCH_T; j++) {
-
-                       switch (j) {
-                       case INITIAL_T:
-                               if (cplb_data[i].attr & INITIAL_T) {
-                                       t_i = &cplb.init_i;
-                                       t_d = &cplb.init_d;
-                                       process = 1;
-                               } else
-                                       process = 0;
-                               break;
-                       case SWITCH_T:
-                               if (cplb_data[i].attr & SWITCH_T) {
-                                       t_i = &cplb.switch_i;
-                                       t_d = &cplb.switch_d;
-                                       process = 1;
-                               } else
-                                       process = 0;
-                               break;
-                       default:
-                                       process = 0;
-                               break;
-                       }
-
-                       if (!process)
-                               continue;
-                       if (cplb_data[i].attr & I_CPLB)
-                               __fill_code_cplbtab(t_i, i, a_start, a_end);
-
-                       if (cplb_data[i].attr & D_CPLB)
-                               __fill_data_cplbtab(t_d, i, a_start, a_end);
-               }
-       }
-
-/* close tables */
-
-       close_cplbtab(&cplb.init_i);
-       close_cplbtab(&cplb.init_d);
-
-       cplb.init_i.tab[cplb.init_i.pos] = -1;
-       cplb.init_d.tab[cplb.init_d.pos] = -1;
-       cplb.switch_i.tab[cplb.switch_i.pos] = -1;
-       cplb.switch_d.tab[cplb.switch_d.pos] = -1;
-
-}
-
-#endif
-
 static u_long get_vco(void)
 {
        u_long msel;
@@ -730,7 +476,6 @@ u_long get_cclk(void)
                return get_vco() / ssel;
        return get_vco() >> csel;
 }
-
 EXPORT_SYMBOL(get_cclk);
 
 /* Get the System clock */
@@ -749,7 +494,6 @@ u_long get_sclk(void)
 
        return get_vco() / ssel;
 }
-
 EXPORT_SYMBOL(get_sclk);
 
 /*
@@ -804,23 +548,23 @@ static int show_cpuinfo(struct seq_file *m, void *v)
                seq_printf(m, "D-CACHE:\tOFF\n");
 
 
-       switch(bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) {
-               case ACACHE_BSRAM:
-                       seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tSRAM\n");
-                       dcache_size = 16;
-                       dsup_banks = 1;
-                       break;
-               case ACACHE_BCACHE:
-                       seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tCACHE\n");
-                       dcache_size = 32;
-                       dsup_banks = 2;
-                       break;
-               case ASRAM_BSRAM:
-                       seq_printf(m, "DBANK-A:\tSRAM\n" "DBANK-B:\tSRAM\n");
-                       dcache_size = 0;
-                       dsup_banks = 0;
-                       break;
-               default:
+       switch (bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) {
+       case ACACHE_BSRAM:
+               seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tSRAM\n");
+               dcache_size = 16;
+               dsup_banks = 1;
+               break;
+       case ACACHE_BCACHE:
+               seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tCACHE\n");
+               dcache_size = 32;
+               dsup_banks = 2;
+               break;
+       case ASRAM_BSRAM:
+               seq_printf(m, "DBANK-A:\tSRAM\n" "DBANK-B:\tSRAM\n");
+               dcache_size = 0;
+               dsup_banks = 0;
+               break;
+       default:
                break;
        }
 
index 316e65c3439d48cb084facd9783ed217928a73e4..5564c9588aa807bd3c0384c9b5256e205b1cd7bd 100644 (file)
@@ -34,8 +34,8 @@
 #include <linux/personality.h>
 #include <linux/binfmts.h>
 #include <linux/freezer.h>
+#include <linux/uaccess.h>
 
-#include <asm/uaccess.h>
 #include <asm/cacheflush.h>
 #include <asm/ucontext.h>
 
@@ -124,7 +124,7 @@ asmlinkage int do_rt_sigreturn(unsigned long __unused)
 
        return r0;
 
     badframe:
+ badframe:
        force_sig(SIGSEGV, current);
        return 0;
 }
@@ -239,7 +239,7 @@ setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t * info,
 
        return 0;
 
     give_sigsegv:
+ give_sigsegv:
        if (sig == SIGSEGV)
                ka->sa.sa_handler = SIG_DFL;
        force_sig(SIGSEGV, current);
@@ -263,7 +263,7 @@ handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
                }
                /* fallthrough */
        case -ERESTARTNOINTR:
            do_restart:
+ do_restart:
                regs->p0 = regs->orig_p0;
                regs->r0 = regs->orig_r0;
                regs->pc -= 2;
@@ -341,7 +341,7 @@ asmlinkage void do_signal(struct pt_regs *regs)
                return;
        }
 
-no_signal:
+ no_signal:
        /* Did we come from a system call? */
        if (regs->orig_p0 >= 0)
                /* Restart the system call - no handlers present */
index f436e6743f5a0f60b657f22f08991e015e69d36e..f5e1ae3d1705958dceb302addac289613e489120 100644 (file)
 #include <linux/syscalls.h>
 #include <linux/mman.h>
 #include <linux/file.h>
+#include <linux/uaccess.h>
+#include <linux/ipc.h>
+#include <linux/unistd.h>
 
 #include <asm/cacheflush.h>
-#include <asm/uaccess.h>
-#include <asm/ipc.h>
 #include <asm/dma.h>
-#include <asm/unistd.h>
 
 /*
  * sys_pipe() is the normal C calling standard for creating
@@ -83,7 +83,7 @@ do_mmap2(unsigned long addr, unsigned long len,
 
        if (file)
                fput(file);
     out:
+ out:
        return error;
 }
 
index f578176b6d9240080aca1dc5061e92878635b9e1..beef057bd1dc74d0451acec312c7657cfd21ebf3 100644 (file)
@@ -87,7 +87,7 @@ void __init init_leds(void)
 static inline void do_leds(void)
 {
        static unsigned int count = 50;
-       static int flag = 0;
+       static int flag;
        unsigned short tmp = 0;
 
        if (--count == 0) {
@@ -200,7 +200,7 @@ irqreturn_t timer_interrupt(int irq, void *dummy)__attribute__((l1_text));
 irqreturn_t timer_interrupt(int irq, void *dummy)
 {
        /* last time the cmos clock got updated */
-       static long last_rtc_update = 0;
+       static long last_rtc_update;
 
        write_seqlock(&xtime_lock);
 
index 56058b0b6d4a604954938c5f1964e4e58d2f66cc..3909f5b3553679ac1b6215b95e31f856aa34b2dd 100644 (file)
  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  */
 
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/kallsyms.h>
 #include <asm/traps.h>
 #include <asm/cacheflush.h>
 #include <asm/blackfin.h>
-#include <asm/uaccess.h>
 #include <asm/irq_handler.h>
-#include <linux/interrupt.h>
-#include <linux/module.h>
-#include <linux/kallsyms.h>
+#include <asm/trace.h>
 
 #ifdef CONFIG_KGDB
 # include <linux/debugger.h>
@@ -76,7 +76,7 @@ static int printk_address(unsigned long address)
                if (!modname)
                        modname = delim = "";
                return printk("<0x%p> { %s%s%s%s + 0x%lx }",
-                             (void*)address, delim, modname, delim, symname,
+                             (void *)address, delim, modname, delim, symname,
                              (unsigned long)offset);
 
        }
@@ -119,7 +119,7 @@ static int printk_address(unsigned long address)
 
                                write_unlock_irq(&tasklist_lock);
                                return printk("<0x%p> [ %s + 0x%lx ]",
-                                             (void*)address, name, offset);
+                                             (void *)address, name, offset);
                        }
 
                        vml = vml->next;
@@ -128,19 +128,9 @@ static int printk_address(unsigned long address)
        write_unlock_irq(&tasklist_lock);
 
        /* we were unable to find this address anywhere */
-       return printk("[<0x%p>]", (void*)address);
+       return printk("[<0x%p>]", (void *)address);
 }
 
-#define trace_buffer_save(x) \
-       do { \
-               (x) = bfin_read_TBUFCTL(); \
-               bfin_write_TBUFCTL((x) & ~TBUFEN); \
-       } while (0)
-#define trace_buffer_restore(x) \
-       do { \
-               bfin_write_TBUFCTL((x));        \
-       } while (0)
-
 asmlinkage void trap_c(struct pt_regs *fp)
 {
        int j, sig = 0;
@@ -203,15 +193,14 @@ asmlinkage void trap_c(struct pt_regs *fp)
 #else
        /* 0x02 - User Defined, Caught by default */
 #endif
-       /* 0x03  - Atomic test and set */
+       /* 0x03 - User Defined, userspace stack overflow */
        case VEC_EXCPT03:
                info.si_code = SEGV_STACKFLOW;
                sig = SIGSEGV;
                printk(KERN_EMERG EXC_0x03);
                CHK_DEBUGGER_TRAP();
                break;
-       /* 0x04 - spinlock - handled by _ex_spinlock,
-               getting here is an error */
+       /* 0x04 - User Defined, Caught by default */
        /* 0x05 - User Defined, Caught by default */
        /* 0x06 - User Defined, Caught by default */
        /* 0x07 - User Defined, Caught by default */
@@ -547,29 +536,28 @@ void dump_bfin_regs(struct pt_regs *fp, void *retaddr)
                printk(KERN_EMERG "TEXT = 0x%p-0x%p  DATA = 0x%p-0x%p\n"
                       KERN_EMERG "BSS = 0x%p-0x%p   USER-STACK = 0x%p\n"
                       KERN_EMERG "\n",
-                      (void*)current->mm->start_code,
-                      (void*)current->mm->end_code,
-                      (void*)current->mm->start_data,
-                      (void*)current->mm->end_data,
-                      (void*)current->mm->end_data,
-                      (void*)current->mm->brk,
-                      (void*)current->mm->start_stack);
+                      (void *)current->mm->start_code,
+                      (void *)current->mm->end_code,
+                      (void *)current->mm->start_data,
+                      (void *)current->mm->end_data,
+                      (void *)current->mm->end_data,
+                      (void *)current->mm->brk,
+                      (void *)current->mm->start_stack);
        }
 
        printk(KERN_EMERG "return address: [0x%p]; contents of:", retaddr);
-       if (retaddr != 0 && retaddr <= (void*)physical_mem_end
+       if (retaddr != 0 && retaddr <= (void *)physical_mem_end
 #if L1_CODE_LENGTH != 0
            /* FIXME: Copy the code out of L1 Instruction SRAM through dma
               memcpy.  */
-           && !(retaddr >= (void*)L1_CODE_START
-                && retaddr < (void*)(L1_CODE_START + L1_CODE_LENGTH))
+           && !(retaddr >= (void *)L1_CODE_START
+                && retaddr < (void *)(L1_CODE_START + L1_CODE_LENGTH))
 #endif
        ) {
                int i = ((unsigned int)retaddr & 0xFFFFFFF0) - 32;
                unsigned short x = 0;
-               for (; i < ((unsigned int)retaddr & 0xFFFFFFF0 ) + 32 ;
-                       i += 2) {
-                       if ( !(i & 0xF) )
+               for (; i < ((unsigned int)retaddr & 0xFFFFFFF0) + 32; i += 2) {
+                       if (!(i & 0xF))
                                printk(KERN_EMERG "\n" KERN_EMERG
                                        "0x%08x: ", i);
 
@@ -588,7 +576,7 @@ void dump_bfin_regs(struct pt_regs *fp, void *retaddr)
                                        " The rest of this error"
                                        " is meanless\n");
 #endif
-                       if ( i == (unsigned int)retaddr )
+                       if (i == (unsigned int)retaddr)
                                printk("[%04x]", x);
                        else
                                printk(" %04x ", x);
@@ -681,8 +669,8 @@ void panic_cplb_error(int cplb_panic, struct pt_regs *fp)
                break;
        }
 
-       printk(KERN_EMERG "DCPLB_FAULT_ADDR=%p\n", (void*)bfin_read_DCPLB_FAULT_ADDR());
-       printk(KERN_EMERG "ICPLB_FAULT_ADDR=%p\n", (void*)bfin_read_ICPLB_FAULT_ADDR());
+       printk(KERN_EMERG "DCPLB_FAULT_ADDR=%p\n", (void *)bfin_read_DCPLB_FAULT_ADDR());
+       printk(KERN_EMERG "ICPLB_FAULT_ADDR=%p\n", (void *)bfin_read_ICPLB_FAULT_ADDR());
        dump_bfin_regs(fp, (void *)fp->retx);
        dump_stack();
        panic("Unrecoverable event\n");
index 1ef1e36b3957d95690efddea5416d52c58755975..d06f860f47900a5b6e09edf4b6629b6c9908c9e7 100644 (file)
@@ -31,6 +31,7 @@
 
 #include <asm-generic/vmlinux.lds.h>
 #include <asm/mem_map.h>
+#include <asm/page.h>
 
 OUTPUT_FORMAT("elf32-bfin")
 ENTRY(__start)
@@ -63,8 +64,8 @@ SECTIONS
 
        .data :
        {
+               . = ALIGN(PAGE_SIZE);
                __sdata = .;
-               . = ALIGN(0x2000);
                *(.data.init_task)
                DATA_DATA
                CONSTRUCTORS
@@ -72,14 +73,14 @@ SECTIONS
                . = ALIGN(32);
                *(.data.cacheline_aligned)
 
-               . = ALIGN(0x2000);
+               . = ALIGN(PAGE_SIZE);
                __edata = .;
        }
 
+       . = ALIGN(PAGE_SIZE);
        ___init_begin = .;
        .init :
        {
-               . = ALIGN(4096);
                __sinittext = .;
                *(.init.text)
                __einittext = .;
@@ -152,9 +153,10 @@ SECTIONS
                __ebss_b_l1 = .;
        }
 
-       ___init_end = LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1);
+       . = LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1);
+       ___init_end = ALIGN(PAGE_SIZE);
 
-       .bss LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1) :
+       .bss ___init_end :
        {
                . = ALIGN(4);
                ___bss_start = .;
index 2ad47c4254ba579ea423a0011cb1a26736fadc8d..4eeefd86907f0ff460f04768b6eaf2c90b97bb52 100644 (file)
@@ -6,6 +6,5 @@
 
 int strcmp(const char *dest, const char *src)
 {
-               return __inline_strcmp(dest, src);
+       return __inline_strcmp(dest, src);
 }
-
index 4dc835a8a19b080bc9e91d935e8630c8f8849e37..534589db725619797bb44c51fe296ea8fbea9bde 100644 (file)
@@ -6,6 +6,5 @@
 
 char *strcpy(char *dest, const char *src)
 {
-               return __inline_strcpy(dest, src);
+       return __inline_strcpy(dest, src);
 }
-
index 947bcfe3f3bba630e3b0d4f294c4b31d0355a6c2..d791f120bff7388252f3add58d20aade76cc03b2 100644 (file)
@@ -6,6 +6,5 @@
 
 int strncmp(const char *cs, const char *ct, size_t count)
 {
-               return __inline_strncmp(cs, ct, count);
+       return __inline_strncmp(cs, ct, count);
 }
-
index 77a9b2e950977bcb7d5fe213015dceef1308eb05..1fecb5c71ffb21ec581d157b81ef2d2d8776bc8c 100644 (file)
@@ -6,6 +6,5 @@
 
 char *strncpy(char *dest, const char *src, size_t n)
 {
-               return __inline_strncpy(dest, src, n);
+       return __inline_strncpy(dest, src, n);
 }
-
index 76d2c2b8579a7dbedea91ec7fc360bf264d73daf..8cce1736360d3b8904df3acc9be3fa8a709588e2 100644 (file)
@@ -4,6 +4,6 @@
 
 extra-y := head.o
 
-obj-y := ints-priority.o
+obj-y := ints-priority.o dma.o
 
-obj-$(CONFIG_CPU_FREQ_BF533) += cpu.o
+obj-$(CONFIG_CPU_FREQ)   += cpu.o
index edd31ce4f8d2d62fccad4aede373b70c4fafc6fa..4545f363e641d9f1aafd3d9dbcaa19a3a00ba53f 100644 (file)
@@ -34,7 +34,7 @@
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
 #include <linux/usb_isp1362.h>
-#include <asm/irq.h>
+#include <linux/irq.h>
 #include <asm/bfin5xx_spi.h>
 
 /*
@@ -51,11 +51,11 @@ static struct mtd_partition bfin_spi_flash_partitions[] = {
                .size = 0x00020000,
                .offset = 0,
                .mask_flags = MTD_CAP_ROM
-       },{
+       }, {
                .name = "kernel",
                .size = 0xe0000,
                .offset = 0x20000
-       },{
+       }, {
                .name = "file system",
                .size = 0x700000,
                .offset = 0x00100000,
@@ -98,7 +98,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
                .platform_data = &bfin_spi_flash_data,
                .controller_data = &spi_flash_chip_info,
                .mode = SPI_MODE_3,
-       },{
+       }, {
                .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
                .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
                .bus_num = 1,               /* Framework bus number */
@@ -145,7 +145,7 @@ static struct resource smc91x_resources[] = {
                .start = 0x20200300,
                .end = 0x20200300 + 16,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PF0,
                .end = IRQ_PF0,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
@@ -194,11 +194,11 @@ static struct resource isp1362_hcd_resources[] = {
                .start = 0x20308000,
                .end = 0x20308000,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = 0x20308004,
                .end = 0x20308004,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PF4,
                .end = IRQ_PF4,
                .flags = IORESOURCE_IRQ,
index 0b522d95160d4d189d19e2146ac1f3933b9b0649..0000b8f1239c5030a6b3e56cfd1b7ab907a18632 100644 (file)
@@ -35,7 +35,7 @@
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
 #include <linux/usb_isp1362.h>
-#include <asm/irq.h>
+#include <linux/irq.h>
 #include <asm/bfin5xx_spi.h>
 
 /*
@@ -61,7 +61,7 @@ static struct resource smc91x_resources[] = {
                .start = 0x20310300,
                .end = 0x20310300 + 16,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PF9,
                .end = IRQ_PF9,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
@@ -85,11 +85,11 @@ static struct mtd_partition bfin_spi_flash_partitions[] = {
                .size = 0x00020000,
                .offset = 0,
                .mask_flags = MTD_CAP_ROM
-       },{
+       }, {
                .name = "kernel",
                .size = 0xe0000,
                .offset = 0x20000
-       },{
+       }, {
                .name = "file system",
                .size = 0x700000,
                .offset = 0x00100000,
index c0f43ccfbfb5320b2281125b1f1e4d8f9c0f2aca..9bc1f0d0ab508692f12791840ea9d30efd68a77c 100644 (file)
@@ -30,7 +30,7 @@
 
 #include <linux/device.h>
 #include <linux/platform_device.h>
-#include <asm/irq.h>
+#include <linux/irq.h>
 
 /*
  * Name the Board for the /proc/cpuinfo
@@ -53,11 +53,11 @@ static struct resource smc91x_resources[] = {
                .start = 0x20300300,
                .end = 0x20300300 + 16,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PROG_INTB,
                .end = IRQ_PROG_INTB,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
-       },{
+       }, {
                /*
                 *  denotes the flag pin and is used directly if
                 *  CONFIG_IRQCHIP_DEMUX_GPIO is defined.
index 9a472fe15833ea25883fc0ac236275a7431a9f58..a9143c4cbdcd110d3f88ddb697e04cab015e6e19 100644 (file)
@@ -37,7 +37,7 @@
 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 #include <linux/usb_isp1362.h>
 #endif
-#include <asm/irq.h>
+#include <linux/irq.h>
 #include <asm/bfin5xx_spi.h>
 
 /*
@@ -62,7 +62,7 @@ static struct resource smc91x_resources[] = {
                .start = 0x20300300,
                .end = 0x20300300 + 16,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PF7,
                .end = IRQ_PF7,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
@@ -83,7 +83,7 @@ static struct resource net2272_bfin_resources[] = {
                .start = 0x20300000,
                .end = 0x20300000 + 0x100,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PF10,
                .end = IRQ_PF10,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
@@ -108,11 +108,11 @@ static struct mtd_partition bfin_spi_flash_partitions[] = {
                .size = 0x00020000,
                .offset = 0,
                .mask_flags = MTD_CAP_ROM
-       },{
+       }, {
                .name = "kernel",
                .size = 0xe0000,
                .offset = 0x20000
-       },{
+       }, {
                .name = "file system",
                .size = 0x700000,
                .offset = 0x00100000,
@@ -229,19 +229,19 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 
 #if defined(CONFIG_PBX)
        {
-               .modalias       = "fxs-spi",
-               .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
-               .bus_num        = 1,
-               .chip_select    = 3,
-               .controller_data= &spi_si3xxx_chip_info,
+               .modalias = "fxs-spi",
+               .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
+               .bus_num = 1,
+               .chip_select = 3,
+               .controller_data = &spi_si3xxx_chip_info,
                .mode = SPI_MODE_3,
        },
        {
-               .modalias       = "fxo-spi",
-               .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
-               .bus_num        = 1,
-               .chip_select    = 2,
-               .controller_data= &spi_si3xxx_chip_info,
+               .modalias = "fxo-spi",
+               .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
+               .bus_num = 1,
+               .chip_select = 2,
+               .controller_data = &spi_si3xxx_chip_info,
                .mode = SPI_MODE_3,
        },
 #endif
index 99547c4c290ebf73f73a6a7fa0a65996556550a3..6fd9cfd0a31bd1a330f89a1c803ca749abffa67b 100644 (file)
@@ -79,8 +79,7 @@ static int bf533_target(struct cpufreq_policy *policy,
        int i;
 
        struct cpufreq_freqs freqs;
-       if (cpufreq_frequency_table_target
-           (policy, bf533_freq_table, target_freq, relation, &index))
+       if (cpufreq_frequency_table_target(policy, bf533_freq_table, target_freq, relation, &index))
                return -EINVAL;
        cclk_mhz = bf533_freq_table[index].frequency;
        vco_mhz = bf533_freq_table[index].index;
diff --git a/arch/blackfin/mach-bf533/dma.c b/arch/blackfin/mach-bf533/dma.c
new file mode 100644 (file)
index 0000000..6c909cf
--- /dev/null
@@ -0,0 +1,95 @@
+/*
+ * File:         arch/blackfin/mach-bf533/dma.c
+ * Based on:
+ * Author:
+ *
+ * Created:
+ * Description:  This file contains the simple DMA Implementation for Blackfin
+ *
+ * Modified:
+ *               Copyright 2004-2006 Analog Devices Inc.
+ *
+ * Bugs:         Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <asm/blackfin.h>
+#include <asm/dma.h>
+
+struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
+       (struct dma_register *) DMA0_NEXT_DESC_PTR,
+       (struct dma_register *) DMA1_NEXT_DESC_PTR,
+       (struct dma_register *) DMA2_NEXT_DESC_PTR,
+       (struct dma_register *) DMA3_NEXT_DESC_PTR,
+       (struct dma_register *) DMA4_NEXT_DESC_PTR,
+       (struct dma_register *) DMA5_NEXT_DESC_PTR,
+       (struct dma_register *) DMA6_NEXT_DESC_PTR,
+       (struct dma_register *) DMA7_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA_D0_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA_S0_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
+};
+
+int channel2irq(unsigned int channel)
+{
+       int ret_irq = -1;
+
+       switch (channel) {
+       case CH_PPI:
+               ret_irq = IRQ_PPI;
+               break;
+
+       case CH_SPORT0_RX:
+               ret_irq = IRQ_SPORT0_RX;
+               break;
+
+       case CH_SPORT0_TX:
+               ret_irq = IRQ_SPORT0_TX;
+               break;
+
+       case CH_SPORT1_RX:
+               ret_irq = IRQ_SPORT1_RX;
+               break;
+
+       case CH_SPORT1_TX:
+               ret_irq = IRQ_SPORT1_TX;
+               break;
+
+       case CH_SPI:
+               ret_irq = IRQ_SPI;
+               break;
+
+       case CH_UART_RX:
+               ret_irq = IRQ_UART_RX;
+               break;
+
+       case CH_UART_TX:
+               ret_irq = IRQ_UART_TX;
+               break;
+
+       case CH_MEM_STREAM0_SRC:
+       case CH_MEM_STREAM0_DEST:
+               ret_irq = IRQ_MEM_DMA0;
+               break;
+
+       case CH_MEM_STREAM1_SRC:
+       case CH_MEM_STREAM1_DEST:
+               ret_irq = IRQ_MEM_DMA1;
+               break;
+       }
+       return ret_irq;
+}
index 7e2aa8d0f44f624c35df56197fb2943812bdb113..7dd0e9c3a936402e4e9470677114b8155eababbe 100644 (file)
@@ -30,6 +30,7 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 #include <asm/blackfin.h>
+#include <asm/trace.h>
 #if CONFIG_BFIN_KERNEL_CLOCK
 #include <asm/mach/mem_init.h>
 #endif
@@ -96,6 +97,10 @@ ENTRY(__start)
        M2 = r0;
        M3 = r0;
 
+       trace_buffer_start(p0,r0);
+       P0 = R1;
+       R0 = R1;
+
 #if CONFIG_DEBUG_KERNEL_START
 
 /*
index a3e1789167beec2c60ad1d17f19b6a2c393480a1..7d79e0f9503deb989f33a1df82e3906c02b76a21 100644 (file)
@@ -28,8 +28,8 @@
  */
 
 #include <linux/module.h>
+#include <linux/irq.h>
 #include <asm/blackfin.h>
-#include <asm/irq.h>
 
 void program_IAR(void)
 {
index f32d44215bb7fbd6bf74f0e9d20affc1db3c7de6..7e7c9c8ac5b263ac02f3aaa58ff349ed3060ee55 100644 (file)
@@ -4,6 +4,6 @@
 
 extra-y := head.o
 
-obj-y := ints-priority.o
+obj-y := ints-priority.o dma.o
 
 obj-$(CONFIG_CPU_FREQ)   += cpu.o
index 6a60618a78ecf9efa71d5ed35f66a55e24ea04ba..a8f947b727542fc2705107c515fe76556179fdaa 100644 (file)
@@ -35,7 +35,7 @@
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
 #include <linux/usb_isp1362.h>
-#include <asm/irq.h>
+#include <linux/irq.h>
 #include <asm/bfin5xx_spi.h>
 
 /*
@@ -53,11 +53,11 @@ static struct mtd_partition bfin_spi_flash_partitions[] = {
                .size = 0x00020000,
                .offset = 0,
                .mask_flags = MTD_CAP_ROM
-       },{
+       }, {
                .name = "kernel",
                .size = 0xe0000,
                .offset = 0x20000
-       },{
+       }, {
                .name = "file system",
                .size = 0x700000,
                .offset = 0x00100000,
@@ -202,7 +202,7 @@ static struct resource smc91x_resources[] = {
                .start = 0x20200300,
                .end = 0x20200300 + 16,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PF14,
                .end = IRQ_PF14,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
@@ -223,11 +223,11 @@ static struct resource isp1362_hcd_resources[] = {
                .start = 0x20308000,
                .end = 0x20308000,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = 0x20308004,
                .end = 0x20308004,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PG15,
                .end = IRQ_PG15,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
@@ -262,7 +262,7 @@ static struct resource net2272_bfin_resources[] = {
                .start = 0x20200000,
                .end = 0x20200000 + 0x100,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PF7,
                .end = IRQ_PF7,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
@@ -283,7 +283,7 @@ static struct resource bfin_uart_resources[] = {
                .start = 0xFFC00400,
                .end = 0xFFC004FF,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = 0xFFC02000,
                .end = 0xFFC020FF,
                .flags = IORESOURCE_MEM,
index e129a08d63de61330ad5677ba28cb71e81a788a3..a725cc8a92903100d371aacd928ec5623dec4970 100644 (file)
@@ -20,8 +20,7 @@
 #include <linux/module.h>
 #include <asm/blackfin.h>
 
-#if    defined(CONFIG_GENERIC_BOARD) \
-       || defined(CONFIG_BFIN537_STAMP)
+#if    defined(CONFIG_GENERIC_BOARD) || defined(CONFIG_BFIN537_STAMP)
 
 /*
  * Currently the MAC address is saved in Flash by U-Boot
@@ -43,7 +42,7 @@ void get_bf537_ether_addr(char *addr)
  */
 void get_bf537_ether_addr(char *addr)
 {
-       printk(KERN_WARNING "%s: No valid Ethernet MAC address found\n",__FILE__);
+       printk(KERN_WARNING "%s: No valid Ethernet MAC address found\n", __FILE__);
 }
 
 #endif
index fd57e7439e0fa7347429e12906fc5a96c6cf6ba0..648d984e98d6ce45b536a9a92b06a8c8e4333e5e 100644 (file)
@@ -35,9 +35,9 @@
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
 #include <linux/usb_isp1362.h>
-#include <asm/irq.h>
-#include <asm/bfin5xx_spi.h>
+#include <linux/irq.h>
 #include <linux/usb_sl811.h>
+#include <asm/bfin5xx_spi.h>
 
 /*
  * Name the Board for the /proc/cpuinfo
@@ -54,19 +54,19 @@ static struct resource bfin_pcmcia_cf_resources[] = {
                .start = 0x20310000, /* IO PORT */
                .end = 0x20312000,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = 0x20311000, /* Attribute Memory */
                .end = 0x20311FFF,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PROG_INTA,
                .end = IRQ_PROG_INTA,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
-       },{
+       }, {
                .start = IRQ_PF4,
                .end = IRQ_PF4,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
-       },{
+       }, {
                .start = 6, /* Card Detect PF6 */
                .end = 6,
                .flags = IORESOURCE_IRQ,
@@ -95,11 +95,11 @@ static struct resource smc91x_resources[] = {
                .start = 0x20300300,
                .end = 0x20300300 + 16,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PROG_INTB,
                .end = IRQ_PROG_INTB,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
-       },{
+       }, {
                /*
                 *  denotes the flag pin and is used directly if
                 *  CONFIG_IRQCHIP_DEMUX_GPIO is defined.
@@ -123,15 +123,15 @@ static struct resource sl811_hcd_resources[] = {
                .start = 0x20340000,
                .end = 0x20340000,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = 0x20340004,
                .end = 0x20340004,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PROG_INTA,
                .end = IRQ_PROG_INTA,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
-       },{
+       }, {
                .start = IRQ_PF0 + CONFIG_USB_SL811_BFIN_GPIO,
                .end = IRQ_PF0 + CONFIG_USB_SL811_BFIN_GPIO,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
@@ -179,15 +179,15 @@ static struct resource isp1362_hcd_resources[] = {
                .start = 0x20360000,
                .end = 0x20360000,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = 0x20360004,
                .end = 0x20360004,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PROG_INTA,
                .end = IRQ_PROG_INTA,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
-       },{
+       }, {
                .start = IRQ_PF0 + CONFIG_USB_ISP1362_BFIN_GPIO,
                .end = IRQ_PF0 + CONFIG_USB_ISP1362_BFIN_GPIO,
                .flags = IORESOURCE_IRQ,
@@ -228,7 +228,7 @@ static struct resource net2272_bfin_resources[] = {
                .start = 0x20300000,
                .end = 0x20300000 + 0x100,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PF7,
                .end = IRQ_PF7,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
@@ -253,11 +253,11 @@ static struct mtd_partition bfin_spi_flash_partitions[] = {
                .size = 0x00020000,
                .offset = 0,
                .mask_flags = MTD_CAP_ROM
-       },{
+       }, {
                .name = "kernel",
                .size = 0xe0000,
                .offset = 0x20000
-       },{
+       }, {
                .name = "file system",
                .size = 0x700000,
                .offset = 0x00100000,
@@ -375,7 +375,7 @@ static struct resource bfin_uart_resources[] = {
                .start = 0xFFC00400,
                .end = 0xFFC004FF,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = 0xFFC02000,
                .end = 0xFFC020FF,
                .flags = IORESOURCE_MEM,
index 8aaf76dfce80831b0f5d71aa5d8ad1b8c672be9c..8806f1230f2da480c4a3b8e055466985fa0e4698 100644 (file)
@@ -37,7 +37,7 @@
 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 #include <linux/usb_isp1362.h>
 #endif
-#include <asm/irq.h>
+#include <linux/irq.h>
 #include <asm/bfin5xx_spi.h>
 #include <linux/usb_sl811.h>
 
@@ -58,15 +58,15 @@ static struct resource bfin_pcmcia_cf_resources[] = {
                .start = 0x20310000, /* IO PORT */
                .end = 0x20312000,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = 0x20311000, /* Attribute Memory */
                .end = 0x20311FFF,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PF4,
                .end = IRQ_PF4,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
-       },{
+       }, {
                .start = 6, /* Card Detect PF6 */
                .end = 6,
                .flags = IORESOURCE_IRQ,
@@ -95,7 +95,7 @@ static struct resource smc91x_resources[] = {
                .start = 0x20300300,
                .end = 0x20300300 + 16,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
 
                .start = IRQ_PF7,
                .end = IRQ_PF7,
@@ -116,11 +116,11 @@ static struct resource sl811_hcd_resources[] = {
                .start = 0x20340000,
                .end = 0x20340000,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = 0x20340004,
                .end = 0x20340004,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = CONFIG_USB_SL811_BFIN_IRQ,
                .end = CONFIG_USB_SL811_BFIN_IRQ,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
@@ -167,11 +167,11 @@ static struct resource isp1362_hcd_resources[] = {
                .start = 0x20360000,
                .end = 0x20360000,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = 0x20360004,
                .end = 0x20360004,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
                .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
@@ -212,7 +212,7 @@ static struct resource net2272_bfin_resources[] = {
                .start = 0x20300000,
                .end = 0x20300000 + 0x100,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PF7,
                .end = IRQ_PF7,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
@@ -238,11 +238,11 @@ static struct mtd_partition bfin_spi_flash_partitions[] = {
                .size = 0x00020000,
                .offset = 0,
                .mask_flags = MTD_CAP_ROM
-       },{
+       }, {
                .name = "kernel",
                .size = 0xe0000,
                .offset = 0x20000
-       },{
+       }, {
                .name = "file system",
                .size = 0x700000,
                .offset = 0x00100000,
@@ -294,16 +294,6 @@ static struct bfin5xx_spi_chip spi_mmc_chip_info = {
 };
 #endif
 
-#if defined(CONFIG_PBX)
-static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
-       .ctl_reg        = 0x4, /* send zero */
-       .enable_dma     = 0,
-       .bits_per_word  = 8,
-       .cs_change_per_word = 1,
-};
-#endif
-
-
 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
        .cs_change_per_word = 1,
@@ -392,24 +382,6 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
                .mode = SPI_MODE_3,
        },
 #endif
-#if defined(CONFIG_PBX)
-       {
-               .modalias       = "fxs-spi",
-               .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
-               .bus_num        = 1,
-               .chip_select    = 3,
-               .controller_data= &spi_si3xxx_chip_info,
-               .mode = SPI_MODE_3,
-       },
-       {
-               .modalias       = "fxo-spi",
-               .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
-               .bus_num        = 1,
-               .chip_select    = 2,
-               .controller_data= &spi_si3xxx_chip_info,
-               .mode = SPI_MODE_3,
-       },
-#endif
 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 {
        .modalias               = "ad7877",
@@ -451,7 +423,7 @@ static struct resource bfin_uart_resources[] = {
                .start = 0xFFC00400,
                .end = 0xFFC004FF,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = 0xFFC02000,
                .end = 0xFFC020FF,
                .flags = IORESOURCE_MEM,
index 3a29b4d15f252b79b329ee92bcceeaa2bd3abaae..9c43d775651088f219f948c80f0f9f9432014232 100644 (file)
 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 #include <linux/usb_isp1362.h>
 #endif
-#include <asm/irq.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
-#include <asm/bfin5xx_spi.h>
 #include <linux/usb_sl811.h>
-
+#include <asm/bfin5xx_spi.h>
 #include <linux/spi/ad7877.h>
 
 /*
@@ -85,7 +83,7 @@ static struct platform_device *bfin_isp1761_devices[] = {
 
 int __init bfin_isp1761_init(void)
 {
-       unsigned int num_devices=ARRAY_SIZE(bfin_isp1761_devices);
+       unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices);
 
        printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
        set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
@@ -107,15 +105,15 @@ static struct resource bfin_pcmcia_cf_resources[] = {
                .start = 0x20310000, /* IO PORT */
                .end = 0x20312000,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = 0x20311000, /* Attribute Memory */
                .end = 0x20311FFF,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PF4,
                .end = IRQ_PF4,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
-       },{
+       }, {
                .start = 6, /* Card Detect PF6 */
                .end = 6,
                .flags = IORESOURCE_IRQ,
@@ -144,7 +142,7 @@ static struct resource smc91x_resources[] = {
                .start = 0x20300300,
                .end = 0x20300300 + 16,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
 
                .start = IRQ_PF7,
                .end = IRQ_PF7,
@@ -159,17 +157,39 @@ static struct platform_device smc91x_device = {
 };
 #endif
 
+#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
+static struct resource dm9000_resources[] = {
+       [0] = {
+               .start  = 0x203FB800,
+               .end    = 0x203FB800 + 8,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = IRQ_PF9,
+               .end    = IRQ_PF9,
+               .flags  = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
+       },
+};
+
+static struct platform_device dm9000_device = {
+       .name           = "dm9000",
+       .id             = -1,
+       .num_resources  = ARRAY_SIZE(dm9000_resources),
+       .resource       = dm9000_resources,
+};
+#endif
+
 #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
 static struct resource sl811_hcd_resources[] = {
        {
                .start = 0x20340000,
                .end = 0x20340000,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = 0x20340004,
                .end = 0x20340004,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = CONFIG_USB_SL811_BFIN_IRQ,
                .end = CONFIG_USB_SL811_BFIN_IRQ,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
@@ -216,11 +236,11 @@ static struct resource isp1362_hcd_resources[] = {
                .start = 0x20360000,
                .end = 0x20360000,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = 0x20360004,
                .end = 0x20360004,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
                .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
@@ -261,7 +281,7 @@ static struct resource net2272_bfin_resources[] = {
                .start = 0x20300000,
                .end = 0x20300000 + 0x100,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PF7,
                .end = IRQ_PF7,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
@@ -287,11 +307,11 @@ static struct mtd_partition bfin_spi_flash_partitions[] = {
                .size = 0x00020000,
                .offset = 0,
                .mask_flags = MTD_CAP_ROM
-       },{
+       }, {
                .name = "kernel",
                .size = 0xe0000,
                .offset = 0x20000
-       },{
+       }, {
                .name = "file system",
                .size = 0x700000,
                .offset = 0x00100000,
@@ -361,7 +381,6 @@ static struct bfin5xx_spi_chip ad5304_chip_info = {
 
 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
-//     .cs_change_per_word = 1,
        .enable_dma = 0,
        .bits_per_word = 16,
 };
@@ -449,19 +468,19 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
 #endif
 #if defined(CONFIG_PBX)
        {
-               .modalias       = "fxs-spi",
-               .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
-               .bus_num        = 1,
-               .chip_select    = 3,
-               .controller_data= &spi_si3xxx_chip_info,
+               .modalias = "fxs-spi",
+               .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
+               .bus_num = 1,
+               .chip_select = 3,
+               .controller_data = &spi_si3xxx_chip_info,
                .mode = SPI_MODE_3,
        },
        {
-               .modalias       = "fxo-spi",
-               .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
-               .bus_num        = 1,
-               .chip_select    = 2,
-               .controller_data= &spi_si3xxx_chip_info,
+               .modalias = "fxo-spi",
+               .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
+               .bus_num = 1,
+               .chip_select = 2,
+               .controller_data = &spi_si3xxx_chip_info,
                .mode = SPI_MODE_3,
        },
 #endif
@@ -516,7 +535,7 @@ static struct resource bfin_uart_resources[] = {
                .start = 0xFFC00400,
                .end = 0xFFC004FF,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = 0xFFC02000,
                .end = 0xFFC020FF,
                .flags = IORESOURCE_MEM,
@@ -571,6 +590,10 @@ static struct platform_device *stamp_devices[] __initdata = {
        &smc91x_device,
 #endif
 
+#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
+       &dm9000_device,
+#endif
+
 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
        &bfin_mac_device,
 #endif
diff --git a/arch/blackfin/mach-bf537/dma.c b/arch/blackfin/mach-bf537/dma.c
new file mode 100644 (file)
index 0000000..706cb97
--- /dev/null
@@ -0,0 +1,115 @@
+/*
+ * File:         arch/blackfin/mach-bf537/dma.c
+ * Based on:
+ * Author:
+ *
+ * Created:
+ * Description:  This file contains the simple DMA Implementation for Blackfin
+ *
+ * Modified:
+ *               Copyright 2004-2007 Analog Devices Inc.
+ *
+ * Bugs:         Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <asm/blackfin.h>
+#include <asm/dma.h>
+
+struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
+       (struct dma_register *) DMA0_NEXT_DESC_PTR,
+       (struct dma_register *) DMA1_NEXT_DESC_PTR,
+       (struct dma_register *) DMA2_NEXT_DESC_PTR,
+       (struct dma_register *) DMA3_NEXT_DESC_PTR,
+       (struct dma_register *) DMA4_NEXT_DESC_PTR,
+       (struct dma_register *) DMA5_NEXT_DESC_PTR,
+       (struct dma_register *) DMA6_NEXT_DESC_PTR,
+       (struct dma_register *) DMA7_NEXT_DESC_PTR,
+       (struct dma_register *) DMA8_NEXT_DESC_PTR,
+       (struct dma_register *) DMA9_NEXT_DESC_PTR,
+       (struct dma_register *) DMA10_NEXT_DESC_PTR,
+       (struct dma_register *) DMA11_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA_D0_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA_S0_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
+};
+
+int channel2irq(unsigned int channel)
+{
+       int ret_irq = -1;
+
+       switch (channel) {
+       case CH_PPI:
+               ret_irq = IRQ_PPI;
+               break;
+
+       case CH_EMAC_RX:
+               ret_irq = IRQ_MAC_RX;
+               break;
+
+       case CH_EMAC_TX:
+               ret_irq = IRQ_MAC_TX;
+               break;
+
+       case CH_UART1_RX:
+               ret_irq = IRQ_UART1_RX;
+               break;
+
+       case CH_UART1_TX:
+               ret_irq = IRQ_UART1_TX;
+               break;
+
+       case CH_SPORT0_RX:
+               ret_irq = IRQ_SPORT0_RX;
+               break;
+
+       case CH_SPORT0_TX:
+               ret_irq = IRQ_SPORT0_TX;
+               break;
+
+       case CH_SPORT1_RX:
+               ret_irq = IRQ_SPORT1_RX;
+               break;
+
+       case CH_SPORT1_TX:
+               ret_irq = IRQ_SPORT1_TX;
+               break;
+
+       case CH_SPI:
+               ret_irq = IRQ_SPI;
+               break;
+
+       case CH_UART_RX:
+               ret_irq = IRQ_UART_RX;
+               break;
+
+       case CH_UART_TX:
+               ret_irq = IRQ_UART_TX;
+               break;
+
+       case CH_MEM_STREAM0_SRC:
+       case CH_MEM_STREAM0_DEST:
+               ret_irq = IRQ_MEM_DMA0;
+               break;
+
+       case CH_MEM_STREAM1_SRC:
+       case CH_MEM_STREAM1_DEST:
+               ret_irq = IRQ_MEM_DMA1;
+               break;
+       }
+       return ret_irq;
+}
index 7d902bbd860fa652ce26722a899d5d277b86ac0c..429c8a1019dab0de10bc9e7dfdc2f1392994cc42 100644 (file)
@@ -30,6 +30,8 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 #include <asm/blackfin.h>
+#include <asm/trace.h>
+
 #if CONFIG_BFIN_KERNEL_CLOCK
 #include <asm/mach/mem_init.h>
 #endif
@@ -93,6 +95,10 @@ ENTRY(__start)
        M2 = r0;
        M3 = r0;
 
+       trace_buffer_start(p0,r0);
+       P0 = R1;
+       R0 = R1;
+
        /* Turn off the icache */
        p0.l = (IMEM_CONTROL & 0xFFFF);
        p0.h = (IMEM_CONTROL >> 16);
index 2dbf3df465d193ba085f09504ac0b96aee9732a5..a8b915f202ec8870162b2822bc79057e1e38a8b1 100644 (file)
@@ -28,8 +28,8 @@
  */
 
 #include <linux/module.h>
+#include <linux/irq.h>
 #include <asm/blackfin.h>
-#include <asm/irq.h>
 
 void program_IAR(void)
 {
diff --git a/arch/blackfin/mach-bf548/Kconfig b/arch/blackfin/mach-bf548/Kconfig
new file mode 100644 (file)
index 0000000..e78b03d
--- /dev/null
@@ -0,0 +1,316 @@
+if (BF54x)
+
+menu "BF548 Specific Configuration"
+
+comment "Interrupt Priority Assignment"
+menu "Priority"
+
+config IRQ_PLL_WAKEUP
+       int "IRQ_PLL_WAKEUP"
+       default 7
+config IRQ_DMAC0_ERR
+       int "IRQ_DMAC0_ERR"
+       default 7
+config IRQ_EPPI0_ERR
+       int "IRQ_EPPI0_ERR"
+       default 7
+config IRQ_SPORT0_ERR
+       int "IRQ_SPORT0_ERR"
+       default 7
+config IRQ_SPORT1_ERR
+       int "IRQ_SPORT1_ERR"
+       default 7
+config IRQ_SPI0_ERR
+       int "IRQ_SPI0_ERR"
+       default 7
+config IRQ_UART0_ERR
+       int "IRQ_UART0_ERR"
+       default 7
+config IRQ_RTC
+       int "IRQ_RTC"
+       default 8
+config IRQ_EPPI0
+       int "IRQ_EPPI0"
+       default 8
+config IRQ_SPORT0_RX
+       int "IRQ_SPORT0_RX"
+       default 9
+config IRQ_SPORT0_TX
+       int "IRQ_SPORT0_TX"
+       default 9
+config IRQ_SPORT1_RX
+       int "IRQ_SPORT1_RX"
+       default 9
+config IRQ_SPORT1_TX
+       int "IRQ_SPORT1_TX"
+       default 9
+config IRQ_SPI0
+       int "IRQ_SPI0"
+       default 10
+config IRQ_UART0_RX
+       int "IRQ_UART0_RX"
+       default 10
+config IRQ_UART0_TX
+       int "IRQ_UART0_TX"
+       default 10
+config IRQ_TIMER8
+       int "IRQ_TIMER8"
+       default 11
+config IRQ_TIMER9
+       int "IRQ_TIMER9"
+       default 11
+config IRQ_TIMER10
+       int "IRQ_TIMER10"
+       default 11
+config IRQ_PINT0
+       int "IRQ_PINT0"
+       default 12
+config IRQ_PINT1
+       int "IRQ_PINT0"
+       default 12
+config IRQ_MDMAS0
+       int "IRQ_MDMAS0"
+       default 13
+config IRQ_MDMAS1
+       int "IRQ_DMDMAS1"
+       default 13
+config IRQ_WATCHDOG
+       int "IRQ_WATCHDOG"
+       default 13
+config IRQ_DMAC1_ERR
+       int "IRQ_DMAC1_ERR"
+       default 7
+config IRQ_SPORT2_ERR
+       int "IRQ_SPORT2_ERR"
+       default 7
+config IRQ_SPORT3_ERR
+       int "IRQ_SPORT3_ERR"
+       default 7
+config IRQ_MXVR_DATA
+       int "IRQ MXVR Data"
+       default 7
+config IRQ_SPI1_ERR
+       int "IRQ_SPI1_ERR"
+       default 7
+config IRQ_SPI2_ERR
+       int "IRQ_SPI2_ERR"
+       default 7
+config IRQ_UART1_ERR
+       int "IRQ_UART1_ERR"
+       default 7
+config IRQ_UART2_ERR
+       int "IRQ_UART2_ERR"
+       default 7
+config IRQ_CAN0_ERR
+       int "IRQ_CAN0_ERR"
+       default 7
+config IRQ_SPORT2_RX
+       int "IRQ_SPORT2_RX"
+       default 9
+config IRQ_SPORT2_TX
+       int "IRQ_SPORT2_TX"
+       default 9
+config IRQ_SPORT3_RX
+       int "IRQ_SPORT3_RX"
+       default 9
+config IRQ_SPORT3_TX
+       int "IRQ_SPORT3_TX"
+       default 9
+config IRQ_EPPI1
+       int "IRQ_EPPI1"
+       default 9
+config IRQ_EPPI2
+       int "IRQ_EPPI2"
+       default 9
+config IRQ_SPI1
+       int "IRQ_SPI1"
+       default 10
+config IRQ_SPI2
+       int "IRQ_SPI2"
+       default 10
+config IRQ_UART1_RX
+       int "IRQ_UART1_RX"
+       default 10
+config IRQ_UART1_TX
+       int "IRQ_UART1_TX"
+       default 10
+config IRQ_ATAPI_RX
+       int "IRQ_ATAPI_RX"
+       default 10
+config IRQ_ATAPI_TX
+       int "IRQ_ATAPI_TX"
+       default 10
+config IRQ_TWI0
+       int "IRQ_TWI0"
+       default 11
+config IRQ_TWI1
+       int "IRQ_TWI1"
+       default 11
+config IRQ_CAN0_RX
+       int "IRQ_CAN_RX"
+       default 11
+config IRQ_CAN0_TX
+       int "IRQ_CAN_TX"
+       default 11
+config IRQ_MDMAS2
+       int "IRQ_MDMAS2"
+       default 13
+config IRQ_MDMAS3
+       int "IRQ_DMMAS3"
+       default 13
+config IRQ_MXVR_ERR
+       int "IRQ_MXVR_ERR"
+       default 11
+config IRQ_MXVR_MSG
+       int "IRQ_MXVR_MSG"
+       default 11
+config IRQ_MXVR_PKT
+       int "IRQ_MXVR_PKT"
+       default 11
+config IRQ_EPPI1_ERR
+       int "IRQ_EPPI1_ERR"
+       default 7
+config IRQ_EPPI2_ERR
+       int "IRQ_EPPI2_ERR"
+       default 7
+config IRQ_UART3_ERR
+       int "IRQ_UART3_ERR"
+       default 7
+config IRQ_HOST_ERR
+       int "IRQ_HOST_ERR"
+       default 7
+config IRQ_PIXC_ERR
+       int "IRQ_PIXC_ERR"
+       default 7
+config IRQ_NFC_ERR
+       int "IRQ_NFC_ERR"
+       default 7
+config IRQ_ATAPI_ERR
+       int "IRQ_ATAPI_ERR"
+       default 7
+config IRQ_CAN1_ERR
+       int "IRQ_CAN1_ERR"
+       default 7
+config IRQ_HS_DMA_ERR
+       int "IRQ Handshake DMA Status"
+       default 7
+config IRQ_PIXC_IN0
+       int "IRQ PIXC IN0"
+       default 8
+config IRQ_PIXC_IN1
+       int "IRQ PIXC IN1"
+       default 8
+config IRQ_PIXC_OUT
+       int "IRQ PIXC OUT"
+       default 8
+config IRQ_SDH
+       int "IRQ SDH"
+       default 8
+config IRQ_CNT
+       int "IRQ CNT"
+       default 8
+config IRQ_KEY
+       int "IRQ KEY"
+       default 8
+config IRQ_CAN1_RX
+       int "IRQ CAN1 RX"
+       default 11
+config IRQ_CAN1_TX
+       int "IRQ_CAN1_TX"
+       default 11
+config IRQ_SDH_MASK0
+       int "IRQ_SDH_MASK0"
+       default 11
+config IRQ_SDH_MASK1
+       int "IRQ_SDH_MASK1"
+       default 11
+config IRQ_USB_INT0
+       int "IRQ USB INT0"
+       default 11
+config IRQ_USB_INT1
+       int "IRQ USB INT1"
+       default 11
+config IRQ_USB_INT2
+       int "IRQ USB INT2"
+       default 11
+config IRQ_USB_DMA
+       int "IRQ USB DMA"
+       default 11
+config IRQ_OTPSEC
+       int "IRQ OPTSEC"
+       default 11
+config IRQ_TIMER0
+       int "IRQ_TIMER0"
+       default 11
+config IRQ_TIMER1
+       int "IRQ_TIMER1"
+       default 11
+config IRQ_TIMER2
+       int "IRQ_TIMER2"
+       default 11
+config IRQ_TIMER3
+       int "IRQ_TIMER3"
+       default 11
+config IRQ_TIMER4
+       int "IRQ_TIMER4"
+       default 11
+config IRQ_TIMER5
+       int "IRQ_TIMER5"
+       default 11
+config IRQ_TIMER6
+       int "IRQ_TIMER6"
+       default 11
+config IRQ_TIMER7
+       int "IRQ_TIMER7"
+       default 11
+config IRQ_PINT2
+       int "IRQ_PIN2"
+       default 11
+config IRQ_PINT3
+       int "IRQ_PIN3"
+       default 11
+
+       help
+         Enter the priority numbers between 7-13 ONLY.  Others are Reserved.
+         This applies to all the above.  It is not recommended to assign the
+         highest priority number 7 to UART or any other device.
+
+endmenu
+
+comment "Pin Interrupt to Port Assignment"
+menu "Assignment"
+
+config PINTx_REASSIGN
+       bool "Reprogram PINT Assignment"
+       default n
+       help
+         The interrupt assignment registers controls the pin-to-interrupt
+         assignment in a byte-wide manner. Each option allows you to select
+         a set of pins (High/Low Byte) of an specific Port being mapped
+         to one of the four PIN Interrupts IRQ_PINTx.
+
+         You shouldn't change any of these unless you know exactly what you're doing.
+         Please consult the Blackfin BF54x Processor Hardware Reference Manual.
+
+config PINT0_ASSIGN
+       hex "PINT0_ASSIGN"
+       depends on PINTx_REASSIGN
+       default 0x00000101
+config PINT1_ASSIGN
+       hex "PINT1_ASSIGN"
+       depends on PINTx_REASSIGN
+       default 0x01010000
+config PINT2_ASSIGN
+       hex "PINT2_ASSIGN"
+       depends on PINTx_REASSIGN
+       default 0x00000101
+config PINT3_ASSIGN
+       hex "PINT3_ASSIGN"
+       depends on PINTx_REASSIGN
+       default 0x02020303
+
+endmenu
+
+endmenu
+
+endif
diff --git a/arch/blackfin/mach-bf548/Makefile b/arch/blackfin/mach-bf548/Makefile
new file mode 100644 (file)
index 0000000..060ad78
--- /dev/null
@@ -0,0 +1,9 @@
+#
+# arch/blackfin/mach-bf537/Makefile
+#
+
+extra-y := head.o
+
+obj-y := ints-priority.o dma.o gpio.o
+
+obj-$(CONFIG_CPU_FREQ)   += cpu.o
diff --git a/arch/blackfin/mach-bf548/boards/Makefile b/arch/blackfin/mach-bf548/boards/Makefile
new file mode 100644 (file)
index 0000000..486e07c
--- /dev/null
@@ -0,0 +1,5 @@
+#
+# arch/blackfin/mach-bf548/boards/Makefile
+#
+
+obj-$(CONFIG_BFIN548_EZKIT)            += ezkit.o led.o
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
new file mode 100644 (file)
index 0000000..96ad95f
--- /dev/null
@@ -0,0 +1,114 @@
+/*
+ * File:         arch/blackfin/mach-bf548/boards/ezkit.c
+ * Based on:     arch/blackfin/mach-bf537/boards/ezkit.c
+ * Author:       Aidan Williams <aidan@nicta.com.au>
+ *
+ * Created:
+ * Description:
+ *
+ * Modified:
+ *               Copyright 2005 National ICT Australia (NICTA)
+ *               Copyright 2004-2007 Analog Devices Inc.
+ *
+ * Bugs:         Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/flash.h>
+#include <linux/irq.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <asm/bfin5xx_spi.h>
+
+/*
+ * Name the Board for the /proc/cpuinfo
+ */
+char *bfin_board_name = "ADSP-BF548-EZKIT";
+
+/*
+ *  Driver needs to know address, irq and flag pin.
+ */
+
+#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
+static struct platform_device rtc_device = {
+       .name = "rtc-bfin",
+       .id   = -1,
+};
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
+static struct resource bfin_uart_resources[] = {
+#ifdef CONFIG_SERIAL_BFIN_UART0
+       {
+               .start = 0xFFC00400,
+               .end = 0xFFC004FF,
+               .flags = IORESOURCE_MEM,
+       },
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART1
+       {
+               .start = 0xFFC02000,
+               .end = 0xFFC020FF,
+               .flags = IORESOURCE_MEM,
+       },
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART2
+       {
+               .start = 0xFFC02100,
+               .end = 0xFFC021FF,
+               .flags = IORESOURCE_MEM,
+       },
+#endif
+#ifdef CONFIG_SERIAL_BFIN_UART3
+       {
+               .start = 0xFFC03100,
+               .end = 0xFFC031FF,
+       },
+#endif
+};
+
+static struct platform_device bfin_uart_device = {
+       .name = "bfin-uart",
+       .id = 1,
+       .num_resources = ARRAY_SIZE(bfin_uart_resources),
+       .resource = bfin_uart_resources,
+};
+#endif
+
+static struct platform_device *ezkit_devices[] __initdata = {
+#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
+       &rtc_device,
+#endif
+
+#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
+       &bfin_uart_device,
+#endif
+};
+
+static int __init stamp_init(void)
+{
+       printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
+       platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
+       return 0;
+}
+
+arch_initcall(stamp_init);
diff --git a/arch/blackfin/mach-bf548/boards/led.S b/arch/blackfin/mach-bf548/boards/led.S
new file mode 100644 (file)
index 0000000..f47daf3
--- /dev/null
@@ -0,0 +1,172 @@
+/****************************************************
+ * LED1 ---- PG6        LED2 ---- PG7               *
+ * LED3 ---- PG8        LED4 ---- PG9               *
+ * LED5 ---- PG10       LED6 ---- PG11              *
+ ****************************************************/
+
+#include <linux/linkage.h>
+#include <asm/blackfin.h>
+
+/* All functions in this file save the registers they uses.
+   So there is no need to save any registers before calling them.  */
+
+       .text;
+
+/* Initialize LEDs.  */
+
+ENTRY(_led_init)
+       LINK 0;
+       [--SP] = P0;
+       [--SP] = R0;
+       [--SP] = R1;
+       [--SP] = R2;
+       R1 = (PG6|PG7|PG8|PG9|PG10|PG11)(Z);
+       R2 = ~R1;
+
+       P0.H = hi(PORTG_FER);
+       P0.L = lo(PORTG_FER);
+       R0 = W[P0](Z);
+       SSYNC;
+       R0 = R0 & R2;
+       W[P0] = R0.L;
+       SSYNC;
+
+       P0.H = hi(PORTG_DIR_SET);
+       P0.L = lo(PORTG_DIR_SET);
+       W[P0] = R1.L;
+       SSYNC;
+
+       P0.H = hi(PORTG_INEN);
+       P0.L = lo(PORTG_INEN);
+       R0 = W[P0](Z);
+       SSYNC;
+       R0 = R0 & R2;
+       W[P0] = R0.L;
+       SSYNC;
+
+       R2 = [SP++];
+       R1 = [SP++];
+       R0 = [SP++];
+       P0 = [SP++];
+       RTS;
+       .size   _led_init, .-_led_init
+
+/* Set one LED on. Leave other LEDs unchanged.
+   It expects the LED number passed through R0.  */
+
+ENTRY(_led_on)
+       LINK 0;
+       [--SP] = P0;
+       [--SP] = R1;
+       CALL _led_init;
+       R1 = 1;
+       R0 += 5;
+       R1 <<= R0;
+       P0.H = hi(PORTG_SET);
+       P0.L = lo(PORTG_SET);
+       W[P0] = R1.L;
+       SSYNC;
+       R1 = [SP++];
+       P0 = [SP++];
+       UNLINK;
+       RTS;
+       .size   _led_on, .-_led_on
+
+/* Set one LED off. Leave other LEDs unchanged.  */
+
+ENTRY(_led_off)
+       LINK 0;
+       [--SP] = P0;
+       [--SP] = R1;
+       CALL _led_init;
+       R1 = 1;
+       R0 += 5;
+       R1 <<= R0;
+       P0.H = hi(PORTG_CLEAR);
+       P0.L = lo(PORTG_CLEAR);
+       W[P0] = R1.L;
+       SSYNC;
+       R1 = [SP++];
+       P0 = [SP++];
+       UNLINK;
+       RTS;
+       .size   _led_off, .-_led_off
+
+/* Toggle one LED. Leave other LEDs unchanged.  */
+
+ENTRY(_led_toggle)
+       LINK 0;
+       [--SP] = P0;
+       [--SP] = R1;
+       CALL _led_init;
+       R1 = 1;
+       R0 += 5;
+       R1 <<= R0;
+       P0.H = hi(PORTG);
+       P0.L = lo(PORTG);
+       R0 = W[P0](Z);
+       SSYNC;
+       R0 = R0 ^ R1;
+       W[P0] = R0.L;
+       SSYNC;
+       R1 = [SP++];
+       P0 = [SP++];
+       UNLINK;
+       RTS;
+       .size   _led_toggle, .-_led_toggle
+
+/* Display the number using LEDs in binary format.  */
+
+ENTRY(_led_disp_num)
+       LINK 0;
+       [--SP] = P0;
+       [--SP] = R1;
+       [--SP] = R2;
+       CALL _led_init;
+       R1 = 0x3f(X);
+       R0 = R0 & R1;
+       R2 = 6(X);
+       R0 <<= R2;
+       R1 <<= R2;
+       P0.H = hi(PORTG);
+       P0.L = lo(PORTG);
+       R2 = W[P0](Z);
+       SSYNC;
+       R1 = ~R1;
+       R2 = R2 & R1;
+       R2 = R2 | R0;
+       W[P0] = R2.L;
+       SSYNC;
+       R2 = [SP++];
+       R1 = [SP++];
+       P0 = [SP++];
+       UNLINK;
+       RTS;
+       .size   _led_disp_num, .-_led_disp_num
+
+/* Toggle the number using LEDs in binary format.  */
+
+ENTRY(_led_toggle_num)
+       LINK 0;
+       [--SP] = P0;
+       [--SP] = R1;
+       [--SP] = R2;
+       CALL _led_init;
+       R1 = 0x3f(X);
+       R0 = R0 & R1;
+       R1 = 6(X);
+       R0 <<= R1;
+       P0.H = hi(PORTG);
+       P0.L = lo(PORTG);
+       R1 = W[P0](Z);
+       SSYNC;
+       R1 = R1 ^ R0;
+       W[P0] = R1.L;
+       SSYNC;
+       R2 = [SP++];
+       R1 = [SP++];
+       P0 = [SP++];
+       UNLINK;
+       RTS;
+       .size   _led_toggle_num, .-_led_toggle_num
+
diff --git a/arch/blackfin/mach-bf548/cpu.c b/arch/blackfin/mach-bf548/cpu.c
new file mode 100644 (file)
index 0000000..4298a3c
--- /dev/null
@@ -0,0 +1,159 @@
+/*
+ * File:         arch/blackfin/mach-bf548/cpu.c
+ * Based on:
+ * Author:
+ *
+ * Created:
+ * Description:  clock scaling for the bf54x
+ *
+ * Modified:
+ *               Copyright 2004-2007 Analog Devices Inc.
+ *
+ * Bugs:         Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/cpufreq.h>
+#include <asm/dpmc.h>
+#include <linux/fs.h>
+#include <asm/bfin-global.h>
+
+/* CONFIG_CLKIN_HZ=25000000 */
+#define VCO5 (CONFIG_CLKIN_HZ*45)
+#define VCO4 (CONFIG_CLKIN_HZ*36)
+#define VCO3 (CONFIG_CLKIN_HZ*27)
+#define VCO2 (CONFIG_CLKIN_HZ*18)
+#define VCO1 (CONFIG_CLKIN_HZ*9)
+#define VCO(x) VCO##x
+
+#define MFREQ(x) {VCO(x),VCO(x)/4},{VCO(x),VCO(x)/2},{VCO(x),VCO(x)}
+/* frequency */
+static struct cpufreq_frequency_table bf548_freq_table[] = {
+       MFREQ(1),
+       MFREQ(3),
+       {VCO4, VCO4 / 2}, {VCO4, VCO4},
+       MFREQ(5),
+       {0, CPUFREQ_TABLE_END},
+};
+
+/*
+ * dpmc_fops->ioctl()
+ * static int dpmc_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
+ */
+static int bf548_getfreq(unsigned int cpu)
+{
+       unsigned long cclk_mhz;
+
+       /* The driver only support single cpu */
+       if (cpu == 0)
+               dpmc_fops.ioctl(NULL, NULL, IOCTL_GET_CORECLOCK, &cclk_mhz);
+       else
+               cclk_mhz = -1;
+
+       return cclk_mhz;
+}
+
+static int bf548_target(struct cpufreq_policy *policy,
+                           unsigned int target_freq, unsigned int relation)
+{
+       unsigned long cclk_mhz;
+       unsigned long vco_mhz;
+       unsigned long flags;
+       unsigned int index;
+       struct cpufreq_freqs freqs;
+
+       if (cpufreq_frequency_table_target(policy, bf548_freq_table, target_freq, relation, &index))
+               return -EINVAL;
+
+       cclk_mhz = bf548_freq_table[index].frequency;
+       vco_mhz = bf548_freq_table[index].index;
+
+       dpmc_fops.ioctl(NULL, NULL, IOCTL_CHANGE_FREQUENCY, &vco_mhz);
+       freqs.old = bf548_getfreq(0);
+       freqs.new = cclk_mhz;
+       freqs.cpu = 0;
+
+       pr_debug("cclk begin change to cclk %d,vco=%d,index=%d,target=%d,oldfreq=%d\n",
+                cclk_mhz, vco_mhz, index, target_freq, freqs.old);
+
+       cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+       local_irq_save(flags);
+       dpmc_fops.ioctl(NULL, NULL, IOCTL_SET_CCLK, &cclk_mhz);
+       local_irq_restore(flags);
+       cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+
+       vco_mhz = get_vco();
+       cclk_mhz = get_cclk();
+       return 0;
+}
+
+/* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
+ * this platform, anyway.
+ */
+static int bf548_verify_speed(struct cpufreq_policy *policy)
+{
+       return cpufreq_frequency_table_verify(policy, &bf548_freq_table);
+}
+
+static int __init __bf548_cpu_init(struct cpufreq_policy *policy)
+{
+       if (policy->cpu != 0)
+               return -EINVAL;
+
+       policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
+
+       policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
+       /*Now ,only support one cpu */
+       policy->cur = bf548_getfreq(0);
+       cpufreq_frequency_table_get_attr(bf548_freq_table, policy->cpu);
+       return cpufreq_frequency_table_cpuinfo(policy, bf548_freq_table);
+}
+
+static struct freq_attr *bf548_freq_attr[] = {
+       &cpufreq_freq_attr_scaling_available_freqs,
+       NULL,
+};
+
+static struct cpufreq_driver bf548_driver = {
+       .verify = bf548_verify_speed,
+       .target = bf548_target,
+       .get = bf548_getfreq,
+       .init = __bf548_cpu_init,
+       .name = "bf548",
+       .owner = THIS_MODULE,
+       .attr = bf548_freq_attr,
+};
+
+static int __init bf548_cpu_init(void)
+{
+       return cpufreq_register_driver(&bf548_driver);
+}
+
+static void __exit bf548_cpu_exit(void)
+{
+       cpufreq_unregister_driver(&bf548_driver);
+}
+
+MODULE_AUTHOR("Mickael Kang");
+MODULE_DESCRIPTION("cpufreq driver for BF548 CPU");
+MODULE_LICENSE("GPL");
+
+module_init(bf548_cpu_init);
+module_exit(bf548_cpu_exit);
diff --git a/arch/blackfin/mach-bf548/dma.c b/arch/blackfin/mach-bf548/dma.c
new file mode 100644 (file)
index 0000000..a818411
--- /dev/null
@@ -0,0 +1,156 @@
+/*
+ * File:         arch/blackfin/mach-bf561/dma.c
+ * Based on:
+ * Author:
+ *
+ * Created:
+ * Description:  This file contains the simple DMA Implementation for Blackfin
+ *
+ * Modified:
+ *               Copyright 2004-2007 Analog Devices Inc.
+ *
+ * Bugs:         Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <asm/blackfin.h>
+#include <asm/dma.h>
+
+ struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
+       (struct dma_register *) DMA0_NEXT_DESC_PTR,
+       (struct dma_register *) DMA1_NEXT_DESC_PTR,
+       (struct dma_register *) DMA2_NEXT_DESC_PTR,
+       (struct dma_register *) DMA3_NEXT_DESC_PTR,
+       (struct dma_register *) DMA4_NEXT_DESC_PTR,
+       (struct dma_register *) DMA5_NEXT_DESC_PTR,
+       (struct dma_register *) DMA6_NEXT_DESC_PTR,
+       (struct dma_register *) DMA7_NEXT_DESC_PTR,
+       (struct dma_register *) DMA8_NEXT_DESC_PTR,
+       (struct dma_register *) DMA9_NEXT_DESC_PTR,
+       (struct dma_register *) DMA10_NEXT_DESC_PTR,
+       (struct dma_register *) DMA11_NEXT_DESC_PTR,
+       (struct dma_register *) DMA12_NEXT_DESC_PTR,
+       (struct dma_register *) DMA13_NEXT_DESC_PTR,
+       (struct dma_register *) DMA14_NEXT_DESC_PTR,
+       (struct dma_register *) DMA15_NEXT_DESC_PTR,
+       (struct dma_register *) DMA16_NEXT_DESC_PTR,
+       (struct dma_register *) DMA17_NEXT_DESC_PTR,
+       (struct dma_register *) DMA18_NEXT_DESC_PTR,
+       (struct dma_register *) DMA19_NEXT_DESC_PTR,
+       (struct dma_register *) DMA20_NEXT_DESC_PTR,
+       (struct dma_register *) DMA21_NEXT_DESC_PTR,
+       (struct dma_register *) DMA22_NEXT_DESC_PTR,
+       (struct dma_register *) DMA23_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA_D0_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA_S0_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA_D1_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA_S1_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA_D2_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA_S2_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA_D3_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA_S3_NEXT_DESC_PTR,
+};
+
+int channel2irq(unsigned int channel)
+{
+       int ret_irq = -1;
+
+       switch (channel) {
+       case CH_SPORT0_RX:
+               ret_irq = IRQ_SPORT0_RX;
+               break;
+       case CH_SPORT0_TX:
+               ret_irq = IRQ_SPORT0_TX;
+               break;
+       case CH_SPORT1_RX:
+               ret_irq = IRQ_SPORT1_RX;
+               break;
+       case CH_SPORT1_TX:
+               ret_irq = IRQ_SPORT1_TX;
+       case CH_SPI0:
+               ret_irq = IRQ_SPI0;
+               break;
+       case CH_SPI1:
+               ret_irq = IRQ_SPI1;
+               break;
+       case CH_UART0_RX:
+               ret_irq = IRQ_UART_RX;
+               break;
+       case CH_UART0_TX:
+               ret_irq = IRQ_UART_TX;
+               break;
+       case CH_UART1_RX:
+               ret_irq = IRQ_UART_RX;
+               break;
+       case CH_UART1_TX:
+               ret_irq = IRQ_UART_TX;
+               break;
+       case CH_EPPI0:
+               ret_irq = IRQ_EPPI0;
+               break;
+       case CH_EPPI1:
+               ret_irq = IRQ_EPPI1;
+               break;
+       case CH_EPPI2:
+               ret_irq = IRQ_EPPI2;
+               break;
+       case CH_PIXC_IMAGE:
+               ret_irq = IRQ_PIXC_IN0;
+               break;
+       case CH_PIXC_OVERLAY:
+               ret_irq = IRQ_PIXC_IN1;
+               break;
+       case CH_PIXC_OUTPUT:
+               ret_irq = IRQ_PIXC_OUT;
+               break;
+       case CH_SPORT2_RX:
+               ret_irq = IRQ_SPORT2_RX;
+               break;
+       case CH_SPORT2_TX:
+               ret_irq = IRQ_SPORT2_TX;
+               break;
+       case CH_SPORT3_RX:
+               ret_irq = IRQ_SPORT3_RX;
+               break;
+       case CH_SPORT3_TX:
+               ret_irq = IRQ_SPORT3_TX;
+               break;
+       case CH_SDH:
+               ret_irq = IRQ_SDH;
+               break;
+       case CH_SPI2:
+               ret_irq = IRQ_SPI2;
+               break;
+       case CH_MEM_STREAM0_SRC:
+       case CH_MEM_STREAM0_DEST:
+               ret_irq = IRQ_MDMAS0;
+               break;
+       case CH_MEM_STREAM1_SRC:
+       case CH_MEM_STREAM1_DEST:
+               ret_irq = IRQ_MDMAS1;
+               break;
+       case CH_MEM_STREAM2_SRC:
+       case CH_MEM_STREAM2_DEST:
+               ret_irq = IRQ_MDMAS2;
+               break;
+       case CH_MEM_STREAM3_SRC:
+       case CH_MEM_STREAM3_DEST:
+               ret_irq = IRQ_MDMAS3;
+               break;
+       }
+       return ret_irq;
+}
diff --git a/arch/blackfin/mach-bf548/gpio.c b/arch/blackfin/mach-bf548/gpio.c
new file mode 100644 (file)
index 0000000..0da5f00
--- /dev/null
@@ -0,0 +1,323 @@
+/*
+ * File:         arch/blackfin/mach-bf548/gpio.c
+ * Based on:
+ * Author:       Michael Hennerich (hennerich@blackfin.uclinux.org)
+ *
+ * Created:
+ * Description:  GPIO Abstraction Layer
+ *
+ * Modified:
+ *               Copyright 2007 Analog Devices Inc.
+ *
+ * Bugs:         Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/module.h>
+#include <linux/err.h>
+#include <asm/blackfin.h>
+#include <asm/gpio.h>
+#include <asm/portmux.h>
+#include <linux/irq.h>
+
+static struct gpio_port_t *gpio_array[gpio_bank(MAX_BLACKFIN_GPIOS)] = {
+       (struct gpio_port_t *)PORTA_FER,
+       (struct gpio_port_t *)PORTB_FER,
+       (struct gpio_port_t *)PORTC_FER,
+       (struct gpio_port_t *)PORTD_FER,
+       (struct gpio_port_t *)PORTE_FER,
+       (struct gpio_port_t *)PORTF_FER,
+       (struct gpio_port_t *)PORTG_FER,
+       (struct gpio_port_t *)PORTH_FER,
+       (struct gpio_port_t *)PORTI_FER,
+       (struct gpio_port_t *)PORTJ_FER,
+};
+
+static unsigned short reserved_gpio_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
+static unsigned short reserved_peri_map[gpio_bank(MAX_BLACKFIN_GPIOS)];
+
+inline int check_gpio(unsigned short gpio)
+{
+       if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
+           || gpio == GPIO_PH14 || gpio == GPIO_PH15
+           || gpio == GPIO_PJ14 || gpio == GPIO_PJ15
+           || gpio > MAX_BLACKFIN_GPIOS)
+               return -EINVAL;
+       return 0;
+}
+
+inline void portmux_setup(unsigned short portno, unsigned short function)
+{
+       u32 pmux;
+
+       pmux = gpio_array[gpio_bank(portno)]->port_mux;
+
+       pmux &= ~(0x3 << (2 * gpio_sub_n(portno)));
+       pmux |= (function & 0x3) << (2 * gpio_sub_n(portno));
+
+       gpio_array[gpio_bank(portno)]->port_mux = pmux;
+
+}
+
+inline u16 get_portmux(unsigned short portno)
+{
+       u32 pmux;
+
+       pmux = gpio_array[gpio_bank(portno)]->port_mux;
+
+       return (pmux >> (2 * gpio_sub_n(portno)) & 0x3);
+
+}
+
+static void port_setup(unsigned short gpio, unsigned short usage)
+{
+       if (usage == GPIO_USAGE) {
+               if (gpio_array[gpio_bank(gpio)]->port_fer & gpio_bit(gpio))
+                       printk(KERN_WARNING
+                              "bfin-gpio: Possible Conflict with Peripheral "
+                              "usage and GPIO %d detected!\n", gpio);
+               gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
+       } else
+               gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
+       SSYNC();
+}
+
+static int __init bfin_gpio_init(void)
+{
+       printk(KERN_INFO "Blackfin GPIO Controller\n");
+
+       return 0;
+}
+
+arch_initcall(bfin_gpio_init);
+
+int peripheral_request(unsigned short per, const char *label)
+{
+       unsigned long flags;
+       unsigned short ident = P_IDENT(per);
+
+       if (!(per & P_DEFINED))
+               return -ENODEV;
+
+       if (check_gpio(ident) < 0)
+               return -EINVAL;
+
+       local_irq_save(flags);
+
+       if (unlikely(reserved_gpio_map[gpio_bank(ident)] & gpio_bit(ident))) {
+               printk(KERN_ERR
+                      "%s: Peripheral %d is already reserved as GPIO!\n",
+                      __FUNCTION__, per);
+               dump_stack();
+               local_irq_restore(flags);
+               return -EBUSY;
+       }
+
+       if (unlikely(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident))) {
+
+               u16 funct = get_portmux(ident);
+
+               if (!((per & P_MAYSHARE) && (funct == P_FUNCT2MUX(per)))) {
+                       printk(KERN_ERR
+                              "%s: Peripheral %d is already reserved!\n",
+                              __FUNCTION__, per);
+                       dump_stack();
+                       local_irq_restore(flags);
+                       return -EBUSY;
+               }
+       }
+
+       reserved_peri_map[gpio_bank(ident)] |= gpio_bit(ident);
+
+       portmux_setup(ident, P_FUNCT2MUX(per));
+       port_setup(ident, PERIPHERAL_USAGE);
+
+       local_irq_restore(flags);
+
+       return 0;
+}
+EXPORT_SYMBOL(peripheral_request);
+
+int peripheral_request_list(unsigned short per[], const char *label)
+{
+
+       u16 cnt;
+       int ret;
+
+       for (cnt = 0; per[cnt] != 0; cnt++) {
+               ret = peripheral_request(per[cnt], label);
+               if (ret < 0)
+                       return ret;
+       }
+
+       return 0;
+}
+EXPORT_SYMBOL(peripheral_request_list);
+
+void peripheral_free(unsigned short per)
+{
+       unsigned long flags;
+       unsigned short ident = P_IDENT(per);
+
+       if (!(per & P_DEFINED))
+               return;
+
+       if (check_gpio(ident) < 0)
+               return;
+
+       local_irq_save(flags);
+
+       if (unlikely(!(reserved_peri_map[gpio_bank(ident)] & gpio_bit(ident)))) {
+               printk(KERN_ERR "bfin-gpio: Peripheral %d wasn't reserved!\n", per);
+               dump_stack();
+               local_irq_restore(flags);
+               return;
+       }
+
+       if (!(per & P_MAYSHARE)) {
+               port_setup(ident, GPIO_USAGE);
+       }
+
+       reserved_peri_map[gpio_bank(ident)] &= ~gpio_bit(ident);
+
+       local_irq_restore(flags);
+}
+EXPORT_SYMBOL(peripheral_free);
+
+void peripheral_free_list(unsigned short per[])
+{
+       u16 cnt;
+
+       for (cnt = 0; per[cnt] != 0; cnt++) {
+               peripheral_free(per[cnt]);
+       }
+
+}
+EXPORT_SYMBOL(peripheral_free_list);
+
+/***********************************************************
+*
+* FUNCTIONS: Blackfin GPIO Driver
+*
+* INPUTS/OUTPUTS:
+* gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
+*
+*
+* DESCRIPTION: Blackfin GPIO Driver API
+*
+* CAUTION:
+*************************************************************
+* MODIFICATION HISTORY :
+**************************************************************/
+
+int gpio_request(unsigned short gpio, const char *label)
+{
+       unsigned long flags;
+
+       if (check_gpio(gpio) < 0)
+               return -EINVAL;
+
+       local_irq_save(flags);
+
+       if (unlikely(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
+               printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved!\n", gpio);
+               dump_stack();
+               local_irq_restore(flags);
+               return -EBUSY;
+       }
+
+       if (unlikely(reserved_peri_map[gpio_bank(gpio)] & gpio_bit(gpio))) {
+               printk(KERN_ERR
+                      "bfin-gpio: GPIO %d is already reserved as Peripheral!\n", gpio);
+               dump_stack();
+               local_irq_restore(flags);
+               return -EBUSY;
+       }
+
+       reserved_gpio_map[gpio_bank(gpio)] |= gpio_bit(gpio);
+
+       local_irq_restore(flags);
+
+       port_setup(gpio, GPIO_USAGE);
+
+       return 0;
+}
+EXPORT_SYMBOL(gpio_request);
+
+void gpio_free(unsigned short gpio)
+{
+       unsigned long flags;
+
+       if (check_gpio(gpio) < 0)
+               return;
+
+       local_irq_save(flags);
+
+       if (unlikely(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)))) {
+               printk(KERN_ERR "bfin-gpio: GPIO %d wasn't reserved!\n", gpio);
+               dump_stack();
+               local_irq_restore(flags);
+               return;
+       }
+
+       reserved_gpio_map[gpio_bank(gpio)] &= ~gpio_bit(gpio);
+
+       local_irq_restore(flags);
+}
+EXPORT_SYMBOL(gpio_free);
+
+void gpio_direction_input(unsigned short gpio)
+{
+       unsigned long flags;
+
+       BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
+
+       local_irq_save(flags);
+       gpio_array[gpio_bank(gpio)]->port_dir_clear = gpio_bit(gpio);
+       gpio_array[gpio_bank(gpio)]->port_inen |= gpio_bit(gpio);
+       local_irq_restore(flags);
+}
+EXPORT_SYMBOL(gpio_direction_input);
+
+void gpio_direction_output(unsigned short gpio)
+{
+       unsigned long flags;
+
+       BUG_ON(!(reserved_gpio_map[gpio_bank(gpio)] & gpio_bit(gpio)));
+
+       local_irq_save(flags);
+       gpio_array[gpio_bank(gpio)]->port_inen &= ~gpio_bit(gpio);
+       gpio_array[gpio_bank(gpio)]->port_dir_set = gpio_bit(gpio);
+       local_irq_restore(flags);
+}
+EXPORT_SYMBOL(gpio_direction_output);
+
+void gpio_set_value(unsigned short gpio, unsigned short arg)
+{
+       if (arg)
+               gpio_array[gpio_bank(gpio)]->port_set = gpio_bit(gpio);
+       else
+               gpio_array[gpio_bank(gpio)]->port_clear = gpio_bit(gpio);
+
+}
+EXPORT_SYMBOL(gpio_set_value);
+
+unsigned short gpio_get_value(unsigned short gpio)
+{
+       return (1 & (gpio_array[gpio_bank(gpio)]->port_data >> gpio_sub_n(gpio)));
+}
+EXPORT_SYMBOL(gpio_get_value);
diff --git a/arch/blackfin/mach-bf548/head.S b/arch/blackfin/mach-bf548/head.S
new file mode 100644 (file)
index 0000000..06751ae
--- /dev/null
@@ -0,0 +1,512 @@
+/*
+ * File:         arch/blackfin/mach-bf548/head.S
+ * Based on:     arch/blackfin/mach-bf537/head.S
+ * Author:       Jeff Dionne <jeff@uclinux.org> COPYRIGHT 1998 D. Jeff Dionne
+ *
+ * Created:      1998
+ * Description:  Startup code for Blackfin BF548
+ *
+ * Modified:
+ *               Copyright 2004-2007 Analog Devices Inc.
+ *
+ * Bugs:         Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/linkage.h>
+#include <asm/blackfin.h>
+#include <asm/trace.h>
+#if CONFIG_BFIN_KERNEL_CLOCK
+#include <asm/mach/mem_init.h>
+#endif
+
+.global __rambase
+.global __ramstart
+.global __ramend
+.extern ___bss_stop
+.extern ___bss_start
+.extern _bf53x_relocate_l1_mem
+
+#define INITIAL_STACK   0xFFB01000
+
+.text
+
+ENTRY(__start)
+ENTRY(__stext)
+       /* R0: argument of command line string, passed from uboot, save it */
+       R7 = R0;
+       /* Set the SYSCFG register */
+       R0 = 0x36;
+       SYSCFG = R0;   /*Enable Cycle Counter and Nesting Of Interrupts(3rd Bit)*/
+       R0 = 0;
+
+       /* Clear Out All the data and pointer  Registers*/
+       R1 = R0;
+       R2 = R0;
+       R3 = R0;
+       R4 = R0;
+       R5 = R0;
+       R6 = R0;
+
+       P0 = R0;
+       P1 = R0;
+       P2 = R0;
+       P3 = R0;
+       P4 = R0;
+       P5 = R0;
+
+       LC0 = r0;
+       LC1 = r0;
+       L0 = r0;
+       L1 = r0;
+       L2 = r0;
+       L3 = r0;
+
+       /* Clear Out All the DAG Registers*/
+       B0 = r0;
+       B1 = r0;
+       B2 = r0;
+       B3 = r0;
+
+       I0 = r0;
+       I1 = r0;
+       I2 = r0;
+       I3 = r0;
+
+       M0 = r0;
+       M1 = r0;
+       M2 = r0;
+       M3 = r0;
+
+       trace_buffer_start(p0,r0);
+       P0 = R1;
+       R0 = R1;
+
+       /* Turn off the icache */
+       p0.l = (IMEM_CONTROL & 0xFFFF);
+       p0.h = (IMEM_CONTROL >> 16);
+       R1 = [p0];
+       R0 = ~ENICPLB;
+       R0 = R0 & R1;
+       [p0] = R0;
+       SSYNC;
+
+       /* Turn off the dcache */
+       p0.l = (DMEM_CONTROL & 0xFFFF);
+       p0.h = (DMEM_CONTROL >> 16);
+       R1 = [p0];
+       R0 = ~ENDCPLB;
+       R0 = R0 & R1;
+       [p0] = R0;
+       SSYNC;
+
+       /* Initialize stack pointer */
+       SP.L = LO(INITIAL_STACK);
+       SP.H = HI(INITIAL_STACK);
+       FP = SP;
+       USP = SP;
+
+       /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */
+       call _bf53x_relocate_l1_mem;
+#if CONFIG_BFIN_KERNEL_CLOCK
+       call _start_dma_code;
+#endif
+       /* Code for initializing Async memory banks */
+
+       p2.h = hi(EBIU_AMBCTL1);
+       p2.l = lo(EBIU_AMBCTL1);
+       r0.h = hi(AMBCTL1VAL);
+       r0.l = lo(AMBCTL1VAL);
+       [p2] = r0;
+       ssync;
+
+       p2.h = hi(EBIU_AMBCTL0);
+       p2.l = lo(EBIU_AMBCTL0);
+       r0.h = hi(AMBCTL0VAL);
+       r0.l = lo(AMBCTL0VAL);
+       [p2] = r0;
+       ssync;
+
+       p2.h = hi(EBIU_AMGCTL);
+       p2.l = lo(EBIU_AMGCTL);
+       r0 = AMGCTLVAL;
+       w[p2] = r0;
+       ssync;
+
+       /* This section keeps the processor in supervisor mode
+        * during kernel boot.  Switches to user mode at end of boot.
+        * See page 3-9 of Hardware Reference manual for documentation.
+        */
+
+       /* EVT15 = _real_start */
+
+       p0.l = lo(EVT15);
+       p0.h = hi(EVT15);
+       p1.l = _real_start;
+       p1.h = _real_start;
+       [p0] = p1;
+       csync;
+
+       p0.l = lo(IMASK);
+       p0.h = hi(IMASK);
+       p1.l = IMASK_IVG15;
+       p1.h = 0x0;
+       [p0] = p1;
+       csync;
+
+       raise 15;
+       p0.l = .LWAIT_HERE;
+       p0.h = .LWAIT_HERE;
+       reti = p0;
+#if defined (ANOMALY_05000281)
+       nop;
+       nop;
+       nop;
+#endif
+       rti;
+
+.LWAIT_HERE:
+       jump .LWAIT_HERE;
+
+ENTRY(_real_start)
+       [ -- sp ] = reti;
+       p0.l = lo(WDOG_CTL);
+       p0.h = hi(WDOG_CTL);
+       r0 = 0xAD6(z);
+       w[p0] = r0;     /* watchdog off for now */
+       ssync;
+
+       /* Code update for BSS size == 0
+        * Zero out the bss region.
+        */
+
+       p1.l = ___bss_start;
+       p1.h = ___bss_start;
+       p2.l = ___bss_stop;
+       p2.h = ___bss_stop;
+       r0 = 0;
+       p2 -= p1;
+       lsetup (.L_clear_bss, .L_clear_bss ) lc0 = p2;
+.L_clear_bss:
+       B[p1++] = r0;
+
+       /* In case there is a NULL pointer reference
+        * Zero out region before stext
+        */
+
+       p1.l = 0x0;
+       p1.h = 0x0;
+       r0.l = __stext;
+       r0.h = __stext;
+       r0 = r0 >> 1;
+       p2 = r0;
+       r0 = 0;
+       lsetup (.L_clear_zero, .L_clear_zero ) lc0 = p2;
+.L_clear_zero:
+       W[p1++] = r0;
+
+       /* pass the uboot arguments to the global value command line */
+       R0 = R7;
+       call _cmdline_init;
+
+       p1.l = __rambase;
+       p1.h = __rambase;
+       r0.l = __sdata;
+       r0.h = __sdata;
+       [p1] = r0;
+
+       p1.l = __ramstart;
+       p1.h = __ramstart;
+       p3.l = ___bss_stop;
+       p3.h = ___bss_stop;
+
+       r1 = p3;
+       [p1] = r1;
+
+
+       /*
+        *  load the current thread pointer and stack
+        */
+       r1.l = _init_thread_union;
+       r1.h = _init_thread_union;
+
+       r2.l = 0x2000;
+       r2.h = 0x0000;
+       r1 = r1 + r2;
+       sp = r1;
+       usp = sp;
+       fp = sp;
+       call _start_kernel;
+.L_exit:
+       jump.s  .L_exit;
+
+.section .l1.text
+#if CONFIG_BFIN_KERNEL_CLOCK
+ENTRY(_start_dma_code)
+
+       /* Enable PHY CLK buffer output */
+       p0.h = hi(VR_CTL);
+       p0.l = lo(VR_CTL);
+       r0.l = w[p0];
+       bitset(r0, 14);
+       w[p0] = r0.l;
+       ssync;
+
+       p0.h = hi(SIC_IWR);
+       p0.l = lo(SIC_IWR);
+       r0.l = 0x1;
+       r0.h = 0x0;
+       [p0] = r0;
+       SSYNC;
+
+       /*
+        *  Set PLL_CTL
+        *   - [14:09] = MSEL[5:0] : CLKIN / VCO multiplication factors
+        *   - [8]     = BYPASS    : BYPASS the PLL, run CLKIN into CCLK/SCLK
+        *   - [7]     = output delay (add 200ps of delay to mem signals)
+        *   - [6]     = input delay (add 200ps of input delay to mem signals)
+        *   - [5]     = PDWN      : 1=All Clocks off
+        *   - [3]     = STOPCK    : 1=Core Clock off
+        *   - [1]     = PLL_OFF   : 1=Disable Power to PLL
+        *   - [0]     = DF        : 1=Pass CLKIN/2 to PLL / 0=Pass CLKIN to PLL
+        *   all other bits set to zero
+        */
+
+       p0.h = hi(PLL_LOCKCNT);
+       p0.l = lo(PLL_LOCKCNT);
+       r0 = 0x300(Z);
+       w[p0] = r0.l;
+       ssync;
+
+       P2.H = hi(EBIU_SDGCTL);
+       P2.L = lo(EBIU_SDGCTL);
+       R0 = [P2];
+       BITSET (R0, 24);
+       [P2] = R0;
+       SSYNC;
+
+       r0 = CONFIG_VCO_MULT & 63;       /* Load the VCO multiplier         */
+       r0 = r0 << 9;                    /* Shift it over,                  */
+       r1 = CLKIN_HALF;                 /* Do we need to divide CLKIN by 2?*/
+       r0 = r1 | r0;
+       r1 = PLL_BYPASS;                 /* Bypass the PLL?                 */
+       r1 = r1 << 8;                    /* Shift it over                   */
+       r0 = r1 | r0;                    /* add them all together           */
+
+       p0.h = hi(PLL_CTL);
+       p0.l = lo(PLL_CTL);              /* Load the address                */
+       cli r2;                          /* Disable interrupts              */
+       ssync;
+       w[p0] = r0.l;                    /* Set the value                   */
+       idle;                            /* Wait for the PLL to stablize    */
+       sti r2;                          /* Enable interrupts               */
+
+.Lcheck_again:
+       p0.h = hi(PLL_STAT);
+       p0.l = lo(PLL_STAT);
+       R0 = W[P0](Z);
+       CC = BITTST(R0,5);
+       if ! CC jump .Lcheck_again;
+
+       /* Configure SCLK & CCLK Dividers */
+       r0 = (CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV);
+       p0.h = hi(PLL_DIV);
+       p0.l = lo(PLL_DIV);
+       w[p0] = r0.l;
+       ssync;
+
+       p0.l = lo(EBIU_SDRRC);
+       p0.h = hi(EBIU_SDRRC);
+       r0 = mem_SDRRC;
+       w[p0] = r0.l;
+       ssync;
+
+       p0.l = (EBIU_SDBCTL & 0xFFFF);
+       p0.h = (EBIU_SDBCTL >> 16);     /* SDRAM Memory Bank Control Register */
+       r0 = mem_SDBCTL;
+       w[p0] = r0.l;
+       ssync;
+
+       P2.H = hi(EBIU_SDGCTL);
+       P2.L = lo(EBIU_SDGCTL);
+       R0 = [P2];
+       BITCLR (R0, 24);
+       p0.h = hi(EBIU_SDSTAT);
+       p0.l = lo(EBIU_SDSTAT);
+       r2.l = w[p0];
+       cc = bittst(r2,3);
+       if !cc jump .Lskip;
+       NOP;
+       BITSET (R0, 23);
+.Lskip:
+       [P2] = R0;
+       SSYNC;
+
+       R0.L = lo(mem_SDGCTL);
+       R0.H = hi(mem_SDGCTL);
+       R1 = [p2];
+       R1 = R1 | R0;
+       [P2] = R1;
+       SSYNC;
+
+       p0.h = hi(SIC_IWR);
+       p0.l = lo(SIC_IWR);
+       r0.l = lo(IWR_ENABLE_ALL);
+       r0.h = hi(IWR_ENABLE_ALL);
+       [p0] = r0;
+       SSYNC;
+
+       RTS;
+#endif /* CONFIG_BFIN_KERNEL_CLOCK */
+
+ENTRY(_bfin_reset)
+       /* No more interrupts to be handled*/
+       CLI R6;
+       SSYNC;
+
+#if defined(CONFIG_MTD_M25P80)
+/*
+ * The following code fix the SPI flash reboot issue,
+ * /CS signal of the chip which is using PF10 return to GPIO mode
+ */
+       p0.h = hi(PORTF_FER);
+       p0.l = lo(PORTF_FER);
+       r0.l = 0x0000;
+       w[p0] = r0.l;
+       SSYNC;
+
+/* /CS return to high */
+       p0.h = hi(PORTFIO);
+       p0.l = lo(PORTFIO);
+       r0.l = 0xFFFF;
+       w[p0] = r0.l;
+       SSYNC;
+
+/* Delay some time, This is necessary */
+       r1.h = 0;
+       r1.l = 0x400;
+       p1   = r1;
+       lsetup (_delay_lab1,_delay_lab1_end ) lc1 = p1;
+_delay_lab1:
+       r0.h = 0;
+       r0.l = 0x8000;
+       p0   = r0;
+       lsetup (_delay_lab0,_delay_lab0_end ) lc0 = p0;
+_delay_lab0:
+       nop;
+_delay_lab0_end:
+       nop;
+_delay_lab1_end:
+       nop;
+#endif
+
+       /* Clear the bits 13-15 in SWRST if they werent cleared */
+       p0.h = hi(SWRST);
+       p0.l = lo(SWRST);
+       csync;
+       r0.l = w[p0];
+
+       /* Clear the IMASK register */
+       p0.h = hi(IMASK);
+       p0.l = lo(IMASK);
+       r0 = 0x0;
+       [p0] = r0;
+
+       /* Clear the ILAT register */
+       p0.h = hi(ILAT);
+       p0.l = lo(ILAT);
+       r0 = [p0];
+       [p0] = r0;
+       SSYNC;
+
+       /* Disable the WDOG TIMER */
+       p0.h = hi(WDOG_CTL);
+       p0.l = lo(WDOG_CTL);
+       r0.l = 0xAD6;
+       w[p0] = r0.l;
+       SSYNC;
+
+       /* Clear the sticky bit incase it is already set */
+       p0.h = hi(WDOG_CTL);
+       p0.l = lo(WDOG_CTL);
+       r0.l = 0x8AD6;
+       w[p0] = r0.l;
+       SSYNC;
+
+       /* Program the count value */
+       R0.l = 0x100;
+       R0.h = 0x0;
+       P0.h = hi(WDOG_CNT);
+       P0.l = lo(WDOG_CNT);
+       [P0] = R0;
+       SSYNC;
+
+       /* Program WDOG_STAT if necessary */
+       P0.h = hi(WDOG_CTL);
+       P0.l = lo(WDOG_CTL);
+       R0 = W[P0](Z);
+       CC = BITTST(R0,1);
+       if !CC JUMP .LWRITESTAT;
+       CC = BITTST(R0,2);
+       if !CC JUMP .LWRITESTAT;
+       JUMP .LSKIP_WRITE;
+
+.LWRITESTAT:
+       /* When watch dog timer is enabled,
+        * a write to STAT will load the contents of CNT to STAT
+        */
+       R0 = 0x0000(z);
+       P0.h = hi(WDOG_STAT);
+       P0.l = lo(WDOG_STAT)
+       [P0] = R0;
+       SSYNC;
+
+.LSKIP_WRITE:
+       /* Enable the reset event */
+       P0.h = hi(WDOG_CTL);
+       P0.l = lo(WDOG_CTL);
+       R0 = W[P0](Z);
+       BITCLR(R0,1);
+       BITCLR(R0,2);
+       W[P0] = R0.L;
+       SSYNC;
+       NOP;
+
+       /* Enable the wdog counter */
+       R0 = W[P0](Z);
+       BITCLR(R0,4);
+       W[P0] = R0.L;
+       SSYNC;
+
+       IDLE;
+
+       RTS;
+
+.data
+
+/*
+ * Set up the usable of RAM stuff. Size of RAM is determined then
+ * an initial stack set up at the end.
+ */
+
+.align 4
+__rambase:
+.long   0
+__ramstart:
+.long   0
+__ramend:
+.long   0
diff --git a/arch/blackfin/mach-bf548/ints-priority.c b/arch/blackfin/mach-bf548/ints-priority.c
new file mode 100644 (file)
index 0000000..cb0ebac
--- /dev/null
@@ -0,0 +1,137 @@
+/*
+ * File:         arch/blackfin/mach-bf537/ints-priority.c
+ * Based on:     arch/blackfin/mach-bf533/ints-priority.c
+ * Author:       Michael Hennerich
+ *
+ * Created:
+ * Description:  Set up the interupt priorities
+ *
+ * Modified:
+ *               Copyright 2004-2006 Analog Devices Inc.
+ *
+ * Bugs:         Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/module.h>
+#include <linux/irq.h>
+#include <asm/blackfin.h>
+
+void program_IAR(void)
+{
+       /* Program the IAR0 Register with the configured priority */
+       bfin_write_SIC_IAR0(((CONFIG_IRQ_PLL_WAKEUP - 7) << IRQ_PLL_WAKEUP_POS) |
+                           ((CONFIG_IRQ_DMAC0_ERR - 7) << IRQ_DMAC0_ERR_POS) |
+                           ((CONFIG_IRQ_EPPI0_ERR - 7) << IRQ_EPPI0_ERR_POS) |
+                           ((CONFIG_IRQ_SPORT0_ERR - 7) << IRQ_SPORT0_ERR_POS) |
+                           ((CONFIG_IRQ_SPORT1_ERR - 7) << IRQ_SPORT1_ERR_POS) |
+                           ((CONFIG_IRQ_SPI0_ERR - 7) << IRQ_SPI0_ERR_POS) |
+                           ((CONFIG_IRQ_UART0_ERR - 7) << IRQ_UART0_ERR_POS) |
+                           ((CONFIG_IRQ_RTC - 7) << IRQ_RTC_POS));
+
+       bfin_write_SIC_IAR1(((CONFIG_IRQ_EPPI0 - 7) << IRQ_EPPI0_POS) |
+                           ((CONFIG_IRQ_SPORT0_RX - 7) << IRQ_SPORT0_RX_POS) |
+                           ((CONFIG_IRQ_SPORT0_TX - 7) << IRQ_SPORT0_TX_POS) |
+                           ((CONFIG_IRQ_SPORT1_RX - 7) << IRQ_SPORT1_RX_POS) |
+                           ((CONFIG_IRQ_SPORT1_TX - 7) << IRQ_SPORT1_TX_POS) |
+                           ((CONFIG_IRQ_SPI0 - 7) << IRQ_SPI0_POS) |
+                           ((CONFIG_IRQ_UART0_RX - 7) << IRQ_UART0_RX_POS) |
+                           ((CONFIG_IRQ_UART0_TX - 7) << IRQ_UART0_TX_POS));
+
+       bfin_write_SIC_IAR2(((CONFIG_IRQ_TIMER8 - 7) << IRQ_TIMER8_POS) |
+                           ((CONFIG_IRQ_TIMER9 - 7) << IRQ_TIMER9_POS) |
+                           ((CONFIG_IRQ_PINT0 - 7) << IRQ_PINT0_POS) |
+                           ((CONFIG_IRQ_PINT1 - 7) << IRQ_PINT1_POS) |
+                           ((CONFIG_IRQ_MDMAS0 - 7) << IRQ_MDMAS0_POS) |
+                           ((CONFIG_IRQ_MDMAS1 - 7) << IRQ_MDMAS1_POS) |
+                           ((CONFIG_IRQ_WATCHDOG - 7) << IRQ_WATCHDOG_POS));
+
+       bfin_write_SIC_IAR3(((CONFIG_IRQ_DMAC1_ERR - 7) << IRQ_DMAC1_ERR_POS) |
+                           ((CONFIG_IRQ_SPORT2_ERR - 7) << IRQ_SPORT2_ERR_POS) |
+                           ((CONFIG_IRQ_SPORT3_ERR - 7) << IRQ_SPORT3_ERR_POS) |
+                           ((CONFIG_IRQ_MXVR_DATA - 7) << IRQ_MXVR_DATA_POS) |
+                           ((CONFIG_IRQ_SPI1_ERR - 7) << IRQ_SPI1_ERR_POS) |
+                           ((CONFIG_IRQ_SPI2_ERR - 7) << IRQ_SPI2_ERR_POS) |
+                           ((CONFIG_IRQ_UART1_ERR - 7) << IRQ_UART1_ERR_POS) |
+                           ((CONFIG_IRQ_UART2_ERR - 7) << IRQ_UART2_ERR_POS));
+
+       bfin_write_SIC_IAR4(((CONFIG_IRQ_CAN0_ERR - 7) << IRQ_CAN0_ERR_POS) |
+                           ((CONFIG_IRQ_SPORT2_RX - 7) << IRQ_SPORT2_RX_POS) |
+                           ((CONFIG_IRQ_SPORT2_TX - 7) << IRQ_SPORT2_TX_POS) |
+                           ((CONFIG_IRQ_SPORT3_RX - 7) << IRQ_SPORT3_RX_POS) |
+                           ((CONFIG_IRQ_SPORT3_TX - 7) << IRQ_SPORT3_TX_POS) |
+                           ((CONFIG_IRQ_EPPI1 - 7) << IRQ_EPPI1_POS) |
+                           ((CONFIG_IRQ_EPPI2 - 7) << IRQ_EPPI2_POS) |
+                           ((CONFIG_IRQ_SPI1 - 7) << IRQ_SPI1_POS));
+
+       bfin_write_SIC_IAR5(((CONFIG_IRQ_SPI2 - 7) << IRQ_SPI2_POS) |
+                           ((CONFIG_IRQ_UART1_RX - 7) << IRQ_UART1_RX_POS) |
+                           ((CONFIG_IRQ_UART1_TX - 7) << IRQ_UART1_TX_POS) |
+                           ((CONFIG_IRQ_ATAPI_RX - 7) << IRQ_ATAPI_RX_POS) |
+                           ((CONFIG_IRQ_ATAPI_TX - 7) << IRQ_ATAPI_TX_POS) |
+                           ((CONFIG_IRQ_TWI0 - 7) << IRQ_TWI0_POS) |
+                           ((CONFIG_IRQ_TWI1 - 7) << IRQ_TWI1_POS) |
+                           ((CONFIG_IRQ_CAN0_RX - 7) << IRQ_CAN0_RX_POS));
+
+       bfin_write_SIC_IAR6(((CONFIG_IRQ_CAN0_TX - 7) << IRQ_CAN0_TX_POS) |
+                           ((CONFIG_IRQ_MDMAS2 - 7) << IRQ_MDMAS2_POS) |
+                           ((CONFIG_IRQ_MDMAS3 - 7) << IRQ_MDMAS3_POS) |
+                           ((CONFIG_IRQ_MXVR_ERR - 7) << IRQ_MXVR_ERR_POS) |
+                           ((CONFIG_IRQ_MXVR_MSG - 7) << IRQ_MXVR_MSG_POS) |
+                           ((CONFIG_IRQ_MXVR_PKT - 7) << IRQ_MXVR_PKT_POS) |
+                           ((CONFIG_IRQ_EPPI1_ERR - 7) << IRQ_EPPI1_ERR_POS) |
+                           ((CONFIG_IRQ_EPPI2_ERR - 7) << IRQ_EPPI2_ERR_POS));
+
+       bfin_write_SIC_IAR7(((CONFIG_IRQ_UART3_ERR - 7) << IRQ_UART3_ERR_POS) |
+                           ((CONFIG_IRQ_HOST_ERR - 7) << IRQ_HOST_ERR_POS) |
+                           ((CONFIG_IRQ_PIXC_ERR - 7) << IRQ_PIXC_ERR_POS) |
+                           ((CONFIG_IRQ_NFC_ERR - 7) << IRQ_NFC_ERR_POS) |
+                           ((CONFIG_IRQ_ATAPI_ERR - 7) << IRQ_ATAPI_ERR_POS) |
+                           ((CONFIG_IRQ_CAN1_ERR - 7) << IRQ_CAN1_ERR_POS) |
+                           ((CONFIG_IRQ_HS_DMA_ERR - 7) << IRQ_HS_DMA_ERR_POS));
+
+       bfin_write_SIC_IAR8(((CONFIG_IRQ_PIXC_IN0 - 7) << IRQ_PIXC_IN1_POS) |
+                           ((CONFIG_IRQ_PIXC_IN1 - 7) << IRQ_PIXC_IN1_POS) |
+                           ((CONFIG_IRQ_PIXC_OUT - 7) << IRQ_PIXC_OUT_POS) |
+                           ((CONFIG_IRQ_SDH - 7) << IRQ_SDH_POS) |
+                           ((CONFIG_IRQ_CNT - 7) << IRQ_CNT_POS) |
+                           ((CONFIG_IRQ_KEY - 7) << IRQ_KEY_POS) |
+                           ((CONFIG_IRQ_CAN1_RX - 7) << IRQ_CAN1_RX_POS) |
+                           ((CONFIG_IRQ_CAN1_TX - 7) << IRQ_CAN1_TX_POS));
+
+       bfin_write_SIC_IAR9(((CONFIG_IRQ_SDH_MASK0 - 7) << IRQ_SDH_MASK0_POS) |
+                           ((CONFIG_IRQ_SDH_MASK1 - 7) << IRQ_SDH_MASK1_POS) |
+                           ((CONFIG_IRQ_USB_INT0 - 7) << IRQ_USB_INT0_POS) |
+                           ((CONFIG_IRQ_USB_INT1 - 7) << IRQ_USB_INT1_POS) |
+                           ((CONFIG_IRQ_USB_INT2 - 7) << IRQ_USB_INT2_POS) |
+                           ((CONFIG_IRQ_USB_DMA - 7) << IRQ_USB_DMA_POS) |
+                           ((CONFIG_IRQ_OTPSEC - 7) << IRQ_OTPSEC_POS));
+
+       bfin_write_SIC_IAR10(((CONFIG_IRQ_TIMER0 - 7) << IRQ_TIMER0_POS) |
+                            ((CONFIG_IRQ_TIMER1 - 7) << IRQ_TIMER1_POS));
+
+       bfin_write_SIC_IAR11(((CONFIG_IRQ_TIMER2 - 7) << IRQ_TIMER2_POS) |
+                            ((CONFIG_IRQ_TIMER3 - 7) << IRQ_TIMER3_POS) |
+                            ((CONFIG_IRQ_TIMER4 - 7) << IRQ_TIMER4_POS) |
+                            ((CONFIG_IRQ_TIMER5 - 7) << IRQ_TIMER5_POS) |
+                            ((CONFIG_IRQ_TIMER6 - 7) << IRQ_TIMER6_POS) |
+                            ((CONFIG_IRQ_TIMER7 - 7) << IRQ_TIMER7_POS) |
+                            ((CONFIG_IRQ_PINT2 - 7) << IRQ_PINT2_POS) |
+                            ((CONFIG_IRQ_PINT3 - 7) << IRQ_PINT3_POS));
+
+       SSYNC();
+}
index 57f475a5516140a5a3ae7bb9109f380f06c524ef..f39235a55783b98c9e040ba92f9848f8282037fe 100644 (file)
@@ -4,6 +4,6 @@
 
 extra-y := head.o
 
-obj-y := ints-priority.o
+obj-y := ints-priority.o dma.o
 
 obj-$(CONFIG_BF561_COREB) += coreb.o
index 3dc5c042048cec307c4cb44bc81e09238b9a0108..5b2b544529a19c49a919f0fb2e57f6b55f9c3eb3 100644 (file)
@@ -34,7 +34,7 @@
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
 #include <linux/usb_isp1362.h>
-#include <asm/irq.h>
+#include <linux/irq.h>
 #include <asm/bfin5xx_spi.h>
 
 /*
@@ -52,11 +52,11 @@ static struct mtd_partition bfin_spi_flash_partitions[] = {
                .size = 0x00020000,
                .offset = 0,
                .mask_flags = MTD_CAP_ROM
-       },{
+       }, {
                .name = "kernel",
                .size = 0xe0000,
                .offset = 0x20000
-       },{
+       }, {
                .name = "file system",
                .size = 0x700000,
                .offset = 0x00100000,
@@ -186,7 +186,7 @@ static struct resource smc91x_resources[] = {
                .start = 0x28000300,
                .end = 0x28000300 + 16,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PF0,
                .end = IRQ_PF0,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
@@ -206,11 +206,11 @@ static struct resource isp1362_hcd_resources[] = {
                .start = 0x24008000,
                .end = 0x24008000,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = 0x24008004,
                .end = 0x24008004,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PF47,
                .end = IRQ_PF47,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
@@ -241,25 +241,25 @@ static struct platform_device isp1362_hcd_device = {
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 static struct resource bfin_uart_resources[] = {
-        {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
-                .flags = IORESOURCE_MEM,
-        },
+       {
+               .start = 0xFFC00400,
+               .end = 0xFFC004FF,
+               .flags = IORESOURCE_MEM,
+       },
 };
 
 static struct platform_device bfin_uart_device = {
-        .name = "bfin-uart",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+       .name = "bfin-uart",
+       .id = 1,
+       .num_resources = ARRAY_SIZE(bfin_uart_resources),
+       .resource = bfin_uart_resources,
 };
 #endif
 
 static struct platform_device *cm_bf561_devices[] __initdata = {
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+       &bfin_uart_device,
 #endif
 
 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
index 9720b5c307ab58c82c0d5b55342b3769b959d52c..724191da20a249a8f1f66c60cfba7b190f5f6074 100644 (file)
 #include <linux/device.h>
 #include <linux/platform_device.h>
 #include <linux/spi/spi.h>
-#include <asm/irq.h>
-#include <asm/bfin5xx_spi.h>
-#include <linux/interrupt.h>
 #include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <asm/bfin5xx_spi.h>
 
 /*
  * Name the Board for the /proc/cpuinfo
@@ -45,13 +44,13 @@ char *bfin_board_name = "ADDS-BF561-EZKIT";
 
 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
 static struct resource bfin_isp1761_resources[] = {
-       [0] = {
+       {
                .name   = "isp1761-regs",
                .start  = ISP1761_BASE + 0x00000000,
                .end    = ISP1761_BASE + 0x000fffff,
                .flags  = IORESOURCE_MEM,
        },
-       [1] = {
+       {
                .start  = ISP1761_IRQ,
                .end    = ISP1761_IRQ,
                .flags  = IORESOURCE_IRQ,
@@ -71,7 +70,7 @@ static struct platform_device *bfin_isp1761_devices[] = {
 
 int __init bfin_isp1761_init(void)
 {
-       unsigned int num_devices=ARRAY_SIZE(bfin_isp1761_devices);
+       unsigned int num_devices = ARRAY_SIZE(bfin_isp1761_devices);
 
        printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
        set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
@@ -98,7 +97,7 @@ static struct resource smc91x_resources[] = {
                .start = 0x2C010300,
                .end = 0x2C010300 + 16,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
 
                .start = IRQ_PF9,
                .end = IRQ_PF9,
@@ -116,18 +115,18 @@ static struct platform_device smc91x_device = {
 
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 static struct resource bfin_uart_resources[] = {
-        {
-                .start = 0xFFC00400,
-                .end = 0xFFC004FF,
-                .flags = IORESOURCE_MEM,
-        },
+       {
+               .start = 0xFFC00400,
+               .end = 0xFFC004FF,
+               .flags = IORESOURCE_MEM,
+       },
 };
 
 static struct platform_device bfin_uart_device = {
-        .name = "bfin-uart",
-        .id = 1,
-        .num_resources = ARRAY_SIZE(bfin_uart_resources),
-        .resource = bfin_uart_resources,
+       .name = "bfin-uart",
+       .id = 1,
+       .num_resources = ARRAY_SIZE(bfin_uart_resources),
+       .resource = bfin_uart_resources,
 };
 #endif
 
@@ -176,7 +175,7 @@ static struct platform_device *ezkit_devices[] __initdata = {
        &spi_bfin_master_device,
 #endif
 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
-        &bfin_uart_device,
+       &bfin_uart_device,
 #endif
 };
 
index 585ecdd2f6a5889c2a1478bcdbc7298d69cb35a1..4dfea5da674c9acf37968a2c4a1d250756ffffe5 100644 (file)
@@ -30,7 +30,7 @@
 
 #include <linux/device.h>
 #include <linux/platform_device.h>
-#include <asm/irq.h>
+#include <linux/irq.h>
 
 char *bfin_board_name = "UNKNOWN BOARD";
 
@@ -43,11 +43,11 @@ static struct resource smc91x_resources[] = {
                .start = 0x2C010300,
                .end = 0x2C010300 + 16,
                .flags = IORESOURCE_MEM,
-       },{
+       }, {
                .start = IRQ_PROG_INTB,
                .end = IRQ_PROG_INTB,
                .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
-       },{
+       }, {
                /*
                 *  denotes the flag pin and is used directly if
                 *  CONFIG_IRQCHIP_DEMUX_GPIO is defined.
index db308c7ccabbf4dd5014b6542bf5dbb23f395c8e..c442eb23db5ea26916156362d7f38392b5d6e946 100644 (file)
@@ -14,7 +14,7 @@
 
 #include <linux/device.h>
 #include <linux/platform_device.h>
-#include <asm/irq.h>
+#include <linux/irq.h>
 
 char *bfin_board_name = "Tepla-BF561";
 
@@ -26,11 +26,11 @@ static struct resource smc91x_resources[] = {
                .start  = 0x2C000300,
                .end    = 0x2C000320,
                .flags  = IORESOURCE_MEM,
-       },{
+       }, {
                .start  = IRQ_PROG_INTB,
                .end    = IRQ_PROG_INTB,
                .flags  = IORESOURCE_IRQ|IORESOURCE_IRQ_HIGHLEVEL,
-       },{
+       }, {
                /*
                 *  denotes the flag pin and is used directly if
                 *  CONFIG_IRQCHIP_DEMUX_GPIO is defined.
index b28582fe083cc698637f130bbfa2f0716697a8fa..5d1d21b4c2a74c3528fb2701e868ae030ca637df 100644 (file)
@@ -32,8 +32,8 @@
 #include <linux/device.h>
 #include <linux/ioport.h>
 #include <linux/module.h>
+#include <linux/uaccess.h>
 #include <asm/dma.h>
-#include <asm/uaccess.h>
 
 #define MODULE_VER             "v0.1"
 
@@ -202,7 +202,7 @@ static int coreb_open(struct inode *inode, struct file *file)
        spin_unlock_irq(&coreb_lock);
        return 0;
 
     out_busy:
+ out_busy:
        spin_unlock_irq(&coreb_lock);
        return -EBUSY;
 }
@@ -365,19 +365,19 @@ int __init bf561_coreb_init(void)
        printk(KERN_INFO "BF561 Core B driver %s initialized.\n", MODULE_VER);
        return 0;
 
     release_dma_src:
+ release_dma_src:
        free_dma(CH_MEM_STREAM2_SRC);
     release_dma_dest:
+ release_dma_dest:
        free_dma(CH_MEM_STREAM2_DEST);
     release_data_a_sram:
+ release_data_a_sram:
        release_mem_region(0xff400000, 0x8000);
     release_data_b_sram:
+ release_data_b_sram:
        release_mem_region(0xff500000, 0x8000);
     release_instruction_b_sram:
+ release_instruction_b_sram:
        release_mem_region(0xff610000, 0x4000);
     release_instruction_a_sram:
+ release_instruction_a_sram:
        release_mem_region(0xff600000, 0x4000);
     exit:
+ exit:
        return -ENOMEM;
 }
 
diff --git a/arch/blackfin/mach-bf561/dma.c b/arch/blackfin/mach-bf561/dma.c
new file mode 100644 (file)
index 0000000..89c65bb
--- /dev/null
@@ -0,0 +1,131 @@
+/*
+ * File:         arch/blackfin/mach-bf561/dma.c
+ * Based on:
+ * Author:
+ *
+ * Created:
+ * Description:  This file contains the simple DMA Implementation for Blackfin
+ *
+ * Modified:
+ *               Copyright 2004-2007 Analog Devices Inc.
+ *
+ * Bugs:         Enter bugs at http://blackfin.uclinux.org/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see the file COPYING, or write
+ * to the Free Software Foundation, Inc.,
+ * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <asm/blackfin.h>
+#include <asm/dma.h>
+
+struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL] = {
+       (struct dma_register *) DMA1_0_NEXT_DESC_PTR,
+       (struct dma_register *) DMA1_1_NEXT_DESC_PTR,
+       (struct dma_register *) DMA1_2_NEXT_DESC_PTR,
+       (struct dma_register *) DMA1_3_NEXT_DESC_PTR,
+       (struct dma_register *) DMA1_4_NEXT_DESC_PTR,
+       (struct dma_register *) DMA1_5_NEXT_DESC_PTR,
+       (struct dma_register *) DMA1_6_NEXT_DESC_PTR,
+       (struct dma_register *) DMA1_7_NEXT_DESC_PTR,
+       (struct dma_register *) DMA1_8_NEXT_DESC_PTR,
+       (struct dma_register *) DMA1_9_NEXT_DESC_PTR,
+       (struct dma_register *) DMA1_10_NEXT_DESC_PTR,
+       (struct dma_register *) DMA1_11_NEXT_DESC_PTR,
+       (struct dma_register *) DMA2_0_NEXT_DESC_PTR,
+       (struct dma_register *) DMA2_1_NEXT_DESC_PTR,
+       (struct dma_register *) DMA2_2_NEXT_DESC_PTR,
+       (struct dma_register *) DMA2_3_NEXT_DESC_PTR,
+       (struct dma_register *) DMA2_4_NEXT_DESC_PTR,
+       (struct dma_register *) DMA2_5_NEXT_DESC_PTR,
+       (struct dma_register *) DMA2_6_NEXT_DESC_PTR,
+       (struct dma_register *) DMA2_7_NEXT_DESC_PTR,
+       (struct dma_register *) DMA2_8_NEXT_DESC_PTR,
+       (struct dma_register *) DMA2_9_NEXT_DESC_PTR,
+       (struct dma_register *) DMA2_10_NEXT_DESC_PTR,
+       (struct dma_register *) DMA2_11_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA1_D0_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA1_S0_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA1_D1_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA1_S1_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA2_D0_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA2_S0_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA2_D1_NEXT_DESC_PTR,
+       (struct dma_register *) MDMA2_S1_NEXT_DESC_PTR,
+       (struct dma_register *) IMDMA_D0_NEXT_DESC_PTR,
+       (struct dma_register *) IMDMA_S0_NEXT_DESC_PTR,
+       (struct dma_register *) IMDMA_D1_NEXT_DESC_PTR,
+       (struct dma_register *) IMDMA_S1_NEXT_DESC_PTR,
+};
+
+int channel2irq(unsigned int channel)
+{
+       int ret_irq = -1;
+
+       switch (channel) {
+       case CH_PPI0:
+               ret_irq = IRQ_PPI0;
+               break;
+       case CH_PPI1:
+               ret_irq = IRQ_PPI1;
+               break;
+       case CH_SPORT0_RX:
+               ret_irq = IRQ_SPORT0_RX;
+               break;
+       case CH_SPORT0_TX:
+               ret_irq = IRQ_SPORT0_TX;
+               break;
+       case CH_SPORT1_RX:
+               ret_irq = IRQ_SPORT1_RX;
+               break;
+       case CH_SPORT1_TX:
+               ret_irq = IRQ_SPORT1_TX;
+               break;
+       case CH_SPI:
+               ret_irq = IRQ_SPI;
+               break;
+       case CH_UART_RX:
+               ret_irq = IRQ_UART_RX;
+               break;
+       case CH_UART_TX:
+               ret_irq = IRQ_UART_TX;
+               break;
+
+       case CH_MEM_STREAM0_SRC:
+       case CH_MEM_STREAM0_DEST:
+               ret_irq = IRQ_MEM_DMA0;
+               break;
+       case CH_MEM_STREAM1_SRC:
+       case CH_MEM_STREAM1_DEST:
+               ret_irq = IRQ_MEM_DMA1;
+               break;
+       case CH_MEM_STREAM2_SRC:
+       case CH_MEM_STREAM2_DEST:
+               ret_irq = IRQ_MEM_DMA2;
+               break;
+       case CH_MEM_STREAM3_SRC:
+       case CH_MEM_STREAM3_DEST:
+               ret_irq = IRQ_MEM_DMA3;
+               break;
+
+       case CH_IMEM_STREAM0_SRC:
+       case CH_IMEM_STREAM0_DEST:
+               ret_irq = IRQ_IMEM_DMA0;
+               break;
+       case CH_IMEM_STREAM1_SRC:
+       case CH_IMEM_STREAM1_DEST:
+               ret_irq = IRQ_IMEM_DMA1;
+               break;
+       }
+       return ret_irq;
+}
index 31cbc75c85cfdac9507445bc873f0e158e6008a8..2f08bcb2dded5158cd0270011ebab21415390496 100644 (file)
@@ -30,6 +30,8 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 #include <asm/blackfin.h>
+#include <asm/trace.h>
+
 #if CONFIG_BFIN_KERNEL_CLOCK
 #include <asm/mach/mem_init.h>
 #endif
@@ -93,6 +95,10 @@ ENTRY(__start)
        M2 = r0;
        M3 = r0;
 
+       trace_buffer_start(p0,r0);
+       P0 = R1;
+       R0 = R1;
+
        /* Turn off the icache */
        p0.l = (IMEM_CONTROL & 0xFFFF);
        p0.h = (IMEM_CONTROL >> 16);
index 86e3b0ee93f426994498c330210e2232939b488a..09b541b0f7c20c284cb1d549e88a205b82b97d06 100644 (file)
@@ -28,8 +28,8 @@
  */
 
 #include <linux/module.h>
+#include <linux/irq.h>
 #include <asm/blackfin.h>
-#include <asm/irq.h>
 
 void program_IAR(void)
 {
index d3a49073d19615c18dae78078f6f08563893f4ee..0279ede70392fb40d0403044eff8bdd8fd487791 100644 (file)
@@ -4,9 +4,9 @@
 
 obj-y := \
        cache.o cacheinit.o cplbhdlr.o cplbmgr.o entry.o \
-       interrupt.o lock.o dpmc.o irqpanic.o
+       interrupt.o lock.o irqpanic.o
 
 obj-$(CONFIG_CPLB_INFO)          += cplbinfo.o
 obj-$(CONFIG_BFIN_SINGLE_CORE)   += ints-priority-sc.o
 obj-$(CONFIG_BFIN_DUAL_CORE)     += ints-priority-dc.o
-obj-$(CONFIG_PM)                 += pm.o
+obj-$(CONFIG_PM)                 += pm.o dpmc.o
index 7924a90d9658ef900d04aa390ec9f13a514b68fb..9d475623b7243f2069528de67cc291cda01ae9fb 100644 (file)
 
 .text
 
+#ifdef ANOMALY_05000125
 #if defined(CONFIG_BLKFIN_CACHE)
-ENTRY(_bfin_icache_init)
+ENTRY(_bfin_write_IMEM_CONTROL)
 
-       /* Initialize Instruction CPLBS */
-
-       I0.L = (ICPLB_ADDR0 & 0xFFFF);
-       I0.H = (ICPLB_ADDR0 >> 16);
-
-       I1.L = (ICPLB_DATA0 & 0xFFFF);
-       I1.H = (ICPLB_DATA0 >> 16);
-
-       I2.L = _icplb_table;
-       I2.H = _icplb_table;
-
-       r1 = -1;        /* end point comparison */
-       r3 = 15;        /* max counter */
-
-/* read entries from table */
-
-.Lread_iaddr:
-       R0 = [I2++];
-       CC = R0 == R1;
-       IF CC JUMP .Lidone;
-       [I0++] = R0;
-
-.Lread_idata:
-       R2 = [I2++];
-       [I1++] = R2;
-       R3 = R3 + R1;
-       CC = R3 == R1;
-       IF !CC JUMP .Lread_iaddr;
-
-.Lidone:
        /* Enable Instruction Cache */
        P0.l = (IMEM_CONTROL & 0xFFFF);
        P0.h = (IMEM_CONTROL >> 16);
-       R1 = [P0];
-       R0 = (IMC | ENICPLB);
-       R0 = R0 | R1;
 
        /* Anomaly 05000125 */
-       CLI R2;
+       CLI R1;
        SSYNC;          /* SSYNC required before writing to IMEM_CONTROL. */
        .align 8;
        [P0] = R0;
        SSYNC;
-       STI R2;
+       STI R1;
        RTS;
 
-ENDPROC(_bfin_icache_init)
+ENDPROC(_bfin_write_IMEM_CONTROL)
 #endif
 
 #if defined(CONFIG_BLKFIN_DCACHE)
-ENTRY(_bfin_dcache_init)
-
-       /* Initialize Data CPLBS */
-
-       I0.L = (DCPLB_ADDR0 & 0xFFFF);
-       I0.H = (DCPLB_ADDR0 >> 16);
-
-       I1.L = (DCPLB_DATA0 & 0xFFFF);
-       I1.H = (DCPLB_DATA0 >> 16);
-
-       I2.L = _dcplb_table;
-       I2.H = _dcplb_table;
-
-       R1 = -1;        /* end point comparison */
-       R3 = 15;        /* max counter */
-
-       /* read entries from table */
-.Lread_daddr:
-       R0 = [I2++];
-       cc = R0 == R1;
-       IF CC JUMP .Lddone;
-       [I0++] = R0;
-
-.Lread_ddata:
-       R2 = [I2++];
-       [I1++] = R2;
-       R3 = R3 + R1;
-       CC = R3 == R1;
-       IF !CC JUMP .Lread_daddr;
-.Lddone:
-       P0.L = (DMEM_CONTROL & 0xFFFF);
-       P0.H = (DMEM_CONTROL >> 16);
-       R1 = [P0];
-
-       R0 = DMEM_CNTR;
-
-       R0 = R0 | R1;
-       /* Anomaly 05000125 */
-       CLI R2;
+ENTRY(_bfin_write_DMEM_CONTROL)
+       CLI R1;
        SSYNC;          /* SSYNC required before writing to DMEM_CONTROL. */
        .align 8;
        [P0] = R0;
        SSYNC;
-       STI R2;
+       STI R1;
        RTS;
 
-ENDPROC(_bfin_dcache_init)
+ENDPROC(_bfin_write_DMEM_CONTROL)
+#endif
+
 #endif
diff --git