ASoC: rt5665: fix wrong register for bclk ratio control
authorBard Liao <bardliao@realtek.com>
Tue, 1 Aug 2017 02:30:53 +0000 (10:30 +0800)
committerMark Brown <broonie@kernel.org>
Tue, 1 Aug 2017 11:32:09 +0000 (12:32 +0100)
The register of setting back ratio should be RT5665_ADDA_CLK_2
instead of RT5665_ADDA_CLK_1.

Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/rt5665.c

index 370ed54d1e1590f1036a4ff4425c0462245d3360..e597c893536dd04a0b115f1c49861fc675529f56 100644 (file)
@@ -4368,12 +4368,12 @@ static int rt5665_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
                switch (dai->id) {
                case RT5665_AIF2_1:
                case RT5665_AIF2_2:
                switch (dai->id) {
                case RT5665_AIF2_1:
                case RT5665_AIF2_2:
-                       snd_soc_update_bits(codec, RT5665_ADDA_CLK_1,
+                       snd_soc_update_bits(codec, RT5665_ADDA_CLK_2,
                                RT5665_I2S_BCLK_MS2_MASK,
                                RT5665_I2S_BCLK_MS2_64);
                        break;
                case RT5665_AIF3:
                                RT5665_I2S_BCLK_MS2_MASK,
                                RT5665_I2S_BCLK_MS2_64);
                        break;
                case RT5665_AIF3:
-                       snd_soc_update_bits(codec, RT5665_ADDA_CLK_1,
+                       snd_soc_update_bits(codec, RT5665_ADDA_CLK_2,
                                RT5665_I2S_BCLK_MS3_MASK,
                                RT5665_I2S_BCLK_MS3_64);
                        break;
                                RT5665_I2S_BCLK_MS3_MASK,
                                RT5665_I2S_BCLK_MS3_64);
                        break;