ARM: dts: Configure interconnect target module for dm814x tpcc
authorTony Lindgren <tony@atomide.com>
Tue, 17 Mar 2020 16:45:59 +0000 (09:45 -0700)
committerTony Lindgren <tony@atomide.com>
Tue, 17 Mar 2020 16:48:53 +0000 (09:48 -0700)
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Let's also correct the custom node name to use generic node name dma.

Cc: Graeme Smecher <gsmecher@threespeedlogic.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/dm814x.dtsi

index be78efbda9f7e11f00b2b713da539439c2e078b7..5921b540a87a8f6f9a65b9f7fb7bb05a93a797aa 100644 (file)
                        reg = <0x47810000 0x1000>;
                };
 
-               edma: edma@49000000 {
-                       compatible = "ti,edma3-tpcc";
+               target-module@49000000 {
+                       compatible = "ti,sysc-omap4", "ti,sysc";
                        ti,hwmods = "tpcc";
-                       reg =   <0x49000000 0x10000>;
-                       reg-names = "edma3_cc";
-                       interrupts = <12 13 14>;
-                       interrupt-names = "edma3_ccint", "edma3_mperr",
-                                         "edma3_ccerrint";
-                       dma-requests = <64>;
-                       #dma-cells = <2>;
-
-                       ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
-                                  <&edma_tptc2 3>, <&edma_tptc3 0>;
-
-                       ti,edma-memcpy-channels = <20 21>;
+                       reg = <0x49000000 0x4>;
+                       reg-names = "rev";
+                       clocks = <&alwon_clkctrl DM814_TPCC_CLKCTRL 0>;
+                       clock-names = "fck";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0x49000000 0x10000>;
+
+                       edma: dma@0 {
+                               compatible = "ti,edma3-tpcc";
+                               reg = <0 0x10000>;
+                               reg-names = "edma3_cc";
+                               interrupts = <12 13 14>;
+                               interrupt-names = "edma3_ccint", "edma3_mperr",
+                                                 "edma3_ccerrint";
+                               dma-requests = <64>;
+                               #dma-cells = <2>;
+
+                               ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
+                                          <&edma_tptc2 3>, <&edma_tptc3 0>;
+
+                               ti,edma-memcpy-channels = <20 21>;
+                       };
                };
 
                edma_tptc0: tptc@49800000 {