[ARM] 4445/1: ANUBIS: Fix CPLD registers
authorBen Dooks <ben-linux@fluff.org>
Wed, 6 Jun 2007 09:01:04 +0000 (10:01 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Mon, 11 Jun 2007 08:09:34 +0000 (09:09 +0100)
Update the ANUBIS register definitions inline with the
specs and ensure they are registered correctly.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-s3c2440/mach-anubis.c
include/asm-arm/arch-s3c2410/anubis-cpld.h
include/asm-arm/arch-s3c2410/anubis-map.h

index b5d387ef37e14046968fed05c34dd8264ba9d2c8..bff7ddd06a5288e7ed764c5fcef27444142c03dc 100644 (file)
@@ -76,8 +76,8 @@ static struct map_desc anubis_iodesc[] __initdata = {
        .length         = SZ_4K,
        .type           = MT_DEVICE,
   }, {
        .length         = SZ_4K,
        .type           = MT_DEVICE,
   }, {
-       .virtual        = (u32)ANUBIS_VA_CTRL2,
-       .pfn            = __phys_to_pfn(ANUBIS_PA_CTRL2),
+       .virtual        = (u32)ANUBIS_VA_IDREG,
+       .pfn            = __phys_to_pfn(ANUBIS_PA_IDREG),
        .length         = SZ_4K,
        .type           = MT_DEVICE,
   },
        .length         = SZ_4K,
        .type           = MT_DEVICE,
   },
index dcebf6d61903b07686b808eba4e2f97a8d95ffeb..168b93fee529a322641238f0a012d158b580868c 100644 (file)
@@ -18,4 +18,8 @@
 
 #define ANUBIS_CTRL1_NANDSEL           (0x3)
 
 
 #define ANUBIS_CTRL1_NANDSEL           (0x3)
 
+/* IDREG - revision */
+
+#define ANUBIS_IDREG_REVMASK           (0x7)
+
 #endif /* __ASM_ARCH_ANUBISCPLD_H */
 #endif /* __ASM_ARCH_ANUBISCPLD_H */
index ab076de4a0d01f91a3659289bfb281a544e5952c..830d114261da8745eec077b7cc2235673d21cf3a 100644 (file)
 #define ANUBIS_VA_CTRL1            ANUBIS_IOADDR(0x00000000)    /* 0x01800000 */
 #define ANUBIS_PA_CTRL1            (ANUBIS_PA_CPLD)
 
 #define ANUBIS_VA_CTRL1            ANUBIS_IOADDR(0x00000000)    /* 0x01800000 */
 #define ANUBIS_PA_CTRL1            (ANUBIS_PA_CPLD)
 
-#define ANUBIS_VA_CTRL2            ANUBIS_IOADDR(0x00100000)    /* 0x01900000 */
-#define ANUBIS_PA_CTRL2            (ANUBIS_PA_CPLD)
-
-#define ANUBIS_VA_CTRL3            ANUBIS_IOADDR(0x00200000)    /* 0x01A00000 */
-#define ANUBIS_PA_CTRL3            (ANUBIS_PA_CPLD)
-
-#define ANUBIS_VA_CTRL4            ANUBIS_IOADDR(0x00300000)    /* 0x01B00000 */
-#define ANUBIS_PA_CTRL4            (ANUBIS_PA_CPLD)
+#define ANUBIS_VA_IDREG            ANUBIS_IOADDR(0x00300000)    /* 0x01B00000 */
+#define ANUBIS_PA_IDREG            (ANUBIS_PA_CPLD + (3<<23))
 
 #define ANUBIS_IDEPRI      ANUBIS_IOADDR(0x01000000)
 #define ANUBIS_IDEPRIAUX    ANUBIS_IOADDR(0x01100000)
 
 #define ANUBIS_IDEPRI      ANUBIS_IOADDR(0x01000000)
 #define ANUBIS_IDEPRIAUX    ANUBIS_IOADDR(0x01100000)