drm/amd/include:cleanup vega10 mmhub header files.
authorFeifei Xu <Feifei.Xu@amd.com>
Thu, 23 Nov 2017 06:30:43 +0000 (14:30 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 6 Dec 2017 17:48:20 +0000 (12:48 -0500)
Cleanup asic_reg/vega10/MMHUB folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_default.h [moved from drivers/gpu/drm/amd/include/asic_reg/vega10/MMHUB/mmhub_1_0_default.h with 100% similarity]
drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_offset.h [moved from drivers/gpu/drm/amd/include/asic_reg/vega10/MMHUB/mmhub_1_0_offset.h with 100% similarity]
drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_sh_mask.h [moved from drivers/gpu/drm/amd/include/asic_reg/vega10/MMHUB/mmhub_1_0_sh_mask.h with 100% similarity]

index bee0ea11446e5328c575e4276e5c149c4b09f653..a201efd412794fb199d9ca203a3d0bc8f991c4a5 100644 (file)
@@ -32,7 +32,7 @@
 #include "dce/dce_12_0_offset.h"
 #include "dce/dce_12_0_sh_mask.h"
 #include "vega10/vega10_enum.h"
-#include "vega10/MMHUB/mmhub_1_0_offset.h"
+#include "mmhub/mmhub_1_0_offset.h"
 #include "athub/athub_1_0_offset.h"
 
 #include "soc15_common.h"
index 04e9527f5bce198d1fb0f808b354aade02f2f558..d2268575b0987824e0202331dde8ca80c224f1fa 100644 (file)
@@ -24,9 +24,9 @@
 #include "mmhub_v1_0.h"
 
 #include "vega10/soc15ip.h"
-#include "vega10/MMHUB/mmhub_1_0_offset.h"
-#include "vega10/MMHUB/mmhub_1_0_sh_mask.h"
-#include "vega10/MMHUB/mmhub_1_0_default.h"
+#include "mmhub/mmhub_1_0_offset.h"
+#include "mmhub/mmhub_1_0_sh_mask.h"
+#include "mmhub/mmhub_1_0_default.h"
 #include "athub/athub_1_0_offset.h"
 #include "athub/athub_1_0_sh_mask.h"
 #include "vega10/vega10_enum.h"
index 6d14ea62d5c102ee071f84815e9278c000db6cf3..67b34914679f73af7be6d21d0e875b000e4474f1 100644 (file)
@@ -32,8 +32,8 @@
 #include "sdma0/sdma0_4_0_sh_mask.h"
 #include "sdma1/sdma1_4_0_offset.h"
 #include "sdma1/sdma1_4_0_sh_mask.h"
-#include "vega10/MMHUB/mmhub_1_0_offset.h"
-#include "vega10/MMHUB/mmhub_1_0_sh_mask.h"
+#include "mmhub/mmhub_1_0_offset.h"
+#include "mmhub/mmhub_1_0_sh_mask.h"
 #include "hdp/hdp_4_0_offset.h"
 #include "raven1/SDMA0/sdma0_4_1_default.h"
 
index c122e95efe7d09a8f06ab1bcfc834febf3bd9dcf..19beff3505fcdca80c446ceb0baf77b3e27a0604 100644 (file)
@@ -37,8 +37,8 @@
 #include "vce/vce_4_0_sh_mask.h"
 #include "vega10/NBIF/nbif_6_1_offset.h"
 #include "hdp/hdp_4_0_offset.h"
-#include "vega10/MMHUB/mmhub_1_0_offset.h"
-#include "vega10/MMHUB/mmhub_1_0_sh_mask.h"
+#include "mmhub/mmhub_1_0_offset.h"
+#include "mmhub/mmhub_1_0_sh_mask.h"
 
 static void uvd_v7_0_set_ring_funcs(struct amdgpu_device *adev);
 static void uvd_v7_0_set_enc_ring_funcs(struct amdgpu_device *adev);
index 1b28c91506eb4aba55f6594ed8de02533ff744a3..a6bb51b1322c1a6f69f121b0e39ab1b5bda4f43f 100644 (file)
@@ -36,8 +36,8 @@
 #include "vce/vce_4_0_offset.h"
 #include "vce/vce_4_0_default.h"
 #include "vce/vce_4_0_sh_mask.h"
-#include "vega10/MMHUB/mmhub_1_0_offset.h"
-#include "vega10/MMHUB/mmhub_1_0_sh_mask.h"
+#include "mmhub/mmhub_1_0_offset.h"
+#include "mmhub/mmhub_1_0_sh_mask.h"
 
 #define VCE_STATUS_VCPU_REPORT_FW_LOADED_MASK  0x02