arm64: defconfig: Enable core Qualcomm SDM845 options
authorBjorn Andersson <bjorn.andersson@linaro.org>
Fri, 2 Nov 2018 21:53:03 +0000 (14:53 -0700)
committerAndy Gross <andy.gross@linaro.org>
Fri, 30 Nov 2018 01:50:44 +0000 (19:50 -0600)
Enable a few core config options to be able to boot SDM845 MTP.

The GCC, PINCTRL and GENI options are required to be able to boot to a
console. Several clocks from GCC are parented by the "bi_tcxo" clock
from the RPMH clock driver, so enable this to save others the time to
debug the missing parent clocks later. RPMH depends on the COMMAND_DB.
While we're enabling the others let's do RPMH regulators as well, as
everything beyond this point depends on that.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
arch/arm64/configs/defconfig

index 09732a9b46bbd8a89ad9a6cf154f33293b17d190..26078ce35730601af254d929d30dc58ee1d066e5 100644 (file)
@@ -303,6 +303,8 @@ CONFIG_SERIAL_TEGRA=y
 CONFIG_SERIAL_SH_SCI=y
 CONFIG_SERIAL_MSM=y
 CONFIG_SERIAL_MSM_CONSOLE=y
+CONFIG_SERIAL_QCOM_GENI=y
+CONFIG_SERIAL_QCOM_GENI_CONSOLE=y
 CONFIG_SERIAL_XILINX_PS_UART=y
 CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
 CONFIG_SERIAL_MVEBU_UART=y
@@ -351,6 +353,7 @@ CONFIG_PINCTRL_MSM8996=y
 CONFIG_PINCTRL_QCS404=y
 CONFIG_PINCTRL_QDF2XXX=y
 CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
+CONFIG_PINCTRL_SDM845=y
 CONFIG_PINCTRL_MT7622=y
 CONFIG_GPIO_DWAPB=y
 CONFIG_GPIO_MB86S7X=y
@@ -415,6 +418,7 @@ CONFIG_REGULATOR_HI6421V530=y
 CONFIG_REGULATOR_HI655X=y
 CONFIG_REGULATOR_MAX77620=y
 CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_QCOM_RPMH=y
 CONFIG_REGULATOR_QCOM_SMD_RPM=y
 CONFIG_REGULATOR_QCOM_SPMI=y
 CONFIG_REGULATOR_RK808=y
@@ -597,11 +601,13 @@ CONFIG_COMMON_CLK_PWM=y
 CONFIG_TI_SCI_CLK=y
 CONFIG_COMMON_CLK_QCOM=y
 CONFIG_QCOM_CLK_SMD_RPM=y
+CONFIG_QCOM_CLK_RPMH=y
 CONFIG_IPQ_GCC_8074=y
 CONFIG_MSM_GCC_8916=y
 CONFIG_MSM_GCC_8994=y
 CONFIG_MSM_MMCC_8996=y
 CONFIG_QCS_GCC_404=y
+CONFIG_SDM_GCC_845=y
 CONFIG_HWSPINLOCK=y
 CONFIG_HWSPINLOCK_QCOM=y
 CONFIG_ARM_MHU=y
@@ -623,6 +629,9 @@ CONFIG_RPMSG_QCOM_GLINK_SMEM=m
 CONFIG_RPMSG_QCOM_SMD=y
 CONFIG_RASPBERRYPI_POWER=y
 CONFIG_QCOM_GLINK_SSR=m
+CONFIG_QCOM_COMMAND_DB=y
+CONFIG_QCOM_GENI_SE=y
+CONFIG_QCOM_RPMH=y
 CONFIG_QCOM_SMEM=y
 CONFIG_QCOM_SMD_RPM=y
 CONFIG_QCOM_SMP2P=y