Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
authorLinus Torvalds <torvalds@linux-foundation.org>
Sat, 26 Jan 2008 01:15:23 +0000 (17:15 -0800)
committerLinus Torvalds <torvalds@linux-foundation.org>
Sat, 26 Jan 2008 01:15:23 +0000 (17:15 -0800)
* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
  [CRYPTO] hifn795x: Disallow built-in hifn795x when HW_RANDOM is m

575 files changed:
Documentation/DocBook/videobook.tmpl
Documentation/RCU/RTFP.txt
Documentation/RCU/rcu.txt
Documentation/RCU/torture.txt
Documentation/cpu-hotplug.txt
Documentation/dvb/bt8xx.txt
Documentation/feature-removal-schedule.txt
Documentation/filesystems/ocfs2.txt
Documentation/ioctl-number.txt
Documentation/video4linux/CARDLIST.cx23885
Documentation/video4linux/CARDLIST.cx88
Documentation/video4linux/CARDLIST.em28xx
Documentation/video4linux/CARDLIST.ivtv
Documentation/video4linux/CARDLIST.saa7134
Documentation/video4linux/CARDLIST.tuner
Documentation/video4linux/CARDLIST.usbvision
Documentation/video4linux/extract_xc3028.pl [new file with mode: 0644]
Documentation/video4linux/sn9c102.txt
MAINTAINERS
arch/arm/kernel/time.c
arch/ia64/kernel/setup.c
arch/ia64/kernel/time.c
arch/ia64/sn/kernel/setup.c
arch/mips/kernel/mips-mt-fpaff.c
arch/powerpc/platforms/pseries/hotplug-cpu.c
arch/powerpc/platforms/pseries/rtasd.c
arch/x86/kernel/cpu/mtrr/main.c
arch/x86/kernel/entry_64.S
arch/x86/kernel/microcode.c
arch/x86/kernel/signal_32.c
arch/x86/kernel/signal_64.c
arch/x86/kernel/stacktrace.c
drivers/ata/Kconfig
drivers/ata/Makefile
drivers/ata/ahci.c
drivers/ata/ata_generic.c
drivers/ata/ata_piix.c
drivers/ata/libata-acpi.c
drivers/ata/libata-core.c
drivers/ata/libata-eh.c
drivers/ata/libata-scsi.c
drivers/ata/libata-sff.c
drivers/ata/libata.h
drivers/ata/pata_acpi.c
drivers/ata/pata_ali.c
drivers/ata/pata_amd.c
drivers/ata/pata_bf54x.c
drivers/ata/pata_cs5520.c
drivers/ata/pata_hpt37x.c
drivers/ata/pata_icside.c
drivers/ata/pata_it821x.c
drivers/ata/pata_ixp4xx_cf.c
drivers/ata/pata_legacy.c
drivers/ata/pata_mpc52xx.c
drivers/ata/pata_ninja32.c [new file with mode: 0644]
drivers/ata/pata_pcmcia.c
drivers/ata/pata_pdc2027x.c
drivers/ata/pata_pdc202xx_old.c
drivers/ata/pata_qdi.c
drivers/ata/pata_scc.c
drivers/ata/pata_serverworks.c
drivers/ata/pata_via.c
drivers/ata/pata_winbond.c
drivers/ata/pdc_adma.c
drivers/ata/sata_fsl.c
drivers/ata/sata_inic162x.c
drivers/ata/sata_mv.c
drivers/ata/sata_nv.c
drivers/ata/sata_promise.c
drivers/ata/sata_promise.h
drivers/ata/sata_qstor.c
drivers/ata/sata_sil.c
drivers/ata/sata_sil24.c
drivers/ata/sata_sx4.c
drivers/ide/Kconfig
drivers/ide/arm/icside.c
drivers/ide/cris/ide-cris.c
drivers/ide/ide-acpi.c
drivers/ide/ide-cd.c
drivers/ide/ide-disk.c
drivers/ide/ide-dma.c
drivers/ide/ide-floppy.c
drivers/ide/ide-io.c
drivers/ide/ide-iops.c
drivers/ide/ide-lib.c
drivers/ide/ide-probe.c
drivers/ide/ide-tape.c
drivers/ide/ide-taskfile.c
drivers/ide/ide.c
drivers/ide/mips/au1xxx-ide.c
drivers/ide/pci/aec62xx.c
drivers/ide/pci/alim15x3.c
drivers/ide/pci/amd74xx.c
drivers/ide/pci/atiixp.c
drivers/ide/pci/cmd64x.c
drivers/ide/pci/cs5520.c
drivers/ide/pci/cs5530.c
drivers/ide/pci/cs5535.c
drivers/ide/pci/hpt34x.c
drivers/ide/pci/hpt366.c
drivers/ide/pci/it8213.c
drivers/ide/pci/pdc202xx_new.c
drivers/ide/pci/pdc202xx_old.c
drivers/ide/pci/piix.c
drivers/ide/pci/sc1200.c
drivers/ide/pci/scc_pata.c
drivers/ide/pci/serverworks.c
drivers/ide/pci/sgiioc4.c
drivers/ide/pci/siimage.c
drivers/ide/pci/sis5513.c
drivers/ide/pci/sl82c105.c
drivers/ide/pci/slc90e66.c
drivers/ide/pci/tc86c001.c
drivers/ide/pci/triflex.c
drivers/ide/pci/via82cxxx.c
drivers/ide/ppc/pmac.c
drivers/infiniband/core/cm.c
drivers/infiniband/core/cma.c
drivers/infiniband/core/fmr_pool.c
drivers/infiniband/core/mad.c
drivers/infiniband/core/mad_priv.h
drivers/infiniband/core/mad_rmpp.c
drivers/infiniband/core/multicast.c
drivers/infiniband/core/smi.h
drivers/infiniband/core/ucm.c
drivers/infiniband/core/ucma.c
drivers/infiniband/core/user_mad.c
drivers/infiniband/hw/cxgb3/cxio_hal.c
drivers/infiniband/hw/cxgb3/cxio_wr.h
drivers/infiniband/hw/cxgb3/iwch_cm.c
drivers/infiniband/hw/cxgb3/iwch_mem.c
drivers/infiniband/hw/cxgb3/iwch_provider.c
drivers/infiniband/hw/cxgb3/iwch_qp.c
drivers/infiniband/hw/ehca/ehca_av.c
drivers/infiniband/hw/ehca/ehca_classes.h
drivers/infiniband/hw/ehca/ehca_cq.c
drivers/infiniband/hw/ehca/ehca_irq.c
drivers/infiniband/hw/ehca/ehca_iverbs.h
drivers/infiniband/hw/ehca/ehca_main.c
drivers/infiniband/hw/ehca/ehca_qp.c
drivers/infiniband/hw/ehca/ehca_reqs.c
drivers/infiniband/hw/ehca/ehca_sqp.c
drivers/infiniband/hw/ipath/ipath_common.h
drivers/infiniband/hw/ipath/ipath_cq.c
drivers/infiniband/hw/ipath/ipath_debug.h
drivers/infiniband/hw/ipath/ipath_driver.c
drivers/infiniband/hw/ipath/ipath_eeprom.c
drivers/infiniband/hw/ipath/ipath_file_ops.c
drivers/infiniband/hw/ipath/ipath_fs.c
drivers/infiniband/hw/ipath/ipath_iba6110.c
drivers/infiniband/hw/ipath/ipath_iba6120.c
drivers/infiniband/hw/ipath/ipath_init_chip.c
drivers/infiniband/hw/ipath/ipath_intr.c
drivers/infiniband/hw/ipath/ipath_kernel.h
drivers/infiniband/hw/ipath/ipath_keys.c
drivers/infiniband/hw/ipath/ipath_mad.c
drivers/infiniband/hw/ipath/ipath_qp.c
drivers/infiniband/hw/ipath/ipath_rc.c
drivers/infiniband/hw/ipath/ipath_registers.h
drivers/infiniband/hw/ipath/ipath_ruc.c
drivers/infiniband/hw/ipath/ipath_srq.c
drivers/infiniband/hw/ipath/ipath_stats.c
drivers/infiniband/hw/ipath/ipath_sysfs.c
drivers/infiniband/hw/ipath/ipath_ud.c
drivers/infiniband/hw/ipath/ipath_verbs.c
drivers/infiniband/hw/ipath/ipath_verbs.h
drivers/infiniband/hw/mlx4/cq.c
drivers/infiniband/hw/mthca/mthca_dev.h
drivers/infiniband/hw/mthca/mthca_eq.c
drivers/infiniband/hw/mthca/mthca_main.c
drivers/infiniband/ulp/ipoib/ipoib.h
drivers/infiniband/ulp/ipoib/ipoib_cm.c
drivers/infiniband/ulp/ipoib/ipoib_fs.c
drivers/infiniband/ulp/ipoib/ipoib_ib.c
drivers/infiniband/ulp/ipoib/ipoib_main.c
drivers/infiniband/ulp/ipoib/ipoib_multicast.c
drivers/infiniband/ulp/ipoib/ipoib_verbs.c
drivers/infiniband/ulp/iser/Kconfig
drivers/infiniband/ulp/iser/iscsi_iser.c
drivers/infiniband/ulp/iser/iser_initiator.c
drivers/infiniband/ulp/iser/iser_verbs.c
drivers/infiniband/ulp/srp/ib_srp.c
drivers/infiniband/ulp/srp/ib_srp.h
drivers/lguest/x86/core.c
drivers/media/Kconfig
drivers/media/common/Kconfig
drivers/media/common/ir-functions.c
drivers/media/common/ir-keymaps.c
drivers/media/common/saa7146_fops.c
drivers/media/common/saa7146_vbi.c
drivers/media/common/saa7146_video.c
drivers/media/dvb/b2c2/flexcop.c
drivers/media/dvb/bt8xx/bt878.c
drivers/media/dvb/bt8xx/bt878.h
drivers/media/dvb/bt8xx/dst.c
drivers/media/dvb/bt8xx/dst_common.h
drivers/media/dvb/dvb-core/dvb_frontend.c
drivers/media/dvb/dvb-core/dvb_frontend.h
drivers/media/dvb/dvb-core/dvb_ringbuffer.c
drivers/media/dvb/dvb-usb/af9005.c
drivers/media/dvb/dvb-usb/au6610.c
drivers/media/dvb/dvb-usb/cxusb.c
drivers/media/dvb/dvb-usb/cxusb.h
drivers/media/dvb/dvb-usb/dib0700_core.c
drivers/media/dvb/dvb-usb/dib0700_devices.c
drivers/media/dvb/dvb-usb/digitv.c
drivers/media/dvb/dvb-usb/digitv.h
drivers/media/dvb/dvb-usb/dvb-usb-ids.h
drivers/media/dvb/dvb-usb/gl861.c
drivers/media/dvb/dvb-usb/gp8psk.c
drivers/media/dvb/dvb-usb/gp8psk.h
drivers/media/dvb/dvb-usb/opera1.c
drivers/media/dvb/dvb-usb/opera1.h [deleted file]
drivers/media/dvb/dvb-usb/vp702x.c
drivers/media/dvb/dvb-usb/vp702x.h
drivers/media/dvb/dvb-usb/vp7045.c
drivers/media/dvb/dvb-usb/vp7045.h
drivers/media/dvb/frontends/Kconfig
drivers/media/dvb/frontends/Makefile
drivers/media/dvb/frontends/dib0070.c
drivers/media/dvb/frontends/dib3000mc.c
drivers/media/dvb/frontends/dib7000m.c
drivers/media/dvb/frontends/dib7000p.c
drivers/media/dvb/frontends/dibx000_common.h
drivers/media/dvb/frontends/mt2266.c
drivers/media/dvb/frontends/mt312.c
drivers/media/dvb/frontends/mt312.h
drivers/media/dvb/frontends/mt352.c
drivers/media/dvb/frontends/or51132.c
drivers/media/dvb/frontends/or51211.c
drivers/media/dvb/frontends/s5h1409.c
drivers/media/dvb/frontends/s5h1409.h
drivers/media/dvb/frontends/tda18271-common.c [new file with mode: 0644]
drivers/media/dvb/frontends/tda18271-fe.c [new file with mode: 0644]
drivers/media/dvb/frontends/tda18271-priv.h [new file with mode: 0644]
drivers/media/dvb/frontends/tda18271-tables.c [new file with mode: 0644]
drivers/media/dvb/frontends/tda18271.h [new file with mode: 0644]
drivers/media/dvb/frontends/tda827x.c
drivers/media/dvb/frontends/tda827x.h
drivers/media/dvb/frontends/ves1820.c
drivers/media/dvb/frontends/xc5000.c [new file with mode: 0644]
drivers/media/dvb/frontends/xc5000.h [new file with mode: 0644]
drivers/media/dvb/frontends/xc5000_priv.h [new file with mode: 0644]
drivers/media/dvb/frontends/zl10353.c
drivers/media/dvb/frontends/zl10353.h
drivers/media/dvb/frontends/zl10353_priv.h
drivers/media/dvb/ttpci/Kconfig
drivers/media/dvb/ttpci/Makefile
drivers/media/dvb/ttpci/av7110.c
drivers/media/dvb/ttpci/av7110.h
drivers/media/dvb/ttpci/av7110_av.c
drivers/media/dvb/ttpci/av7110_av.h
drivers/media/dvb/ttpci/av7110_v4l.c
drivers/media/radio/Kconfig
drivers/media/radio/Makefile
drivers/media/radio/dsbr100.c
drivers/media/radio/radio-gemtek.c
drivers/media/radio/radio-maestro.c
drivers/media/radio/radio-sf16fmi.c
drivers/media/radio/radio-sf16fmr2.c
drivers/media/radio/radio-si470x.c [new file with mode: 0644]
drivers/media/video/Kconfig
drivers/media/video/Makefile
drivers/media/video/bt8xx/Kconfig
drivers/media/video/bt8xx/Makefile
drivers/media/video/bt8xx/bttv-audio-hook.c [new file with mode: 0644]
drivers/media/video/bt8xx/bttv-audio-hook.h [new file with mode: 0644]
drivers/media/video/bt8xx/bttv-cards.c
drivers/media/video/bt8xx/bttv-driver.c
drivers/media/video/bt8xx/bttv-input.c
drivers/media/video/bt8xx/bttv-risc.c
drivers/media/video/bt8xx/bttv-vbi.c
drivers/media/video/bt8xx/bttv.h
drivers/media/video/bt8xx/bttvp.h
drivers/media/video/bw-qcam.c
drivers/media/video/cs5345.c [new file with mode: 0644]
drivers/media/video/cs53l32a.c
drivers/media/video/cx2341x.c
drivers/media/video/cx23885/Kconfig
drivers/media/video/cx23885/Makefile
drivers/media/video/cx23885/cx23885-cards.c
drivers/media/video/cx23885/cx23885-core.c
drivers/media/video/cx23885/cx23885-dvb.c
drivers/media/video/cx23885/cx23885-i2c.c
drivers/media/video/cx23885/cx23885-reg.h
drivers/media/video/cx23885/cx23885-vbi.c [new file with mode: 0644]
drivers/media/video/cx23885/cx23885-video.c [new file with mode: 0644]
drivers/media/video/cx23885/cx23885.h
drivers/media/video/cx25840/cx25840-audio.c
drivers/media/video/cx25840/cx25840-core.c
drivers/media/video/cx25840/cx25840-core.h
drivers/media/video/cx25840/cx25840-firmware.c
drivers/media/video/cx25840/cx25840-vbi.c
drivers/media/video/cx88/Kconfig
drivers/media/video/cx88/cx88-alsa.c
drivers/media/video/cx88/cx88-blackbird.c
drivers/media/video/cx88/cx88-cards.c
drivers/media/video/cx88/cx88-core.c
drivers/media/video/cx88/cx88-dvb.c
drivers/media/video/cx88/cx88-i2c.c
drivers/media/video/cx88/cx88-input.c
drivers/media/video/cx88/cx88-mpeg.c
drivers/media/video/cx88/cx88-vbi.c
drivers/media/video/cx88/cx88-video.c
drivers/media/video/cx88/cx88.h
drivers/media/video/em28xx/Kconfig
drivers/media/video/em28xx/Makefile
drivers/media/video/em28xx/em28xx-audio.c [new file with mode: 0644]
drivers/media/video/em28xx/em28xx-cards.c
drivers/media/video/em28xx/em28xx-core.c
drivers/media/video/em28xx/em28xx-i2c.c
drivers/media/video/em28xx/em28xx-input.c
drivers/media/video/em28xx/em28xx-video.c
drivers/media/video/em28xx/em28xx.h
drivers/media/video/et61x251/et61x251_core.c
drivers/media/video/et61x251/et61x251_sensor.h
drivers/media/video/ir-kbd-i2c.c
drivers/media/video/ivtv/Kconfig
drivers/media/video/ivtv/Makefile
drivers/media/video/ivtv/ivtv-cards.c
drivers/media/video/ivtv/ivtv-cards.h
drivers/media/video/ivtv/ivtv-driver.c
drivers/media/video/ivtv/ivtv-driver.h
drivers/media/video/ivtv/ivtv-fileops.c
drivers/media/video/ivtv/ivtv-gpio.c
drivers/media/video/ivtv/ivtv-i2c.c
drivers/media/video/ivtv/ivtv-i2c.h
drivers/media/video/ivtv/ivtv-ioctl.c
drivers/media/video/ivtv/ivtv-irq.c
drivers/media/video/ivtv/ivtv-mailbox.c
drivers/media/video/ivtv/ivtv-mailbox.h
drivers/media/video/ivtv/ivtv-routing.c
drivers/media/video/ivtv/ivtv-streams.c
drivers/media/video/ivtv/ivtv-version.h
drivers/media/video/ivtv/ivtv-yuv.c
drivers/media/video/ivtv/ivtv-yuv.h
drivers/media/video/ivtv/ivtvfb.c
drivers/media/video/m52790.c [new file with mode: 0644]
drivers/media/video/meye.c
drivers/media/video/msp3400-driver.c
drivers/media/video/msp3400-kthreads.c
drivers/media/video/mt20xx.c
drivers/media/video/pvrusb2/Kconfig
drivers/media/video/pvrusb2/Makefile
drivers/media/video/pvrusb2/pvrusb2-audio.c
drivers/media/video/pvrusb2/pvrusb2-context.c
drivers/media/video/pvrusb2/pvrusb2-context.h
drivers/media/video/pvrusb2/pvrusb2-cx2584x-v4l.c
drivers/media/video/pvrusb2/pvrusb2-debug.h
drivers/media/video/pvrusb2/pvrusb2-debugifc.c
drivers/media/video/pvrusb2/pvrusb2-devattr.c [new file with mode: 0644]
drivers/media/video/pvrusb2/pvrusb2-devattr.h [new file with mode: 0644]
drivers/media/video/pvrusb2/pvrusb2-eeprom.c
drivers/media/video/pvrusb2/pvrusb2-encoder.c
drivers/media/video/pvrusb2/pvrusb2-encoder.h
drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h
drivers/media/video/pvrusb2/pvrusb2-hdw.c
drivers/media/video/pvrusb2/pvrusb2-hdw.h
drivers/media/video/pvrusb2/pvrusb2-i2c-core.c
drivers/media/video/pvrusb2/pvrusb2-main.c
drivers/media/video/pvrusb2/pvrusb2-std.c
drivers/media/video/pvrusb2/pvrusb2-sysfs.c
drivers/media/video/pvrusb2/pvrusb2-v4l2.c
drivers/media/video/pvrusb2/pvrusb2-video-v4l.c
drivers/media/video/saa7115.c
drivers/media/video/saa7127.c
drivers/media/video/saa7134/Kconfig
drivers/media/video/saa7134/Makefile
drivers/media/video/saa7134/saa7134-alsa.c
drivers/media/video/saa7134/saa7134-cards.c
drivers/media/video/saa7134/saa7134-core.c
drivers/media/video/saa7134/saa7134-dvb.c
drivers/media/video/saa7134/saa7134-empress.c
drivers/media/video/saa7134/saa7134-i2c.c
drivers/media/video/saa7134/saa7134-input.c
drivers/media/video/saa7134/saa7134-oss.c [deleted file]
drivers/media/video/saa7134/saa7134-ts.c
drivers/media/video/saa7134/saa7134-tvaudio.c
drivers/media/video/saa7134/saa7134-vbi.c
drivers/media/video/saa7134/saa7134-video.c
drivers/media/video/saa7134/saa7134.h
drivers/media/video/sn9c102/Makefile
drivers/media/video/sn9c102/sn9c102_core.c
drivers/media/video/sn9c102/sn9c102_devtable.h
drivers/media/video/sn9c102/sn9c102_mt9v111.c [new file with mode: 0644]
drivers/media/video/stk-sensor.c [new file with mode: 0644]
drivers/media/video/stk-webcam.c [new file with mode: 0644]
drivers/media/video/stk-webcam.h [new file with mode: 0644]
drivers/media/video/tda7432.c
drivers/media/video/tda8290.c
drivers/media/video/tda8290.h
drivers/media/video/tda9875.c
drivers/media/video/tda9887.c
drivers/media/video/tda9887.h [new file with mode: 0644]
drivers/media/video/tea5761.c
drivers/media/video/tea5767.c
drivers/media/video/tea5767.h
drivers/media/video/tlv320aic23b.c
drivers/media/video/tuner-core.c
drivers/media/video/tuner-driver.h [deleted file]
drivers/media/video/tuner-i2c.h
drivers/media/video/tuner-simple.c
drivers/media/video/tuner-types.c
drivers/media/video/tuner-xc2028-types.h [new file with mode: 0644]
drivers/media/video/tuner-xc2028.c [new file with mode: 0644]
drivers/media/video/tuner-xc2028.h [new file with mode: 0644]
drivers/media/video/tvaudio.c
drivers/media/video/tveeprom.c
drivers/media/video/upd64031a.c
drivers/media/video/upd64083.c
drivers/media/video/usbvision/usbvision-cards.c
drivers/media/video/usbvision/usbvision-cards.h
drivers/media/video/usbvision/usbvision-core.c
drivers/media/video/usbvision/usbvision-video.c
drivers/media/video/usbvision/usbvision.h
drivers/media/video/v4l2-common.c
drivers/media/video/v4l2-int-device.c
drivers/media/video/videobuf-core.c
drivers/media/video/videobuf-dma-sg.c
drivers/media/video/videobuf-dvb.c
drivers/media/video/videobuf-vmalloc.c
drivers/media/video/videodev.c
drivers/media/video/vivi.c
drivers/media/video/vp27smpx.c
drivers/media/video/wm8739.c
drivers/media/video/wm8775.c
drivers/media/video/zr364xx.c
drivers/net/mlx4/fw.c
drivers/s390/char/sclp_config.c
drivers/scsi/ide-scsi.c
drivers/scsi/ipr.c
drivers/scsi/libsas/sas_ata.c
fs/Kconfig
fs/configfs/dir.c
fs/configfs/file.c
fs/ocfs2/Makefile
fs/ocfs2/alloc.c
fs/ocfs2/aops.c
fs/ocfs2/buffer_head_io.c
fs/ocfs2/buffer_head_io.h
fs/ocfs2/cluster/heartbeat.h
fs/ocfs2/cluster/tcp.h
fs/ocfs2/cluster/tcp_internal.h
fs/ocfs2/cluster/ver.c
fs/ocfs2/dcache.c
fs/ocfs2/dir.c
fs/ocfs2/dlm/dlmfsver.c
fs/ocfs2/dlm/dlmrecovery.c
fs/ocfs2/dlm/dlmver.c
fs/ocfs2/dlmglue.c
fs/ocfs2/dlmglue.h
fs/ocfs2/endian.h
fs/ocfs2/export.c
fs/ocfs2/file.c
fs/ocfs2/file.h
fs/ocfs2/heartbeat.c
fs/ocfs2/heartbeat.h
fs/ocfs2/inode.c
fs/ocfs2/inode.h
fs/ocfs2/ioctl.c
fs/ocfs2/journal.c
fs/ocfs2/journal.h
fs/ocfs2/localalloc.c
fs/ocfs2/locks.c [new file with mode: 0644]
fs/ocfs2/locks.h [moved from fs/ocfs2/vote.h with 54% similarity]
fs/ocfs2/mmap.c
fs/ocfs2/namei.c
fs/ocfs2/ocfs2.h
fs/ocfs2/ocfs2_fs.h
fs/ocfs2/ocfs2_lockid.h
fs/ocfs2/resize.c [new file with mode: 0644]
fs/ocfs2/resize.h [new file with mode: 0644]
fs/ocfs2/slot_map.c
fs/ocfs2/slot_map.h
fs/ocfs2/suballoc.c
fs/ocfs2/suballoc.h
fs/ocfs2/super.c
fs/ocfs2/sysfile.c
fs/ocfs2/ver.c
fs/ocfs2/vote.c [deleted file]
fs/proc/base.c
include/asm-cris/arch-v10/ide.h
include/asm-cris/arch-v32/ide.h
include/asm-frv/ide.h
include/asm-generic/resource.h
include/asm-powerpc/ide.h
include/asm-x86/thread_info_32.h
include/asm-x86/thread_info_64.h
include/linux/Kbuild
include/linux/ata.h
include/linux/blkdev.h
include/linux/cdrom.h
include/linux/cpu.h
include/linux/debug_locks.h
include/linux/dlm.h
include/linux/dlmconstants.h [new file with mode: 0644]
include/linux/futex.h
include/linux/hardirq.h
include/linux/hdreg.h
include/linux/hrtimer.h
include/linux/i2c-id.h
include/linux/ide.h
include/linux/init_task.h
include/linux/interrupt.h
include/linux/jiffies.h
include/linux/kernel.h
include/linux/latencytop.h [new file with mode: 0644]
include/linux/libata.h
include/linux/notifier.h
include/linux/pci_ids.h
include/linux/rcuclassic.h [new file with mode: 0644]
include/linux/rcupdate.h
include/linux/rcupreempt.h [new file with mode: 0644]
include/linux/rcupreempt_trace.h [new file with mode: 0644]
include/linux/sched.h
include/linux/smp_lock.h
include/linux/stacktrace.h
include/linux/topology.h
include/media/cs5345.h [new file with mode: 0644]
include/media/cx2341x.h
include/media/cx25840.h
include/media/ir-common.h
include/media/m52790.h [new file with mode: 0644]
include/media/saa7146_vv.h
include/media/tuner.h
include/media/v4l2-chip-ident.h
include/media/v4l2-common.h
include/media/v4l2-i2c-drv-legacy.h [new file with mode: 0644]
include/media/v4l2-i2c-drv.h [new file with mode: 0644]
include/media/v4l2-int-device.h
include/media/videobuf-core.h
include/net/if_inet6.h
include/net/ip.h
include/rdma/ib_mad.h
include/rdma/rdma_user_cm.h
init/Kconfig
init/main.c
kernel/Kconfig.hz
kernel/Kconfig.preempt
kernel/Makefile
kernel/cpu.c
kernel/cpuset.c
kernel/fork.c
kernel/hrtimer.c
kernel/kthread.c
kernel/latencytop.c [new file with mode: 0644]
kernel/lockdep.c
kernel/module.c
kernel/posix-cpu-timers.c
kernel/printk.c
kernel/profile.c
kernel/rcuclassic.c [new file with mode: 0644]
kernel/rcupdate.c
kernel/rcupreempt.c [new file with mode: 0644]
kernel/rcupreempt_trace.c [new file with mode: 0644]
kernel/rcutorture.c
kernel/sched.c
kernel/sched_debug.c
kernel/sched_fair.c
kernel/sched_idletask.c
kernel/sched_rt.c
kernel/softlockup.c
kernel/stop_machine.c
kernel/sysctl.c
kernel/time/tick-sched.c
kernel/timer.c
kernel/user.c
kernel/workqueue.c
lib/Kconfig.debug
lib/kernel_lock.c
mm/oom_kill.c
mm/slab.c
net/core/flow.c
net/ipv4/arp.c
net/ipv6/ndisc.c

index b629da33951d3945f619bf900862c163c43e849e..b3d93ee27693057e5ab5555049a0d9500e92b634 100644 (file)
@@ -96,7 +96,6 @@ static struct video_device my_radio
 {
         "My radio",
         VID_TYPE_TUNER,
-        VID_HARDWARE_MYRADIO,
         radio_open.
         radio_close,
         NULL,                /* no read */
@@ -118,13 +117,6 @@ static struct video_device my_radio
         indicates that the device can be tuned. Clearly our radio is going to have some
         way to change channel so it is tuneable.
   </para>
-  <para>
-        The VID_HARDWARE_ types are unique to each device. Numbers are assigned by
-        <email>alan@redhat.com</email> when device drivers are going to be released. Until then you
-        can pull a suitably large number out of your hat and use it. 10000 should be
-        safe for a very long time even allowing for the huge number of vendors
-        making new and different radio cards at the moment.
-  </para>
   <para>
         We declare an open and close routine, but we do not need read or write,
         which are used to read and write video data to or from the card itself. As
@@ -844,7 +836,6 @@ static struct video_device my_camera
         "My Camera",
         VID_TYPE_OVERLAY|VID_TYPE_SCALES|\
         VID_TYPE_CAPTURE|VID_TYPE_CHROMAKEY,
-        VID_HARDWARE_MYCAMERA,
         camera_open.
         camera_close,
         camera_read,      /* no read */
index 6221464d1a7e4a39539ba30fdf40b4b00279a60b..39ad8f56783a0faded737756afe6688bb6ae76be 100644 (file)
@@ -9,8 +9,8 @@ The first thing resembling RCU was published in 1980, when Kung and Lehman
 [Kung80] recommended use of a garbage collector to defer destruction
 of nodes in a parallel binary search tree in order to simplify its
 implementation.  This works well in environments that have garbage
-collectors, but current production garbage collectors incur significant
-read-side overhead.
+collectors, but most production garbage collectors incur significant
+overhead.
 
 In 1982, Manber and Ladner [Manber82,Manber84] recommended deferring
 destruction until all threads running at that time have terminated, again
@@ -99,16 +99,25 @@ locking, reduces contention, reduces memory latency for readers, and
 parallelizes pipeline stalls and memory latency for writers.  However,
 these techniques still impose significant read-side overhead in the
 form of memory barriers.  Researchers at Sun worked along similar lines
-in the same timeframe [HerlihyLM02,HerlihyLMS03].  These techniques
-can be thought of as inside-out reference counts, where the count is
-represented by the number of hazard pointers referencing a given data
-structure (rather than the more conventional counter field within the
-data structure itself).
+in the same timeframe [HerlihyLM02].  These techniques can be thought
+of as inside-out reference counts, where the count is represented by the
+number of hazard pointers referencing a given data structure (rather than
+the more conventional counter field within the data structure itself).
+
+By the same token, RCU can be thought of as a "bulk reference count",
+where some form of reference counter covers all reference by a given CPU
+or thread during a set timeframe.  This timeframe is related to, but
+not necessarily exactly the same as, an RCU grace period.  In classic
+RCU, the reference counter is the per-CPU bit in the "bitmask" field,
+and each such bit covers all references that might have been made by
+the corresponding CPU during the prior grace period.  Of course, RCU
+can be thought of in other terms as well.
 
 In 2003, the K42 group described how RCU could be used to create
-hot-pluggable implementations of operating-system functions.  Later that
-year saw a paper describing an RCU implementation of System V IPC
-[Arcangeli03], and an introduction to RCU in Linux Journal [McKenney03a].
+hot-pluggable implementations of operating-system functions [Appavoo03a].
+Later that year saw a paper describing an RCU implementation of System
+V IPC [Arcangeli03], and an introduction to RCU in Linux Journal
+[McKenney03a].
 
 2004 has seen a Linux-Journal article on use of RCU in dcache
 [McKenney04a], a performance comparison of locking to RCU on several
@@ -117,10 +126,19 @@ number of operating-system kernels [PaulEdwardMcKenneyPhD], a paper
 describing how to make RCU safe for soft-realtime applications [Sarma04c],
 and a paper describing SELinux performance with RCU [JamesMorris04b].
 
-2005 has seen further adaptation of RCU to realtime use, permitting
+2005 brought further adaptation of RCU to realtime use, permitting
 preemption of RCU realtime critical sections [PaulMcKenney05a,
 PaulMcKenney05b].
 
+2006 saw the first best-paper award for an RCU paper [ThomasEHart2006a],
+as well as further work on efficient implementations of preemptible
+RCU [PaulEMcKenney2006b], but priority-boosting of RCU read-side critical
+sections proved elusive.  An RCU implementation permitting general
+blocking in read-side critical sections appeared [PaulEMcKenney2006c],
+Robert Olsson described an RCU-protected trie-hash combination
+[RobertOlsson2006a].
+
+
 Bibtex Entries
 
 @article{Kung80
@@ -203,6 +221,41 @@ Bibtex Entries
 ,Address="New Orleans, LA"
 }
 
+@conference{Pu95a,
+Author = "Calton Pu and Tito Autrey and Andrew Black and Charles Consel and
+Crispin Cowan and Jon Inouye and Lakshmi Kethana and Jonathan Walpole and
+Ke Zhang",
+Title = "Optimistic Incremental Specialization: Streamlining a Commercial
+Operating System",
+Booktitle = "15\textsuperscript{th} ACM Symposium on
+Operating Systems Principles (SOSP'95)",
+address = "Copper Mountain, CO",
+month="December",
+year="1995",
+pages="314-321",
+annotation="
+       Uses a replugger, but with a flag to signal when people are
+       using the resource at hand.  Only one reader at a time.
+"
+}
+
+@conference{Cowan96a,
+Author = "Crispin Cowan and Tito Autrey and Charles Krasic and
+Calton Pu and Jonathan Walpole",
+Title = "Fast Concurrent Dynamic Linking for an Adaptive Operating System",
+Booktitle = "International Conference on Configurable Distributed Systems
+(ICCDS'96)",
+address = "Annapolis, MD",
+month="May",
+year="1996",
+pages="108",
+isbn="0-8186-7395-8",
+annotation="
+       Uses a replugger, but with a counter to signal when people are
+       using the resource at hand.  Allows multiple readers.
+"
+}
+
 @techreport{Slingwine95
 ,author="John D. Slingwine and Paul E. McKenney"
 ,title="Apparatus and Method for Achieving Reduced Overhead Mutual
@@ -312,6 +365,49 @@ Andrea Arcangeli and Andi Kleen and Orran Krieger and Rusty Russell"
 [Viewed June 23, 2004]"
 }
 
+@conference{Michael02a
+,author="Maged M. Michael"
+,title="Safe Memory Reclamation for Dynamic Lock-Free Objects Using Atomic
+Reads and Writes"
+,Year="2002"
+,Month="August"
+,booktitle="{Proceedings of the 21\textsuperscript{st} Annual ACM
+Symposium on Principles of Distributed Computing}"
+,pages="21-30"
+,annotation="
+       Each thread keeps an array of pointers to items that it is
+       currently referencing.  Sort of an inside-out garbage collection
+       mechanism, but one that requires the accessing code to explicitly
+       state its needs.  Also requires read-side memory barriers on
+       most architectures.
+"
+}
+
+@conference{Michael02b
+,author="Maged M. Michael"
+,title="High Performance Dynamic Lock-Free Hash Tables and List-Based Sets"
+,Year="2002"
+,Month="August"
+,booktitle="{Proceedings of the 14\textsuperscript{th} Annual ACM
+Symposium on Parallel
+Algorithms and Architecture}"
+,pages="73-82"
+,annotation="
+       Like the title says...
+"
+}
+
+@InProceedings{HerlihyLM02
+,author={Maurice Herlihy and Victor Luchangco and Mark Moir}
+,title="The Repeat Offender Problem: A Mechanism for Supporting Dynamic-Sized,
+Lock-Free Data Structures"
+,booktitle={Proceedings of 16\textsuperscript{th} International
+Symposium on Distributed Computing}
+,year=2002
+,month="October"
+,pages="339-353"
+}
+
 @article{Appavoo03a
 ,author="J. Appavoo and K. Hui and C. A. N. Soules and R. W. Wisniewski and
 D. M. {Da Silva} and O. Krieger and M. A. Auslander and D. J. Edelsohn and
@@ -447,3 +543,95 @@ Oregon Health and Sciences University"
        Realtime turns into making RCU yet more realtime friendly.
 "
 }
+
+@conference{ThomasEHart2006a
+,Author="Thomas E. Hart and Paul E. McKenney and Angela Demke Brown"
+,Title="Making Lockless Synchronization Fast: Performance Implications
+of Memory Reclamation"
+,Booktitle="20\textsuperscript{th} {IEEE} International Parallel and
+Distributed Processing Symposium"
+,month="April"
+,year="2006"
+,day="25-29"
+,address="Rhodes, Greece"
+,annotation="
+       Compares QSBR (AKA "classic RCU"), HPBR, EBR, and lock-free
+       reference counting.
+"
+}
+
+@Conference{PaulEMcKenney2006b
+,Author="Paul E. McKenney and Dipankar Sarma and Ingo Molnar and
+Suparna Bhattacharya"
+,Title="Extending RCU for Realtime and Embedded Workloads"
+,Booktitle="{Ottawa Linux Symposium}"
+,Month="July"
+,Year="2006"
+,pages="v2 123-138"
+,note="Available:
+\url{http://www.linuxsymposium.org/2006/view_abstract.php?content_key=184}
+\url{http://www.rdrop.com/users/paulmck/RCU/OLSrtRCU.2006.08.11a.pdf}
+[Viewed January 1, 2007]"
+,annotation="
+       Described how to improve the -rt implementation of realtime RCU.
+"
+}
+
+@unpublished{PaulEMcKenney2006c
+,Author="Paul E. McKenney"
+,Title="Sleepable {RCU}"
+,month="October"
+,day="9"
+,year="2006"
+,note="Available:
+\url{http://lwn.net/Articles/202847/}
+Revised:
+\url{http://www.rdrop.com/users/paulmck/RCU/srcu.2007.01.14a.pdf}
+[Viewed August 21, 2006]"
+,annotation="
+       LWN article introducing SRCU.
+"
+}
+
+@unpublished{RobertOlsson2006a
+,Author="Robert Olsson and Stefan Nilsson"
+,Title="{TRASH}: A dynamic {LC}-trie and hash data structure"
+,month="August"
+,day="18"
+,year="2006"
+,note="Available:
+\url{http://www.nada.kth.se/~snilsson/public/papers/trash/trash.pdf}
+[Viewed February 24, 2007]"
+,annotation="
+       RCU-protected dynamic trie-hash combination.
+"
+}
+
+@unpublished{ThomasEHart2007a
+,Author="Thomas E. Hart and Paul E. McKenney and Angela Demke Brown and Jonathan Walpole"
+,Title="Performance of memory reclamation for lockless synchronization"
+,journal="J. Parallel Distrib. Comput."
+,year="2007"
+,note="To appear in J. Parallel Distrib. Comput.
+       \url{doi=10.1016/j.jpdc.2007.04.010}"
+,annotation={
+       Compares QSBR (AKA "classic RCU"), HPBR, EBR, and lock-free
+       reference counting.  Journal version of ThomasEHart2006a.
+}
+}
+
+@unpublished{PaulEMcKenney2007QRCUspin
+,Author="Paul E. McKenney"
+,Title="Using Promela and Spin to verify parallel algorithms"
+,month="August"
+,day="1"
+,year="2007"
+,note="Available:
+\url{http://lwn.net/Articles/243851/}
+[Viewed September 8, 2007]"
+,annotation="
+       LWN article describing Promela and spin, and also using Oleg
+       Nesterov's QRCU as an example (with Paul McKenney's fastpath).
+"
+}
+
index f84407cba8160a47ea57e46a640a54efafb905c5..95821a29ae418b6b275b01869fd40e29900baadf 100644 (file)
@@ -36,6 +36,14 @@ o    How can the updater tell when a grace period has completed
        executed in user mode, or executed in the idle loop, we can
        safely free up that item.
 
+       Preemptible variants of RCU (CONFIG_PREEMPT_RCU) get the
+       same effect, but require that the readers manipulate CPU-local
+       counters.  These counters allow limited types of blocking
+       within RCU read-side critical sections.  SRCU also uses
+       CPU-local counters, and permits general blocking within
+       RCU read-side critical sections.  These two variants of
+       RCU detect grace periods by sampling these counters.
+
 o      If I am running on a uniprocessor kernel, which can only do one
        thing at a time, why should I wait for a grace period?
 
@@ -46,7 +54,10 @@ o    How can I see where RCU is currently used in the Linux kernel?
        Search for "rcu_read_lock", "rcu_read_unlock", "call_rcu",
        "rcu_read_lock_bh", "rcu_read_unlock_bh", "call_rcu_bh",
        "srcu_read_lock", "srcu_read_unlock", "synchronize_rcu",
-       "synchronize_net", and "synchronize_srcu".
+       "synchronize_net", "synchronize_srcu", and the other RCU
+       primitives.  Or grab one of the cscope databases from:
+
+       http://www.rdrop.com/users/paulmck/RCU/linuxusage/rculocktab.html
 
 o      What guidelines should I follow when writing code that uses RCU?
 
@@ -67,7 +78,11 @@ o    I hear that RCU is patented?  What is with that?
 
 o      I hear that RCU needs work in order to support realtime kernels?
 
-       Yes, work in progress.
+       This work is largely completed.  Realtime-friendly RCU can be
+       enabled via the CONFIG_PREEMPT_RCU kernel configuration parameter.
+       However, work is in progress for enabling priority boosting of
+       preempted RCU read-side critical sections.This is needed if you
+       have CPU-bound realtime threads.
 
 o      Where can I find more information on RCU?
 
index 25a3c3f7d378f344676652aec19fad62853fc6b1..2967a65269d8af7702dbe76f4780e14d91dd9061 100644 (file)
@@ -46,12 +46,13 @@ stat_interval       The number of seconds between output of torture
 
 shuffle_interval
                The number of seconds to keep the test threads affinitied
-               to a particular subset of the CPUs.  Used in conjunction
-               with test_no_idle_hz.
+               to a particular subset of the CPUs, defaults to 5 seconds.
+               Used in conjunction with test_no_idle_hz.
 
 test_no_idle_hz        Whether or not to test the ability of RCU to operate in
                a kernel that disables the scheduling-clock interrupt to
                idle CPUs.  Boolean parameter, "1" to test, "0" otherwise.
+               Defaults to omitting this test.
 
 torture_type   The type of RCU to test: "rcu" for the rcu_read_lock() API,
                "rcu_sync" for rcu_read_lock() with synchronous reclamation,
@@ -82,8 +83,6 @@ be evident.  ;-)
 
 The entries are as follows:
 
-o      "ggp": The number of counter flips (or batches) since boot.
-
 o      "rtc": The hexadecimal address of the structure currently visible
        to readers.
 
@@ -117,8 +116,8 @@ o   "Reader Pipe": Histogram of "ages" of structures seen by readers.
 o      "Reader Batch": Another histogram of "ages" of structures seen
        by readers, but in terms of counter flips (or batches) rather
        than in terms of grace periods.  The legal number of non-zero
-       entries is again two.  The reason for this separate view is
-       that it is easier to get the third entry to show up in the
+       entries is again two.  The reason for this separate view is that
+       it is sometimes easier to get the third entry to show up in the
        "Reader Batch" list than in the "Reader Pipe" list.
 
 o      "Free-Block Circulation": Shows the number of torture structures
index a741f658a3c9d7393c9693bb4486d30473438222..fb94f5a71b688ae6fda63156a2b0bbdcf5387873 100644 (file)
@@ -109,12 +109,13 @@ Never use anything other than cpumask_t to represent bitmap of CPUs.
        for_each_cpu_mask(x,mask) - Iterate over some random collection of cpu mask.
 
        #include <linux/cpu.h>
-       lock_cpu_hotplug() and unlock_cpu_hotplug():
+       get_online_cpus() and put_online_cpus():
 
-The above calls are used to inhibit cpu hotplug operations. While holding the
-cpucontrol mutex, cpu_online_map will not change. If you merely need to avoid
-cpus going away, you could also use preempt_disable() and preempt_enable()
-for those sections. Just remember the critical section cannot call any
+The above calls are used to inhibit cpu hotplug operations. While the
+cpu_hotplug.refcount is non zero, the cpu_online_map will not change.
+If you merely need to avoid cpus going away, you could also use
+preempt_disable() and preempt_enable() for those sections.
+Just remember the critical section cannot call any
 function that can sleep or schedule this process away. The preempt_disable()
 will work as long as stop_machine_run() is used to take a cpu down.
 
index ecb47adda0638b9ac4a79ddc7ae7537801edf24a..b7b1d1b1da469a527eb4940ce86b9834deb8a8ee 100644 (file)
@@ -78,6 +78,18 @@ Example:
 For a full list of card ID's please see Documentation/video4linux/CARDLIST.bttv.
 In case of further problems please subscribe and send questions to the mailing list: linux-dvb@linuxtv.org.
 
+2c) Probing the cards with broken PCI subsystem ID
+--------------------------------------------------
+There are some TwinHan cards that the EEPROM has become corrupted for some
+reason. The cards do not have correct PCI subsystem ID. But we can force
+probing the cards with broken PCI subsystem ID
+
+       $ echo 109e 0878 $subvendor $subdevice > \
+               /sys/bus/pci/drivers/bt878/new_id
+
+109e: PCI_VENDOR_ID_BROOKTREE
+0878: PCI_DEVICE_ID_BROOKTREE_878
+
 Authors: Richard Walker,
         Jamie Honan,
         Michael Hunold,
index 20c4c8bac9d7d599fa43e1162b7db62cb7ad9011..9b8291f4c21134a76c4eaaaa2884c0a79fdc35d6 100644 (file)
@@ -295,16 +295,6 @@ Who:  linuxppc-dev@ozlabs.org
 
 ---------------------------
 
-What:  mthca driver's MSI support
-When:  January 2008
-Files: drivers/infiniband/hw/mthca/*.[ch]
-Why:   All mthca hardware also supports MSI-X, which provides
-       strictly more functionality than MSI.  So there is no point in
-       having both MSI-X and MSI support in the driver.
-Who:   Roland Dreier <rolandd@cisco.com>
-
----------------------------
-
 What:   sk98lin network driver
 When:   Feburary 2008
 Why:    In kernel tree version of driver is unmaintained. Sk98lin driver
index ed55238023a9843f7781ac6cfe94d174ba772072..c318a8bbb1ef1efdbd68930ed687595f3c397121 100644 (file)
@@ -35,7 +35,6 @@ Features which OCFS2 does not support yet:
        - Directory change notification (F_NOTIFY)
        - Distributed Caching (F_SETLEASE/F_GETLEASE/break_lease)
        - POSIX ACLs
-       - readpages / writepages (not user visible)
 
 Mount options
 =============
@@ -62,3 +61,18 @@ data=writeback               Data ordering is not preserved, data may be written
 preferred_slot=0(*)    During mount, try to use this filesystem slot first. If
                        it is in use by another node, the first empty one found
                        will be chosen. Invalid values will be ignored.
+commit=nrsec   (*)     Ocfs2 can be told to sync all its data and metadata
+                       every 'nrsec' seconds. The default value is 5 seconds.
+                       This means that if you lose your power, you will lose
+                       as much as the latest 5 seconds of work (your
+                       filesystem will not be damaged though, thanks to the
+                       journaling).  This default value (or any low value)
+                       will hurt performance, but it's good for data-safety.
+                       Setting it to 0 will have the same effect as leaving
+                       it at the default (5 seconds).
+                       Setting it to very large values will improve
+                       performance.
+localalloc=8(*)                Allows custom localalloc size in MB. If the value is too
+                       large, the fs will silently revert it to the default.
+                       Localalloc is not enabled for local mounts.
+localflocks            This disables cluster aware flock.
index 5c7fbf9d96b40a32d674446a6120d206990d7d76..c18363bd8d11b1f8b3c725c7c12639568033a115 100644 (file)
@@ -138,6 +138,7 @@ Code        Seq#    Include File            Comments
 'm'    00-1F   net/irda/irmod.h        conflict!
 'n'    00-7F   linux/ncp_fs.h
 'n'    E0-FF   video/matrox.h          matroxfb
+'o'    00-1F   fs/ocfs2/ocfs2_fs.h     OCFS2
 'p'    00-0F   linux/phantom.h         conflict! (OpenHaptics needs this)
 'p'    00-3F   linux/mc146818rtc.h     conflict!
 'p'    40-7F   linux/nvram.h
index 00cb646a4bdeefb36743232f3080c828e0f3d0ef..0924e6e142c40a2f7d6a5dec0ae107ff5d616d8c 100644 (file)
@@ -1,5 +1,7 @@
   0 -> UNKNOWN/GENERIC                                     [0070:3400]
   1 -> Hauppauge WinTV-HVR1800lp                           [0070:7600]
-  2 -> Hauppauge WinTV-HVR1800                             [0070:7800,0070:7801]
+  2 -> Hauppauge WinTV-HVR1800                             [0070:7800,0070:7801,0070:7809]
   3 -> Hauppauge WinTV-HVR1250                             [0070:7911]
   4 -> DViCO FusionHDTV5 Express                           [18ac:d500]
+  5 -> Hauppauge WinTV-HVR1500Q                            [0070:7790,0070:7797]
+  6 -> Hauppauge WinTV-HVR1500                             [0070:7710,0070:7717]
index 82ac8250e978b8e784d42888b445201726493389..bc5593bd9704dc8497d6d69d01642938bb20f5b9 100644 (file)
@@ -56,3 +56,4 @@
  55 -> Shenzhen Tungsten Ages Tech TE-DTV-250 / Swann OEM  [c180:c980]
  56 -> Hauppauge WinTV-HVR1300 DVB-T/Hybrid MPEG Encoder   [0070:9600,0070:9601,0070:9602]
  57 -> ADS Tech Instant Video PCI                          [1421:0390]
+ 58 -> Pinnacle PCTV HD 800i                               [11bd:0051]
index 37f0e3cedf43dba5dacbba345ea58ecc05364888..6a8469f2bcaeb64c819e71a175df5c65120a036d 100644 (file)
@@ -1,14 +1,17 @@
   0 -> Unknown EM2800 video grabber             (em2800)        [eb1a:2800]
-  1 -> Unknown EM2820/2840 video grabber        (em2820/em2840)
+  1 -> Unknown EM2750/28xx video grabber        (em2820/em2840) [eb1a:2750,eb1a:2820,eb1a:2821,eb1a:2860,eb1a:2861,eb1a:2870,eb1a:2881,eb1a:2883]
   2 -> Terratec Cinergy 250 USB                 (em2820/em2840) [0ccd:0036]
   3 -> Pinnacle PCTV USB 2                      (em2820/em2840) [2304:0208]
-  4 -> Hauppauge WinTV USB 2                    (em2820/em2840) [2040:4200]
-  5 -> MSI VOX USB 2.0                          (em2820/em2840) [eb1a:2820]
+  4 -> Hauppauge WinTV USB 2                    (em2820/em2840) [2040:4200,2040:4201]
+  5 -> MSI VOX USB 2.0                          (em2820/em2840)
   6 -> Terratec Cinergy 200 USB                 (em2800)
   7 -> Leadtek Winfast USB II                   (em2800)
   8 -> Kworld USB2800                           (em2800)
-  9 -> Pinnacle Dazzle DVC 90                   (em2820/em2840) [2304:0207]
- 10 -> Hauppauge WinTV HVR 900                  (em2880)
- 11 -> Terratec Hybrid XS                       (em2880)
+  9 -> Pinnacle Dazzle DVC 90/DVC 100           (em2820/em2840) [2304:0207,2304:021a]
+ 10 -> Hauppauge WinTV HVR 900                  (em2880)        [2040:6500]
+ 11 -> Terratec Hybrid XS                       (em2880)        [0ccd:0042]
  12 -> Kworld PVR TV 2800 RF                    (em2820/em2840)
- 13 -> Terratec Prodigy XS                      (em2880)
+ 13 -> Terratec Prodigy XS                      (em2880)        [0ccd:0047]
+ 14 -> Pixelview Prolink PlayTV USB 2.0         (em2820/em2840)
+ 15 -> V-Gear PocketTV                          (em2800)
+ 16 -> Hauppauge WinTV HVR 950                  (em2880)        [2040:6513]
index ddd76a0eb1002d19a9e6ba6516f1ac7d0971f78d..a019e27e42b3ea446bd97563ff7586e25954e53b 100644 (file)
@@ -16,3 +16,9 @@
 16 -> GOTVIEW PCI DVD2 Deluxe                  [ffac:0600]
 17 -> Yuan MPC622                              [ff01:d998]
 18 -> Digital Cowboy DCT-MTVP1                         [1461:bfff]
+19 -> Yuan PG600V2/GotView PCI DVD Lite        [ffab:0600,ffad:0600]
+20 -> Club3D ZAP-TV1x01                                [ffab:0600]
+21 -> AverTV MCE 116 Plus                      [1461:c439]
+22 -> ASUS Falcon2                             [1043:4b66,1043:462e,1043:4b2e]
+23 -> AverMedia PVR-150 Plus                   [1461:c035]
+24 -> AverMedia EZMaker PCI Deluxe             [1461:c03f]
index a14545300e4c84d5916da0af643cf91b370fc4d8..5d3b6b4d251509f0ddbd0057fd9418e16a14cf54 100644 (file)
@@ -80,7 +80,7 @@
  79 -> Sedna/MuchTV PC TV Cardbus TV/Radio (ITO25 Rev:2B)
  80 -> ASUS Digimatrix TV                       [1043:0210]
  81 -> Philips Tiger reference design           [1131:2018]
- 82 -> MSI TV@Anywhere plus                     [1462:6231]
+ 82 -> MSI TV@Anywhere plus                     [1462:6231,1462:8624]
  83 -> Terratec Cinergy 250 PCI TV              [153b:1160]
  84 -> LifeView FlyDVB Trio                     [5168:0319]
  85 -> AverTV DVB-T 777                         [1461:2c05,1461:2c05]
 101 -> Pinnacle PCTV 310i                       [11bd:002f]
 102 -> Avermedia AVerTV Studio 507              [1461:9715]
 103 -> Compro Videomate DVB-T200A
-104 -> Hauppauge WinTV-HVR1110 DVB-T/Hybrid     [0070:6701]
+104 -> Hauppauge WinTV-HVR1110 DVB-T/Hybrid     [0070:6700,0070:6701,0070:6702,0070:6703,0070:6704,0070:6705]
 105 -> Terratec Cinergy HT PCMCIA               [153b:1172]
 106 -> Encore ENLTV                             [1131:2342,1131:2341,3016:2344]
 107 -> Encore ENLTV-FM                          [1131:230f]
 115 -> Sabrent PCMCIA TV-PCB05                  [0919:2003]
 116 -> 10MOONS TM300 TV Card                    [1131:2304]
 117 -> Avermedia Super 007                      [1461:f01d]
+118 -> Beholder BeholdTV 401                    [0000:4016]
+119 -> Beholder BeholdTV 403                    [0000:4036]
+120 -> Beholder BeholdTV 403 FM                 [0000:4037]
+121 -> Beholder BeholdTV 405                    [0000:4050]
+122 -> Beholder BeholdTV 405 FM                 [0000:4051]
+123 -> Beholder BeholdTV 407                    [0000:4070]
+124 -> Beholder BeholdTV 407 FM                 [0000:4071]
+125 -> Beholder BeholdTV 409                    [0000:4090]
+126 -> Beholder BeholdTV 505 FM/RDS             [0000:5051,0000:505B,5ace:5050]
+127 -> Beholder BeholdTV 507 FM/RDS / BeholdTV 509 FM [0000:5071,0000:507B,5ace:5070,5ace:5090]
+128 -> Beholder BeholdTV Columbus TVFM          [0000:5201]
+129 -> Beholder BeholdTV 607 / BeholdTV 609     [5ace:6070,5ace:6071,5ace:6072,5ace:6073,5ace:6090,5ace:6091,5ace:6092,5ace:6093]
+130 -> Beholder BeholdTV M6 / BeholdTV M6 Extra [5ace:6190,5ace:6193]
index a88c02d238059b0fa277409f66860704f0b56509..0e2394695bb86843fb89a166eaa83727a2d9a37e 100644 (file)
@@ -52,7 +52,7 @@ tuner=50 - TCL 2002N
 tuner=51 - Philips PAL/SECAM_D (FM 1256 I-H3)
 tuner=52 - Thomson DTT 7610 (ATSC/NTSC)
 tuner=53 - Philips FQ1286
-tuner=54 - tda8290+75
+tuner=54 - Philips/NXP TDA 8290/8295 + 8275/8275A/18271
 tuner=55 - TCL 2002MB
 tuner=56 - Philips PAL/SECAM multi (FQ1216AME MK4)
 tuner=57 - Philips FQ1236A MK4
@@ -69,7 +69,8 @@ tuner=67 - Philips TD1316 Hybrid Tuner
 tuner=68 - Philips TUV1236D ATSC/NTSC dual in
 tuner=69 - Tena TNF 5335 and similar models
 tuner=70 - Samsung TCPN 2121P30A
-tuner=71 - Xceive xc3028
+tuner=71 - Xceive xc2028/xc3028 tuner
 tuner=72 - Thomson FE6600
 tuner=73 - Samsung TCPG 6121P30A
 tuner=75 - Philips TEA5761 FM Radio
+tuner=76 - Xceive 5000 tuner
index 3d6850ef0245e1b872d4937688339f6a3980cfee..0b72d3fee17ef4bb02a8d37c763a5d73fb84f4d0 100644 (file)
@@ -62,3 +62,4 @@
  61 -> Pinnacle Studio Linx Video input cable (PAL)             [2304:0301]
  62 -> Pinnacle PCTV Bungee USB (PAL) FM                        [2304:0419]
  63 -> Hauppauge WinTv-USB                                      [2400:4200]
+ 64 -> Pinnacle Studio PCTV USB (NTSC) FM V3                    [2304:0113]
diff --git a/Documentation/video4linux/extract_xc3028.pl b/Documentation/video4linux/extract_xc3028.pl
new file mode 100644 (file)
index 0000000..cced8ac
--- /dev/null
@@ -0,0 +1,926 @@
+#!/usr/bin/perl
+
+# Copyright (c) Mauro Carvalho Chehab <mchehab@infradead.org>
+# Released under GPLv2
+#
+# In order to use, you need to:
+#      1) Download the windows driver with something like:
+#              wget http://www.steventoth.net/linux/xc5000/HVR-12x0-14x0-17x0_1_25_25271_WHQL.zip
+#      2) Extract the file hcw85bda.sys from the zip into the current dir:
+#              unzip -j HVR-12x0-14x0-17x0_1_25_25271_WHQL.zip Driver85/hcw85bda.sys
+#      3) run the script:
+#              ./extract_xc3028.pl
+#      4) copy the generated file:
+#              cp xc3028-v27.fw /lib/firmware
+
+#use strict;
+use IO::Handle;
+
+my $debug=0;
+
+sub verify ($$)
+{
+       my ($filename, $hash) = @_;
+       my ($testhash);
+
+       if (system("which md5sum > /dev/null 2>&1")) {
+               die "This firmware requires the md5sum command - see http://www.gnu.org/software/coreutils/\n";
+       }
+
+       open(CMD, "md5sum ".$filename."|");
+       $testhash = <CMD>;
+       $testhash =~ /([a-zA-Z0-9]*)/;
+       $testhash = $1;
+       close CMD;
+               die "Hash of extracted file does not match (found $testhash, expected $hash!\n" if ($testhash ne $hash);
+}
+
+sub get_hunk ($$)
+{
+       my ($offset, $length) = @_;
+       my ($chunklength, $buf, $rcount, $out);
+
+       sysseek(INFILE, $offset, SEEK_SET);
+       while ($length > 0) {
+       # Calc chunk size
+               $chunklength = 2048;
+               $chunklength = $length if ($chunklength > $length);
+
+               $rcount = sysread(INFILE, $buf, $chunklength);
+               die "Ran out of data\n" if ($rcount != $chunklength);
+               $out .= $buf;
+               $length -= $rcount;
+       }
+       return $out;
+}
+
+sub write_le16($)
+{
+       my $val = shift;
+       my $msb = ($val >> 8) &0xff;
+       my $lsb = $val & 0xff;
+
+       syswrite(OUTFILE, chr($lsb).chr($msb));
+}
+
+sub write_le32($)
+{
+       my $val = shift;
+       my $l3 = ($val >> 24) & 0xff;
+       my $l2 = ($val >> 16) & 0xff;
+       my $l1 = ($val >> 8)  & 0xff;
+       my $l0 = $val         & 0xff;
+
+       syswrite(OUTFILE, chr($l0).chr($l1).chr($l2).chr($l3));
+}
+
+sub write_le64($$)
+{
+       my $msb_val = shift;
+       my $lsb_val = shift;
+       my $l7 = ($msb_val >> 24) & 0xff;
+       my $l6 = ($msb_val >> 16) & 0xff;
+       my $l5 = ($msb_val >> 8)  & 0xff;
+       my $l4 = $msb_val         & 0xff;
+
+       my $l3 = ($lsb_val >> 24) & 0xff;
+       my $l2 = ($lsb_val >> 16) & 0xff;
+       my $l1 = ($lsb_val >> 8)  & 0xff;
+       my $l0 = $lsb_val         & 0xff;
+
+       syswrite(OUTFILE,
+                chr($l0).chr($l1).chr($l2).chr($l3).
+                chr($l4).chr($l5).chr($l6).chr($l7));
+}
+
+sub write_hunk($$)
+{
+       my ($offset, $length) = @_;
+       my $out = get_hunk($offset, $length);
+
+       printf "(len %d) ",$length if ($debug);
+
+       for (my $i=0;$i<$length;$i++) {
+               printf "%02x ",ord(substr($out,$i,1)) if ($debug);
+       }
+       printf "\n" if ($debug);
+
+       syswrite(OUTFILE, $out);
+}
+
+sub write_hunk_fix_endian($$)
+{
+       my ($offset, $length) = @_;
+       my $out = get_hunk($offset, $length);
+
+       printf "(len_fix %d) ",$length if ($debug);
+
+       for (my $i=0;$i<$length;$i++) {
+               printf "%02x ",ord(substr($out,$i,1)) if ($debug);
+       }
+       printf "\n" if ($debug);
+
+       my $i=0;
+       while ($i<$length) {
+               my $size = ord(substr($out,$i,1))*256+ord(substr($out,$i+1,1));
+               syswrite(OUTFILE, substr($out,$i+1,1));
+               syswrite(OUTFILE, substr($out,$i,1));
+               $i+=2;
+               if ($size>0 && $size <0x8000) {
+                       for (my $j=0;$j<$size;$j++) {
+                               syswrite(OUTFILE, substr($out,$j+$i,1));
+                       }
+                       $i+=$size;
+               }
+       }
+}
+
+sub main_firmware($$$$)
+{
+       my $out;
+       my $j=0;
+       my $outfile = shift;
+       my $name    = shift;
+       my $version = shift;
+       my $nr_desc = shift;
+
+       for ($j = length($name); $j <32; $j++) {
+               $name = $name.chr(0);
+}
+
+       open OUTFILE, ">$outfile";
+       syswrite(OUTFILE, $name);
+       write_le16($version);
+       write_le16($nr_desc);
+
+       #
+       # Firmware 0, type: BASE FW   F8MHZ (0x00000003), id: (0000000000000000), size: 8718
+       #
+
+       write_le32(0x00000003);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le32(8718);                       # Size
+       write_hunk_fix_endian(813432, 8718);
+
+       #
+       # Firmware 1, type: BASE FW   F8MHZ MTS (0x00000007), id: (0000000000000000), size: 8712
+       #
+
+       write_le32(0x00000007);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le32(8712);                       # Size
+       write_hunk_fix_endian(822152, 8712);
+
+       #
+       # Firmware 2, type: BASE FW   FM (0x00000401), id: (0000000000000000), size: 8562
+       #
+
+       write_le32(0x00000401);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le32(8562);                       # Size
+       write_hunk_fix_endian(830872, 8562);
+
+       #
+       # Firmware 3, type: BASE FW   FM INPUT1 (0x00000c01), id: (0000000000000000), size: 8576
+       #
+
+       write_le32(0x00000c01);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le32(8576);                       # Size
+       write_hunk_fix_endian(839440, 8576);
+
+       #
+       # Firmware 4, type: BASE FW   (0x00000001), id: (0000000000000000), size: 8706
+       #
+
+       write_le32(0x00000001);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le32(8706);                       # Size
+       write_hunk_fix_endian(848024, 8706);
+
+       #
+       # Firmware 5, type: BASE FW   MTS (0x00000005), id: (0000000000000000), size: 8682
+       #
+
+       write_le32(0x00000005);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le32(8682);                       # Size
+       write_hunk_fix_endian(856736, 8682);
+
+       #
+       # Firmware 6, type: STD FW    (0x00000000), id: PAL/BG A2/A (0000000100000007), size: 161
+       #
+
+       write_le32(0x00000000);                 # Type
+       write_le64(0x00000001, 0x00000007);     # ID
+       write_le32(161);                        # Size
+       write_hunk_fix_endian(865424, 161);
+
+       #
+       # Firmware 7, type: STD FW    MTS (0x00000004), id: PAL/BG A2/A (0000000100000007), size: 169
+       #
+
+       write_le32(0x00000004);                 # Type
+       write_le64(0x00000001, 0x00000007);     # ID
+       write_le32(169);                        # Size
+       write_hunk_fix_endian(865592, 169);
+
+       #
+       # Firmware 8, type: STD FW    (0x00000000), id: PAL/BG A2/B (0000000200000007), size: 161
+       #
+
+       write_le32(0x00000000);                 # Type
+       write_le64(0x00000002, 0x00000007);     # ID
+       write_le32(161);                        # Size
+       write_hunk_fix_endian(865424, 161);
+
+       #
+       # Firmware 9, type: STD FW    MTS (0x00000004), id: PAL/BG A2/B (0000000200000007), size: 169
+       #
+
+       write_le32(0x00000004);                 # Type
+       write_le64(0x00000002, 0x00000007);     # ID
+       write_le32(169);                        # Size
+       write_hunk_fix_endian(865592, 169);
+
+       #
+       # Firmware 10, type: STD FW    (0x00000000), id: PAL/BG NICAM/A (0000000400000007), size: 161
+       #
+
+       write_le32(0x00000000);                 # Type
+       write_le64(0x00000004, 0x00000007);     # ID
+       write_le32(161);                        # Size
+       write_hunk_fix_endian(866112, 161);
+
+       #
+       # Firmware 11, type: STD FW    MTS (0x00000004), id: PAL/BG NICAM/A (0000000400000007), size: 169
+       #
+
+       write_le32(0x00000004);                 # Type
+       write_le64(0x00000004, 0x00000007);     # ID
+       write_le32(169);                        # Size
+       write_hunk_fix_endian(866280, 169);
+
+       #
+       # Firmware 12, type: STD FW    (0x00000000), id: PAL/BG NICAM/B (0000000800000007), size: 161
+       #
+
+       write_le32(0x00000000);                 # Type
+       write_le64(0x00000008, 0x00000007);     # ID
+       write_le32(161);                        # Size
+       write_hunk_fix_endian(866112, 161);
+
+       #
+       # Firmware 13, type: STD FW    MTS (0x00000004), id: PAL/BG NICAM/B (0000000800000007), size: 169
+       #
+
+       write_le32(0x00000004);                 # Type
+       write_le64(0x00000008, 0x00000007);     # ID
+       write_le32(169);                        # Size
+       write_hunk_fix_endian(866280, 169);
+
+       #
+       # Firmware 14, type: STD FW    (0x00000000), id: PAL/DK A2 (00000003000000e0), size: 161
+       #
+
+       write_le32(0x00000000);                 # Type
+       write_le64(0x00000003, 0x000000e0);     # ID
+       write_le32(161);                        # Size
+       write_hunk_fix_endian(866800, 161);
+
+       #
+       # Firmware 15, type: STD FW    MTS (0x00000004), id: PAL/DK A2 (00000003000000e0), size: 169
+       #
+
+       write_le32(0x00000004);                 # Type
+       write_le64(0x00000003, 0x000000e0);     # ID
+       write_le32(169);                        # Size
+       write_hunk_fix_endian(866968, 169);
+
+       #
+       # Firmware 16, type: STD FW    (0x00000000), id: PAL/DK NICAM (0000000c000000e0), size: 161
+       #
+
+       write_le32(0x00000000);                 # Type
+       write_le64(0x0000000c, 0x000000e0);     # ID
+       write_le32(161);                        # Size
+       write_hunk_fix_endian(867144, 161);
+
+       #
+       # Firmware 17, type: STD FW    MTS (0x00000004), id: PAL/DK NICAM (0000000c000000e0), size: 169
+       #
+
+       write_le32(0x00000004);                 # Type
+       write_le64(0x0000000c, 0x000000e0);     # ID
+       write_le32(169);                        # Size
+       write_hunk_fix_endian(867312, 169);
+
+       #
+       # Firmware 18, type: STD FW    (0x00000000), id: SECAM/K1 (0000000000200000), size: 161
+       #
+
+       write_le32(0x00000000);                 # Type
+       write_le64(0x00000000, 0x00200000);     # ID
+       write_le32(161);                        # Size
+       write_hunk_fix_endian(867488, 161);
+
+       #
+       # Firmware 19, type: STD FW    MTS (0x00000004), id: SECAM/K1 (0000000000200000), size: 169
+       #
+
+       write_le32(0x00000004);                 # Type
+       write_le64(0x00000000, 0x00200000);     # ID
+       write_le32(169);                        # Size
+       write_hunk_fix_endian(867656, 169);
+
+       #
+       # Firmware 20, type: STD FW    (0x00000000), id: SECAM/K3 (0000000004000000), size: 161
+       #
+
+       write_le32(0x00000000);                 # Type
+       write_le64(0x00000000, 0x04000000);     # ID
+       write_le32(161);                        # Size
+       write_hunk_fix_endian(867832, 161);
+
+       #
+       # Firmware 21, type: STD FW    MTS (0x00000004), id: SECAM/K3 (0000000004000000), size: 169
+       #
+
+       write_le32(0x00000004);                 # Type
+       write_le64(0x00000000, 0x04000000);     # ID
+       write_le32(169);                        # Size
+       write_hunk_fix_endian(868000, 169);
+
+       #
+       # Firmware 22, type: STD FW    D2633 DTV6 ATSC (0x00010030), id: (0000000000000000), size: 149
+       #
+
+       write_le32(0x00010030);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le32(149);                        # Size
+       write_hunk_fix_endian(868176, 149);
+
+       #
+       # Firmware 23, type: STD FW    D2620 DTV6 QAM (0x00000068), id: (0000000000000000), size: 149
+       #
+
+       write_le32(0x00000068);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le32(149);                        # Size
+       write_hunk_fix_endian(868336, 149);
+
+       #
+       # Firmware 24, type: STD FW    D2633 DTV6 QAM (0x00000070), id: (0000000000000000), size: 149
+       #
+
+       write_le32(0x00000070);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le32(149);                        # Size
+       write_hunk_fix_endian(868488, 149);
+
+       #
+       # Firmware 25, type: STD FW    D2620 DTV7 (0x00000088), id: (0000000000000000), size: 149
+       #
+
+       write_le32(0x00000088);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le32(149);                        # Size
+       write_hunk_fix_endian(868648, 149);
+
+       #
+       # Firmware 26, type: STD FW    D2633 DTV7 (0x00000090), id: (0000000000000000), size: 149
+       #
+
+       write_le32(0x00000090);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le32(149);                        # Size
+       write_hunk_fix_endian(868800, 149);
+
+       #
+       # Firmware 27, type: STD FW    D2620 DTV78 (0x00000108), id: (0000000000000000), size: 149
+       #
+
+       write_le32(0x00000108);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le32(149);                        # Size
+       write_hunk_fix_endian(868960, 149);
+
+       #
+       # Firmware 28, type: STD FW    D2633 DTV78 (0x00000110), id: (0000000000000000), size: 149
+       #
+
+       write_le32(0x00000110);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le32(149);                        # Size
+       write_hunk_fix_endian(869112, 149);
+
+       #
+       # Firmware 29, type: STD FW    D2620 DTV8 (0x00000208), id: (0000000000000000), size: 149
+       #
+
+       write_le32(0x00000208);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le32(149);                        # Size
+       write_hunk_fix_endian(868648, 149);
+
+       #
+       # Firmware 30, type: STD FW    D2633 DTV8 (0x00000210), id: (0000000000000000), size: 149
+       #
+
+       write_le32(0x00000210);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le32(149);                        # Size
+       write_hunk_fix_endian(868800, 149);
+
+       #
+       # Firmware 31, type: STD FW    FM (0x00000400), id: (0000000000000000), size: 135
+       #
+
+       write_le32(0x00000400);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le32(135);                        # Size
+       write_hunk_fix_endian(869584, 135);
+
+       #
+       # Firmware 32, type: STD FW    (0x00000000), id: PAL/I (0000000000000010), size: 161
+       #
+
+       write_le32(0x00000000);                 # Type
+       write_le64(0x00000000, 0x00000010);     # ID
+       write_le32(161);                        # Size
+       write_hunk_fix_endian(869728, 161);
+
+       #
+       # Firmware 33, type: STD FW    MTS (0x00000004), id: PAL/I (0000000000000010), size: 169
+       #
+
+       write_le32(0x00000004);                 # Type
+       write_le64(0x00000000, 0x00000010);     # ID
+       write_le32(169);                        # Size
+       write_hunk_fix_endian(869896, 169);
+
+       #
+       # Firmware 34, type: STD FW    (0x00000000), id: SECAM/L AM (0000001000400000), size: 169
+       #
+
+       write_le32(0x00000000);                 # Type
+       write_le64(0x00000010, 0x00400000);     # ID
+       write_le32(169);                        # Size
+       write_hunk_fix_endian(870072, 169);
+
+       #
+       # Firmware 35, type: STD FW    (0x00000000), id: SECAM/L NICAM (0000000c00400000), size: 161
+       #
+
+       write_le32(0x00000000);                 # Type
+       write_le64(0x0000000c, 0x00400000);     # ID
+       write_le32(161);                        # Size
+       write_hunk_fix_endian(870248, 161);
+
+       #
+       # Firmware 36, type: STD FW    (0x00000000), id: SECAM/Lc (0000000000800000), size: 161
+       #
+
+       write_le32(0x00000000);                 # Type
+       write_le64(0x00000000, 0x00800000);     # ID
+       write_le32(161);                        # Size
+       write_hunk_fix_endian(870416, 161);
+
+       #
+       # Firmware 37, type: STD FW    (0x00000000), id: NTSC/M Kr (0000000000008000), size: 161
+       #
+
+       write_le32(0x00000000);                 # Type
+       write_le64(0x00000000, 0x00008000);     # ID
+       write_le32(161);                        # Size
+       write_hunk_fix_endian(870584, 161);
+
+       #
+       # Firmware 38, type: STD FW    LCD (0x00001000), id: NTSC/M Kr (0000000000008000), size: 161
+       #
+
+       write_le32(0x00001000);                 # Type
+       write_le64(0x00000000, 0x00008000);     # ID
+       write_le32(161);                        # Size
+       write_hunk_fix_endian(870752, 161);
+
+       #
+       # Firmware 39, type: STD FW    LCD NOGD (0x00003000), id: NTSC/M Kr (0000000000008000), size: 161
+       #
+
+       write_le32(0x00003000);                 # Type
+       write_le64(0x00000000, 0x00008000);     # ID
+       write_le32(161);                        # Size
+       write_hunk_fix_endian(870920, 161);
+
+       #
+       # Firmware 40, type: STD FW    MTS (0x00000004), id: NTSC/M Kr (0000000000008000), size: 169
+       #
+
+       write_le32(0x00000004);                 # Type
+       write_le64(0x00000000, 0x00008000);     # ID
+       write_le32(169);                        # Size
+       write_hunk_fix_endian(871088, 169);
+
+       #
+       # Firmware 41, type: STD FW    (0x00000000), id: NTSC PAL/M PAL/N (000000000000b700), size: 161
+       #
+
+       write_le32(0x00000000);                 # Type
+       write_le64(0x00000000, 0x0000b700);     # ID
+       write_le32(161);                        # Size
+       write_hunk_fix_endian(871264, 161);
+
+       #
+       # Firmware 42, type: STD FW    LCD (0x00001000), id: NTSC PAL/M PAL/N (000000000000b700), size: 161
+       #
+
+       write_le32(0x00001000);                 # Type
+       write_le64(0x00000000, 0x0000b700);     # ID
+       write_le32(161);                        # Size
+       write_hunk_fix_endian(871432, 161);
+
+       #
+       # Firmware 43, type: STD FW    LCD NOGD (0x00003000), id: NTSC PAL/M PAL/N (000000000000b700), size: 161
+       #
+
+       write_le32(0x00003000);                 # Type
+       write_le64(0x00000000, 0x0000b700);     # ID
+       write_le32(161);                        # Size
+       write_hunk_fix_endian(871600, 161);
+
+       #
+       # Firmware 44, type: STD FW    (0x00000000), id: NTSC/M Jp (0000000000002000), size: 161
+       #
+
+       write_le32(0x00000000);                 # Type
+       write_le64(0x00000000, 0x00002000);     # ID
+       write_le32(161);                        # Size
+       write_hunk_fix_endian(871264, 161);
+
+       #
+       # Firmware 45, type: STD FW    MTS (0x00000004), id: NTSC PAL/M PAL/N (000000000000b700), size: 169
+       #
+
+       write_le32(0x00000004);                 # Type
+       write_le64(0x00000000, 0x0000b700);     # ID
+       write_le32(169);                        # Size
+       write_hunk_fix_endian(871936, 169);
+
+       #
+       # Firmware 46, type: STD FW    MTS LCD (0x00001004), id: NTSC PAL/M PAL/N (000000000000b700), size: 169
+       #
+
+       write_le32(0x00001004);                 # Type
+       write_le64(0x00000000, 0x0000b700);     # ID
+       write_le32(169);                        # Size
+       write_hunk_fix_endian(872112, 169);
+
+       #
+       # Firmware 47, type: STD FW    MTS LCD NOGD (0x00003004), id: NTSC PAL/M PAL/N (000000000000b700), size: 169
+       #
+
+       write_le32(0x00003004);                 # Type
+       write_le64(0x00000000, 0x0000b700);     # ID
+       write_le32(169);                        # Size
+       write_hunk_fix_endian(872288, 169);
+
+       #
+       # Firmware 48, type: SCODE FW  HAS IF (0x60000000), IF = 3.28 MHz id: (0000000000000000), size: 192
+       #
+
+       write_le32(0x60000000);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le16(3280);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(811896, 192);
+
+       #
+       # Firmware 49, type: SCODE FW  HAS IF (0x60000000), IF = 3.30 MHz id: (0000000000000000), size: 192
+       #
+
+       write_le32(0x60000000);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le16(3300);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(813048, 192);
+
+       #
+       # Firmware 50, type: SCODE FW  HAS IF (0x60000000), IF = 3.44 MHz id: (0000000000000000), size: 192
+       #
+
+       write_le32(0x60000000);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le16(3440);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(812280, 192);
+
+       #
+       # Firmware 51, type: SCODE FW  HAS IF (0x60000000), IF = 3.46 MHz id: (0000000000000000), size: 192
+       #
+
+       write_le32(0x60000000);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le16(3460);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(812472, 192);
+
+       #
+       # Firmware 52, type: SCODE FW  DTV6 ATSC OREN36 HAS IF (0x60210020), IF = 3.80 MHz id: (0000000000000000), size: 192
+       #
+
+       write_le32(0x60210020);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le16(3800);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(809784, 192);
+
+       #
+       # Firmware 53, type: SCODE FW  HAS IF (0x60000000), IF = 4.00 MHz id: (0000000000000000), size: 192
+       #
+
+       write_le32(0x60000000);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le16(4000);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(812088, 192);
+
+       #
+       # Firmware 54, type: SCODE FW  DTV6 ATSC TOYOTA388 HAS IF (0x60410020), IF = 4.08 MHz id: (0000000000000000), size: 192
+       #
+
+       write_le32(0x60410020);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le16(4080);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(809976, 192);
+
+       #
+       # Firmware 55, type: SCODE FW  HAS IF (0x60000000), IF = 4.20 MHz id: (0000000000000000), size: 192
+       #
+
+       write_le32(0x60000000);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le16(4200);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(811704, 192);
+
+       #
+       # Firmware 56, type: SCODE FW  MONO HAS IF (0x60008000), IF = 4.32 MHz id: NTSC/M Kr (0000000000008000), size: 192
+       #
+
+       write_le32(0x60008000);                 # Type
+       write_le64(0x00000000, 0x00008000);     # ID
+       write_le16(4320);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(808056, 192);
+
+       #
+       # Firmware 57, type: SCODE FW  HAS IF (0x60000000), IF = 4.45 MHz id: (0000000000000000), size: 192
+       #
+
+       write_le32(0x60000000);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le16(4450);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(812664, 192);
+
+       #
+       # Firmware 58, type: SCODE FW  HAS IF (0x60000000), IF = 4.50 MHz id: NTSC/M Jp (0000000000002000), size: 192
+       #
+
+       write_le32(0x60000000);                 # Type
+       write_le64(0x00000000, 0x00002000);     # ID
+       write_le16(4500);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(807672, 192);
+
+       #
+       # Firmware 59, type: SCODE FW  LCD NOGD IF HAS IF (0x60023000), IF = 4.60 MHz id: NTSC/M Kr (0000000000008000), size: 192
+       #
+
+       write_le32(0x60023000);                 # Type
+       write_le64(0x00000000, 0x00008000);     # ID
+       write_le16(4600);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(807864, 192);
+
+       #
+       # Firmware 60, type: SCODE FW  DTV78 ZARLINK456 HAS IF (0x62000100), IF = 4.76 MHz id: (0000000000000000), size: 192
+       #
+
+       write_le32(0x62000100);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le16(4760);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(807288, 192);
+
+       #
+       # Firmware 61, type: SCODE FW  HAS IF (0x60000000), IF = 4.94 MHz id: (0000000000000000), size: 192
+       #
+
+       write_le32(0x60000000);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le16(4940);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(811512, 192);
+
+       #
+       # Firmware 62, type: SCODE FW  DTV7 ZARLINK456 HAS IF (0x62000080), IF = 5.26 MHz id: (0000000000000000), size: 192
+       #
+
+       write_le32(0x62000080);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le16(5260);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(810552, 192);
+
+       #
+       # Firmware 63, type: SCODE FW  MONO HAS IF (0x60008000), IF = 5.32 MHz id: PAL/BG NICAM/B (0000000800000007), size: 192
+       #
+
+       write_le32(0x60008000);                 # Type
+       write_le64(0x00000008, 0x00000007);     # ID
+       write_le16(5320);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(810744, 192);
+
+       #
+       # Firmware 64, type: SCODE FW  DTV8 CHINA HAS IF (0x64000200), IF = 5.40 MHz id: (0000000000000000), size: 192
+       #
+
+       write_le32(0x64000200);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le16(5400);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(807096, 192);
+
+       #
+       # Firmware 65, type: SCODE FW  DTV6 ATSC OREN538 HAS IF (0x60110020), IF = 5.58 MHz id: (0000000000000000), size: 192
+       #
+
+       write_le32(0x60110020);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le16(5580);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(809592, 192);
+
+       #
+       # Firmware 66, type: SCODE FW  HAS IF (0x60000000), IF = 5.64 MHz id: PAL/BG A2/B (0000000200000007), size: 192
+       #
+
+       write_le32(0x60000000);                 # Type
+       write_le64(0x00000002, 0x00000007);     # ID
+       write_le16(5640);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(808440, 192);
+
+       #
+       # Firmware 67, type: SCODE FW  HAS IF (0x60000000), IF = 5.74 MHz id: PAL/BG NICAM/B (0000000800000007), size: 192
+       #
+
+       write_le32(0x60000000);                 # Type
+       write_le64(0x00000008, 0x00000007);     # ID
+       write_le16(5740);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(808632, 192);
+
+       #
+       # Firmware 68, type: SCODE FW  DTV7 DIBCOM52 HAS IF (0x61000080), IF = 5.90 MHz id: (0000000000000000), size: 192
+       #
+
+       write_le32(0x61000080);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le16(5900);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(810360, 192);
+
+       #
+       # Firmware 69, type: SCODE FW  MONO HAS IF (0x60008000), IF = 6.00 MHz id: PAL/I (0000000000000010), size: 192
+       #
+
+       write_le32(0x60008000);                 # Type
+       write_le64(0x00000000, 0x00000010);     # ID
+       write_le16(6000);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(808824, 192);
+
+       #
+       # Firmware 70, type: SCODE FW  DTV6 QAM F6MHZ HAS IF (0x68000060), IF = 6.20 MHz id: (0000000000000000), size: 192
+       #
+
+       write_le32(0x68000060);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le16(6200);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(809400, 192);
+
+       #
+       # Firmware 71, type: SCODE FW  HAS IF (0x60000000), IF = 6.24 MHz id: PAL/I (0000000000000010), size: 192
+       #
+
+       write_le32(0x60000000);                 # Type
+       write_le64(0x00000000, 0x00000010);     # ID
+       write_le16(6240);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(808248, 192);
+
+       #
+       # Firmware 72, type: SCODE FW  MONO HAS IF (0x60008000), IF = 6.32 MHz id: SECAM/K1 (0000000000200000), size: 192
+       #
+
+       write_le32(0x60008000);                 # Type
+       write_le64(0x00000000, 0x00200000);     # ID
+       write_le16(6320);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(811320, 192);
+
+       #
+       # Firmware 73, type: SCODE FW  HAS IF (0x60000000), IF = 6.34 MHz id: SECAM/K1 (0000000000200000), size: 192
+       #
+
+       write_le32(0x60000000);                 # Type
+       write_le64(0x00000000, 0x00200000);     # ID
+       write_le16(6340);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(809208, 192);
+
+       #
+       # Firmware 74, type: SCODE FW  MONO HAS IF (0x60008000), IF = 6.50 MHz id: SECAM/K3 (0000000004000000), size: 192
+       #
+
+       write_le32(0x60008000);                 # Type
+       write_le64(0x00000000, 0x04000000);     # ID
+       write_le16(6500);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(811128, 192);
+
+       #
+       # Firmware 75, type: SCODE FW  DTV6 ATSC ATI638 HAS IF (0x60090020), IF = 6.58 MHz id: (0000000000000000), size: 192
+       #
+
+       write_le32(0x60090020);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le16(6580);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(807480, 192);
+
+       #
+       # Firmware 76, type: SCODE FW  HAS IF (0x60000000), IF = 6.60 MHz id: PAL/DK A2 (00000003000000e0), size: 192
+       #
+
+       write_le32(0x60000000);                 # Type
+       write_le64(0x00000003, 0x000000e0);     # ID
+       write_le16(6600);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(809016, 192);
+
+       #
+       # Firmware 77, type: SCODE FW  MONO HAS IF (0x60008000), IF = 6.68 MHz id: PAL/DK A2 (00000003000000e0), size: 192
+       #
+
+       write_le32(0x60008000);                 # Type
+       write_le64(0x00000003, 0x000000e0);     # ID
+       write_le16(6680);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(810936, 192);
+
+       #
+       # Firmware 78, type: SCODE FW  DTV6 ATSC TOYOTA794 HAS IF (0x60810020), IF = 8.14 MHz id: (0000000000000000), size: 192
+       #
+
+       write_le32(0x60810020);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le16(8140);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(810168, 192);
+
+       #
+       # Firmware 79, type: SCODE FW  HAS IF (0x60000000), IF = 8.20 MHz id: (0000000000000000), size: 192
+       #
+
+       write_le32(0x60000000);                 # Type
+       write_le64(0x00000000, 0x00000000);     # ID
+       write_le16(8200);                       # IF
+       write_le32(192);                        # Size
+       write_hunk(812856, 192);
+}
+
+sub extract_firmware {
+       my $sourcefile = "hcw85bda.sys";
+       my $hash = "0e44dbf63bb0169d57446aec21881ff2";
+       my $outfile = "xc3028-v27.fw";
+       my $name = "xc2028 firmware";
+       my $version = 519;
+       my $nr_desc = 80;
+       my $out;
+
+       verify($sourcefile, $hash);
+
+       open INFILE, "<$sourcefile";
+       main_firmware($outfile, $name, $version, $nr_desc);
+       close INFILE;
+}
+
+extract_firmware;
+printf "Firmwares generated.\n";
index 1ffad19ce8910b375fa46b192a66918e28ac33f3..b26f5195af51f58db1d4a04f2826e044b29bc8a2 100644 (file)
@@ -568,6 +568,7 @@ the fingerprint is: '88E8 F32F 7244 68BA 3958  5D40 99DA 5D2A FCE6 35A4'.
 Many thanks to following persons for their contribute (listed in alphabetical
 order):
 
+- David Anderson for the donation of a webcam;
 - Luca Capello for the donation of a webcam;
 - Philippe Coval for having helped testing the PAS202BCA image sensor;
 - Joao Rodrigo Fuzaro, Joao Limirio, Claudio Filho and Caio Begotti for the
index 2340cfb1e25d3d361e7fab799f23249fc124a245..17524afa74754463b2906d4a6eb4f73fa81376b9 100644 (file)
@@ -2141,6 +2141,15 @@ L:       isdn4linux@listserv.isdn4linux.de
 W:     http://www.melware.de
 S:     Maintained
 
+IVTV VIDEO4LINUX DRIVER
+P:     Hans Verkuil
+M:     hverkuil@xs4all.nl
+L:     ivtv-devel@ivtvdriver.org
+L:     ivtv-users@ivtvdriver.org
+L:     video4linux-list@redhat.com
+W:     http://www.ivtvdriver.org
+S:     Maintained
+
 JOURNALLING FLASH FILE SYSTEM V2 (JFFS2)
 P:     David Woodhouse
 M:     dwmw2@infradead.org
index f6f3689a86ee2e10b99e7dfca154c98713b16971..e59b5b84168dadc02493200f26ee86e426059f70 100644 (file)
@@ -79,17 +79,6 @@ static unsigned long dummy_gettimeoffset(void)
 }
 #endif
 
-/*
- * An implementation of printk_clock() independent from
- * sched_clock().  This avoids non-bootable kernels when
- * printk_clock is enabled.
- */
-unsigned long long printk_clock(void)
-{
-       return (unsigned long long)(jiffies - INITIAL_JIFFIES) *
-                       (1000000000 / HZ);
-}
-
 static unsigned long next_rtc_update;
 
 /*
index 4ac2b1f1bd3b7fb49b4407c32b0482a5226b7a61..86028c69861e23373b1162fc20607a858da3b3e3 100644 (file)
@@ -71,8 +71,6 @@ unsigned long __per_cpu_offset[NR_CPUS];
 EXPORT_SYMBOL(__per_cpu_offset);
 #endif
 
-extern void ia64_setup_printk_clock(void);
-
 DEFINE_PER_CPU(struct cpuinfo_ia64, cpu_info);
 DEFINE_PER_CPU(unsigned long, local_per_cpu_offset);
 unsigned long ia64_cycles_per_usec;
@@ -507,8 +505,6 @@ setup_arch (char **cmdline_p)
        /* process SAL system table: */
        ia64_sal_init(__va(efi.sal_systab));
 
-       ia64_setup_printk_clock();
-
 #ifdef CONFIG_SMP
        cpu_physical_id(0) = hard_smp_processor_id();
 #endif
index 2bb84214e5f1384f2208b47f637a644aa94e747e..3ab04272097031c19f5000bb07c9e606412df2f7 100644 (file)
@@ -344,33 +344,6 @@ udelay (unsigned long usecs)
 }
 EXPORT_SYMBOL(udelay);
 
-static unsigned long long ia64_itc_printk_clock(void)
-{
-       if (ia64_get_kr(IA64_KR_PER_CPU_DATA))
-               return sched_clock();
-       return 0;
-}
-
-static unsigned long long ia64_default_printk_clock(void)
-{
-       return (unsigned long long)(jiffies_64 - INITIAL_JIFFIES) *
-               (1000000000/HZ);
-}
-
-unsigned long long (*ia64_printk_clock)(void) = &ia64_default_printk_clock;
-
-unsigned long long printk_clock(void)
-{
-       return ia64_printk_clock();
-}
-
-void __init
-ia64_setup_printk_clock(void)
-{
-       if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT))
-               ia64_printk_clock = ia64_itc_printk_clock;
-}
-
 /* IA64 doesn't cache the timezone */
 void update_vsyscall_tz(void)
 {
index 1f38a3a68390f0502a04c2a3fca273b37e7d3a7d..bb1d249296408d3def799a759ee48e5b0b415378 100644 (file)
@@ -64,7 +64,6 @@ extern void sn_timer_init(void);
 extern unsigned long last_time_offset;
 extern void (*ia64_mark_idle) (int);
 extern void snidle(int);
-extern unsigned long long (*ia64_printk_clock)(void);
 
 unsigned long sn_rtc_cycles_per_second;
 EXPORT_SYMBOL(sn_rtc_cycles_per_second);
@@ -360,14 +359,6 @@ sn_scan_pcdp(void)
 
 static unsigned long sn2_rtc_initial;
 
-static unsigned long long ia64_sn2_printk_clock(void)
-{
-       unsigned long rtc_now = rtc_time();
-
-       return (rtc_now - sn2_rtc_initial) *
-               (1000000000 / sn_rtc_cycles_per_second);
-}
-
 /**
  * sn_setup - SN platform setup routine
  * @cmdline_p: kernel command line
@@ -468,8 +459,6 @@ void __init sn_setup(char **cmdline_p)
 
        platform_intr_list[ACPI_INTERRUPT_CPEI] = IA64_CPE_VECTOR;
 
-       ia64_printk_clock = ia64_sn2_printk_clock;
-
        printk("SGI SAL version %x.%02x\n", version >> 8, version & 0x00FF);
 
        /*
index 892665bb12b1ec766491222ac67c2f9103c12ef4..bb4f00c0cbe94f8a5dfe1c822a072f1c6d4de928 100644 (file)
@@ -58,13 +58,13 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len,
        if (copy_from_user(&new_mask, user_mask_ptr, sizeof(new_mask)))
                return -EFAULT;
 
-       lock_cpu_hotplug();
+       get_online_cpus();
        read_lock(&tasklist_lock);
 
        p = find_process_by_pid(pid);
        if (!p) {
                read_unlock(&tasklist_lock);
-               unlock_cpu_hotplug();
+               put_online_cpus();
                return -ESRCH;
        }
 
@@ -106,7 +106,7 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len,
 
 out_unlock:
        put_task_struct(p);
-       unlock_cpu_hotplug();
+       put_online_cpus();
        return retval;
 }
 
@@ -125,7 +125,7 @@ asmlinkage long mipsmt_sys_sched_getaffinity(pid_t pid, unsigned int len,
        if (len < real_len)
                return -EINVAL;
 
-       lock_cpu_hotplug();
+       get_online_cpus();
        read_lock(&tasklist_lock);
 
        retval = -ESRCH;
@@ -140,7 +140,7 @@ asmlinkage long mipsmt_sys_sched_getaffinity(pid_t pid, unsigned int len,
 
 out_unlock:
        read_unlock(&tasklist_lock);
-       unlock_cpu_hotplug();
+       put_online_cpus();
        if (retval)
                return retval;
        if (copy_to_user(user_mask_ptr, &mask, real_len))
index 412e6b42986f2535ddfd5e101caaec85c76f7dc6..c4ad54e0f288cde7934c1cbbdda987ea249e8e7b 100644 (file)
@@ -153,7 +153,7 @@ static int pseries_add_processor(struct device_node *np)
        for (i = 0; i < nthreads; i++)
                cpu_set(i, tmp);
 
-       lock_cpu_hotplug();
+       cpu_maps_update_begin();
 
        BUG_ON(!cpus_subset(cpu_present_map, cpu_possible_map));
 
@@ -190,7 +190,7 @@ static int pseries_add_processor(struct device_node *np)
        }
        err = 0;
 out_unlock:
-       unlock_cpu_hotplug();
+       cpu_maps_update_done();
        return err;
 }
 
@@ -211,7 +211,7 @@ static void pseries_remove_processor(struct device_node *np)
 
        nthreads = len / sizeof(u32);
 
-       lock_cpu_hotplug();
+       cpu_maps_update_begin();
        for (i = 0; i < nthreads; i++) {
                for_each_present_cpu(cpu) {
                        if (get_hard_smp_processor_id(cpu) != intserv[i])
@@ -225,7 +225,7 @@ static void pseries_remove_processor(struct device_node *np)
                        printk(KERN_WARNING "Could not find cpu to remove "
                               "with physical id 0x%x\n", intserv[i]);
        }
-       unlock_cpu_hotplug();
+       cpu_maps_update_done();
 }
 
 static int pseries_smp_notifier(struct notifier_block *nb,
index 73401c820110a2a877f999c702e83d593e4f9f08..e3078ce41518aec0abb0579a5c2f9cb21315dd44 100644 (file)
@@ -382,7 +382,7 @@ static void do_event_scan_all_cpus(long delay)
 {
        int cpu;
 
-       lock_cpu_hotplug();
+       get_online_cpus();
        cpu = first_cpu(cpu_online_map);
        for (;;) {
                set_cpus_allowed(current, cpumask_of_cpu(cpu));
@@ -390,15 +390,15 @@ static void do_event_scan_all_cpus(long delay)
                set_cpus_allowed(current, CPU_MASK_ALL);
 
                /* Drop hotplug lock, and sleep for the specified delay */
-               unlock_cpu_hotplug();
+               put_online_cpus();
                msleep_interruptible(delay);
-               lock_cpu_hotplug();
+               get_online_cpus();
 
                cpu = next_cpu(cpu, cpu_online_map);
                if (cpu == NR_CPUS)
                        break;
        }
-       unlock_cpu_hotplug();
+       put_online_cpus();
 }
 
 static int rtasd(void *unused)
index 3b20613325dcbf88ef7cd7c3626d8a744b12ca4a..beb45c9c08357911a78af58f24640556b0a19240 100644 (file)
@@ -349,7 +349,7 @@ int mtrr_add_page(unsigned long base, unsigned long size,
        replace = -1;
 
        /* No CPU hotplug when we change MTRR entries */
-       lock_cpu_hotplug();
+       get_online_cpus();
        /*  Search for existing MTRR  */
        mutex_lock(&mtrr_mutex);
        for (i = 0; i < num_var_ranges; ++i) {
@@ -405,7 +405,7 @@ int mtrr_add_page(unsigned long base, unsigned long size,
        error = i;
  out:
        mutex_unlock(&mtrr_mutex);
-       unlock_cpu_hotplug();
+       put_online_cpus();
        return error;
 }
 
@@ -495,7 +495,7 @@ int mtrr_del_page(int reg, unsigned long base, unsigned long size)
 
        max = num_var_ranges;
        /* No CPU hotplug when we change MTRR entries */
-       lock_cpu_hotplug();
+       get_online_cpus();
        mutex_lock(&mtrr_mutex);
        if (reg < 0) {
                /*  Search for existing MTRR  */
@@ -536,7 +536,7 @@ int mtrr_del_page(int reg, unsigned long base, unsigned long size)
        error = reg;
  out:
        mutex_unlock(&mtrr_mutex);
-       unlock_cpu_hotplug();
+       put_online_cpus();
        return error;
 }
 /**
index 3a058bb16409329f9ee255c57e81ff1cefb8cf2a..e70f3881d7e486f1ec55c14bcea41065506aaff2 100644 (file)
@@ -283,7 +283,7 @@ sysret_careful:
 sysret_signal:
        TRACE_IRQS_ON
        sti
-       testl $(_TIF_SIGPENDING|_TIF_SINGLESTEP|_TIF_MCE_NOTIFY),%edx
+       testl $_TIF_DO_NOTIFY_MASK,%edx
        jz    1f
 
        /* Really a signal */
@@ -377,7 +377,7 @@ int_very_careful:
        jmp int_restore_rest
        
 int_signal:
-       testl $(_TIF_SIGPENDING|_TIF_SINGLESTEP|_TIF_MCE_NOTIFY),%edx
+       testl $_TIF_DO_NOTIFY_MASK,%edx
        jz 1f
        movq %rsp,%rdi          # &ptregs -> arg1
        xorl %esi,%esi          # oldset -> arg2
@@ -603,7 +603,7 @@ retint_careful:
        jmp retint_check
        
 retint_signal:
-       testl $(_TIF_SIGPENDING|_TIF_SINGLESTEP|_TIF_MCE_NOTIFY),%edx
+       testl $_TIF_DO_NOTIFY_MASK,%edx
        jz    retint_swapgs
        TRACE_IRQS_ON
        sti
index 09c315214a5ec87fdddd00f039255d69f3c01b9a..40cfd5488719b96fd6ccd8d3a890e54761d0c6c0 100644 (file)
@@ -436,7 +436,7 @@ static ssize_t microcode_write (struct file *file, const char __user *buf, size_
                return -EINVAL;
        }
 
-       lock_cpu_hotplug();
+       get_online_cpus();
        mutex_lock(&microcode_mutex);
 
        user_buffer = (void __user *) buf;
@@ -447,7 +447,7 @@ static ssize_t microcode_write (struct file *file, const char __user *buf, size_
                ret = (ssize_t)len;
 
        mutex_unlock(&microcode_mutex);
-       unlock_cpu_hotplug();
+       put_online_cpus();
 
        return ret;
 }
@@ -658,14 +658,14 @@ static ssize_t reload_store(struct sys_device *dev, const char *buf, size_t sz)
 
                old = current->cpus_allowed;
 
-               lock_cpu_hotplug();
+               get_online_cpus();
                set_cpus_allowed(current, cpumask_of_cpu(cpu));
 
                mutex_lock(&microcode_mutex);
                if (uci->valid)
                        err = cpu_request_microcode(cpu);
                mutex_unlock(&microcode_mutex);
-               unlock_cpu_hotplug();
+               put_online_cpus();
                set_cpus_allowed(current, old);
        }
        if (err)
@@ -817,9 +817,9 @@ static int __init microcode_init (void)
                return PTR_ERR(microcode_pdev);
        }
 
-       lock_cpu_hotplug();
+       get_online_cpus();
        error = sysdev_driver_register(&cpu_sysdev_class, &mc_sysdev_driver);
-       unlock_cpu_hotplug();
+       put_online_cpus();
        if (error) {
                microcode_dev_exit();
                platform_device_unregister(microcode_pdev);
@@ -839,9 +839,9 @@ static void __exit microcode_exit (void)
 
        unregister_hotcpu_notifier(&mc_cpu_notifier);
 
-       lock_cpu_hotplug();
+       get_online_cpus();
        sysdev_driver_unregister(&cpu_sysdev_class, &mc_sysdev_driver);
-       unlock_cpu_hotplug();
+       put_online_cpus();
 
        platform_device_unregister(microcode_pdev);
 }
index 9bdd83022f5f1659588409a2704d6a157f13e23e..20f29e4c1d332ea682e14acbc570ddfa19924ff7 100644 (file)
@@ -658,6 +658,9 @@ void do_notify_resume(struct pt_regs *regs, void *_unused,
        /* deal with pending signal delivery */
        if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))
                do_signal(regs);
+
+       if (thread_info_flags & _TIF_HRTICK_RESCHED)
+               hrtick_resched();
        
        clear_thread_flag(TIF_IRET);
 }
index ab086b0357fc7cc977378a97f3525ad47f105095..38d806467c0f3ee8ad7e1935a7a5e0b18de9cd26 100644 (file)
@@ -480,6 +480,9 @@ do_notify_resume(struct pt_regs *regs, void *unused, __u32 thread_info_flags)
        /* deal with pending signal delivery */
        if (thread_info_flags & (_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK))
                do_signal(regs);
+
+       if (thread_info_flags & _TIF_HRTICK_RESCHED)
+               hrtick_resched();
 }
 
 void signal_fault(struct pt_regs *regs, void __user *frame, char *where)
index 6fa6cf036c7065bf1ead1ba9f668f07bbab834cd..55771fd7e545c2875c64ad274ed8609f1298931a 100644 (file)
@@ -33,6 +33,19 @@ static void save_stack_address(void *data, unsigned long addr)
                trace->entries[trace->nr_entries++] = addr;
 }
 
+static void save_stack_address_nosched(void *data, unsigned long addr)
+{
+       struct stack_trace *trace = (struct stack_trace *)data;
+       if (in_sched_functions(addr))
+               return;
+       if (trace->skip > 0) {
+               trace->skip--;
+               return;
+       }
+       if (trace->nr_entries < trace->max_entries)
+               trace->entries[trace->nr_entries++] = addr;
+}
+
 static const struct stacktrace_ops save_stack_ops = {
        .warning = save_stack_warning,
        .warning_symbol = save_stack_warning_symbol,
@@ -40,6 +53,13 @@ static const struct stacktrace_ops save_stack_ops = {
        .address = save_stack_address,
 };
 
+static const struct stacktrace_ops save_stack_ops_nosched = {
+       .warning = save_stack_warning,
+       .warning_symbol = save_stack_warning_symbol,
+       .stack = save_stack_stack,
+       .address = save_stack_address_nosched,
+};
+
 /*
  * Save stack-backtrace addresses into a stack_trace buffer.
  */
@@ -50,3 +70,10 @@ void save_stack_trace(struct stack_trace *trace)
                trace->entries[trace->nr_entries++] = ULONG_MAX;
 }
 EXPORT_SYMBOL(save_stack_trace);
+
+void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace)
+{
+       dump_trace(tsk, NULL, NULL, &save_stack_ops_nosched, trace);
+       if (trace->nr_entries < trace->max_entries)
+               trace->entries[trace->nr_entries++] = ULONG_MAX;
+}
index ba63619ae5df20623ec530cc6eb7188da0b0c1df..2478cca653de8cabf4d5cc8cf0a77633750e164c 100644 (file)
@@ -459,6 +459,15 @@ config PATA_NETCELL
 
          If unsure, say N.
 
+config PATA_NINJA32
+       tristate "Ninja32/Delkin Cardbus ATA support (Experimental)"
+       depends on PCI && EXPERIMENTAL
+       help
+         This option enables support for the Ninja32, Delkin and
+         possibly other brands of Cardbus ATA adapter
+
+         If unsure, say N.
+
 config PATA_NS87410
        tristate "Nat Semi NS87410 PATA support (Experimental)"
        depends on PCI && EXPERIMENTAL
index b13feb2c5dae02cf934e1447b743a396749113fe..82550c16818c7977a6a64b41e2a49b74557b7abe 100644 (file)
@@ -41,6 +41,7 @@ obj-$(CONFIG_PATA_IT821X)     += pata_it821x.o
 obj-$(CONFIG_PATA_IT8213)      += pata_it8213.o
 obj-$(CONFIG_PATA_JMICRON)     += pata_jmicron.o
 obj-$(CONFIG_PATA_NETCELL)     += pata_netcell.o
+obj-$(CONFIG_PATA_NINJA32)     += pata_ninja32.o
 obj-$(CONFIG_PATA_NS87410)     += pata_ns87410.o
 obj-$(CONFIG_PATA_NS87415)     += pata_ns87415.o
 obj-$(CONFIG_PATA_OPTI)                += pata_opti.o
index 54f38c21dd9585e90f6a931fb6bb516eaf7af3c1..6f089b899a1a7e9587bbba731f9b9047e7c15eae 100644 (file)
@@ -198,18 +198,18 @@ enum {
 };
 
 struct ahci_cmd_hdr {
-       u32                     opts;
-       u32                     status;
-       u32                     tbl_addr;
-       u32                     tbl_addr_hi;
-       u32                     reserved[4];
+       __le32                  opts;
+       __le32                  status;
+       __le32                  tbl_addr;
+       __le32                  tbl_addr_hi;
+       __le32                  reserved[4];
 };
 
 struct ahci_sg {
-       u32                     addr;
-       u32                     addr_hi;
-       u32                     reserved;
-       u32                     flags_size;
+       __le32                  addr;
+       __le32                  addr_hi;
+       __le32                  reserved;
+       __le32                  flags_size;
 };
 
 struct ahci_host_priv {
@@ -597,6 +597,20 @@ static inline void __iomem *ahci_port_base(struct ata_port *ap)
        return __ahci_port_base(ap->host, ap->port_no);
 }
 
+static void ahci_enable_ahci(void __iomem *mmio)
+{
+       u32 tmp;
+
+       /* turn on AHCI_EN */
+       tmp = readl(mmio + HOST_CTL);
+       if (!(tmp & HOST_AHCI_EN)) {
+               tmp |= HOST_AHCI_EN;
+               writel(tmp, mmio + HOST_CTL);
+               tmp = readl(mmio + HOST_CTL);   /* flush && sanity check */
+               WARN_ON(!(tmp & HOST_AHCI_EN));
+       }
+}
+
 /**
  *     ahci_save_initial_config - Save and fixup initial config values
  *     @pdev: target PCI device
@@ -619,6 +633,9 @@ static void ahci_save_initial_config(struct pci_dev *pdev,
        u32 cap, port_map;
        int i;
 
+       /* make sure AHCI mode is enabled before accessing CAP */
+       ahci_enable_ahci(mmio);
+
        /* Values prefixed with saved_ are written back to host after
         * reset.  Values without are used for driver operation.
         */
@@ -1036,19 +1053,17 @@ static int ahci_deinit_port(struct ata_port *ap, const char **emsg)
 static int ahci_reset_controller(struct ata_host *host)
 {
        struct pci_dev *pdev = to_pci_dev(host->dev);
+       struct ahci_host_priv *hpriv = host->private_data;
        void __iomem *mmio = host->iomap[AHCI_PCI_BAR];
        u32 tmp;
 
        /* we must be in AHCI mode, before using anything
         * AHCI-specific, such as HOST_RESET.
         */
-       tmp = readl(mmio + HOST_CTL);
-       if (!(tmp & HOST_AHCI_EN)) {
-               tmp |= HOST_AHCI_EN;
-               writel(tmp, mmio + HOST_CTL);
-       }
+       ahci_enable_ahci(mmio);
 
        /* global controller reset */
+       tmp = readl(mmio + HOST_CTL);
        if ((tmp & HOST_RESET) == 0) {
                writel(tmp | HOST_RESET, mmio + HOST_CTL);
                readl(mmio + HOST_CTL); /* flush */
@@ -1067,8 +1082,7 @@ static int ahci_reset_controller(struct ata_host *host)
        }
 
        /* turn on AHCI mode */
-       writel(HOST_AHCI_EN, mmio + HOST_CTL);
-       (void) readl(mmio + HOST_CTL);  /* flush */
+       ahci_enable_ahci(mmio);
 
        /* some registers might be cleared on reset.  restore initial values */
        ahci_restore_initial_config(host);
@@ -1078,8 +1092,10 @@ static int ahci_reset_controller(struct ata_host *host)
 
                /* configure PCS */
                pci_read_config_word(pdev, 0x92, &tmp16);
-               tmp16 |= 0xf;
-               pci_write_config_word(pdev, 0x92, tmp16);
+               if ((tmp16 & hpriv->port_map) != hpriv->port_map) {
+                       tmp16 |= hpriv->port_map;
+                       pci_write_config_word(pdev, 0x92, tmp16);
+               }
        }
 
        return 0;
@@ -1480,35 +1496,31 @@ static void ahci_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
 static unsigned int ahci_fill_sg(struct ata_queued_cmd *qc, void *cmd_tbl)
 {
        struct scatterlist *sg;
-       struct ahci_sg *ahci_sg;
-       unsigned int n_sg = 0;
+       struct ahci_sg *ahci_sg = cmd_tbl + AHCI_CMD_TBL_HDR_SZ;
+       unsigned int si;
 
        VPRINTK("ENTER\n");
 
        /*
         * Next, the S/G list.
         */
-       ahci_sg = cmd_tbl + AHCI_CMD_TBL_HDR_SZ;
-       ata_for_each_sg(sg, qc) {
+       for_each_sg(qc->sg, sg, qc->n_elem, si) {
                dma_addr_t addr = sg_dma_address(sg);
                u32 sg_len = sg_dma_len(sg);
 
-               ahci_sg->addr = cpu_to_le32(addr & 0xffffffff);
-               ahci_sg->addr_hi = cpu_to_le32((addr >> 16) >> 16);
-               ahci_sg->flags_size = cpu_to_le32(sg_len - 1);
-
-               ahci_sg++;
-               n_sg++;
+               ahci_sg[si].addr = cpu_to_le32(addr & 0xffffffff);
+               ahci_sg[si].addr_hi = cpu_to_le32((addr >> 16) >> 16);
+               ahci_sg[si].flags_size = cpu_to_le32(sg_len - 1);
        }
 
-       return n_sg;
+       return si;
 }
 
 static void ahci_qc_prep(struct ata_queued_cmd *qc)
 {
        struct ata_port *ap = qc->ap;
        struct ahci_port_priv *pp = ap->private_data;
-       int is_atapi = is_atapi_taskfile(&qc->tf);
+       int is_atapi = ata_is_atapi(qc->tf.protocol);
        void *cmd_tbl;
        u32 opts;
        const u32 cmd_fis_len = 5; /* five dwords */
index 90329982bef760fe6a4cadead1f1d526943f4958..20534202fc79b28c5e93f944fe3224a460016318 100644 (file)
@@ -26,7 +26,7 @@
 #include <linux/libata.h>
 
 #define DRV_NAME "ata_generic"
-#define DRV_VERSION "0.2.13"
+#define DRV_VERSION "0.2.15"
 
 /*
  *     A generic parallel ATA driver using libata
@@ -48,27 +48,47 @@ static int generic_set_mode(struct ata_link *link, struct ata_device **unused)
        struct ata_port *ap = link->ap;
        int dma_enabled = 0;
        struct ata_device *dev;
+       struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 
        /* Bits 5 and 6 indicate if DMA is active on master/slave */
        if (ap->ioaddr.bmdma_addr)
                dma_enabled = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
 
+       if (pdev->vendor == PCI_VENDOR_ID_CENATEK)
+               dma_enabled = 0xFF;
+
        ata_link_for_each_dev(dev, link) {
-               if (ata_dev_enabled(dev)) {
-                       /* We don't really care */
-                       dev->pio_mode = XFER_PIO_0;
-                       dev->dma_mode = XFER_MW_DMA_0;
-                       /* We do need the right mode information for DMA or PIO
-                          and this comes from the current configuration flags */
-                       if (dma_enabled & (1 << (5 + dev->devno))) {
-                               ata_id_to_dma_mode(dev, XFER_MW_DMA_0);
-                               dev->flags &= ~ATA_DFLAG_PIO;
-                       } else {
-                               ata_dev_printk(dev, KERN_INFO, "configured for PIO\n");
-                               dev->xfer_mode = XFER_PIO_0;
-                               dev->xfer_shift = ATA_SHIFT_PIO;
-                               dev->flags |= ATA_DFLAG_PIO;
+               if (!ata_dev_enabled(dev))
+                       continue;
+
+               /* We don't really care */
+               dev->pio_mode = XFER_PIO_0;
+               dev->dma_mode = XFER_MW_DMA_0;
+               /* We do need the right mode information for DMA or PIO
+                  and this comes from the current configuration flags */
+               if (dma_enabled & (1 << (5 + dev->devno))) {
+                       unsigned int xfer_mask = ata_id_xfermask(dev->id);
+                       const char *name;
+
+                       if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
+                               name = ata_mode_string(xfer_mask);
+                       else {
+                               /* SWDMA perhaps? */
+                               name = "DMA";
+                               xfer_mask |= ata_xfer_mode2mask(XFER_MW_DMA_0);
                        }
+
+                       ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
+                                      name);
+
+                       dev->xfer_mode = ata_xfer_mask2mode(xfer_mask);
+                       dev->xfer_shift = ata_xfer_mode2shift(dev->xfer_mode);
+                       dev->flags &= ~ATA_DFLAG_PIO;
+               } else {
+                       ata_dev_printk(dev, KERN_INFO, "configured for PIO\n");
+                       dev->xfer_mode = XFER_PIO_0;
+                       dev->xfer_shift = ATA_SHIFT_PIO;
+                       dev->flags |= ATA_DFLAG_PIO;
                }
        }
        return 0;
@@ -185,6 +205,7 @@ static struct pci_device_id ata_generic[] = {
        { PCI_DEVICE(PCI_VENDOR_ID_HINT,   PCI_DEVICE_ID_HINT_VXPROII_IDE), },
        { PCI_DEVICE(PCI_VENDOR_ID_VIA,    PCI_DEVICE_ID_VIA_82C561), },
        { PCI_DEVICE(PCI_VENDOR_ID_OPTI,   PCI_DEVICE_ID_OPTI_82C558), },
+       { PCI_DEVICE(PCI_VENDOR_ID_CENATEK,PCI_DEVICE_ID_CENATEK_IDE), },
        { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO), },
        { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1), },
        { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2),  },
index b406b39b878e90e981f89d10decf52369ac20bca..a65c8ae5c461136bae02ccf766030d1c3ecb20e4 100644 (file)
@@ -101,39 +101,21 @@ enum {
        ICH5_PMR                = 0x90, /* port mapping register */
        ICH5_PCS                = 0x92, /* port control and status */
        PIIX_SCC                = 0x0A, /* sub-class code register */
+       PIIX_SIDPR_BAR          = 5,
+       PIIX_SIDPR_LEN          = 16,
+       PIIX_SIDPR_IDX          = 0,
+       PIIX_SIDPR_DATA         = 4,
 
-       PIIX_FLAG_SCR           = (1 << 26), /* SCR available */
        PIIX_FLAG_AHCI          = (1 << 27), /* AHCI possible */
        PIIX_FLAG_CHECKINTR     = (1 << 28), /* make sure PCI INTx enabled */
+       PIIX_FLAG_SIDPR         = (1 << 29), /* SATA idx/data pair regs */
 
        PIIX_PATA_FLAGS         = ATA_FLAG_SLAVE_POSS,
        PIIX_SATA_FLAGS         = ATA_FLAG_SATA | PIIX_FLAG_CHECKINTR,
 
-       /* combined mode.  if set, PATA is channel 0.
-        * if clear, PATA is channel 1.
-        */
-       PIIX_PORT_ENABLED       = (1 << 0),
-       PIIX_PORT_PRESENT       = (1 << 4),
-
        PIIX_80C_PRI            = (1 << 5) | (1 << 4),
        PIIX_80C_SEC            = (1 << 7) | (1 << 6),
 
-       /* controller IDs */
-       piix_pata_mwdma         = 0,    /* PIIX3 MWDMA only */
-       piix_pata_33,                   /* PIIX4 at 33Mhz */
-       ich_pata_33,                    /* ICH up to UDMA 33 only */
-       ich_pata_66,                    /* ICH up to 66 Mhz */
-       ich_pata_100,                   /* ICH up to UDMA 100 */
-       ich5_sata,
-       ich6_sata,
-       ich6_sata_ahci,
-       ich6m_sata_ahci,
-       ich8_sata_ahci,
-       ich8_2port_sata,
-       ich8m_apple_sata_ahci,          /* locks up on second port enable */
-       tolapai_sata_ahci,
-       piix_pata_vmw,                  /* PIIX4 for VMware, spurious DMA_ERR */
-
        /* constants for mapping table */
        P0                      = 0,  /* port 0 */
        P1                      = 1,  /* port 1 */
@@ -149,6 +131,24 @@ enum {
        PIIX_HOST_BROKEN_SUSPEND = (1 << 24),
 };
 
+enum piix_controller_ids {
+       /* controller IDs */
+       piix_pata_mwdma,        /* PIIX3 MWDMA only */
+       piix_pata_33,           /* PIIX4 at 33Mhz */
+       ich_pata_33,            /* ICH up to UDMA 33 only */
+       ich_pata_66,            /* ICH up to 66 Mhz */
+       ich_pata_100,           /* ICH up to UDMA 100 */
+       ich5_sata,
+       ich6_sata,
+       ich6_sata_ahci,
+       ich6m_sata_ahci,
+       ich8_sata_ahci,
+       ich8_2port_sata,
+       ich8m_apple_sata_ahci,  /* locks up on second port enable */
+       tolapai_sata_ahci,
+       piix_pata_vmw,                  /* PIIX4 for VMware, spurious DMA_ERR */
+};
+
 struct piix_map_db {
        const u32 mask;
        const u16 port_enable;
@@ -157,6 +157,7 @@ struct piix_map_db {
 
 struct piix_host_priv {
        const int *map;
+       void __iomem *sidpr;
 };
 
 static int piix_init_one(struct pci_dev *pdev,
@@ -167,6 +168,9 @@ static void piix_set_dmamode(struct ata_port *ap, struct ata_device *adev);
 static void ich_set_dmamode(struct ata_port *ap, struct ata_device *adev);
 static int ich_pata_cable_detect(struct ata_port *ap);
 static u8 piix_vmw_bmdma_status(struct ata_port *ap);
+static int piix_sidpr_scr_read(struct ata_port *ap, unsigned int reg, u32 *val);
+static int piix_sidpr_scr_write(struct ata_port *ap, unsigned int reg, u32 val);
+static void piix_sidpr_error_handler(struct ata_port *ap);
 #ifdef CONFIG_PM
 static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg);
 static int piix_pci_device_resume(struct pci_dev *pdev);
@@ -321,7 +325,6 @@ static const struct ata_port_operations piix_pata_ops = {
        .post_internal_cmd      = ata_bmdma_post_internal_cmd,
        .cable_detect           = ata_cable_40wire,
 
-       .irq_handler            = ata_interrupt,
        .irq_clear              = ata_bmdma_irq_clear,
        .irq_on                 = ata_irq_on,
 
@@ -353,7 +356,6 @@ static const struct ata_port_operations ich_pata_ops = {
        .post_internal_cmd      = ata_bmdma_post_internal_cmd,
        .cable_detect           = ich_pata_cable_detect,
 
-       .irq_handler            = ata_interrupt,
        .irq_clear              = ata_bmdma_irq_clear,
        .irq_on                 = ata_irq_on,
 
@@ -380,7 +382,6 @@ static const struct ata_port_operations piix_sata_ops = {
        .error_handler          = ata_bmdma_error_handler,
        .post_internal_cmd      = ata_bmdma_post_internal_cmd,
 
-       .irq_handler            = ata_interrupt,
        .irq_clear              = ata_bmdma_irq_clear,
        .irq_on                 = ata_irq_on,
 
@@ -419,6 +420,35 @@ static const struct ata_port_operations piix_vmw_ops = {
        .port_start             = ata_port_start,
 };
 
+static const struct ata_port_operations piix_sidpr_sata_ops = {
+       .tf_load                = ata_tf_load,
+       .tf_read                = ata_tf_read,
+       .check_status           = ata_check_status,
+       .exec_command           = ata_exec_command,
+       .dev_select             = ata_std_dev_select,
+
+       .bmdma_setup            = ata_bmdma_setup,
+       .bmdma_start            = ata_bmdma_start,
+       .bmdma_stop             = ata_bmdma_stop,
+       .bmdma_status           = ata_bmdma_status,
+       .qc_prep                = ata_qc_prep,
+       .qc_issue               = ata_qc_issue_prot,
+       .data_xfer              = ata_data_xfer,
+
+       .scr_read               = piix_sidpr_scr_read,
+       .scr_write              = piix_sidpr_scr_write,
+
+       .freeze                 = ata_bmdma_freeze,
+       .thaw                   = ata_bmdma_thaw,
+       .error_handler          = piix_sidpr_error_handler,
+       .post_internal_cmd      = ata_bmdma_post_internal_cmd,
+
+       .irq_clear              = ata_bmdma_irq_clear,
+       .irq_on                 = ata_irq_on,
+
+       .port_start             = ata_port_start,
+};
+
 static const struct piix_map_db ich5_map_db = {
        .mask = 0x7,
        .port_enable = 0x3,
@@ -526,7 +556,6 @@ static const struct piix_map_db *piix_map_db_table[] = {
 static struct ata_port_info piix_port_info[] = {
        [piix_pata_mwdma] =     /* PIIX3 MWDMA only */
        {
-               .sht            = &piix_sht,
                .flags          = PIIX_PATA_FLAGS,
                .pio_mask       = 0x1f, /* pio0-4 */
                .mwdma_mask     = 0x06, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
@@ -535,7 +564,6 @@ static struct ata_port_info piix_port_info[] = {
 
        [piix_pata_33] =        /* PIIX4 at 33MHz */
        {
-               .sht            = &piix_sht,
                .flags          = PIIX_PATA_FLAGS,
                .pio_mask       = 0x1f, /* pio0-4 */
                .mwdma_mask     = 0x06, /* mwdma1-2 ?? CHECK 0 should be ok but slow */
@@ -545,7 +573,6 @@ static struct ata_port_info piix_port_info[] = {
 
        [ich_pata_33] =         /* ICH0 - ICH at 33Mhz*/
        {
-               .sht            = &piix_sht,
                .flags          = PIIX_PATA_FLAGS,
                .pio_mask       = 0x1f, /* pio 0-4 */
                .mwdma_mask     = 0x06, /* Check: maybe 0x07  */
@@ -555,7 +582,6 @@ static struct ata_port_info piix_port_info[] = {
 
        [ich_pata_66] =         /* ICH controllers up to 66MHz */
        {
-               .sht            = &piix_sht,
                .flags          = PIIX_PATA_FLAGS,
                .pio_mask       = 0x1f, /* pio 0-4 */
                .mwdma_mask     = 0x06, /* MWDMA0 is broken on chip */
@@ -565,7 +591,6 @@ static struct ata_port_info piix_port_info[] = {
 
        [ich_pata_100] =
        {
-               .sht            = &piix_sht,
                .flags          = PIIX_PATA_FLAGS | PIIX_FLAG_CHECKINTR,
                .pio_mask       = 0x1f, /* pio0-4 */
                .mwdma_mask     = 0x06, /* mwdma1-2 */
@@ -575,7 +600,6 @@ static struct ata_port_info piix_port_info[] = {
 
        [ich5_sata] =
        {
-               .sht            = &piix_sht,
                .flags          = PIIX_SATA_FLAGS,
                .pio_mask       = 0x1f, /* pio0-4 */
                .mwdma_mask     = 0x07, /* mwdma0-2 */
@@ -585,8 +609,7 @@ static struct ata_port_info piix_port_info[] = {
 
        [ich6_sata] =
        {
-               .sht            = &piix_sht,
-               .flags          = PIIX_SATA_FLAGS | PIIX_FLAG_SCR,
+               .flags          = PIIX_SATA_FLAGS,
                .pio_mask       = 0x1f, /* pio0-4 */
                .mwdma_mask     = 0x07, /* mwdma0-2 */
                .udma_mask      = ATA_UDMA6,
@@ -595,9 +618,7 @@ static struct ata_port_info piix_port_info[] = {
 
        [ich6_sata_ahci] =
        {
-               .sht            = &piix_sht,
-               .flags          = PIIX_SATA_FLAGS | PIIX_FLAG_SCR |
-                                 PIIX_FLAG_AHCI,
+               .flags          = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI,
                .pio_mask       = 0x1f, /* pio0-4 */
                .mwdma_mask     = 0x07, /* mwdma0-2 */
                .udma_mask      = ATA_UDMA6,
@@ -606,9 +627,7 @@ static struct ata_port_info piix_port_info[] = {
 
        [ich6m_sata_ahci] =
        {
-               .sht            = &piix_sht,
-               .flags          = PIIX_SATA_FLAGS | PIIX_FLAG_SCR |
-                                 PIIX_FLAG_AHCI,
+               .flags          = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI,
                .pio_mask       = 0x1f, /* pio0-4 */
                .mwdma_mask     = 0x07, /* mwdma0-2 */
                .udma_mask      = ATA_UDMA6,
@@ -617,9 +636,8 @@ static struct ata_port_info piix_port_info[] = {
 
        [ich8_sata_ahci] =
        {
-               .sht            = &piix_sht,
-               .flags          = PIIX_SATA_FLAGS | PIIX_FLAG_SCR |
-                                 PIIX_FLAG_AHCI,
+               .flags          = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI |
+                                 PIIX_FLAG_SIDPR,
                .pio_mask       = 0x1f, /* pio0-4 */
                .mwdma_mask     = 0x07, /* mwdma0-2 */
                .udma_mask      = ATA_UDMA6,
@@ -628,9 +646,8 @@ static struct ata_port_info piix_port_info[] = {
 
        [ich8_2port_sata] =
        {
-               .sht            = &piix_sht,
-               .flags          = PIIX_SATA_FLAGS | PIIX_FLAG_SCR |
-                                 PIIX_FLAG_AHCI,
+               .flags          = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI |
+                                 PIIX_FLAG_SIDPR,
                .pio_mask       = 0x1f, /* pio0-4 */
                .mwdma_mask     = 0x07, /* mwdma0-2 */
                .udma_mask      = ATA_UDMA6,
@@ -639,9 +656,7 @@ static struct ata_port_info piix_port_info[] = {
 
        [tolapai_sata_ahci] =
        {
-               .sht            = &piix_sht,
-               .flags          = PIIX_SATA_FLAGS | PIIX_FLAG_SCR |
-                                 PIIX_FLAG_AHCI,
+               .flags          = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI,
                .pio_mask       = 0x1f, /* pio0-4 */
                .mwdma_mask     = 0x07, /* mwdma0-2 */
                .udma_mask      = ATA_UDMA6,
@@ -650,9 +665,8 @@ static struct ata_port_info piix_port_info[] = {
 
        [ich8m_apple_sata_ahci] =
        {
-               .sht            = &piix_sht,
-               .flags          = PIIX_SATA_FLAGS | PIIX_FLAG_SCR |
-                                 PIIX_FLAG_AHCI,
+               .flags          = PIIX_SATA_FLAGS | PIIX_FLAG_AHCI |
+                                 PIIX_FLAG_SIDPR,
                .pio_mask       = 0x1f, /* pio0-4 */
                .mwdma_mask     = 0x07, /* mwdma0-2 */
                .udma_mask      = ATA_UDMA6,
@@ -1001,6 +1015,180 @@ static void ich_set_dmamode(struct ata_port *ap, struct ata_device *adev)
        do_pata_set_dmamode(ap, adev, 1);
 }
 
+/*
+ * Serial ATA Index/Data Pair Superset Registers access
+ *
+ * Beginning from ICH8, there's a sane way to access SCRs using index
+ * and data register pair located at BAR5.  This creates an
+ * interesting problem of mapping two SCRs to one port.
+ *
+ * Although they have separate SCRs, the master and slave aren't
+ * independent enough to be treated as separate links - e.g. softreset
+ * resets both.  Also, there's no protocol defined for hard resetting
+ * singled device sharing the virtual port (no defined way to acquire
+ * device signature).  This is worked around by merging the SCR values
+ * into one sensible value and requesting follow-up SRST after
+ * hardreset.
+ *
+ * SCR merging is perfomed in nibbles which is the unit contents in
+ * SCRs are organized.  If two values are equal, the value is used.
+ * When they differ, merge table which lists precedence of possible
+ * values is consulted and the first match or the last entry when
+ * nothing matches is used.  When there's no merge table for the
+ * specific nibble, value from the first port is used.
+ */
+static const int piix_sidx_map[] = {
+       [SCR_STATUS]    = 0,
+       [SCR_ERROR]     = 2,
+       [SCR_CONTROL]   = 1,
+};
+
+static void piix_sidpr_sel(struct ata_device *dev, unsigned int reg)
+{
+       struct ata_port *ap = dev->link->ap;
+       struct piix_host_priv *hpriv = ap->host->private_data;
+
+       iowrite32(((ap->port_no * 2 + dev->devno) << 8) | piix_sidx_map[reg],
+                 hpriv->sidpr + PIIX_SIDPR_IDX);
+}
+
+static int piix_sidpr_read(struct ata_device *dev, unsigned int reg)
+{
+       struct piix_host_priv *hpriv = dev->link->ap->host->private_data;
+
+       piix_sidpr_sel(dev, reg);
+       return ioread32(hpriv->sidpr + PIIX_SIDPR_DATA);
+}
+
+static void piix_sidpr_write(struct ata_device *dev, unsigned int reg, u32 val)
+{
+       struct piix_host_priv *hpriv = dev->link->ap->host->private_data;
+
+       piix_sidpr_sel(dev, reg);
+       iowrite32(val, hpriv->sidpr + PIIX_SIDPR_DATA);
+}
+
+u32 piix_merge_scr(u32 val0, u32 val1, const int * const *merge_tbl)
+{
+       u32 val = 0;
+       int i, mi;
+
+       for (i = 0, mi = 0; i < 32 / 4; i++) {
+               u8 c0 = (val0 >> (i * 4)) & 0xf;
+               u8 c1 = (val1 >> (i * 4)) & 0xf;
+               u8 merged = c0;
+               const int *cur;
+
+               /* if no merge preference, assume the first value */
+               cur = merge_tbl[mi];
+               if (!cur)
+                       goto done;
+               mi++;
+
+               /* if two values equal, use it */
+               if (c0 == c1)
+                       goto done;
+
+               /* choose the first match or the last from the merge table */
+               while (*cur != -1) {
+                       if (c0 == *cur || c1 == *cur)
+                               break;
+                       cur++;
+               }
+               if (*cur == -1)
+                       cur--;
+               merged = *cur;
+       done:
+               val |= merged << (i * 4);
+       }
+
+       return val;
+}
+
+static int piix_sidpr_scr_read(struct ata_port *ap, unsigned int reg, u32 *val)
+{
+       const int * const sstatus_merge_tbl[] = {
+               /* DET */ (const int []){ 1, 3, 0, 4, 3, -1 },
+               /* SPD */ (const int []){ 2, 1, 0, -1 },
+               /* IPM */ (const int []){ 6, 2, 1, 0, -1 },
+               NULL,
+       };
+       const int * const scontrol_merge_tbl[] = {
+               /* DET */ (const int []){ 1, 0, 4, 0, -1 },
+               /* SPD */ (const int []){ 0, 2, 1, 0, -1 },
+               /* IPM */ (const int []){ 0, 1, 2, 3, 0, -1 },
+               NULL,
+       };
+       u32 v0, v1;
+
+       if (reg >= ARRAY_SIZE(piix_sidx_map))
+               return -EINVAL;
+
+       if (!(ap->flags & ATA_FLAG_SLAVE_POSS)) {
+               *val = piix_sidpr_read(&ap->link.device[0], reg);
+               return 0;
+       }
+
+       v0 = piix_sidpr_read(&ap->link.device[0], reg);
+       v1 = piix_sidpr_read(&ap->link.device[1], reg);
+
+       switch (reg) {
+       case SCR_STATUS:
+               *val = piix_merge_scr(v0, v1, sstatus_merge_tbl);
+               break;
+       case SCR_ERROR:
+               *val = v0 | v1;
+               break;
+       case SCR_CONTROL:
+               *val = piix_merge_scr(v0, v1, scontrol_merge_tbl);
+               break;
+       }
+
+       return 0;
+}
+
+static int piix_sidpr_scr_write(struct ata_port *ap, unsigned int reg, u32 val)
+{
+       if (reg >= ARRAY_SIZE(piix_sidx_map))
+               return -EINVAL;
+
+       piix_sidpr_write(&ap->link.device[0], reg, val);
+
+       if (ap->flags & ATA_FLAG_SLAVE_POSS)
+               piix_sidpr_write(&ap->link.device[1], reg, val);
+
+       return 0;
+}
+
+static int piix_sidpr_hardreset(struct ata_link *link, unsigned int *class,
+                               unsigned long deadline)
+{
+       const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
+       int rc;
+
+       /* do hardreset */
+       rc = sata_link_hardreset(link, timing, deadline);
+       if (rc) {
+               ata_link_printk(link, KERN_ERR,
+                               "COMRESET failed (errno=%d)\n", rc);
+               return rc;
+       }
+
+       /* TODO: phy layer with polling, timeouts, etc. */
+       if (ata_link_offline(link)) {
+               *class = ATA_DEV_NONE;
+               return 0;
+       }
+
+       return -EAGAIN;
+}
+
+static void piix_sidpr_error_handler(struct ata_port *ap)
+{
+       ata_bmdma_drive_eh(ap, ata_std_prereset, ata_std_softreset,
+                          piix_sidpr_hardreset, ata_std_postreset);
+}
+
 #ifdef CONFIG_PM
 static int piix_broken_suspend(void)
 {
@@ -1033,6 +1221,13 @@ static int piix_broken_suspend(void)
                                DMI_MATCH(DMI_PRODUCT_NAME, "TECRA M5"),
                        },
                },
+               {
+                       .ident = "TECRA M6",
+                       .matches = {
+                               DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+                               DMI_MATCH(DMI_PRODUCT_NAME, "TECRA M6"),
+                       },
+               },
                {
                        .ident = "TECRA M7",
                        .matches = {
@@ -1047,6 +1242,13 @@ static int piix_broken_suspend(void)
                                DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A8"),
                        },
                },
+               {
+                       .ident = "Satellite R20",
+                       .matches = {
+                               DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+                               DMI_MATCH(DMI_PRODUCT_NAME, "Satellite R20"),
+                       },
+               },
                {
                        .ident = "Satellite R25",
                        .matches = {
@@ -1253,10 +1455,10 @@ static int __devinit piix_check_450nx_errata(struct pci_dev *ata_dev)
        return no_piix_dma;
 }
 
-static void __devinit piix_init_pcs(struct pci_dev *pdev,
-                                   struct ata_port_info *pinfo,
+static void __devinit piix_init_pcs(struct ata_host *host,
                                    const struct piix_map_db *map_db)
 {
+       struct pci_dev *pdev = to_pci_dev(host->dev);
        u16 pcs, new_pcs;
 
        pci_read_config_word(pdev, ICH5_PCS, &pcs);
@@ -1270,11 +1472,10 @@ static void __devinit piix_init_pcs(struct pci_dev *pdev,
        }
 }
 
-static void __devinit piix_init_sata_map(struct pci_dev *pdev,
-                                        struct ata_port_info *pinfo,
-                                        const struct piix_map_db *map_db)
+static const int *__devinit piix_init_sata_map(struct pci_dev *pdev,
+                                              struct ata_port_info *pinfo,
+                                              const struct piix_map_db *map_db)
 {
-       struct piix_host_priv *hpriv = pinfo[0].private_data;
        const int *map;
        int i, invalid_map = 0;
        u8 map_value;
@@ -1298,7 +1499,6 @@ static void __devinit piix_init_sata_map(struct pci_dev *pdev,
                case IDE:
                        WARN_ON((i & 1) || map[i + 1] != IDE);
                        pinfo[i / 2] = piix_port_info[ich_pata_100];
-                       pinfo[i / 2].private_data = hpriv;
                        i++;
                        printk(" IDE IDE");
                        break;
@@ -1316,7 +1516,33 @@ static void __devinit piix_init_sata_map(struct pci_dev *pdev,
                dev_printk(KERN_ERR, &pdev->dev,
                           "invalid MAP value %u\n", map_value);
 
-       hpriv->map = map;
+       return map;
+}
+
+static void __devinit piix_init_sidpr(struct ata_host *host)
+{
+       struct pci_dev *pdev = to_pci_dev(host->dev);
+       struct piix_host_priv *hpriv = host->private_data;
+       int i;
+
+       /* check for availability */
+       for (i = 0; i < 4; i++)
+               if (hpriv->map[i] == IDE)
+                       return;
+
+       if (!(host->ports[0]->flags & PIIX_FLAG_SIDPR))
+               return;
+
+       if (pci_resource_start(pdev, PIIX_SIDPR_BAR) == 0 ||
+           pci_resource_len(pdev, PIIX_SIDPR_BAR) != PIIX_SIDPR_LEN)
+               return;
+
+       if (pcim_iomap_regions(pdev, 1 << PIIX_SIDPR_BAR, DRV_NAME))
+               return;
+
+       hpriv->sidpr = pcim_iomap_table(pdev)[PIIX_SIDPR_BAR];
+       host->ports[0]->ops = &piix_sidpr_sata_ops;
+       host->ports[1]->ops = &piix_sidpr_sata_ops;
 }
 
 static void piix_iocfg_bit18_quirk(struct pci_dev *pdev)
@@ -1375,8 +1601,10 @@ static int piix_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
        struct device *dev = &pdev->dev;
        struct ata_port_info port_info[2];
        const struct ata_port_info *ppi[] = { &port_info[0], &port_info[1] };
-       struct piix_host_priv *hpriv;
        unsigned long port_flags;
+       struct ata_host *host;
+       struct piix_host_priv *hpriv;
+       int rc;
 
        if (!printed_version++)
                dev_printk(KERN_DEBUG, &pdev->dev,
@@ -1386,17 +1614,31 @@ static int piix_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
        if (!in_module_init)
                return -ENODEV;
 
+       port_info[0] = piix_port_info[ent->driver_data];
+       port_info[1] = piix_port_info[ent->driver_data];
+
+       port_flags = port_info[0].flags;
+
+       /* enable device and prepare host */
+       rc = pcim_enable_device(pdev);
+       if (rc)
+               return rc;
+
+       /* SATA map init can change port_info, do it before prepping host */
        hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
        if (!hpriv)
                return -ENOMEM;
 
-       port_info[0] = piix_port_info[ent->driver_data];
-       port_info[1] = piix_port_info[ent->driver_data];
-       port_info[0].private_data = hpriv;
-       port_info[1].private_data = hpriv;
+       if (port_flags & ATA_FLAG_SATA)
+               hpriv->map = piix_init_sata_map(pdev, port_info,
+                                       piix_map_db_table[ent->driver_data]);
 
-       port_flags = port_info[0].flags;
+       rc = ata_pci_prepare_sff_host(pdev, ppi, &host);
+       if (rc)
+               return rc;
+       host->private_data = hpriv;
 
+       /* initialize controller */
        if (port_flags & PIIX_FLAG_AHCI) {
                u8 tmp;
                pci_read_config_byte(pdev, PIIX_SCC, &tmp);
@@ -1407,12 +1649,9 @@ static int piix_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
                }
        }
 
-       /* Initialize SATA map */
        if (port_flags & ATA_FLAG_SATA) {
-               piix_init_sata_map(pdev, port_info,
-                                  piix_map_db_table[ent->driver_data]);
-               piix_init_pcs(pdev, port_info,
-                             piix_map_db_table[ent->driver_data]);
+               piix_init_pcs(host, piix_map_db_table[ent->driver_data]);
+               piix_init_sidpr(host);
        }
 
        /* apply IOCFG bit18 quirk */
@@ -1431,12 +1670,14 @@ static int piix_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
                /* This writes into the master table but it does not
                   really matter for this errata as we will apply it to
                   all the PIIX devices on the board */
-               port_info[0].mwdma_mask = 0;
-               port_info[0].udma_mask = 0;
-               port_info[1].mwdma_mask = 0;
-               port_info[1].udma_mask = 0;
+               host->ports[0]->mwdma_mask = 0;
+               host->ports[0]->udma_mask = 0;
+               host->ports[1]->mwdma_mask = 0;
+               host->ports[1]->udma_mask = 0;
        }
-       return ata_pci_init_one(pdev, ppi);
+
+       pci_set_master(pdev);
+       return ata_pci_activate_sff_host(host, ata_interrupt, &piix_sht);
 }
 
 static int __init piix_init(void)
index 7bf4befd96bced87785d35c6903b3c38c23d23bc..9e8ec19260afa71ae5426b943fb4c17db6a6da19 100644 (file)
@@ -441,41 +441,78 @@ static int ata_dev_get_GTF(struct ata_device *dev, struct ata_acpi_gtf **gtf)
        return rc;
 }
 
+/**
+ * ata_acpi_gtm_xfermode - determine xfermode from GTM parameter
+ * @dev: target device
+ * @gtm: GTM parameter to use
+ *
+ * Determine xfermask for @dev from @gtm.
+ *
+ * LOCKING:
+ * None.
+ *
+ * RETURNS:
+ * Determined xfermask.
+ */
+unsigned long ata_acpi_gtm_xfermask(struct ata_device *dev,
+                                   const struct ata_acpi_gtm *gtm)
+{
+       unsigned long xfer_mask = 0;
+       unsigned int type;
+       int unit;
+       u8 mode;
+
+       /* we always use the 0 slot for crap hardware */
+       unit = dev->devno;
+       if (!(gtm->flags & 0x10))
+               unit = 0;
+
+       /* PIO */
+       mode = ata_timing_cycle2mode(ATA_SHIFT_PIO, gtm->drive[unit].pio);
+       xfer_mask |= ata_xfer_mode2mask(mode);
+
+       /* See if we have MWDMA or UDMA data. We don't bother with
+        * MWDMA if UDMA is available as this means the BIOS set UDMA
+        * and our error changedown if it works is UDMA to PIO anyway.
+        */
+       if (!(gtm->flags & (1 << (2 * unit))))
+               type = ATA_SHIFT_MWDMA;
+       else
+               type = ATA_SHIFT_UDMA;
+
+       mode = ata_timing_cycle2mode(type, gtm->drive[unit].dma);
+       xfer_mask |= ata_xfer_mode2mask(mode);
+
+       return xfer_mask;
+}
+EXPORT_SYMBOL_GPL(ata_acpi_gtm_xfermask);
+
 /**
  * ata_acpi_cbl_80wire         -       Check for 80 wire cable
  * @ap: Port to check
+ * @gtm: GTM data to use
  *
- * Return 1 if the ACPI mode data for this port indicates the BIOS selected
- * an 80wire mode.
+ * Return 1 if the @gtm indicates the BIOS selected an 80wire mode.
  */
-
-int ata_acpi_cbl_80wire(struct ata_port *ap)
+int ata_acpi_cbl_80wire(struct ata_port *ap, const struct ata_acpi_gtm *gtm)
 {
-       const struct ata_acpi_gtm *gtm = ata_acpi_init_gtm(ap);
-       int valid = 0;
+       struct ata_device *dev;
 
-       if (!gtm)
-               return 0;
+       ata_link_for_each_dev(dev, &ap->link) {
+               unsigned long xfer_mask, udma_mask;
+
+               if (!ata_dev_enabled(dev))
+                       continue;
+
+               xfer_mask = ata_acpi_gtm_xfermask(dev, gtm);
+               ata_unpack_xfermask(xfer_mask, NULL, NULL, &udma_mask);
+
+               if (udma_mask & ~ATA_UDMA_MASK_40C)
+                       return 1;
+       }
 
-       /* Split timing, DMA enabled */
-       if ((gtm->flags & 0x11) == 0x11 && gtm->drive[0].dma < 55)
-               valid |= 1;
-       if ((gtm->flags & 0x14) == 0x14 && gtm->drive[1].dma < 55)
-               valid |= 2;
-       /* Shared timing, DMA enabled */
-       if ((gtm->flags & 0x11) == 0x01 && gtm->drive[0].dma < 55)
-               valid |= 1;
-       if ((gtm->flags & 0x14) == 0x04 && gtm->drive[0].dma < 55)
-               valid |= 2;
-
-       /* Drive check */
-       if ((valid & 1) && ata_dev_enabled(&ap->link.device[0]))
-               return 1;
-       if ((valid & 2) && ata_dev_enabled(&ap->link.device[1]))
-               return 1;
        return 0;
 }
-
 EXPORT_SYMBOL_GPL(ata_acpi_cbl_80wire);
 
 static void ata_acpi_gtf_to_tf(struct ata_device *dev,
@@ -775,6 +812,36 @@ void ata_acpi_on_resume(struct ata_port *ap)
        }
 }
 
+/**
+ * ata_acpi_set_state - set the port power state
+ * @ap: target ATA port
+ * @state: state, on/off
+ *
+ * This function executes the _PS0/_PS3 ACPI method to set the power state.
+ * ACPI spec requires _PS0 when IDE power on and _PS3 when power off
+ */
+void ata_acpi_set_state(struct ata_port *ap, pm_message_t state)
+{
+       struct ata_device *dev;
+
+       if (!ap->acpi_handle || (ap->flags & ATA_FLAG_ACPI_SATA))
+               return;
+
+       /* channel first and then drives for power on and vica versa
+          for power off */
+       if (state.event == PM_EVENT_ON)
+               acpi_bus_set_power(ap->acpi_handle, ACPI_STATE_D0);
+
+       ata_link_for_each_dev(dev, &ap->link) {
+               if (dev->acpi_handle && ata_dev_enabled(dev))
+                       acpi_bus_set_power(dev->acpi_handle,
+                               state.event == PM_EVENT_ON ?
+                                       ACPI_STATE_D0 : ACPI_STATE_D3);
+       }
+       if (state.event != PM_EVENT_ON)
+               acpi_bus_set_power(ap->acpi_handle, ACPI_STATE_D3);
+}
+
 /**
  * ata_acpi_on_devcfg - ATA ACPI hook called on device donfiguration
  * @dev: target ATA device
index 6380726f75389ff85519c0605e50d84a5fc0087f..ce803d18e96af93bc58ab51b9ed9f5d9c87b827f 100644 (file)
@@ -119,6 +119,10 @@ int libata_noacpi = 0;
 module_param_named(noacpi, libata_noacpi, int, 0444);
 MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in probe/suspend/resume when set");
 
+int libata_allow_tpm = 0;
+module_param_named(allow_tpm, libata_allow_tpm, int, 0444);
+MODULE_PARM_DESC(allow_tpm, "Permit the use of TPM commands");
+
 MODULE_AUTHOR("Jeff Garzik");
 MODULE_DESCRIPTION("Library module for ATA devices");
 MODULE_LICENSE("GPL");
@@ -450,9 +454,9 @@ int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
  *     RETURNS:
  *     Packed xfer_mask.
  */
-static unsigned int ata_pack_xfermask(unsigned int pio_mask,
-                                     unsigned int mwdma_mask,
-                                     unsigned int udma_mask)
+unsigned long ata_pack_xfermask(unsigned long pio_mask,
+                               unsigned long mwdma_mask,
+                               unsigned long udma_mask)
 {
        return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
                ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
@@ -469,10 +473,8 @@ static unsigned int ata_pack_xfermask(unsigned int pio_mask,
  *     Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
  *     Any NULL distination masks will be ignored.
  */
-static void ata_unpack_xfermask(unsigned int xfer_mask,
-                               unsigned int *pio_mask,
-                               unsigned int *mwdma_mask,
-                               unsigned int *udma_mask)
+void ata_unpack_xfermask(unsigned long xfer_mask, unsigned long *pio_mask,
+                        unsigned long *mwdma_mask, unsigned long *udma_mask)
 {
        if (pio_mask)
                *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
@@ -486,9 +488,9 @@ static const struct ata_xfer_ent {
        int shift, bits;
        u8 base;
 } ata_xfer_tbl[] = {
-       { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
-       { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
-       { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
+       { ATA_SHIFT_PIO, ATA_NR_PIO_MODES, XFER_PIO_0 },
+       { ATA_SHIFT_MWDMA, ATA_NR_MWDMA_MODES, XFER_MW_DMA_0 },
+       { ATA_SHIFT_UDMA, ATA_NR_UDMA_MODES, XFER_UDMA_0 },
        { -1, },
 };
 
@@ -503,9 +505,9 @@ static const struct ata_xfer_ent {
  *     None.
  *
  *     RETURNS:
- *     Matching XFER_* value, 0 if no match found.
+ *     Matching XFER_* value, 0xff if no match found.
  */
-static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
+u8 ata_xfer_mask2mode(unsigned long xfer_mask)
 {
        int highbit = fls(xfer_mask) - 1;
        const struct ata_xfer_ent *ent;
@@ -513,7 +515,7 @@ static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
        for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
                if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
                        return ent->base + highbit - ent->shift;
-       return 0;
+       return 0xff;
 }
 
 /**
@@ -528,13 +530,14 @@ static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
  *     RETURNS:
  *     Matching xfer_mask, 0 if no match found.
  */
-static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
+unsigned long ata_xfer_mode2mask(u8 xfer_mode)
 {
        const struct ata_xfer_ent *ent;
 
        for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
                if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
-                       return 1 << (ent->shift + xfer_mode - ent->base);
+                       return ((2 << (ent->shift + xfer_mode - ent->base)) - 1)
+                               & ~((1 << ent->shift) - 1);
        return 0;
 }
 
@@ -550,7 +553,7 @@ static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
  *     RETURNS:
  *     Matching xfer_shift, -1 if no match found.
  */
-static int ata_xfer_mode2shift(unsigned int xfer_mode)
+int ata_xfer_mode2shift(unsigned long xfer_mode)
 {
        const struct ata_xfer_ent *ent;
 
@@ -574,7 +577,7 @@ static int ata_xfer_mode2shift(unsigned int xfer_mode)
  *     Constant C string representing highest speed listed in
  *     @mode_mask, or the constant C string "<n/a>".
  */
-static const char *ata_mode_string(unsigned int xfer_mask)
+const char *ata_mode_string(unsigned long xfer_mask)
 {
        static const char * const xfer_mode_str[] = {
                "PIO0",
@@ -947,8 +950,8 @@ unsigned int ata_dev_try_classify(struct ata_device *dev, int present,
        if (r_err)
                *r_err = err;
 
-       /* see if device passed diags: if master then continue and warn later */
-       if (err == 0 && dev->devno == 0)
+       /* see if device passed diags: continue and warn later */
+       if (err == 0)
                /* diagnostic fail : do nothing _YET_ */
                dev->horkage |= ATA_HORKAGE_DIAGNOSTIC;
        else if (err == 1)
@@ -1285,48 +1288,6 @@ static int ata_hpa_resize(struct ata_device *dev)
        return 0;
 }
 
-/**
- *     ata_id_to_dma_mode      -       Identify DMA mode from id block
- *     @dev: device to identify
- *     @unknown: mode to assume if we cannot tell
- *
- *     Set up the timing values for the device based upon the identify
- *     reported values for the DMA mode. This function is used by drivers
- *     which rely upon firmware configured modes, but wish to report the
- *     mode correctly when possible.
- *
- *     In addition we emit similarly formatted messages to the default
- *     ata_dev_set_mode handler, in order to provide consistency of
- *     presentation.
- */
-
-void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown)
-{
-       unsigned int mask;
-       u8 mode;
-
-       /* Pack the DMA modes */
-       mask = ((dev->id[63] >> 8) << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA;
-       if (dev->id[53] & 0x04)
-               mask |= ((dev->id[88] >> 8) << ATA_SHIFT_UDMA) & ATA_MASK_UDMA;
-
-       /* Select the mode in use */
-       mode = ata_xfer_mask2mode(mask);
-
-       if (mode != 0) {
-               ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
-                      ata_mode_string(mask));
-       } else {
-               /* SWDMA perhaps ? */
-               mode = unknown;
-               ata_dev_printk(dev, KERN_INFO, "configured for DMA\n");
-       }
-
-       /* Configure the device reporting */
-       dev->xfer_mode = mode;
-       dev->xfer_shift = ata_xfer_mode2shift(mode);
-}
-
 /**
  *     ata_noop_dev_select - Select device 0/1 on ATA bus
  *     @ap: ATA channel to manipulate
@@ -1464,9 +1425,9 @@ static inline void ata_dump_id(const u16 *id)
  *     RETURNS:
  *     Computed xfermask
  */
-static unsigned int ata_id_xfermask(const u16 *id)
+unsigned long ata_id_xfermask(const u16 *id)
 {
-       unsigned int pio_mask, mwdma_mask, udma_mask;
+       unsigned long pio_mask, mwdma_mask, udma_mask;
 
        /* Usual case. Word 53 indicates word 64 is valid */
        if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
@@ -1519,7 +1480,7 @@ static unsigned int ata_id_xfermask(const u16 *id)
 }
 
 /**
- *     ata_port_queue_task - Queue port_task
+ *     ata_pio_queue_task - Queue port_task
  *     @ap: The ata_port to queue port_task for
  *     @fn: workqueue function to be scheduled
  *     @data: data for @fn to use
@@ -1531,16 +1492,15 @@ static unsigned int ata_id_xfermask(const u16 *id)
  *     one task is active at any given time.
  *
  *     libata core layer takes care of synchronization between
- *     port_task and EH.  ata_port_queue_task() may be ignored for EH
+ *     port_task and EH.  ata_pio_queue_task() may be ignored for EH
  *     synchronization.
  *
  *     LOCKING:
  *     Inherited from caller.
  */
-void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data,
-                        unsigned long delay)
+static void ata_pio_queue_task(struct ata_port *ap, void *data,
+                              unsigned long delay)
 {
-       PREPARE_DELAYED_WORK(&ap->port_task, fn);
        ap->port_task_data = data;
 
        /* may fail if ata_port_flush_task() in progress */
@@ -2090,7 +2050,7 @@ int ata_dev_configure(struct ata_device *dev)
        struct ata_eh_context *ehc = &dev->link->eh_context;
        int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
        const u16 *id = dev->id;
-       unsigned int xfer_mask;
+       unsigned long xfer_mask;
        char revbuf[7];         /* XYZ-99\0 */
        char fwrevbuf[ATA_ID_FW_REV_LEN+1];
        char modelbuf[ATA_ID_PROD_LEN+1];
@@ -2161,8 +2121,14 @@ int ata_dev_configure(struct ata_device *dev)
                                               "supports DRM functions and may "
                                               "not be fully accessable.\n");
                        snprintf(revbuf, 7, "CFA");
-               } else
+               } else {
                        snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
+                       /* Warn the user if the device has TPM extensions */
+                       if (ata_id_has_tpm(id))
+                               ata_dev_printk(dev, KERN_WARNING,
+                                              "supports DRM functions and may "
+                                              "not be fully accessable.\n");
+               }
 
                dev->n_sectors = ata_id_n_sectors(id);
 
@@ -2295,19 +2261,8 @@ int ata_dev_configure(struct ata_device *dev)
                        dev->flags |= ATA_DFLAG_DIPM;
        }
 
-       if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
-               /* Let the user know. We don't want to disallow opens for
-                  rescue purposes, or in case the vendor is just a blithering
-                  idiot */
-               if (print_info) {
-                       ata_dev_printk(dev, KERN_WARNING,
-"Drive reports diagnostics failure. This may indicate a drive\n");
-                       ata_dev_printk(dev, KERN_WARNING,
-"fault or invalid emulation. Contact drive vendor for information.\n");
-               }
-       }
-
-       /* limit bridge transfers to udma5, 200 sectors */
+       /* Limit PATA drive on SATA cable bridge transfers to udma5,
+          200 sectors */
        if (ata_dev_knobble(dev)) {
                if (ata_msg_drv(ap) && print_info)
                        ata_dev_printk(dev, KERN_INFO,
@@ -2336,6 +2291,21 @@ int ata_dev_configure(struct ata_device *dev)
        if (ap->ops->dev_config)
                ap->ops->dev_config(dev);
 
+       if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
+               /* Let the user know. We don't want to disallow opens for
+                  rescue purposes, or in case the vendor is just a blithering
+                  idiot. Do this after the dev_config call as some controllers
+                  with buggy firmware may want to avoid reporting false device
+                  bugs */
+
+               if (print_info) {
+                       ata_dev_printk(dev, KERN_WARNING,
+"Drive reports diagnostics failure. This may indicate a drive\n");
+                       ata_dev_printk(dev, KERN_WARNING,
+"fault or invalid emulation. Contact drive vendor for information.\n");
+               }
+       }
+
        if (ata_msg_probe(ap))
                ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
                        __FUNCTION__, ata_chk_status(ap));
@@ -2386,6 +2356,18 @@ int ata_cable_unknown(struct ata_port *ap)
        return ATA_CBL_PATA_UNK;
 }
 
+/**
+ *     ata_cable_ignore        -       return ignored PATA cable.
+ *     @ap: port
+ *
+ *     Helper method for drivers which don't use cable type to limit
+ *     transfer mode.
+ */
+int ata_cable_ignore(struct ata_port *ap)
+{
+       return ATA_CBL_PATA_IGN;
+}
+
 /**
  *     ata_cable_sata  -       return SATA cable type
  *     @ap: port
@@ -2781,38 +2763,33 @@ int sata_set_spd(struct ata_link *link)
  */
 
 static const struct ata_timing ata_timing[] = {
+/*     { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960,   0 }, */
+       { XFER_PIO_0,     70, 290, 240, 600, 165, 150, 600,   0 },
+       { XFER_PIO_1,     50, 290,  93, 383, 125, 100, 383,   0 },
+       { XFER_PIO_2,     30, 290,  40, 330, 100,  90, 240,   0 },
+       { XFER_PIO_3,     30,  80,  70, 180,  80,  70, 180,   0 },
+       { XFER_PIO_4,     25,  70,  25, 120,  70,  25, 120,   0 },
+       { XFER_PIO_5,     15,  65,  25, 100,  65,  25, 100,   0 },
+       { XFER_PIO_6,     10,  55,  20,  80,  55,  20,  80,   0 },
 
-       { XFER_UDMA_6,     0,   0,   0,   0,   0,   0,   0,  15 },
-       { XFER_UDMA_5,     0,   0,   0,   0,   0,   0,   0,  20 },
-       { XFER_UDMA_4,     0,   0,   0,   0,   0,   0,   0,  30 },
-       { XFER_UDMA_3,     0,   0,   0,   0,   0,   0,   0,  45 },
+       { XFER_SW_DMA_0, 120,   0,   0,   0, 480, 480, 960,   0 },
+       { XFER_SW_DMA_1,  90,   0,   0,   0, 240, 240, 480,   0 },
+       { XFER_SW_DMA_2,  60,   0,   0,   0, 120, 120, 240,   0 },
 
-       { XFER_MW_DMA_4,  25,   0,   0,   0,  55,  20,  80,   0 },
+       { XFER_MW_DMA_0,  60,   0,   0,   0, 215, 215, 480,   0 },
+       { XFER_MW_DMA_1,  45,   0,   0,   0,  80,  50, 150,   0 },
+       { XFER_MW_DMA_2,  25,   0,   0,   0,  70,  25, 120,   0 },
        { XFER_MW_DMA_3,  25,   0,   0,   0,  65,  25, 100,   0 },
-       { XFER_UDMA_2,     0,   0,   0,   0,   0,   0,   0,  60 },
-       { XFER_UDMA_1,     0,   0,   0,   0,   0,   0,   0,  80 },
-       { XFER_UDMA_0,     0,   0,   0,   0,   0,   0,   0, 120 },
+       { XFER_MW_DMA_4,  25,   0,   0,   0,  55,  20,  80,   0 },
 
 /*     { XFER_UDMA_SLOW,  0,   0,   0,   0,   0,   0,   0, 150 }, */
-
-       { XFER_MW_DMA_2,  25,   0,   0,   0,  70,  25, 120,   0 },
-       { XFER_MW_DMA_1,  45,   0,   0,   0,  80,  50, 150,   0 },
-       { XFER_MW_DMA_0,  60,   0,   0,   0, 215, 215, 480,   0 },
-
-       { XFER_SW_DMA_2,  60,   0,   0,   0, 120, 120, 240,   0 },
-       { XFER_SW_DMA_1,  90,   0,   0,   0, 240, 240, 480,   0 },
-       { XFER_SW_DMA_0, 120,   0,   0,   0, 480, 480, 960,   0 },
-
-       { XFER_PIO_6,     10,  55,  20,  80,  55,  20,  80,   0 },
-       { XFER_PIO_5,     15,  65,  25, 100,  65,  25, 100,   0 },
-       { XFER_PIO_4,     25,  70,  25, 120,  70,  25, 120,   0 },
-       { XFER_PIO_3,     30,  80,  70, 180,  80,  70, 180,   0 },
-
-       { XFER_PIO_2,     30, 290,  40, 330, 100,  90, 240,   0 },
-       { XFER_PIO_1,     50, 290,  93, 383, 125, 100, 383,   0 },
-       { XFER_PIO_0,     70, 290, 240, 600, 165, 150, 600,   0 },
-
-/*     { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960,   0 }, */
+       { XFER_UDMA_0,     0,   0,   0,   0,   0,   0,   0, 120 },
+       { XFER_UDMA_1,     0,   0,   0,   0,   0,   0,   0,  80 },
+       { XFER_UDMA_2,     0,   0,   0,   0,   0,   0,   0,  60 },
+       { XFER_UDMA_3,     0,   0,   0,   0,   0,   0,   0,  45 },
+       { XFER_UDMA_4,     0,   0,   0,   0,   0,   0,   0,  30 },
+       { XFER_UDMA_5,     0,   0,   0,   0,   0,   0,   0,  20 },
+       { XFER_UDMA_6,     0,   0,   0,   0,   0,   0,   0,  15 },
 
        { 0xFF }
 };
@@ -2845,14 +2822,16 @@ void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
        if (what & ATA_TIMING_UDMA   ) m->udma    = max(a->udma,    b->udma);
 }
 
-static const struct ata_timing *ata_timing_find_mode(unsigned short speed)
+const struct ata_timing *ata_timing_find_mode(u8 xfer_mode)
 {
-       const struct ata_timing *t;
+       const struct ata_timing *t = ata_timing;
+
+       while (xfer_mode > t->mode)
+               t++;
 
-       for (t = ata_timing; t->mode != speed; t++)
-               if (t->mode == 0xFF)
-                       return NULL;
-       return t;
+       if (xfer_mode == t->mode)
+               return t;
+       return NULL;
 }
 
 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
@@ -2926,6 +2905,57 @@ int ata_timing_compute(struct ata_device *adev, unsigned short speed,
        return 0;
 }
 
+/**
+ *     ata_timing_cycle2mode - find xfer mode for the specified cycle duration
+ *     @xfer_shift: ATA_SHIFT_* value for transfer type to examine.
+ *     @cycle: cycle duration in ns
+ *
+ *     Return matching xfer mode for @cycle.  The returned mode is of
+ *     the transfer type specified by @xfer_shift.  If @cycle is too
+ *     slow for @xfer_shift, 0xff is returned.  If @cycle is faster
+ *     than the fastest known mode, the fasted mode is returned.
+ *
+ *     LOCKING:
+ *     None.
+ *
+ *     RETURNS:
+ *     Matching xfer_mode, 0xff if no match found.
+ */
+u8 ata_timing_cycle2mode(unsigned int xfer_shift, int cycle)
+{
+       u8 base_mode = 0xff, last_mode = 0xff;
+       const struct ata_xfer_ent *ent;
+       const struct ata_timing *t;
+
+       for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
+               if (ent->shift == xfer_shift)
+                       base_mode = ent->base;
+
+       for (t = ata_timing_find_mode(base_mode);
+            t && ata_xfer_mode2shift(t->mode) == xfer_shift; t++) {
+               unsigned short this_cycle;
+
+               switch (xfer_shift) {
+               case ATA_SHIFT_PIO:
+               case ATA_SHIFT_MWDMA:
+                       this_cycle = t->cycle;
+                       break;
+               case ATA_SHIFT_UDMA:
+                       this_cycle = t->udma;
+                       break;
+               default:
+                       return 0xff;
+               }
+
+               if (cycle > this_cycle)
+                       break;
+
+               last_mode = t->mode;
+       }
+
+       return last_mode;
+}
+
 /**
  *     ata_down_xfermask_limit - adjust dev xfer masks downward
  *     @dev: Device to adjust xfer masks
@@ -2944,8 +2974,8 @@ int ata_timing_compute(struct ata_device *adev, unsigned short speed,
 int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
 {
        char buf[32];
-       unsigned int orig_mask, xfer_mask;
-       unsigned int pio_mask, mwdma_mask, udma_mask;
+       unsigned long orig_mask, xfer_mask;
+       unsigned long pio_mask, mwdma_mask, udma_mask;
        int quiet, highbit;
 
        quiet = !!(sel & ATA_DNXFER_QUIET);
@@ -3039,7 +3069,7 @@ static int ata_dev_set_mode(struct ata_device *dev)
 
        /* Early MWDMA devices do DMA but don't allow DMA mode setting.
           Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */
-       if (dev->xfer_shift == ATA_SHIFT_MWDMA && 
+       if (dev->xfer_shift == ATA_SHIFT_MWDMA &&
            dev->dma_mode == XFER_MW_DMA_0 &&
            (dev->id[63] >> 8) & 1)
                err_mask &= ~AC_ERR_DEV;
@@ -3089,7 +3119,7 @@ int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
 
        /* step 1: calculate xfer_mask */
        ata_link_for_each_dev(dev, link) {
-               unsigned int pio_mask, dma_mask;
+               unsigned long pio_mask, dma_mask;
                unsigned int mode_mask;
 
                if (!ata_dev_enabled(dev))
@@ -3115,7 +3145,7 @@ int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
                dev->dma_mode = ata_xfer_mask2mode(dma_mask);
 
                found = 1;
-               if (dev->dma_mode)
+               if (dev->dma_mode != 0xff)
                        used_dma = 1;
        }
        if (!found)
@@ -3126,7 +3156,7 @@ int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
                if (!ata_dev_enabled(dev))
                        continue;
 
-               if (!dev->pio_mode) {
+               if (dev->pio_mode == 0xff) {
                        ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
                        rc = -EINVAL;
                        goto out;
@@ -3140,7 +3170,7 @@ int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
 
        /* step 3: set host DMA timings */
        ata_link_for_each_dev(dev, link) {
-               if (!ata_dev_enabled(dev) || !dev->dma_mode)
+               if (!ata_dev_enabled(dev) || dev->dma_mode == 0xff)
                        continue;
 
                dev->xfer_mode = dev->dma_mode;
@@ -3172,31 +3202,6 @@ int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
        return rc;
 }
 
-/**
- *     ata_set_mode - Program timings and issue SET FEATURES - XFER
- *     @link: link on which timings will be programmed
- *     @r_failed_dev: out paramter for failed device
- *
- *     Set ATA device disk transfer mode (PIO3, UDMA6, etc.).  If
- *     ata_set_mode() fails, pointer to the failing device is
- *     returned in @r_failed_dev.
- *
- *     LOCKING:
- *     PCI/etc. bus probe sem.
- *
- *     RETURNS:
- *     0 on success, negative errno otherwise
- */
-int ata_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
-{
-       struct ata_port *ap = link->ap;
-
-       /* has private set_mode? */
-       if (ap->ops->set_mode)
-               return ap->ops->set_mode(link, r_failed_dev);
-       return ata_do_set_mode(link, r_failed_dev);
-}
-
 /**
  *     ata_tf_to_host - issue ATA taskfile to host controller
  *     @ap: port to which command is being issued
@@ -4363,7 +4368,14 @@ static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
        tf.feature = SETFEATURES_XFER;
        tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING;
        tf.protocol = ATA_PROT_NODATA;
-       tf.nsect = dev->xfer_mode;
+       /* If we are using IORDY we must send the mode setting command */
+       if (ata_pio_need_iordy(dev))
+               tf.nsect = dev->xfer_mode;
+       /* If the device has IORDY and the controller does not - turn it off */
+       else if (ata_id_has_iordy(dev->id))
+               tf.nsect = 0x01;
+       else /* In the ancient relic department - skip all of this */
+               return 0;
 
        err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
 
@@ -4462,17 +4474,13 @@ static unsigned int ata_dev_init_params(struct ata_device *dev,
 void ata_sg_clean(struct ata_queued_cmd *qc)
 {
        struct ata_port *ap = qc->ap;
-       struct scatterlist *sg = qc->__sg;
+       struct scatterlist *sg = qc->sg;
        int dir = qc->dma_dir;
        void *pad_buf = NULL;
 
-       WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
        WARN_ON(sg == NULL);
 
-       if (qc->flags & ATA_QCFLAG_SINGLE)
-               WARN_ON(qc->n_elem > 1);
-
-       VPRINTK("unmapping %u sg elements\n", qc->n_elem);
+       VPRINTK("unmapping %u sg elements\n", qc->mapped_n_elem);
 
        /* if we padded the buffer out to 32-bit bound, and data
         * xfer direction is from-device, we must copy from the
@@ -4481,31 +4489,20 @@ void ata_sg_clean(struct ata_queued_cmd *qc)
        if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
                pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
 
-       if (qc->flags & ATA_QCFLAG_SG) {
-               if (qc->n_elem)
-                       dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
-               /* restore last sg */
-               sg_last(sg, qc->orig_n_elem)->length += qc->pad_len;
-               if (pad_buf) {
-                       struct scatterlist *psg = &qc->pad_sgent;
-                       void *addr = kmap_atomic(sg_page(psg), KM_IRQ0);
-                       memcpy(addr + psg->offset, pad_buf, qc->pad_len);
-                       kunmap_atomic(addr, KM_IRQ0);
-               }
-       } else {
-               if (qc->n_elem)
-                       dma_unmap_single(ap->dev,
-                               sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
-                               dir);
-               /* restore sg */
-               sg->length += qc->pad_len;
-               if (pad_buf)
-                       memcpy(qc->buf_virt + sg->length - qc->pad_len,
-                              pad_buf, qc->pad_len);
+       if (qc->mapped_n_elem)
+               dma_unmap_sg(ap->dev, sg, qc->mapped_n_elem, dir);
+       /* restore last sg */
+       if (qc->last_sg)
+               *qc->last_sg = qc->saved_last_sg;
+       if (pad_buf) {
+               struct scatterlist *psg = &qc->extra_sg[1];
+               void *addr = kmap_atomic(sg_page(psg), KM_IRQ0);
+               memcpy(addr + psg->offset, pad_buf, qc->pad_len);
+               kunmap_atomic(addr, KM_IRQ0);
        }
 
        qc->flags &= ~ATA_QCFLAG_DMAMAP;
-       qc->__sg = NULL;
+       qc->sg = NULL;
 }
 
 /**
@@ -4523,13 +4520,10 @@ static void ata_fill_sg(struct ata_queued_cmd *qc)
 {
        struct ata_port *ap = qc->ap;
        struct scatterlist *sg;
-       unsigned int idx;
+       unsigned int si, pi;
 
-       WARN_ON(qc->__sg == NULL);
-       WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
-
-       idx = 0;
-       ata_for_each_sg(sg, qc) {
+       pi = 0;
+       for_each_sg(qc->sg, sg, qc->n_elem, si) {
                u32 addr, offset;
                u32 sg_len, len;
 
@@ -4546,18 +4540,17 @@ static void ata_fill_sg(struct ata_queued_cmd *qc)
                        if ((offset + sg_len) > 0x10000)
                                len = 0x10000 - offset;
 
-                       ap->prd[idx].addr = cpu_to_le32(addr);
-                       ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
-                       VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
+                       ap->prd[pi].addr = cpu_to_le32(addr);
+                       ap->prd[pi].flags_len = cpu_to_le32(len & 0xffff);
+                       VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
 
-                       idx++;
+                       pi++;
                        sg_len -= len;
                        addr += len;
                }
        }
 
-       if (idx)
-               ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
+       ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
 }
 
 /**
@@ -4577,13 +4570,10 @@ static void ata_fill_sg_dumb(struct ata_queued_cmd *qc)
 {
        struct ata_port *ap = qc->ap;
        struct scatterlist *sg;
-       unsigned int idx;
-
-       WARN_ON(qc->__sg == NULL);
-       WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
+       unsigned int si, pi;
 
-       idx = 0;
-       ata_for_each_sg(sg, qc) {
+       pi = 0;
+       for_each_sg(qc->sg, sg, qc->n_elem, si) {
                u32 addr, offset;
                u32 sg_len, len, blen;
 
@@ -4601,25 +4591,24 @@ static void ata_fill_sg_dumb(struct ata_queued_cmd *qc)
                                len = 0x10000 - offset;
 
                        blen = len & 0xffff;
-                       ap->prd[idx].addr = cpu_to_le32(addr);
+                       ap->prd[pi].addr = cpu_to_le32(addr);
                        if (blen == 0) {
                           /* Some PATA chipsets like the CS5530 can't
                              cope with 0x0000 meaning 64K as the spec says */
-                               ap->prd[idx].flags_len = cpu_to_le32(0x8000);
+                               ap->prd[pi].flags_len = cpu_to_le32(0x8000);
                                blen = 0x8000;
-                               ap->prd[++idx].addr = cpu_to_le32(addr + 0x8000);
+                               ap->prd[++pi].addr = cpu_to_le32(addr + 0x8000);
                        }
-                       ap->prd[idx].flags_len = cpu_to_le32(blen);
-                       VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
+                       ap->prd[pi].flags_len = cpu_to_le32(blen);
+                       VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
 
-                       idx++;
+                       pi++;
                        sg_len -= len;
                        addr += len;
                }
        }
 
-       if (idx)
-               ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
+       ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
 }
 
 /**
@@ -4669,8 +4658,8 @@ int ata_check_atapi_dma(struct ata_queued_cmd *qc)
  */
 static int atapi_qc_may_overflow(struct ata_queued_cmd *qc)
 {
-       if (qc->tf.protocol != ATA_PROT_ATAPI &&
-           qc->tf.protocol != ATA_PROT_ATAPI_DMA)
+       if (qc->tf.protocol != ATAPI_PROT_PIO &&
+           qc->tf.protocol != ATAPI_PROT_DMA)
                return 0;
 
        if (qc->tf.flags & ATA_TFLAG_WRITE)
@@ -4755,33 +4744,6 @@ void ata_dumb_qc_prep(struct ata_queued_cmd *qc)
 
 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
 
-/**
- *     ata_sg_init_one - Associate command with memory buffer
- *     @qc: Command to be associated
- *     @buf: Memory buffer
- *     @buflen: Length of memory buffer, in bytes.
- *
- *     Initialize the data-related elements of queued_cmd @qc
- *     to point to a single memory buffer, @buf of byte length @buflen.
- *
- *     LOCKING:
- *     spin_lock_irqsave(host lock)
- */
-
-void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
-{
-       qc->flags |= ATA_QCFLAG_SINGLE;
-
-       qc->__sg = &qc->sgent;
-       qc->n_elem = 1;
-       qc->orig_n_elem = 1;
-       qc->buf_virt = buf;
-       qc->nbytes = buflen;
-       qc->cursg = qc->__sg;
-
-       sg_init_one(&qc->sgent, buf, buflen);
-}
-
 /**
  *     ata_sg_init - Associate command with scatter-gather table.
  *     @qc: Command to be associated
@@ -4795,84 +4757,103 @@ void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
  *     LOCKING:
  *     spin_lock_irqsave(host lock)
  */
-
 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
                 unsigned int n_elem)
 {
-       qc->flags |= ATA_QCFLAG_SG;
-       qc->__sg = sg;
+       qc->sg = sg;
        qc->n_elem = n_elem;
-       qc->orig_n_elem = n_elem;
-       qc->cursg = qc->__sg;
+       qc->cursg = qc->sg;
 }
 
-/**
- *     ata_sg_setup_one - DMA-map the memory buffer associated with a command.
- *     @qc: Command with memory buffer to be mapped.
- *
- *     DMA-map the memory buffer associated with queued_cmd @qc.
- *
- *     LOCKING:
- *     spin_lock_irqsave(host lock)
- *
- *     RETURNS:
- *     Zero on success, negative on error.
- */
-
-static int ata_sg_setup_one(struct ata_queued_cmd *qc)
+static unsigned int ata_sg_setup_extra(struct ata_queued_cmd *qc,
+                                      unsigned int *n_elem_extra,
+                                      unsigned int *nbytes_extra)
 {
        struct ata_port *ap = qc->ap;
-       int dir = qc->dma_dir;
-       struct scatterlist *sg = qc->__sg;
-       dma_addr_t dma_address;
-       int trim_sg = 0;
+       unsigned int n_elem = qc->n_elem;
+       struct scatterlist *lsg, *copy_lsg = NULL, *tsg = NULL, *esg = NULL;
+
+       *n_elem_extra = 0;
+       *nbytes_extra = 0;
+
+       /* needs padding? */
+       qc->pad_len = qc->nbytes & 3;
+
+       if (likely(!qc->pad_len))
+               return n_elem;
+
+       /* locate last sg and save it */
+       lsg = sg_last(qc->sg, n_elem);
+       qc->last_sg = lsg;
+       qc->saved_last_sg = *lsg;
+
+       sg_init_table(qc->extra_sg, ARRAY_SIZE(qc->extra_sg));
 
-       /* we must lengthen transfers to end on a 32-bit boundary */
-       qc->pad_len = sg->length & 3;
        if (qc->pad_len) {
+               struct scatterlist *psg = &qc->extra_sg[1];
                void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
-               struct scatterlist *psg = &qc->pad_sgent;
+               unsigned int offset;
 
                WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
 
                memset(pad_buf, 0, ATA_DMA_PAD_SZ);
 
-               if (qc->tf.flags & ATA_TFLAG_WRITE)
-                       memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
-                              qc->pad_len);
+               /* psg->page/offset are used to copy to-be-written
+                * data in this function or read data in ata_sg_clean.
+                */
+               offset = lsg->offset + lsg->length - qc->pad_len;
+               sg_set_page(psg, nth_page(sg_page(lsg), offset >> PAGE_SHIFT),
+                           qc->pad_len, offset_in_page(offset));
+
+               if (qc->tf.flags & ATA_TFLAG_WRITE) {
+                       void *addr = kmap_atomic(sg_page(psg), KM_IRQ0);
+                       memcpy(pad_buf, addr + psg->offset, qc->pad_len);
+                       kunmap_atomic(addr, KM_IRQ0);
+               }
 
                sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
                sg_dma_len(psg) = ATA_DMA_PAD_SZ;
-               /* trim sg */
-               sg->length -= qc->pad_len;
-               if (sg->length == 0)
-                       trim_sg = 1;
 
-               DPRINTK("padding done, sg->length=%u pad_len=%u\n",
-                       sg->length, qc->pad_len);
-       }
+               /* Trim the last sg entry and chain the original and
+                * padding sg lists.
+                *
+                * Because chaining consumes one sg entry, one extra
+                * sg entry is allocated and the last sg entry is
+                * copied to it if the length isn't zero after padded
+                * amount is removed.
+                *
+                * If the last sg entry is completely replaced by
+                * padding sg entry, the first sg entry is skipped
+                * while chaining.
+                */
+   &nb