Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
authorLinus Torvalds <torvalds@linux-foundation.org>
Wed, 2 Oct 2019 22:54:19 +0000 (15:54 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Wed, 2 Oct 2019 22:54:19 +0000 (15:54 -0700)
Pull timer fix from Ingo Molnar:
 "Fix a broadcast-timer handling race that can result in spuriously and
  indefinitely delayed hrtimers and even RCU stalls if the system is
  otherwise quiet"

* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  tick: broadcast-hrtimer: Fix a race in bc_set_next

627 files changed:
Documentation/ABI/testing/ima_policy
Documentation/ABI/testing/sysfs-class-watchdog
Documentation/admin-guide/kernel-parameters.txt
Documentation/devicetree/bindings/net/adi,adin.yaml
Documentation/devicetree/bindings/net/micrel-ksz90x1.txt
Documentation/devicetree/bindings/net/renesas,ravb.txt
Documentation/devicetree/bindings/net/snps,dwmac.yaml
Documentation/devicetree/bindings/pwm/pwm-mediatek.txt
Documentation/devicetree/bindings/pwm/pwm-sprd.txt [new file with mode: 0644]
Documentation/devicetree/bindings/thermal/qoriq-thermal.txt
Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml [new file with mode: 0644]
Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.txt [new file with mode: 0644]
Documentation/devicetree/bindings/watchdog/sunxi-wdt.txt [deleted file]
Documentation/devicetree/bindings/watchdog/watchdog.yaml [new file with mode: 0644]
Documentation/filesystems/index.rst
Documentation/filesystems/virtiofs.rst [new file with mode: 0644]
Documentation/networking/devlink-trap.rst
Documentation/process/embargoed-hardware-issues.rst
Documentation/security/IMA-templates.rst
Documentation/virt/kvm/api.txt
Documentation/watchdog/watchdog-parameters.rst
MAINTAINERS
Makefile
arch/arm/boot/dts/am3517-evm.dts
arch/arm/boot/dts/logicpd-som-lv.dtsi
arch/arm/boot/dts/logicpd-torpedo-baseboard.dtsi
arch/arm/configs/omap2plus_defconfig
arch/arm/mach-aspeed/Kconfig
arch/arm/mach-omap2/pdata-quirks.c
arch/arm64/Kconfig
arch/csky/abiv1/alignment.c
arch/csky/abiv1/cacheflush.c
arch/csky/abiv1/inc/abi/cacheflush.h
arch/csky/abiv1/inc/abi/page.h
arch/csky/abiv1/mmap.c
arch/csky/include/asm/barrier.h
arch/csky/include/asm/cache.h
arch/csky/include/asm/io.h
arch/csky/include/asm/pgtable.h
arch/csky/kernel/entry.S
arch/csky/kernel/perf_event.c
arch/csky/kernel/process.c
arch/csky/mm/cachev1.c
arch/csky/mm/cachev2.c
arch/csky/mm/dma-mapping.c
arch/csky/mm/init.c
arch/csky/mm/ioremap.c
arch/nios2/kernel/setup.c
arch/powerpc/include/asm/book3s/64/radix.h
arch/powerpc/include/asm/cputable.h
arch/powerpc/include/asm/kvm_ppc.h
arch/powerpc/include/asm/reg.h
arch/powerpc/kernel/cpu_setup_power.S
arch/powerpc/kernel/dbell.c
arch/powerpc/kernel/dt_cpu_ftrs.c
arch/powerpc/kernel/eeh.c
arch/powerpc/kvm/book3s_hv.c
arch/powerpc/kvm/book3s_hv_nested.c
arch/powerpc/kvm/book3s_hv_rm_mmu.c
arch/powerpc/kvm/book3s_hv_rm_xics.c
arch/powerpc/kvm/book3s_hv_rmhandlers.S
arch/powerpc/mm/book3s64/hash_native.c
arch/powerpc/mm/book3s64/hash_pgtable.c
arch/powerpc/mm/book3s64/mmu_context.c
arch/powerpc/mm/book3s64/radix_pgtable.c
arch/powerpc/mm/book3s64/radix_tlb.c
arch/powerpc/mm/init_64.c
arch/powerpc/mm/kasan/kasan_init_32.c
arch/powerpc/platforms/powernv/smp.c
arch/powerpc/platforms/pseries/lpar.c
arch/powerpc/platforms/pseries/papr_scm.c
arch/powerpc/platforms/pseries/pseries.h
arch/powerpc/platforms/pseries/setup.c
arch/powerpc/sysdev/xics/icp-native.c
arch/powerpc/sysdev/xics/icp-opal.c
arch/riscv/boot/dts/sifive/fu540-c000.dtsi
arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts
arch/riscv/configs/defconfig
arch/riscv/configs/rv32_defconfig
arch/riscv/include/asm/pgtable.h
arch/riscv/kernel/entry.S
arch/riscv/kernel/head.S
arch/riscv/kernel/smp.c
arch/riscv/kernel/time.c
arch/s390/Kconfig
arch/s390/kernel/kexec_elf.c
arch/s390/kernel/kexec_image.c
arch/s390/kernel/machine_kexec_file.c
arch/x86/Kconfig
arch/x86/boot/compressed/acpi.c
arch/x86/include/asm/acpi.h
arch/x86/include/asm/hyperv-tlfs.h
arch/x86/include/asm/kvm_host.h
arch/x86/include/asm/svm.h
arch/x86/include/asm/vmx.h
arch/x86/include/asm/x86_init.h
arch/x86/include/uapi/asm/svm.h
arch/x86/include/uapi/asm/vmx.h
arch/x86/kernel/acpi/boot.c
arch/x86/kernel/cpu/umwait.c
arch/x86/kernel/ima_arch.c
arch/x86/kernel/ioport.c
arch/x86/kernel/kexec-bzimage64.c
arch/x86/kernel/msr.c
arch/x86/kernel/x86_init.c
arch/x86/kvm/cpuid.c
arch/x86/kvm/hyperv.c
arch/x86/kvm/lapic.c
arch/x86/kvm/lapic.h
arch/x86/kvm/mmu.c
arch/x86/kvm/mmutrace.h
arch/x86/kvm/svm.c
arch/x86/kvm/vmx/capabilities.h
arch/x86/kvm/vmx/evmcs.h
arch/x86/kvm/vmx/nested.c
arch/x86/kvm/vmx/ops.h
arch/x86/kvm/vmx/vmx.c
arch/x86/kvm/vmx/vmx.h
arch/x86/kvm/x86.c
arch/x86/kvm/x86.h
arch/x86/mm/testmmiotrace.c
arch/x86/purgatory/Makefile
block/blk-flush.c
block/blk-iocost.c
block/blk-mq-sched.c
block/blk-mq.c
block/blk-sysfs.c
block/blk.h
block/elevator.c
certs/system_keyring.c
crypto/asymmetric_keys/pkcs7_verify.c
crypto/asymmetric_keys/verify_pefile.c
drivers/acpi/custom_method.c
drivers/acpi/osl.c
drivers/acpi/tables.c
drivers/atm/he.c
drivers/bus/ti-sysc.c
drivers/char/mem.c
drivers/char/random.c
drivers/firmware/arm_scmi/reset.c
drivers/firmware/efi/efi.c
drivers/gpio/gpio-mvebu.c
drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
drivers/gpu/drm/amd/amdgpu/smu_v11_0_i2c.c
drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h
drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c
drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c
drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c
drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c
drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c
drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c
drivers/gpu/drm/amd/display/dc/inc/resource.h
drivers/gpu/drm/amd/display/include/dal_asic_id.h
drivers/gpu/drm/amd/include/renoir_ip_offset.h
drivers/gpu/drm/amd/powerplay/amd_powerplay.c
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
drivers/gpu/drm/amd/powerplay/renoir_ppt.c
drivers/gpu/drm/amd/powerplay/renoir_ppt.h
drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
drivers/gpu/drm/drm_atomic_helper.c
drivers/gpu/drm/drm_atomic_state_helper.c
drivers/gpu/drm/drm_atomic_uapi.c
drivers/gpu/drm/drm_drv.c
drivers/gpu/drm/drm_ioctl.c
drivers/gpu/drm/drm_mode_object.c
drivers/gpu/drm/drm_self_refresh_helper.c
drivers/gpu/drm/nouveau/dispnv50/wndw.c
drivers/gpu/drm/panfrost/panfrost_devfreq.c
drivers/gpu/drm/panfrost/panfrost_device.c
drivers/gpu/drm/panfrost/panfrost_mmu.c
drivers/gpu/drm/radeon/radeon_drv.c
drivers/gpu/drm/radeon/radeon_kms.c
drivers/gpu/drm/rockchip/rockchip_drm_vop.c
drivers/i2c/busses/i2c-i801.c
drivers/i2c/busses/i2c-qcom-geni.c
drivers/i2c/busses/i2c-riic.c
drivers/i2c/i2c-slave-eeprom.c
drivers/infiniband/core/addr.c
drivers/iommu/amd_iommu.c
drivers/iommu/amd_iommu_types.h
drivers/isdn/mISDN/socket.c
drivers/mfd/db8500-prcmu.c
drivers/mmc/host/Kconfig
drivers/mmc/host/Makefile
drivers/mmc/host/sdhci-of-esdhc.c
drivers/mmc/host/sdhci-pci-core.c
drivers/mmc/host/sdhci-pci-gli.c [new file with mode: 0644]
drivers/mmc/host/sdhci-pci.h
drivers/mmc/host/sdhci-tegra.c
drivers/mmc/host/sdhci.c
drivers/mmc/host/sdhci.h
drivers/net/Kconfig
drivers/net/arcnet/Kconfig
drivers/net/arcnet/arcnet.c
drivers/net/can/usb/Kconfig
drivers/net/dsa/b53/b53_serdes.h
drivers/net/dsa/lantiq_pce.h
drivers/net/dsa/microchip/ksz_common.h
drivers/net/dsa/qca8k.c
drivers/net/dsa/sja1105/Kconfig
drivers/net/ethernet/Kconfig
drivers/net/ethernet/Makefile
drivers/net/ethernet/allwinner/Kconfig
drivers/net/ethernet/amazon/Kconfig
drivers/net/ethernet/amazon/ena/ena_eth_com.c
drivers/net/ethernet/aquantia/atlantic/aq_vec.c
drivers/net/ethernet/broadcom/bcmsysport.c
drivers/net/ethernet/cadence/macb_main.c
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c
drivers/net/ethernet/emulex/benet/Kconfig
drivers/net/ethernet/freescale/enetc/enetc_pf.c
drivers/net/ethernet/freescale/gianfar.c
drivers/net/ethernet/hisilicon/hix5hd2_gmac.c
drivers/net/ethernet/ibm/ibmvnic.c
drivers/net/ethernet/ibm/ibmvnic.h
drivers/net/ethernet/marvell/skge.c
drivers/net/ethernet/mellanox/mlx5/core/Kconfig
drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
drivers/net/ethernet/mellanox/mlx5/core/main.c
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h
drivers/net/ethernet/mellanox/mlxsw/spectrum.c
drivers/net/ethernet/mellanox/mlxsw/spectrum_flower.c
drivers/net/ethernet/netronome/nfp/abm/cls.c
drivers/net/ethernet/netronome/nfp/flower/main.c
drivers/net/ethernet/netx-eth.c [deleted file]
drivers/net/ethernet/ni/nixge.c
drivers/net/ethernet/nxp/Kconfig
drivers/net/ethernet/pensando/Kconfig
drivers/net/ethernet/pensando/ionic/ionic_debugfs.c
drivers/net/ethernet/pensando/ionic/ionic_lif.c
drivers/net/ethernet/qlogic/qede/qede_fp.c
drivers/net/ethernet/socionext/netsec.c
drivers/net/ethernet/socionext/sni_ave.c
drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
drivers/net/ethernet/stmicro/stmmac/stmmac_selftests.c
drivers/net/ethernet/xilinx/xilinx_axienet_main.c
drivers/net/macsec.c
drivers/net/phy/Kconfig
drivers/net/phy/micrel.c
drivers/net/phy/national.c
drivers/net/ppp/ppp_generic.c
drivers/net/tap.c
drivers/net/usb/cdc_ncm.c
drivers/net/usb/usbnet.c
drivers/net/vrf.c
drivers/net/wireless/ath/Kconfig
drivers/net/wireless/ath/ar5523/Kconfig
drivers/net/wireless/ath/ath6kl/Kconfig
drivers/net/wireless/ath/ath9k/Kconfig
drivers/net/wireless/ath/carl9170/Kconfig
drivers/net/wireless/ath/wil6210/txrx.c
drivers/net/wireless/atmel/Kconfig
drivers/net/wireless/intel/ipw2x00/Kconfig
drivers/net/wireless/intel/iwlegacy/Kconfig
drivers/net/wireless/intel/iwlwifi/Kconfig
drivers/net/wireless/intel/iwlwifi/mvm/fw.c
drivers/net/wireless/intel/iwlwifi/mvm/tt.c
drivers/net/wireless/mediatek/mt76/mt7615/mcu.c
drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h
drivers/net/wireless/ralink/rt2x00/Kconfig
drivers/net/wireless/realtek/rtw88/mac.c
drivers/net/wireless/realtek/rtw88/main.c
drivers/net/wireless/realtek/rtw88/pci.c
drivers/net/wireless/zydas/zd1211rw/zd_usb.c
drivers/nfc/st95hf/core.c
drivers/ntb/hw/amd/ntb_hw_amd.c
drivers/ntb/hw/amd/ntb_hw_amd.h
drivers/ntb/hw/idt/Kconfig
drivers/ntb/hw/mscc/ntb_hw_switchtec.c
drivers/ntb/ntb_transport.c
drivers/ntb/test/ntb_perf.c
drivers/nvdimm/btt.c
drivers/nvdimm/bus.c
drivers/nvdimm/namespace_devs.c
drivers/nvdimm/nd.h
drivers/nvdimm/pfn_devs.c
drivers/nvdimm/region.c
drivers/nvdimm/region_devs.c
drivers/nvdimm/security.c
drivers/of/of_mdio.c
drivers/pci/pci-sysfs.c
drivers/pci/proc.c
drivers/pci/syscall.c
drivers/pcmcia/cistpl.c
drivers/ptp/ptp_chardev.c
drivers/pwm/Kconfig
drivers/pwm/Makefile
drivers/pwm/core.c
drivers/pwm/pwm-atmel-hlcdc.c
drivers/pwm/pwm-atmel.c
drivers/pwm/pwm-bcm-iproc.c
drivers/pwm/pwm-bcm2835.c
drivers/pwm/pwm-cros-ec.c
drivers/pwm/pwm-fsl-ftm.c
drivers/pwm/pwm-hibvt.c
drivers/pwm/pwm-imx-tpm.c
drivers/pwm/pwm-imx27.c
drivers/pwm/pwm-jz4740.c
drivers/pwm/pwm-lpss.c
drivers/pwm/pwm-mediatek.c
drivers/pwm/pwm-meson.c
drivers/pwm/pwm-mxs.c
drivers/pwm/pwm-rcar.c
drivers/pwm/pwm-rockchip.c
drivers/pwm/pwm-sifive.c
drivers/pwm/pwm-sprd.c [new file with mode: 0644]
drivers/pwm/pwm-sti.c
drivers/pwm/pwm-stm32-lp.c
drivers/pwm/pwm-stm32.c
drivers/pwm/pwm-sun4i.c
drivers/pwm/pwm-zx.c
drivers/reset/reset-scmi.c
drivers/thermal/Kconfig
drivers/thermal/armada_thermal.c
drivers/thermal/db8500_thermal.c
drivers/thermal/intel/int340x_thermal/acpi_thermal_rel.c
drivers/thermal/intel/int340x_thermal/int3403_thermal.c
drivers/thermal/intel/int340x_thermal/processor_thermal_device.c
drivers/thermal/intel/intel_pch_thermal.c
drivers/thermal/qcom/tsens-8960.c
drivers/thermal/qcom/tsens-v0_1.c
drivers/thermal/qcom/tsens-v1.c
drivers/thermal/qcom/tsens.h
drivers/thermal/qoriq_thermal.c
drivers/thermal/rcar_gen3_thermal.c
drivers/thermal/tegra/soctherm.c
drivers/thermal/thermal_core.c
drivers/thermal/thermal_hwmon.c
drivers/thermal/thermal_mmio.c
drivers/tty/serial/serial_core.c
drivers/watchdog/Kconfig
drivers/watchdog/Makefile
drivers/watchdog/aspeed_wdt.c
drivers/watchdog/ath79_wdt.c
drivers/watchdog/cpwd.c
drivers/watchdog/diag288_wdt.c
drivers/watchdog/f71808e_wdt.c
drivers/watchdog/imx2_wdt.c
drivers/watchdog/imx7ulp_wdt.c [new file with mode: 0644]
drivers/watchdog/imx_sc_wdt.c
drivers/watchdog/jz4740_wdt.c
drivers/watchdog/ks8695_wdt.c [deleted file]
drivers/watchdog/nuc900_wdt.c [deleted file]
drivers/watchdog/orion_wdt.c
drivers/watchdog/qcom-wdt.c
drivers/watchdog/sprd_wdt.c
drivers/watchdog/ziirave_wdt.c
fs/9p/cache.c
fs/9p/vfs_file.c
fs/9p/vfs_super.c
fs/afs/dynroot.c
fs/afs/inode.c
fs/afs/internal.h
fs/btrfs/extent_io.c
fs/btrfs/qgroup.c
fs/btrfs/relocation.c
fs/btrfs/tests/btrfs-tests.c
fs/btrfs/volumes.c
fs/cifs/cifs_ioctl.h
fs/cifs/cifsacl.h
fs/cifs/cifsglob.h
fs/cifs/cifsproto.h
fs/cifs/cifssmb.c
fs/cifs/inode.c
fs/cifs/ioctl.c
fs/cifs/sess.c
fs/cifs/smb2inode.c
fs/cifs/smb2ops.c
fs/cifs/smb2pdu.c
fs/cifs/smb2proto.h
fs/cifs/smbfsctl.h
fs/cifs/xattr.c
fs/debugfs/file.c
fs/debugfs/inode.c
fs/erofs/data.c
fs/erofs/super.c
fs/erofs/zdata.c
fs/exec.c
fs/ext4/inode.c
fs/fhandle.c
fs/file_table.c
fs/fuse/Kconfig
fs/fuse/Makefile
fs/fuse/fuse_i.h
fs/fuse/inode.c
fs/fuse/virtio_fs.c [new file with mode: 0644]
fs/io_uring.c
fs/locks.c
fs/nfsd/Kconfig
fs/nfsd/Makefile
fs/nfsd/acl.h
fs/nfsd/blocklayout.c
fs/nfsd/export.c
fs/nfsd/filecache.c [new file with mode: 0644]
fs/nfsd/filecache.h [new file with mode: 0644]
fs/nfsd/netns.h
fs/nfsd/nfs3proc.c
fs/nfsd/nfs3xdr.c
fs/nfsd/nfs4callback.c
fs/nfsd/nfs4layouts.c
fs/nfsd/nfs4proc.c
fs/nfsd/nfs4recover.c
fs/nfsd/nfs4state.c
fs/nfsd/nfs4xdr.c
fs/nfsd/nfsctl.c
fs/nfsd/nfsproc.c
fs/nfsd/nfssvc.c
fs/nfsd/state.h
fs/nfsd/trace.h
fs/nfsd/vfs.c
fs/nfsd/vfs.h
fs/nfsd/xdr3.h
fs/nfsd/xdr4.h
fs/notify/fsnotify.h
fs/notify/group.c
fs/notify/mark.c
fs/proc/kcore.c
fs/tracefs/inode.c
include/asm-generic/vmlinux.lds.h
include/crypto/pkcs7.h
include/drm/drm_crtc.h
include/drm/drm_self_refresh_helper.h
include/linux/acpi.h
include/linux/cpu.h
include/linux/fs.h
include/linux/fsnotify_backend.h
include/linux/gfp.h
include/linux/huge_mm.h
include/linux/ima.h
include/linux/kexec.h
include/linux/lsm_hooks.h
include/linux/mempolicy.h
include/linux/memremap.h
include/linux/mlx5/mlx5_ifc.h
include/linux/mm_types.h
include/linux/module.h
include/linux/module_signature.h [new file with mode: 0644]
include/linux/platform_data/db8500_thermal.h [deleted file]
include/linux/platform_data/eth-netx.h [deleted file]
include/linux/pwm.h
include/linux/rcuwait.h
include/linux/sched.h
include/linux/sched/mm.h
include/linux/sched/task.h
include/linux/security.h
include/linux/skbuff.h
include/linux/sunrpc/cache.h
include/linux/sunrpc/svc_rdma.h
include/linux/verification.h
include/net/inet_timewait_sock.h
include/net/ipv6.h
include/net/netfilter/nf_tables.h
include/net/route.h
include/net/sch_generic.h
include/trace/events/kmem.h
include/uapi/linux/btf.h
include/uapi/linux/fuse.h
include/uapi/linux/kvm.h
include/uapi/linux/netfilter_bridge/ebtables.h
include/uapi/linux/nfsd/cld.h
include/uapi/linux/ptp_clock.h
include/uapi/linux/virtio_fs.h [new file with mode: 0644]
include/uapi/linux/virtio_ids.h
init/Kconfig
init/main.c
kernel/Makefile
kernel/bpf/btf.c
kernel/bpf/xskmap.c
kernel/cpu.c
kernel/events/core.c
kernel/exit.c
kernel/fork.c
kernel/kexec.c
kernel/kexec_file.c
kernel/locking/qspinlock_paravirt.h
kernel/module.c
kernel/module_signature.c [new file with mode: 0644]
kernel/module_signing.c
kernel/params.c
kernel/power/hibernate.c
kernel/sched/core.c
kernel/sched/fair.c
kernel/sched/membarrier.c
kernel/sched/sched.h
kernel/trace/bpf_trace.c
kernel/trace/trace.h
kernel/trace/trace_events_filter.c
kernel/trace/trace_kprobe.c
kernel/trace/trace_probe.c
lib/Kconfig
mm/huge_memory.c
mm/mempolicy.c
mm/page_alloc.c
mm/shmem.c
net/9p/client.c
net/appletalk/ddp.c
net/ax25/af_ax25.c
net/batman-adv/Kconfig
net/core/dev.c
net/core/dst.c
net/core/skbuff.c
net/dccp/ipv6.c
net/ieee802154/socket.c
net/ife/Kconfig
net/ipv4/Kconfig
net/ipv4/inet_connection_sock.c
net/ipv4/ip_forward.c
net/ipv4/ip_output.c
net/ipv4/route.c
net/ipv4/tcp_bbr.c
net/ipv4/tcp_ipv4.c
net/ipv4/tcp_minisocks.c
net/ipv4/tcp_timer.c
net/ipv4/xfrm4_policy.c
net/ipv6/fib6_rules.c
net/ipv6/inet6_connection_sock.c
net/ipv6/ip6_fib.c
net/ipv6/ip6_output.c
net/ipv6/netfilter/Kconfig
net/ipv6/tcp_ipv6.c
net/kcm/kcmsock.c
net/ncsi/internal.h
net/ncsi/ncsi-manage.c
net/netfilter/Kconfig
net/netfilter/ipvs/Kconfig
net/netfilter/nf_tables_api.c
net/netfilter/nf_tables_offload.c
net/netfilter/nft_flow_offload.c
net/netfilter/nft_lookup.c
net/nfc/llcp_sock.c
net/openvswitch/datapath.c
net/qrtr/qrtr.c
net/rds/Kconfig
net/rds/bind.c
net/sched/Kconfig
net/sched/act_api.c
net/sched/act_sample.c
net/sched/cls_api.c
net/sched/sch_api.c
net/sched/sch_cbs.c
net/sched/sch_htb.c
net/sched/sch_multiq.c
net/sched/sch_netem.c
net/sched/sch_sfb.c
net/sctp/ipv6.c
net/sunrpc/cache.c
net/sunrpc/svc.c
net/sunrpc/xprtrdma/svc_rdma.c
net/sunrpc/xprtrdma/svc_rdma_recvfrom.c
net/sunrpc/xprtrdma/svc_rdma_transport.c
net/xdp/xdp_umem.c
scripts/Makefile
security/Kconfig
security/Makefile
security/integrity/Kconfig
security/integrity/digsig.c
security/integrity/ima/Kconfig
security/integrity/ima/Makefile
security/integrity/ima/ima.h
security/integrity/ima/ima_api.c
security/integrity/ima/ima_appraise.c
security/integrity/ima/ima_crypto.c
security/integrity/ima/ima_main.c
security/integrity/ima/ima_modsig.c [new file with mode: 0644]
security/integrity/ima/ima_policy.c
security/integrity/ima/ima_template.c
security/integrity/ima/ima_template_lib.c
security/integrity/ima/ima_template_lib.h
security/integrity/integrity.h
security/lockdown/Kconfig [new file with mode: 0644]
security/lockdown/Makefile [new file with mode: 0644]
security/lockdown/lockdown.c [new file with mode: 0644]
security/security.c
tools/lib/bpf/btf_dump.c
tools/lib/bpf/xsk.c
tools/objtool/check.c
tools/testing/nvdimm/test/nfit_test.h
tools/testing/selftests/bpf/prog_tests/tcp_rtt.c
tools/testing/selftests/bpf/progs/strobemeta.h
tools/testing/selftests/bpf/test_sysctl.c
tools/testing/selftests/drivers/net/mlxsw/devlink_trap_l2_drops.sh
tools/testing/selftests/ftrace/test.d/kprobe/kprobe_syntax_errors.tc
tools/testing/selftests/kexec/test_kexec_file_load.sh
tools/testing/selftests/kvm/dirty_log_test.c
tools/testing/selftests/kvm/include/kvm_util.h
tools/testing/selftests/kvm/include/x86_64/processor.h
tools/testing/selftests/kvm/lib/aarch64/processor.c
tools/testing/selftests/kvm/lib/kvm_util.c
tools/testing/selftests/kvm/lib/x86_64/processor.c
tools/testing/selftests/kvm/lib/x86_64/ucall.c
tools/testing/selftests/kvm/x86_64/hyperv_cpuid.c
tools/testing/selftests/membarrier/.gitignore
tools/testing/selftests/membarrier/Makefile
tools/testing/selftests/membarrier/membarrier_test_impl.h [moved from tools/testing/selftests/membarrier/membarrier_test.c with 95% similarity]
tools/testing/selftests/membarrier/membarrier_test_multi_thread.c [new file with mode: 0644]
tools/testing/selftests/membarrier/membarrier_test_single_thread.c [new file with mode: 0644]
tools/testing/selftests/net/fib_nexthop_multiprefix.sh
tools/testing/selftests/net/fib_nexthops.sh
tools/testing/selftests/net/fib_tests.sh
tools/testing/selftests/powerpc/mm/Makefile
tools/testing/selftests/powerpc/mm/tlbie_test.c [new file with mode: 0644]
tools/testing/selftests/powerpc/tm/.gitignore
tools/testing/selftests/powerpc/tm/Makefile
tools/testing/selftests/powerpc/tm/tm-poison.c [new file with mode: 0644]
usr/include/Makefile

index fc376a3239083550a278411ce542badc37643b80..29ebe9afdac42c9148b1a54a90f0a92154ee63f5 100644 (file)
@@ -37,7 +37,7 @@ Description:
                        euid:= decimal value
                        fowner:= decimal value
                lsm:    are LSM specific
-               option: appraise_type:= [imasig]
+               option: appraise_type:= [imasig] [imasig|modsig]
                        template:= name of a defined IMA template type
                        (eg, ima-ng). Only valid when action is "measure".
                        pcr:= decimal value
@@ -105,3 +105,7 @@ Description:
 
                        measure func=KEXEC_KERNEL_CHECK pcr=4
                        measure func=KEXEC_INITRAMFS_CHECK pcr=5
+
+               Example of appraise rule allowing modsig appended signatures:
+
+                       appraise func=KEXEC_KERNEL_CHECK appraise_type=imasig|modsig
index 6317ade5ad19a90c48a459aecd981122fde48df9..675f9b5376612821bfc9d6fab5811da3c8406d8a 100644 (file)
@@ -72,3 +72,37 @@ Description:
                It is a read/write file. When read, the currently assigned
                pretimeout governor is returned.  When written, it sets
                the pretimeout governor.
+
+What:          /sys/class/watchdog/watchdog1/access_cs0
+Date:          August 2019
+Contact:       Ivan Mikhaylov <i.mikhaylov@yadro.com>,
+               Alexander Amelkin <a.amelkin@yadro.com>
+Description:
+               It is a read/write file. This attribute exists only if the
+               system has booted from the alternate flash chip due to
+               expiration of a watchdog timer of AST2400/AST2500 when
+               alternate boot function was enabled with 'aspeed,alt-boot'
+               devicetree option for that watchdog or with an appropriate
+               h/w strapping (for WDT2 only).
+
+               At alternate flash the 'access_cs0' sysfs node provides:
+                       ast2400: a way to get access to the primary SPI flash
+                               chip at CS0 after booting from the alternate
+                               chip at CS1.
+                       ast2500: a way to restore the normal address mapping
+                               from (CS0->CS1, CS1->CS0) to (CS0->CS0,
+                               CS1->CS1).
+
+               Clearing the boot code selection and timeout counter also
+               resets to the initial state the chip select line mapping. When
+               the SoC is in normal mapping state (i.e. booted from CS0),
+               clearing those bits does nothing for both versions of the SoC.
+               For alternate boot mode (booted from CS1 due to wdt2
+               expiration) the behavior differs as described above.
+
+               This option can be used with wdt2 (watchdog1) only.
+
+               When read, the current status of the boot code selection is
+               shown. When written with any non-zero value, it clears
+               the boot code selection and the timeout counter, which results
+               in chipselect reset for AST2400/AST2500.
index 944e03e29f65c9d31075d59bb06f8732d9fc4245..c7ac2f3ac99fd29bef9db55d03f01c20c9912ad9 100644 (file)
        lockd.nlm_udpport=M     [NFS] Assign UDP port.
                        Format: <integer>
 
+       lockdown=       [SECURITY]
+                       { integrity | confidentiality }
+                       Enable the kernel lockdown feature. If set to
+                       integrity, kernel features that allow userland to
+                       modify the running kernel are disabled. If set to
+                       confidentiality, kernel features that allow userland
+                       to extract confidential information from the kernel
+                       are also disabled.
+
        locktorture.nreaders_stress= [KNL]
                        Set the number of locking read-acquisition kthreads.
                        Defaults to being automatically set based on the
index 69375cb28e92074022bc3867a3244217c5aa45f7..d95cc691a65f9e013839677c8e5017bbe3e34df1 100644 (file)
@@ -36,12 +36,6 @@ properties:
     enum: [ 4, 8, 12, 16, 20, 24 ]
     default: 8
 
-  adi,disable-energy-detect:
-    description: |
-      Disables Energy Detect Powerdown Mode (default disabled, i.e energy detect
-      is enabled if this property is unspecified)
-    type: boolean
-
 examples:
   - |
     ethernet {
@@ -68,6 +62,5 @@ examples:
             reg = <1>;
 
             adi,fifo-depth-bits = <16>;
-            adi,disable-energy-detect;
         };
     };
index 5100358177c98127c169b046393cffda0f23dec6..b921731cd970e35a9221cae0f33fb982209949df 100644 (file)
@@ -12,8 +12,36 @@ and therefore may overwrite them.
 KSZ9021:
 
   All skew control options are specified in picoseconds. The minimum
-  value is 0, the maximum value is 3000, and it is incremented by 200ps
-  steps.
+  value is 0, the maximum value is 3000, and it can be specified in 200ps
+  steps, *but* these values are in not fact what you get because this chip's
+  skew values actually increase in 120ps steps, starting from -840ps. The
+  incorrect values came from an error in the original KSZ9021 datasheet
+  before it was corrected in revision 1.2 (Feb 2014), but it is too late to
+  change the driver now because of the many existing device trees that have
+  been created using values that go up in increments of 200.
+
+  The following table shows the actual skew delay you will get for each of the
+  possible devicetree values, and the number that will be programmed into the
+  corresponding pad skew register:
+
+  Device Tree Value    Delay   Pad Skew Register Value
+  -----------------------------------------------------
+       0               -840ps          0000
+       200             -720ps          0001
+       400             -600ps          0010
+       600             -480ps          0011
+       800             -360ps          0100
+       1000            -240ps          0101
+       1200            -120ps          0110
+       1400               0ps          0111
+       1600             120ps          1000
+       1800             240ps          1001
+       2000             360ps          1010
+       2200             480ps          1011
+       2400             600ps          1100
+       2600             720ps          1101
+       2800             840ps          1110
+       3000             960ps          1111
 
   Optional properties:
 
index 7ad36213093ed4b899c9bc1e74b1d5871f2680cc..5df4aa7f681154ee505b531f71c00b0bffcac626 100644 (file)
@@ -18,6 +18,7 @@ Required properties:
                R-Car Gen2 and RZ/G1 devices.
 
       - "renesas,etheravb-r8a774a1" for the R8A774A1 SoC.
+      - "renesas,etheravb-r8a774b1" for the R8A774B1 SoC.
       - "renesas,etheravb-r8a774c0" for the R8A774C0 SoC.
       - "renesas,etheravb-r8a7795" for the R8A7795 SoC.
       - "renesas,etheravb-r8a7796" for the R8A7796 SoC.
index ebe4537a7cce43589c10e8c08cbde29b4295dcc1..4845e29411e460151458a97a39256cff9deff8e7 100644 (file)
@@ -113,7 +113,7 @@ properties:
     const: stmmaceth
 
   mac-mode:
-    maxItems: 1
+    $ref: ethernet-controller.yaml#/properties/phy-connection-type
     description:
       The property is identical to 'phy-mode', and assumes that there is mode
       converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
index 991728cb46cb8cf24a2793ecc1ec8a417aa2df0b..c8501530173ca5440ef02386b2472e01222023df 100644 (file)
@@ -6,6 +6,8 @@ Required properties:
    - "mediatek,mt7622-pwm": found on mt7622 SoC.
    - "mediatek,mt7623-pwm": found on mt7623 SoC.
    - "mediatek,mt7628-pwm": found on mt7628 SoC.
+   - "mediatek,mt7629-pwm", "mediatek,mt7622-pwm": found on mt7629 SoC.
+   - "mediatek,mt8516-pwm": found on mt8516 SoC.
  - reg: physical base address and length of the controller's registers.
  - #pwm-cells: must be 2. See pwm.txt in this directory for a description of
    the cell format.
diff --git a/Documentation/devicetree/bindings/pwm/pwm-sprd.txt b/Documentation/devicetree/bindings/pwm/pwm-sprd.txt
new file mode 100644 (file)
index 0000000..16fa5a0
--- /dev/null
@@ -0,0 +1,40 @@
+Spreadtrum PWM controller
+
+Spreadtrum SoCs PWM controller provides 4 PWM channels.
+
+Required properties:
+- compatible : Should be "sprd,ums512-pwm".
+- reg: Physical base address and length of the controller's registers.
+- clocks: The phandle and specifier referencing the controller's clocks.
+- clock-names: Should contain following entries:
+  "pwmn": used to derive the functional clock for PWM channel n (n range: 0 ~ 3).
+  "enablen": for PWM channel n enable clock (n range: 0 ~ 3).
+- #pwm-cells: Should be 2. See pwm.txt in this directory for a description of
+  the cells format.
+
+Optional properties:
+- assigned-clocks: Reference to the PWM clock entries.
+- assigned-clock-parents: The phandle of the parent clock of PWM clock.
+
+Example:
+       pwms: pwm@32260000 {
+               compatible = "sprd,ums512-pwm";
+               reg = <0 0x32260000 0 0x10000>;
+               clock-names = "pwm0", "enable0",
+                       "pwm1", "enable1",
+                       "pwm2", "enable2",
+                       "pwm3", "enable3";
+               clocks = <&aon_clk CLK_PWM0>, <&aonapb_gate CLK_PWM0_EB>,
+                      <&aon_clk CLK_PWM1>, <&aonapb_gate CLK_PWM1_EB>,
+                      <&aon_clk CLK_PWM2>, <&aonapb_gate CLK_PWM2_EB>,
+                      <&aon_clk CLK_PWM3>, <&aonapb_gate CLK_PWM3_EB>;
+               assigned-clocks = <&aon_clk CLK_PWM0>,
+                       <&aon_clk CLK_PWM1>,
+                       <&aon_clk CLK_PWM2>,
+                       <&aon_clk CLK_PWM3>;
+               assigned-clock-parents = <&ext_26m>,
+                       <&ext_26m>,
+                       <&ext_26m>,
+                       <&ext_26m>;
+               #pwm-cells = <2>;
+       };
index 04cbb90a5d3ee51788cb63c5e668b39eea274795..28f2cbaf170250c86a2f33c199beaaaf3be6567a 100644 (file)
@@ -23,6 +23,7 @@ Required properties:
 Optional property:
 - little-endian : If present, the TMU registers are little endian. If absent,
        the default is big endian.
+- clocks : the clock for clocking the TMU silicon.
 
 Example:
 
diff --git a/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml b/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml
new file mode 100644 (file)
index 0000000..3a54f58
--- /dev/null
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/watchdog/allwinner,sun4i-a10-wdt.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Allwinner A10 Watchdog Device Tree Bindings
+
+allOf:
+  - $ref: "watchdog.yaml#"
+
+maintainers:
+  - Chen-Yu Tsai <wens@csie.org>
+  - Maxime Ripard <maxime.ripard@bootlin.com>
+
+properties:
+  compatible:
+    oneOf:
+      - const: allwinner,sun4i-a10-wdt
+      - const: allwinner,sun6i-a31-wdt
+      - items:
+          - const: allwinner,sun50i-a64-wdt
+          - const: allwinner,sun6i-a31-wdt
+      - items:
+          - const: allwinner,sun50i-h6-wdt
+          - const: allwinner,sun6i-a31-wdt
+      - items:
+          - const: allwinner,suniv-f1c100s-wdt
+          - const: allwinner,sun4i-a10-wdt
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - interrupts
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    wdt: watchdog@1c20c90 {
+        compatible = "allwinner,sun4i-a10-wdt";
+        reg = <0x01c20c90 0x10>;
+        interrupts = <24>;
+        clocks = <&osc24M>;
+        timeout-sec = <10>;
+    };
+
+...
index c5077a1f5cb3e4753fbf74bb3c905e8e8fce2c81..d78d4a8fb8686f03a2280c99d34bffa5a0b3608e 100644 (file)
@@ -4,6 +4,7 @@ Required properties:
  - compatible: must be one of:
        - "aspeed,ast2400-wdt"
        - "aspeed,ast2500-wdt"
+       - "aspeed,ast2600-wdt"
 
  - reg: physical base address of the controller and length of memory mapped
    region
diff --git a/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.txt b/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.txt
new file mode 100644 (file)
index 0000000..f902508
--- /dev/null
@@ -0,0 +1,22 @@
+* Freescale i.MX7ULP Watchdog Timer (WDT) Controller
+
+Required properties:
+- compatible : Should be "fsl,imx7ulp-wdt"
+- reg : Should contain WDT registers location and length
+- interrupts : Should contain WDT interrupt
+- clocks: Should contain a phandle pointing to the gated peripheral clock.
+
+Optional properties:
+- timeout-sec : Contains the watchdog timeout in seconds
+
+Examples:
+
+wdog1: watchdog@403d0000 {
+       compatible = "fsl,imx7ulp-wdt";
+       reg = <0x403d0000 0x10000>;
+       interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+       clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
+       assigned-clocks = <&pcc2 IMX7ULP_CLK_WDG1>;
+       assigned-clocks-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
+       timeout-sec = <40>;
+};
diff --git a/Documentation/devicetree/bindings/watchdog/sunxi-wdt.txt b/Documentation/devicetree/bindings/watchdog/sunxi-wdt.txt
deleted file mode 100644 (file)
index e65198d..0000000
+++ /dev/null
@@ -1,22 +0,0 @@
-Allwinner SoCs Watchdog timer
-
-Required properties:
-
-- compatible : should be one of
-       "allwinner,sun4i-a10-wdt"
-       "allwinner,sun6i-a31-wdt"
-       "allwinner,sun50i-a64-wdt","allwinner,sun6i-a31-wdt"
-       "allwinner,sun50i-h6-wdt","allwinner,sun6i-a31-wdt"
-       "allwinner,suniv-f1c100s-wdt", "allwinner,sun4i-a10-wdt"
-- reg : Specifies base physical address and size of the registers.
-
-Optional properties:
-- timeout-sec : Contains the watchdog timeout in seconds
-
-Example:
-
-wdt: watchdog@1c20c90 {
-       compatible = "allwinner,sun4i-a10-wdt";
-       reg = <0x01c20c90 0x10>;
-       timeout-sec = <10>;
-};
diff --git a/Documentation/devicetree/bindings/watchdog/watchdog.yaml b/Documentation/devicetree/bindings/watchdog/watchdog.yaml
new file mode 100644 (file)
index 0000000..187bf6c
--- /dev/null
@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/watchdog/watchdog.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Watchdog Generic Bindings
+
+maintainers:
+  - Guenter Roeck <linux@roeck-us.net>
+  - Wim Van Sebroeck <wim@linux-watchdog.org>
+
+description: |
+  This document describes generic bindings which can be used to
+  describe watchdog devices in a device tree.
+
+properties:
+  $nodename:
+    pattern: "^watchdog(@.*|-[0-9a-f])?$"
+
+  timeout-sec:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description:
+      Contains the watchdog timeout in seconds.
+
+...
index fd2bcf99cda0aabb88fed924bcaddc48e39a4c8f..2c3a9f761205e8ba2624d0de10f9b98916bfbd56 100644 (file)
@@ -37,3 +37,13 @@ filesystem implementations.
    journalling
    fscrypt
    fsverity
+
+Filesystems
+===========
+
+Documentation for filesystem implementations.
+
+.. toctree::
+   :maxdepth: 2
+
+   virtiofs
diff --git a/Documentation/filesystems/virtiofs.rst b/Documentation/filesystems/virtiofs.rst
new file mode 100644 (file)
index 0000000..4f338e3
--- /dev/null
@@ -0,0 +1,60 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+===================================================
+virtiofs: virtio-fs host<->guest shared file system
+===================================================
+
+- Copyright (C) 2019 Red Hat, Inc.
+
+Introduction
+============
+The virtiofs file system for Linux implements a driver for the paravirtualized
+VIRTIO "virtio-fs" device for guest<->host file system sharing.  It allows a
+guest to mount a directory that has been exported on the host.
+
+Guests often require access to files residing on the host or remote systems.
+Use cases include making files available to new guests during installation,
+booting from a root file system located on the host, persistent storage for
+stateless or ephemeral guests, and sharing a directory between guests.
+
+Although it is possible to use existing network file systems for some of these
+tasks, they require configuration steps that are hard to automate and they
+expose the storage network to the guest.  The virtio-fs device was designed to
+solve these problems by providing file system access without networking.
+
+Furthermore the virtio-fs device takes advantage of the co-location of the
+guest and host to increase performance and provide semantics that are not
+possible with network file systems.
+
+Usage
+=====
+Mount file system with tag ``myfs`` on ``/mnt``:
+
+.. code-block:: sh
+
+  guest# mount -t virtiofs myfs /mnt
+
+Please see https://virtio-fs.gitlab.io/ for details on how to configure QEMU
+and the virtiofsd daemon.
+
+Internals
+=========
+Since the virtio-fs device uses the FUSE protocol for file system requests, the
+virtiofs file system for Linux is integrated closely with the FUSE file system
+client.  The guest acts as the FUSE client while the host acts as the FUSE
+server.  The /dev/fuse interface between the kernel and userspace is replaced
+with the virtio-fs device interface.
+
+FUSE requests are placed into a virtqueue and processed by the host.  The
+response portion of the buffer is filled in by the host and the guest handles
+the request completion.
+
+Mapping /dev/fuse to virtqueues requires solving differences in semantics
+between /dev/fuse and virtqueues.  Each time the /dev/fuse device is read, the
+FUSE client may choose which request to transfer, making it possible to
+prioritize certain requests over others.  Virtqueues have queue semantics and
+it is not possible to change the order of requests that have been enqueued.
+This is especially important if the virtqueue becomes full since it is then
+impossible to add high priority requests.  In order to address this difference,
+the virtio-fs device uses a "hiprio" virtqueue specifically for requests that
+have priority over normal requests.
index c20c7c4836640fa3f0cfe943b4d4d89367cb8ea7..8e90a85f3bd53ab0d4eefffac614469c41928c66 100644 (file)
@@ -143,7 +143,8 @@ be added to the following table:
    * - ``port_list_is_empty``
      - ``drop``
      - Traps packets that the device decided to drop in case they need to be
-       flooded and the flood list is empty
+       flooded (e.g., unknown unicast, unregistered multicast) and there are
+       no ports the packets should be flooded to
    * - ``port_loopback_filter``
      - ``drop``
      - Traps packets that the device decided to drop in case after layer 2
index 402636356fbeab5763c4d89ce2f3752b60c6e3bd..a3c3349046c46113eff6763740882bce173cdd31 100644 (file)
@@ -143,6 +143,20 @@ via their employer, they cannot enter individual non-disclosure agreements
 in their role as Linux kernel developers. They will, however, agree to
 adhere to this documented process and the Memorandum of Understanding.
 
+The disclosing party should provide a list of contacts for all other
+entities who have already been, or should be, informed about the issue.
+This serves several purposes:
+
+ - The list of disclosed entities allows communication accross the
+   industry, e.g. other OS vendors, HW vendors, etc.
+
+ - The disclosed entities can be contacted to name experts who should
+   participate in the mitigation development.
+
+ - If an expert which is required to handle an issue is employed by an
+   listed entity or member of an listed entity, then the response teams can
+   request the disclosure of that expert from that entity. This ensures
+   that the expert is also part of the entity's response team.
 
 Disclosure
 """"""""""
@@ -158,10 +172,7 @@ Mitigation development
 """"""""""""""""""""""
 
 The initial response team sets up an encrypted mailing-list or repurposes
-an existing one if appropriate. The disclosing party should provide a list
-of contacts for all other parties who have already been, or should be,
-informed about the issue. The response team contacts these parties so they
-can name experts who should be subscribed to the mailing-list.
+an existing one if appropriate.
 
 Using a mailing-list is close to the normal Linux development process and
 has been successfully used in developing mitigations for various hardware
@@ -175,9 +186,24 @@ development branch against the mainline kernel and backport branches for
 stable kernel versions as necessary.
 
 The initial response team will identify further experts from the Linux
-kernel developer community as needed and inform the disclosing party about
-their participation. Bringing in experts can happen at any time of the
-development process and often needs to be handled in a timely manner.
+kernel developer community as needed. Bringing in experts can happen at any
+time of the development process and needs to be handled in a timely manner.
+
+If an expert is employed by or member of an entity on the disclosure list
+provided by the disclosing party, then participation will be requested from
+the relevant entity.
+
+If not, then the disclosing party will be informed about the experts
+participation. The experts are covered by the Memorandum of Understanding
+and the disclosing party is requested to acknowledge the participation. In
+case that the disclosing party has a compelling reason to object, then this
+objection has to be raised within five work days and resolved with the
+incident team immediately. If the disclosing party does not react within
+five work days this is taken as silent acknowledgement.
+
+After acknowledgement or resolution of an objection the expert is disclosed
+by the incident team and brought into the development process.
+
 
 Coordinated release
 """""""""""""""""""
@@ -216,7 +242,7 @@ an involved disclosed party. The current ambassadors list:
   ARM
   AMD
   IBM
-  Intel
+  Intel                Tony Luck <tony.luck@intel.com>
   Qualcomm     Trilok Soni <tsoni@codeaurora.org>
 
   Microsoft    Sasha Levin <sashal@kernel.org>
index 3d1cca287aa4b21ebe839571b7b111c0adb32f8e..c5a8432972ef1dfef1c2bbaf996918417de493c3 100644 (file)
@@ -68,8 +68,10 @@ descriptors by adding their identifier to the format string
  - 'd-ng': the digest of the event, calculated with an arbitrary hash
    algorithm (field format: [<hash algo>:]digest, where the digest
    prefix is shown only if the hash algorithm is not SHA1 or MD5);
+ - 'd-modsig': the digest of the event without the appended modsig;
  - 'n-ng': the name of the event, without size limitations;
  - 'sig': the file signature;
+ - 'modsig' the appended file signature;
  - 'buf': the buffer data that was used to generate the hash without size limitations;
 
 
@@ -79,6 +81,7 @@ Below, there is the list of defined template descriptors:
  - "ima-ng" (default): its format is ``d-ng|n-ng``;
  - "ima-sig": its format is ``d-ng|n-ng|sig``;
  - "ima-buf": its format is ``d-ng|n-ng|buf``;
+ - "ima-modsig": its format is ``d-ng|n-ng|sig|d-modsig|modsig``;
 
 
 Use
index 136f1eef3712d3b3205c43a61b4c6e78c69d3e28..4833904d32a5aae880186f47266738cdcd44989d 100644 (file)
@@ -5309,3 +5309,16 @@ Architectures: x86
 This capability indicates that KVM supports paravirtualized Hyper-V IPI send
 hypercalls:
 HvCallSendSyntheticClusterIpi, HvCallSendSyntheticClusterIpiEx.
+8.21 KVM_CAP_HYPERV_DIRECT_TLBFLUSH
+
+Architecture: x86
+
+This capability indicates that KVM running on top of Hyper-V hypervisor
+enables Direct TLB flush for its guests meaning that TLB flush
+hypercalls are handled by Level 0 hypervisor (Hyper-V) bypassing KVM.
+Due to the different ABI for hypercall parameters between Hyper-V and
+KVM, enabling this capability effectively disables all hypercall
+handling by KVM (as some KVM hypercall may be mistakenly treated as TLB
+flush hypercalls by Hyper-V) so userspace should disable KVM identification
+in CPUID and only exposes Hyper-V identification. In this case, guest
+thinks it's running on Hyper-V and only use Hyper-V hypercalls.
index a3985cc5aedac4dfbeac8998a0da2b933819cb14..223c99361a30b2f24cae5be80f21e0e1a14ee528 100644 (file)
@@ -301,15 +301,6 @@ ixp4xx_wdt:
 
 -------------------------------------------------
 
-ks8695_wdt:
-    wdt_time:
-       Watchdog time in seconds. (default=5)
-    nowayout:
-       Watchdog cannot be stopped once started
-       (default=kernel config parameter)
-
--------------------------------------------------
-
 machzwd:
     nowayout:
        Watchdog cannot be stopped once started
@@ -375,16 +366,6 @@ nic7018_wdt:
 
 -------------------------------------------------
 
-nuc900_wdt:
-    heartbeat:
-       Watchdog heartbeats in seconds.
-       (default = 15)
-    nowayout:
-       Watchdog cannot be stopped once started
-       (default=kernel config parameter)
-
--------------------------------------------------
-
 omap_wdt:
     timer_margin:
        initial watchdog timeout (in seconds)
index a97f1be63b9d18be9fa5ef9685ec2a0a5a787b61..30a5b4028d2fc9a4d5b0b8d872942db9d7692463 100644 (file)
@@ -643,6 +643,7 @@ F:  drivers/net/ethernet/alacritech/*
 
 FORCEDETH GIGABIT ETHERNET DRIVER
 M:     Rain River <rain.1986.08.12@gmail.com>
+M:     Zhu Yanjun <yanjun.zhu@oracle.com>
 L:     netdev@vger.kernel.org
 S:     Maintained
 F:     drivers/net/ethernet/nvidia/*
@@ -6111,7 +6112,10 @@ M:       Gao Xiang <gaoxiang25@huawei.com>
 M:     Chao Yu <yuchao0@huawei.com>
 L:     linux-erofs@lists.ozlabs.org
 S:     Maintained
+T:     git git://git.kernel.org/pub/scm/linux/kernel/git/xiang/erofs.git
+F:     Documentation/filesystems/erofs.txt
 F:     fs/erofs/
+F:     include/trace/events/erofs.h
 
 ERRSEQ ERROR TRACKING INFRASTRUCTURE
 M:     Jeff Layton <jlayton@kernel.org>
@@ -9060,6 +9064,7 @@ F:        include/keys/trusted.h
 
 KEYS/KEYRINGS:
 M:     David Howells <dhowells@redhat.com>
+M:     Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
 L:     keyrings@vger.kernel.org
 S:     Maintained
 F:     Documentation/security/keys/core.rst
@@ -13245,9 +13250,11 @@ F:     drivers/media/rc/pwm-ir-tx.c
 
 PWM SUBSYSTEM
 M:     Thierry Reding <thierry.reding@gmail.com>
+R:     Uwe Kleine-K├Ânig <u.kleine-koenig@pengutronix.de>
 L:     linux-pwm@vger.kernel.org
 S:     Maintained
 T:     git git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm.git
+Q:     https://patchwork.ozlabs.org/project/linux-pwm/list/
 F:     Documentation/driver-api/pwm.rst
 F:     Documentation/devicetree/bindings/pwm/
 F:     include/linux/pwm.h
@@ -13256,6 +13263,7 @@ F:      drivers/video/backlight/pwm_bl.c
 F:     include/linux/pwm_backlight.h
 F:     drivers/gpio/gpio-mvebu.c
 F:     Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
+K:     pwm_(config|apply_state|ops)
 
 PXA GPIO DRIVER
 M:     Robert Jarzmik <robert.jarzmik@free.fr>
@@ -16071,6 +16079,7 @@ THERMAL
 M:     Zhang Rui <rui.zhang@intel.com>
 M:     Eduardo Valentin <edubezval@gmail.com>
 R:     Daniel Lezcano <daniel.lezcano@linaro.org>
+R:     Amit Kucheria <amit.kucheria@verdurent.com>
 L:     linux-pm@vger.kernel.org
 T:     git git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux.git
 T:     git git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal.git
@@ -17275,6 +17284,18 @@ S:     Supported
 F:     drivers/s390/virtio/
 F:     arch/s390/include/uapi/asm/virtio-ccw.h
 
+VIRTIO FILE SYSTEM
+M:     Vivek Goyal <vgoyal@redhat.com>
+M:     Stefan Hajnoczi <stefanha@redhat.com>
+M:     Miklos Szeredi <miklos@szeredi.hu>
+L:     virtualization@lists.linux-foundation.org
+L:     linux-fsdevel@vger.kernel.org
+W:     https://virtio-fs.gitlab.io/
+S:     Supported
+F:     fs/fuse/virtio_fs.c
+F:     include/uapi/linux/virtio_fs.h
+F:     Documentation/filesystems/virtiofs.rst
+
 VIRTIO GPU DRIVER
 M:     David Airlie <airlied@linux.ie>
 M:     Gerd Hoffmann <kraxel@redhat.com>
index d456746da347d11c633ad5256aed463126a5c7af..6f54f2f9574311301a8c59b2e8565dd5bebeb197 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1,8 +1,8 @@
 # SPDX-License-Identifier: GPL-2.0
 VERSION = 5
-PATCHLEVEL = 3
+PATCHLEVEL = 4
 SUBLEVEL = 0
-EXTRAVERSION =
+EXTRAVERSION = -rc1
 NAME = Bobtail Squid
 
 # *DOCUMENTATION*
index ebfe28c2f544dc78540a0500f16a4c3ceb98360a..a1fd3e63e86ec7e1e221f11d9f5f2ca047ba3504 100644 (file)
        };
 
        lcd0: display@0 {
-               compatible = "panel-dpi";
+               /* This isn't the exact LCD, but the timings meet spec */
+               /* To make it work, set CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=4 */
+               compatible = "newhaven,nhd-4.3-480272ef-atxl";
                label = "15";
-               status = "okay";
-               pinctrl-names = "default";
+               backlight = <&bl>;
                enable-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;    /* gpio176, lcd INI */
                vcc-supply = <&vdd_io_reg>;
 
                                remote-endpoint = <&dpi_out>;
                        };
                };
-
-               panel-timing {
-                       clock-frequency = <9000000>;
-                       hactive = <480>;
-                       vactive = <272>;
-                       hfront-porch = <3>;
-                       hback-porch = <2>;
-                       hsync-len = <42>;
-                       vback-porch = <3>;
-                       vfront-porch = <4>;
-                       vsync-len = <11>;
-                       hsync-active = <0>;
-                       vsync-active = <0>;
-                       de-active = <1>;
-                       pixelclk-active = <1>;
-               };
        };
 
        bl: backlight {
index 5563ee54c960c71e889ff931370532aedc77ee77..b56524cc7fe27a2302676630607701de95713987 100644 (file)
                >;
        };
 
+       i2c2_pins: pinmux_i2c2_pins {
+               pinctrl-single,pins = <
+                       OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)        /* i2c2_scl */
+                       OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)        /* i2c2_sda */
+               >;
+       };
+
+       i2c3_pins: pinmux_i2c3_pins {
+               pinctrl-single,pins = <
+                       OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)        /* i2c3_scl */
+                       OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)        /* i2c3_sda */
+               >;
+       };
+
        tsc2004_pins: pinmux_tsc2004_pins {
                pinctrl-single,pins = <
                        OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE4)        /* mcbsp4_dr.gpio_153 */
                        OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4)        /* sys_boot1.gpio_3 */
                >;
        };
-       i2c2_pins: pinmux_i2c2_pins {
-               pinctrl-single,pins = <
-                       OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)        /* i2c2_scl */
-                       OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)        /* i2c2_sda */
-               >;
-       };
-       i2c3_pins: pinmux_i2c3_pins {
-               pinctrl-single,pins = <
-                       OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)        /* i2c3_scl */
-                       OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)        /* i2c3_sda */
-               >;
-       };
 };
 
 &omap3_pmx_core2 {
index 642e809e757a150e29e284533521d9a0bbfdaa32..449cc7616da6319f5bb15d805e7de5a3a303d61c 100644 (file)
 &dss {
        status = "ok";
        vdds_dsi-supply = <&vpll2>;
-       vdda_video-supply = <&video_reg>;
        pinctrl-names = "default";
        pinctrl-0 = <&dss_dpi_pins1>;
        port {
                display0 = &lcd0;
        };
 
-       video_reg: video_reg {
-               pinctrl-names = "default";
-               pinctrl-0 = <&panel_pwr_pins>;
-               compatible = "regulator-fixed";
-               regulator-name = "fixed-supply";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               gpio = <&gpio5 27 GPIO_ACTIVE_HIGH>;    /* gpio155, lcd INI */
-       };
-
        lcd0: display {
-               compatible = "panel-dpi";
+               /* This isn't the exact LCD, but the timings meet spec */
+               /* To make it work, set CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=4 */
+               compatible = "newhaven,nhd-4.3-480272ef-atxl";
                label = "15";
-               status = "okay";
-               /* default-on; */
                pinctrl-names = "default";
-
+               pinctrl-0 = <&panel_pwr_pins>;
+               backlight = <&bl>;
+               enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
                port {
                        lcd_in: endpoint {
                                remote-endpoint = <&dpi_out>;
                        };
                };
-
-               panel-timing {
-                       clock-frequency = <9000000>;
-                       hactive = <480>;
-                       vactive = <272>;
-                       hfront-porch = <3>;
-                       hback-porch = <2>;
-                       hsync-len = <42>;
-                       vback-porch = <3>;
-                       vfront-porch = <4>;
-                       vsync-len = <11>;
-                       hsync-active = <0>;
-                       vsync-active = <0>;
-                       de-active = <1>;
-                       pixelclk-active = <1>;
-               };
        };
 
        bl: backlight {
index c7bf9c4936460ab3cd3bcc1b3e7a9917ac274de2..64eb896907bfa8ee2473cb8d32d6825630d699a9 100644 (file)
@@ -363,6 +363,7 @@ CONFIG_DRM_OMAP_PANEL_TPO_TD028TTEC1=m
 CONFIG_DRM_OMAP_PANEL_TPO_TD043MTEA1=m
 CONFIG_DRM_OMAP_PANEL_NEC_NL8048HL11=m
 CONFIG_DRM_TILCDC=m
+CONFIG_DRM_PANEL_SIMPLE=m
 CONFIG_FB=y
 CONFIG_FIRMWARE_EDID=y
 CONFIG_FB_MODE_HELPERS=y
index 56007b0b6120d626cc2c2deb0e63067dd521439b..e8d6e9957d65b717548c1ffeec7a5666232b7c8b 100644 (file)
@@ -26,7 +26,6 @@ config MACH_ASPEED_G4
 config MACH_ASPEED_G5
        bool "Aspeed SoC 5th Generation"
        depends on ARCH_MULTI_V6
-       select CPU_V6
        select PINCTRL_ASPEED_G5
        select FTTMR010_TIMER
        help
index 6c6f8fce854e2040276ab85b01419930940895bd..d942a335709076fe743935e3331d65388d270707 100644 (file)
@@ -491,11 +491,11 @@ static int ti_sysc_clkdm_init(struct device *dev,
                              struct clk *fck, struct clk *ick,
                              struct ti_sysc_cookie *cookie)
 {
-       if (fck)
+       if (!IS_ERR(fck))
                cookie->clkdm = ti_sysc_find_one_clockdomain(fck);
        if (cookie->clkdm)
                return 0;
-       if (ick)
+       if (!IS_ERR(ick))
                cookie->clkdm = ti_sysc_find_one_clockdomain(ick);
        if (cookie->clkdm)
                return 0;
index 866e05882799069f0a54ccac0cc45b1a2775163c..41a9b4257b727710bcd4be1e9bcf47e6739a908d 100644 (file)
@@ -982,7 +982,7 @@ config KEXEC_FILE
          for kernel and initramfs as opposed to list of segments as
          accepted by previous system call.
 
-config KEXEC_VERIFY_SIG
+config KEXEC_SIG
        bool "Verify kernel signature during kexec_file_load() syscall"
        depends on KEXEC_FILE
        help
@@ -997,13 +997,13 @@ config KEXEC_VERIFY_SIG
 config KEXEC_IMAGE_VERIFY_SIG
        bool "Enable Image signature verification support"
        default y
-       depends on KEXEC_VERIFY_SIG
+       depends on KEXEC_SIG
        depends on EFI && SIGNED_PE_FILE_VERIFICATION
        help
          Enable Image signature verification support.
 
 comment "Support for PE file signature verification disabled"
-       depends on KEXEC_VERIFY_SIG
+       depends on KEXEC_SIG
        depends on !EFI || !SIGNED_PE_FILE_VERIFICATION
 
 config CRASH_DUMP
index 27ef5b2c43ab79027e12ef396c8b217194644ee9..cb2a0d94a144d381541d81da2618c46849b7345b 100644 (file)
@@ -5,8 +5,10 @@
 #include <linux/uaccess.h>
 #include <linux/ptrace.h>
 
-static int align_enable = 1;
-static int align_count;
+static int align_kern_enable = 1;
+static int align_usr_enable = 1;
+static int align_kern_count = 0;
+static int align_usr_count = 0;
 
 static inline uint32_t get_ptreg(struct pt_regs *regs, uint32_t rx)
 {
@@ -32,9 +34,6 @@ static int ldb_asm(uint32_t addr, uint32_t *valp)
        uint32_t val;
        int err;
 
-       if (!access_ok((void *)addr, 1))
-               return 1;
-
        asm volatile (
                "movi   %0, 0\n"
                "1:\n"
@@ -67,9 +66,6 @@ static int stb_asm(uint32_t addr, uint32_t val)
 {
        int err;
 
-       if (!access_ok((void *)addr, 1))
-               return 1;
-
        asm volatile (
                "movi   %0, 0\n"
                "1:\n"
@@ -203,8 +199,6 @@ static int stw_c(struct pt_regs *regs, uint32_t rz, uint32_t addr)
        if (stb_asm(addr, byte3))
                return 1;
 
-       align_count++;
-
        return 0;
 }
 
@@ -226,7 +220,14 @@ void csky_alignment(struct pt_regs *regs)
        uint32_t addr   = 0;
 
        if (!user_mode(regs))
+               goto kernel_area;
+
+       if (!align_usr_enable) {
+               pr_err("%s user disabled.\n", __func__);
                goto bad_area;
+       }
+
+       align_usr_count++;
 
        ret = get_user(tmp, (uint16_t *)instruction_pointer(regs));
        if (ret) {
@@ -234,6 +235,19 @@ void csky_alignment(struct pt_regs *regs)
                goto bad_area;
        }
 
+       goto good_area;
+
+kernel_area:
+       if (!align_kern_enable) {
+               pr_err("%s kernel disabled.\n", __func__);
+               goto bad_area;
+       }
+
+       align_kern_count++;
+
+       tmp = *(uint16_t *)instruction_pointer(regs);
+
+good_area:
        opcode = (uint32_t)tmp;
 
        rx  = opcode & 0xf;
@@ -286,18 +300,32 @@ bad_area:
        force_sig_fault(SIGBUS, BUS_ADRALN, (void __user *)addr);
 }
 
-static struct ctl_table alignment_tbl[4] = {
+static struct ctl_table alignment_tbl[5] = {
+       {
+               .procname = "kernel_enable",
+               .data = &align_kern_enable,
+               .maxlen = sizeof(align_kern_enable),
+               .mode = 0666,
+               .proc_handler = &proc_dointvec
+       },
+       {
+               .procname = "user_enable",
+               .data = &align_usr_enable,
+               .maxlen = sizeof(align_usr_enable),
+               .mode = 0666,
+               .proc_handler = &proc_dointvec
+       },
        {
-               .procname = "enable",
-               .data = &align_enable,
-               .maxlen = sizeof(align_enable),
+               .procname = "kernel_count",
+               .data = &align_kern_count,
+               .maxlen = sizeof(align_kern_count),
                .mode = 0666,
                .proc_handler = &proc_dointvec
        },
        {
-               .procname = "count",
-               .data = &align_count,
-               .maxlen = sizeof(align_count),
+               .procname = "user_count",
+               .data = &align_usr_count,
+               .maxlen = sizeof(align_usr_count),
                .mode = 0666,
                .proc_handler = &proc_dointvec
        },
index 10af8b6fe322f28d21db8c1fa6b4b7f961109ee7..9f1fe80cc8473663b8a5556ab82b3cda592d91a8 100644 (file)
 #include <asm/cacheflush.h>
 #include <asm/cachectl.h>
 
+#define PG_dcache_clean                PG_arch_1
+
 void flush_dcache_page(struct page *page)
 {
-       struct address_space *mapping = page_mapping(page);
-       unsigned long addr;
+       struct address_space *mapping;
 
-       if (mapping && !mapping_mapped(mapping)) {
-               set_bit(PG_arch_1, &(page)->flags);
+       if (page == ZERO_PAGE(0))
                return;
-       }
 
-       /*
-        * We could delay the flush for the !page_mapping case too.  But that
-        * case is for exec env/arg pages and those are %99 certainly going to
-        * get faulted into the tlb (and thus flushed) anyways.
-        */
-       addr = (unsigned long) page_address(page);
-       dcache_wb_range(addr, addr + PAGE_SIZE);
+       mapping = page_mapping_file(page);
+
+       if (mapping && !page_mapcount(page))
+               clear_bit(PG_dcache_clean, &page->flags);
+       else {
+               dcache_wbinv_all();
+               if (mapping)
+                       icache_inv_all();
+               set_bit(PG_dcache_clean, &page->flags);
+       }
 }
+EXPORT_SYMBOL(flush_dcache_page);
 
-void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
-                     pte_t *pte)
+void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr,
+       pte_t *ptep)
 {
-       unsigned long addr;
+       unsigned long pfn = pte_pfn(*ptep);
        struct page *page;
-       unsigned long pfn;
 
-       pfn = pte_pfn(*pte);
-       if (unlikely(!pfn_valid(pfn)))
+       if (!pfn_valid(pfn))
                return;
 
        page = pfn_to_page(pfn);
-       addr = (unsigned long) page_address(page);
+       if (page == ZERO_PAGE(0))
+               return;
+
+       if (!test_and_set_bit(PG_dcache_clean, &page->flags))
+               dcache_wbinv_all();
 
-       if (vma->vm_flags & VM_EXEC ||
-           pages_do_alias(addr, address & PAGE_MASK))
-               cache_wbinv_all();
+       if (page_mapping_file(page)) {
+               if (vma->vm_flags & VM_EXEC)
+                       icache_inv_all();
+       }
+}
+
+void flush_kernel_dcache_page(struct page *page)
+{
+       struct address_space *mapping;
+
+       mapping = page_mapping_file(page);
+
+       if (!mapping || mapping_mapped(mapping))
+               dcache_wbinv_all();
+}
+EXPORT_SYMBOL(flush_kernel_dcache_page);
+
+void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
+       unsigned long end)
+{
+       dcache_wbinv_all();
 
-       clear_bit(PG_arch_1, &(page)->flags);
+       if (vma->vm_flags & VM_EXEC)
+               icache_inv_all();
 }
index 5f663aef9b1b8b019ed0a631a681ddcdc827d93f..79ef9e8c1afddc1a520fb56cd2817be38e4cae4c 100644 (file)
@@ -4,46 +4,63 @@
 #ifndef __ABI_CSKY_CACHEFLUSH_H
 #define __ABI_CSKY_CACHEFLUSH_H
 
-#include <linux/compiler.h>
+#include <linux/mm.h>
 #include <asm/string.h>
 #include <asm/cache.h>
 
 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
 extern void flush_dcache_page(struct page *);
 
-#define flush_cache_mm(mm)                     cache_wbinv_all()
+#define flush_cache_mm(mm)                     dcache_wbinv_all()
 #define flush_cache_page(vma, page, pfn)       cache_wbinv_all()
 #define flush_cache_dup_mm(mm)                 cache_wbinv_all()
 
+#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
+extern void flush_kernel_dcache_page(struct page *);
+
+#define flush_dcache_mmap_lock(mapping)                xa_lock_irq(&mapping->i_pages)
+#define flush_dcache_mmap_unlock(mapping)      xa_unlock_irq(&mapping->i_pages)
+
+static inline void flush_kernel_vmap_range(void *addr, int size)
+{
+       dcache_wbinv_all();
+}
+static inline void invalidate_kernel_vmap_range(void *addr, int size)
+{
+       dcache_wbinv_all();
+}
+
+#define ARCH_HAS_FLUSH_ANON_PAGE
+static inline void flush_anon_page(struct vm_area_struct *vma,
+                        struct page *page, unsigned long vmaddr)
+{
+       if (PageAnon(page))
+               cache_wbinv_all();
+}
+
 /*
  * if (current_mm != vma->mm) cache_wbinv_range(start, end) will be broken.
  * Use cache_wbinv_all() here and need to be improved in future.
  */
-#define flush_cache_range(vma, start, end)     cache_wbinv_all()
-#define flush_cache_vmap(start, end)           cache_wbinv_range(start, end)
-#define flush_cache_vunmap(start, end)         cache_wbinv_range(start, end)
+extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end);
+#define flush_cache_vmap(start, end)           cache_wbinv_all()
+#define flush_cache_vunmap(start, end)         cache_wbinv_all()
 
-#define flush_icache_page(vma, page)           cache_wbinv_all()
+#define flush_icache_page(vma, page)           do {} while (0);
 #define flush_icache_range(start, end)         cache_wbinv_range(start, end)
 
-#define flush_icache_user_range(vma, pg, adr, len) \
-                               cache_wbinv_range(adr, adr + len)
+#define flush_icache_user_range(vma,page,addr,len) \
+       flush_dcache_page(page)
 
 #define copy_from_user_page(vma, page, vaddr, dst, src, len) \
 do { \
-       cache_wbinv_all(); \
        memcpy(dst, src, len); \
-       cache_wbinv_all(); \
 } while (0)
 
 #define copy_to_user_page(vma, page, vaddr, dst, src, len) \
 do { \
-       cache_wbinv_all(); \
        memcpy(dst, src, len); \
        cache_wbinv_all(); \
 } while (0)
 
-#define flush_dcache_mmap_lock(mapping)                do {} while (0)
-#define flush_dcache_mmap_unlock(mapping)      do {} while (0)
-
 #endif /* __ABI_CSKY_CACHEFLUSH_H */
index 6336e92a103ae9aaf2c2f62e1203341cf005a175..c864519117c71581da59bc733ef740c1df1cc9fa 100644 (file)
@@ -1,13 +1,14 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
 
-extern unsigned long shm_align_mask;
+#include <asm/shmparam.h>
+
 extern void flush_dcache_page(struct page *page);
 
 static inline unsigned long pages_do_alias(unsigned long addr1,
                                           unsigned long addr2)
 {
-       return (addr1 ^ addr2) & shm_align_mask;
+       return (addr1 ^ addr2) & (SHMLBA-1);
 }
 
 static inline void clear_user_page(void *addr, unsigned long vaddr,
index b462fd50b23acc60a851de9c3329ac1e2c7b35b6..6792aca49999172fad78b5bdc6a7fc80f3cf4af1 100644 (file)
@@ -9,58 +9,63 @@
 #include <linux/random.h>
 #include <linux/io.h>
 
-unsigned long shm_align_mask = (0x4000 >> 1) - 1;   /* Sane caches */
+#define COLOUR_ALIGN(addr,pgoff)               \
+       ((((addr)+SHMLBA-1)&~(SHMLBA-1)) +      \
+        (((pgoff)<<PAGE_SHIFT) & (SHMLBA-1)))
 
-#define COLOUR_ALIGN(addr, pgoff) \
-       ((((addr) + shm_align_mask) & ~shm_align_mask) + \
-        (((pgoff) << PAGE_SHIFT) & shm_align_mask))
-
-unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
+/*
+ * We need to ensure that shared mappings are correctly aligned to
+ * avoid aliasing issues with VIPT caches.  We need to ensure that
+ * a specific page of an object is always mapped at a multiple of
+ * SHMLBA bytes.
+ *
+ * We unconditionally provide this function for all cases.
+ */
+unsigned long
+arch_get_unmapped_area(struct file *filp, unsigned long addr,
                unsigned long len, unsigned long pgoff, unsigned long flags)
 {
-       struct vm_area_struct *vmm;
-       int do_color_align;
+       struct mm_struct *mm = current->mm;
+       struct vm_area_struct *vma;
+       int do_align = 0;
+       struct vm_unmapped_area_info info;
+
+       /*
+        * We only need to do colour alignment if either the I or D
+        * caches alias.
+        */
+       do_align = filp || (flags & MAP_SHARED);
 
+       /*
+        * We enforce the MAP_FIXED case.
+        */
        if (flags & MAP_FIXED) {
-               /*
-                * We do not accept a shared mapping if it would violate
-                * cache aliasing constraints.
-                */
-               if ((flags & MAP_SHARED) &&
-                       ((addr - (pgoff << PAGE_SHIFT)) & shm_align_mask))
+               if (flags & MAP_SHARED &&
+                   (addr - (pgoff << PAGE_SHIFT)) & (SHMLBA - 1))
                        return -EINVAL;
                return addr;
        }
 
        if (len > TASK_SIZE)
                return -ENOMEM;
-       do_color_align = 0;
-       if (filp || (flags & MAP_SHARED))
-               do_color_align = 1;
+
        if (addr) {
-               if (do_color_align)
+               if (do_align)
                        addr = COLOUR_ALIGN(addr, pgoff);
                else
                        addr = PAGE_ALIGN(addr);
-               vmm = find_vma(current->mm, addr);
+
+               vma = find_vma(mm, addr);
                if (TASK_SIZE - len >= addr &&
-                               (!vmm || addr + len <= vmm->vm_start))
+                   (!vma || addr + len <= vm_start_gap(vma)))
                        return addr;
        }
-       addr = TASK_UNMAPPED_BASE;
-       if (do_color_align)
-               addr = COLOUR_ALIGN(addr, pgoff);
-       else
-               addr = PAGE_ALIGN(addr);
 
-       for (vmm = find_vma(current->mm, addr); ; vmm = vmm->vm_next) {
-               /* At this point: (!vmm || addr < vmm->vm_end). */
-               if (TASK_SIZE - len < addr)
-                       return -ENOMEM;
-               if (!vmm || addr + len <= vmm->vm_start)
-                       return addr;
-               addr = vmm->vm_end;
-               if (do_color_align)
-                       addr = COLOUR_ALIGN(addr, pgoff);
-       }
+       info.flags = 0;
+       info.length = len;
+       info.low_limit = mm->mmap_base;
+       info.high_limit = TASK_SIZE;
+       info.align_mask = do_align ? (PAGE_MASK & (SHMLBA - 1)) : 0;
+       info.align_offset = pgoff << PAGE_SHIFT;
+       return vm_unmapped_area(&info);
 }
index 476eb786f22de9e3130d5db47816a32b5371585c..a430e7fddf350cff5e5f24b5719b66b54b3da426 100644 (file)
@@ -9,11 +9,12 @@
 #define nop()  asm volatile ("nop\n":::"memory")
 
 /*
- * sync:        completion barrier
- * sync.s:      completion barrier and shareable to other cores
- * sync.i:      completion barrier with flush cpu pipeline
- * sync.is:     completion barrier with flush cpu pipeline and shareable to
- *             other cores
+ * sync:        completion barrier, all sync.xx instructions
+ *              guarantee the last response recieved by bus transaction
+ *              made by ld/st instructions before sync.s
+ * sync.s:      inherit from sync, but also shareable to other cores
+ * sync.i:      inherit from sync, but also flush cpu pipeline
+ * sync.is:     the same with sync.i + sync.s
  *
  * bar.brwarw:  ordering barrier for all load/store instructions before it
  * bar.brwarws: ordering barrier for all load/store instructions before it
@@ -27,9 +28,7 @@
  */
 
 #ifdef CONFIG_CPU_HAS_CACHEV2
-#define mb()           asm volatile ("bar.brwarw\n":::"memory")
-#define rmb()          asm volatile ("bar.brar\n":::"memory")
-#define wmb()          asm volatile ("bar.bwaw\n":::"memory")
+#define mb()           asm volatile ("sync.s\n":::"memory")
 
 #ifdef CONFIG_SMP
 #define __smp_mb()     asm volatile ("bar.brwarws\n":::"memory")
index d683734636761678e8c2d1bf670fae4d6829bb02..1d5fc2f78fd7e8c634b87e61eb9219fbc4f67ba3 100644 (file)
@@ -24,6 +24,7 @@ void cache_wbinv_range(unsigned long start, unsigned long end);
 void cache_wbinv_all(void);
 
 void dma_wbinv_range(unsigned long start, unsigned long end);
+void dma_inv_range(unsigned long start, unsigned long end);
 void dma_wb_range(unsigned long start, unsigned long end);
 
 #endif
index c1dfa9c10e36ccb1992991b5363b0ef31473e643..80d071e2567f84df9846c1d76c841d934fc88db0 100644 (file)
@@ -4,17 +4,10 @@
 #ifndef __ASM_CSKY_IO_H
 #define __ASM_CSKY_IO_H
 
-#include <abi/pgtable-bits.h>
+#include <asm/pgtable.h>
 #include <linux/types.h>
 #include <linux/version.h>
 
-extern void __iomem *ioremap(phys_addr_t offset, size_t size);
-
-extern void iounmap(void *addr);
-
-extern int remap_area_pages(unsigned long address, phys_addr_t phys_addr,
-               size_t size, unsigned long flags);
-
 /*
  * I/O memory access primitives. Reads are ordered relative to any
  * following Normal memory access. Writes are ordered relative to any prior
@@ -40,9 +33,17 @@ extern int remap_area_pages(unsigned long address, phys_addr_t phys_addr,
 #define writel(v,c)            ({ wmb(); writel_relaxed((v),(c)); mb(); })
 #endif
 
-#define ioremap_nocache(phy, sz)       ioremap(phy, sz)
-#define ioremap_wc ioremap_nocache
-#define ioremap_wt ioremap_nocache
+/*
+ * I/O memory mapping functions.
+ */
+extern void __iomem *ioremap_cache(phys_addr_t addr, size_t size);
+extern void __iomem *__ioremap(phys_addr_t addr, size_t size, pgprot_t prot);
+extern void iounmap(void *addr);
+
+#define ioremap(addr, size)            __ioremap((addr), (size), pgprot_noncached(PAGE_KERNEL))
+#define ioremap_wc(addr, size)         __ioremap((addr), (size), pgprot_writecombine(PAGE_KERNEL))
+#define ioremap_nocache(addr, size)    ioremap((addr), (size))
+#define ioremap_cache                  ioremap_cache
 
 #include <asm-generic/io.h>
 
index 0040b3a05b61d5ef29abfef4397ac0026a5548dc..7c21985c60dc8a444e44db4a1de2e4c09325b095 100644 (file)
@@ -258,6 +258,16 @@ static inline pgprot_t pgprot_noncached(pgprot_t _prot)
 {
        unsigned long prot = pgprot_val(_prot);
 
+       prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED | _PAGE_SO;
+
+       return __pgprot(prot);
+}
+
+#define pgprot_writecombine pgprot_writecombine
+static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
+{
+       unsigned long prot = pgprot_val(_prot);
+
        prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
 
        return __pgprot(prot);
index a7e84ccccbd8ee47ff0cdba63b4f5a6f4c647fed..a7a5b67df8989b96254f49110235176222b3fb7c 100644 (file)
 #define PTE_INDX_SHIFT  10
 #define _PGDIR_SHIFT    22
 
+.macro zero_fp
+#ifdef CONFIG_STACKTRACE
+       movi    r8, 0
+#endif
+.endm
+
 .macro tlbop_begin name, val0, val1, val2
 ENTRY(csky_\name)
        mtcr    a3, ss2
@@ -96,6 +102,7 @@ ENTRY(csky_\name)
        SAVE_ALL 0
 .endm
 .macro tlbop_end is_write
+       zero_fp
        RD_MEH  a2
        psrset  ee, ie
        mov     a0, sp
@@ -120,6 +127,7 @@ tlbop_end 1
 
 ENTRY(csky_systemcall)
        SAVE_ALL TRAP0_SIZE
+       zero_fp
 
        psrset  ee, ie
 
@@ -136,9 +144,9 @@ ENTRY(csky_systemcall)
        mov     r9, sp
        bmaski  r10, THREAD_SHIFT
        andn    r9, r10
-       ldw     r8, (r9, TINFO_FLAGS)
-       ANDI_R3 r8, (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_TRACEPOINT | _TIF_SYSCALL_AUDIT)
-       cmpnei  r8, 0
+       ldw     r12, (r9, TINFO_FLAGS)
+       ANDI_R3 r12, (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_TRACEPOINT | _TIF_SYSCALL_AUDIT)
+       cmpnei  r12, 0
        bt      csky_syscall_trace
 #if defined(__CSKYABIV2__)
        subi    sp, 8
@@ -180,7 +188,7 @@ csky_syscall_trace:
 
 ENTRY(ret_from_kernel_thread)
        jbsr    schedule_tail
-       mov     a0, r8
+       mov     a0, r10
        jsr     r9
        jbsr    ret_from_exception
 
@@ -189,9 +197,9 @@ ENTRY(ret_from_fork)
        mov     r9, sp
        bmaski  r10, THREAD_SHIFT
        andn    r9, r10
-       ldw     r8, (r9, TINFO_FLAGS)
-       ANDI_R3 r8, (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_TRACEPOINT | _TIF_SYSCALL_AUDIT)
-       cmpnei  r8, 0
+       ldw     r12, (r9, TINFO_FLAGS)
+       ANDI_R3 r12, (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_TRACEPOINT | _TIF_SYSCALL_AUDIT)
+       cmpnei  r12, 0
        bf      ret_from_exception
        mov     a0, sp                  /* sp = pt_regs pointer */
        jbsr    syscall_trace_exit
@@ -209,9 +217,9 @@ ret_from_exception:
        bmaski  r10, THREAD_SHIFT
        andn    r9, r10
 
-       ldw     r8, (r9, TINFO_FLAGS)
-       andi    r8, (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED)
-       cmpnei  r8, 0
+       ldw     r12, (r9, TINFO_FLAGS)
+       andi    r12, (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED)
+       cmpnei  r12, 0
        bt      exit_work
 1:
        RESTORE_ALL
@@ -220,11 +228,11 @@ exit_work:
        lrw     syscallid, ret_from_exception
        mov     lr, syscallid
 
-       btsti   r8, TIF_NEED_RESCHED
+       btsti   r12, TIF_NEED_RESCHED
        bt      work_resched
 
        mov     a0, sp
-       mov     a1, r8
+       mov     a1, r12
        jmpi    do_notify_resume
 
 work_resched:
@@ -232,6 +240,7 @@ work_resched:
 
 ENTRY(csky_trap)
        SAVE_ALL 0
+       zero_fp
        psrset  ee
        mov     a0, sp                 /* Push Stack pointer arg */
        jbsr    trap_c                 /* Call C-level trap handler */
@@ -265,6 +274,7 @@ ENTRY(csky_get_tls)
 
 ENTRY(csky_irq)
        SAVE_ALL 0
+       zero_fp
        psrset  ee
 
 #ifdef CONFIG_PREEMPT
@@ -276,27 +286,23 @@ ENTRY(csky_irq)
         * Get task_struct->stack.preempt_count for current,
         * and increase 1.
         */
-       ldw     r8, (r9, TINFO_PREEMPT)
-       addi    r8, 1
-       stw     r8, (r9, TINFO_PREEMPT)
+       ldw     r12, (r9, TINFO_PREEMPT)
+       addi    r12, 1
+       stw     r12, (r9, TINFO_PREEMPT)
 #endif
 
        mov     a0, sp
        jbsr    csky_do_IRQ
 
 #ifdef CONFIG_PREEMPT
-       subi    r8, 1
-       stw     r8, (r9, TINFO_PREEMPT)
-       cmpnei  r8, 0
+       subi    r12, 1
+       stw     r12, (r9, TINFO_PREEMPT)
+       cmpnei  r12, 0
        bt      2f
-       ldw     r8, (r9, TINFO_FLAGS)
-       btsti   r8, TIF_NEED_RESCHED
+       ldw     r12, (r9, TINFO_FLAGS)
+       btsti   r12, TIF_NEED_RESCHED
        bf      2f
-1:
        jbsr    preempt_schedule_irq    /* irq en/disable is done inside */
-       ldw     r7, (r9, TINFO_FLAGS)   /* get new tasks TI_FLAGS */
-       btsti   r7, TIF_NEED_RESCHED
-       bt      1b                      /* go again */
 #endif
 2:
        jmpi    ret_from_exception
index 4c1a1934d76ab6447c583126828f984b887afc13..1a29f1157449a96e1190b9e65c5017c35c0b44af 100644 (file)
@@ -1306,7 +1306,7 @@ int csky_pmu_device_probe(struct platform_device *pdev,
                                 &csky_pmu.count_width)) {
                csky_pmu.count_width = DEFAULT_COUNT_WIDTH;
        }
-       csky_pmu.max_period = BIT(csky_pmu.count_width) - 1;
+       csky_pmu.max_period = BIT_ULL(csky_pmu.count_width) - 1;
 
        csky_pmu.plat_device = pdev;
 
@@ -1337,7 +1337,7 @@ int csky_pmu_device_probe(struct platform_device *pdev,
        return ret;
 }
 
-const static struct of_device_id csky_pmu_of_device_ids[] = {
+static const struct of_device_id csky_pmu_of_device_ids[] = {
        {.compatible = "csky,csky-pmu"},
        {},
 };
index e555740c0be5768d001c81fe8ff91e98e71e0e4b..f320d9248a225fe31941129ccd2b4225c47f36d1 100644 (file)
@@ -55,7 +55,7 @@ int copy_thread(unsigned long clone_flags,
        if (unlikely(p->flags & PF_KTHREAD)) {
                memset(childregs, 0, sizeof(struct pt_regs));
                childstack->r15 = (unsigned long) ret_from_kernel_thread;
-               childstack->r8 = kthread_arg;
+               childstack->r10 = kthread_arg;
                childstack->r9 = usp;
                childregs->sr = mfcr("psr");
        } else {
index b8a75cce0b8ca27683d0a616da3bd22d2863ae2b..494ec912abff072ed0a85ba6d6c2b313a27001f2 100644 (file)
@@ -120,7 +120,12 @@ void dma_wbinv_range(unsigned long start, unsigned long end)
        cache_op_range(start, end, DATA_CACHE|CACHE_CLR|CACHE_INV, 1);
 }
 
+void dma_inv_range(unsigned long start, unsigned long end)
+{
+       cache_op_range(start, end, DATA_CACHE|CACHE_CLR|CACHE_INV, 1);
+}
+
 void dma_wb_range(unsigned long start, unsigned long end)
 {
-       cache_op_range(start, end, DATA_CACHE|CACHE_INV, 1);
+       cache_op_range(start, end, DATA_CACHE|CACHE_CLR|CACHE_INV, 1);
 }
index baaf05d69f449027a94954401e1b3d74bed22fd1..b61be6518e214bbed8d8704a6d36b76d1520f479 100644 (file)
@@ -69,11 +69,20 @@ void dma_wbinv_range(unsigned long start, unsigned long end)
        sync_is();
 }
 
+void dma_inv_range(unsigned long start, unsigned long end)
+{
+       unsigned long i = start & ~(L1_CACHE_BYTES - 1);
+
+       for (; i < end; i += L1_CACHE_BYTES)
+               asm volatile("dcache.iva %0\n"::"r"(i):"memory");
+       sync_is();
+}
+
 void dma_wb_range(unsigned long start, unsigned long end)
 {
        unsigned long i = start & ~(L1_CACHE_BYTES - 1);
 
        for (; i < end; i += L1_CACHE_BYTES)
-               asm volatile("dcache.civa %0\n"::"r"(i):"memory");
+               asm volatile("dcache.cva %0\n"::"r"(i):"memory");
        sync_is();
 }
index 602a60d47a9419175f59c9a9c83fe4955248b07f..06e85b56545427de4f1883d95a59319f817c85d3 100644 (file)
 #include <linux/version.h>
 #include <asm/cache.h>
 
-void arch_dma_prep_coherent(struct page *page, size_t size)
-{
-       if (PageHighMem(page)) {
-               unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
-
-               do {
-                       void *ptr = kmap_atomic(page);
-                       size_t _size = (size < PAGE_SIZE) ? size : PAGE_SIZE;
-
-                       memset(ptr, 0, _size);
-                       dma_wbinv_range((unsigned long)ptr,
-                                       (unsigned long)ptr + _size);
-
-                       kunmap_atomic(ptr);
-
-                       page++;
-                       size -= PAGE_SIZE;
-                       count--;
-               } while (count);
-       } else {
-               void *ptr = page_address(page);
-
-               memset(ptr, 0, size);
-               dma_wbinv_range((unsigned long)ptr, (unsigned long)ptr + size);
-       }
-}
-
 static inline void cache_op(phys_addr_t paddr, size_t size,
                            void (*fn)(unsigned long start, unsigned long end))
 {
-       struct page *page = pfn_to_page(paddr >> PAGE_SHIFT);
-       unsigned int offset = paddr & ~PAGE_MASK;
-       size_t left = size;
-       unsigned long start;
+       struct page *page    = phys_to_page(paddr);
+       void *start          = __va(page_to_phys(page));
+       unsigned long offset = offset_in_page(paddr);
+       size_t left          = size;
 
        do {
                size_t len = left;
 
+               if (offset + len > PAGE_SIZE)
+                       len = PAGE_SIZE - offset;
+
                if (PageHighMem(page)) {
-                       void *addr;
+                       start = kmap_atomic(page);
 
-                       if (offset + len > PAGE_SIZE) {
-                               if (offset >= PAGE_SIZE) {
-                                       page += offset >> PAGE_SHIFT;
-                                       offset &= ~PAGE_MASK;
-                               }
-                               len = PAGE_SIZE - offset;
-                       }
+                       fn((unsigned long)start + offset,
+                                       (unsigned long)start + offset + len);
 
-                       addr = kmap_atomic(page);
-                       start = (unsigned long)(addr + offset);
-                       fn(start, start + len);
-                       kunmap_atomic(addr);
+                       kunmap_atomic(start);
                } else {
-                       start = (unsigned long)phys_to_virt(paddr);
-                       fn(start, start + size);
+                       fn((unsigned long)start + offset,
+                                       (unsigned long)start + offset + len);
                }
                offset = 0;
+
                page++;
+               start += PAGE_SIZE;
                left -= len;
        } while (left);
 }
 
+static void dma_wbinv_set_zero_range(unsigned long start, unsigned long end)
+{
+       memset((void *)start, 0, end - start);
+       dma_wbinv_range(start, end);
+}
+
+void arch_dma_prep_coherent(struct page *page, size_t size)
+{
+       cache_op(page_to_phys(page), size, dma_wbinv_set_zero_range);
+}
+
 void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr,
                              size_t size, enum dma_data_direction dir)
 {
@@ -98,11 +79,10 @@ void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr,
 {
        switch (dir) {
        case DMA_TO_DEVICE:
-               cache_op(paddr, size, dma_wb_range);
-               break;
+               return;
        case DMA_FROM_DEVICE:
        case DMA_BIDIRECTIONAL:
-               cache_op(paddr, size, dma_wbinv_range);
+               cache_op(paddr, size, dma_inv_range);
                break;
        default:
                BUG();
index eb0dc9e5065f92f8e647661e2c821f066d7e3eb9..d4c2292ea46bc6cf0825c6af3b9499338577d329 100644 (file)
@@ -60,22 +60,6 @@ void __init mem_init(void)
        mem_init_print_info(NULL);
 }
 
-#ifdef CONFIG_BLK_DEV_INITRD
-void free_initrd_mem(unsigned long start, unsigned long end)
-{
-       if (start < end)
-               pr_info("Freeing initrd memory: %ldk freed\n",
-                       (end - start) >> 10);
-
-       for (; start < end; start += PAGE_SIZE) {
-               ClearPageReserved(virt_to_page(start));
-               init_page_count(virt_to_page(start));
-               free_page(start);
-               totalram_pages_inc();
-       }
-}
-#endif
-
 extern char __init_begin[], __init_end[];
 
 void free_initmem(void)
index 8473b6bdf51205b35b761dac33f6456d1216072f..e13cd34976285bce45f151aeeb29361e53fb889a 100644 (file)
@@ -8,12 +8,12 @@
 
 #include <asm/pgtable.h>
 
-void __iomem *ioremap(phys_addr_t addr, size_t size)
+static void __iomem *__ioremap_caller(phys_addr_t addr, size_t size,
+                                     pgprot_t prot, void *caller)
 {
        phys_addr_t last_addr;
        unsigned long offset, vaddr;
        struct vm_struct *area;
-       pgprot_t prot;
 
        last_addr = addr + size - 1;
        if (!size || last_addr < addr)
@@ -23,15 +23,12 @@ void __iomem *ioremap(phys_addr_t addr, size_t size)
        addr &= PAGE_MASK;
        size = PAGE_ALIGN(size + offset);
 
-       area = get_vm_area_caller(size, VM_ALLOC, __builtin_return_address(0));
+       area = get_vm_area_caller(size, VM_IOREMAP, caller);
        if (!area)
                return NULL;
 
        vaddr = (unsigned long)area->addr;
 
-       prot = __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE |
-                       _PAGE_GLOBAL | _CACHE_UNCACHED | _PAGE_SO);
-
        if (ioremap_page_range(vaddr, vaddr + size, addr, prot)) {
                free_vm_area(area);
                return NULL;
@@ -39,7 +36,20 @@ void __iomem *ioremap(phys_addr_t addr, size_t size)
 
        return (void __iomem *)(vaddr + offset);
 }
-EXPORT_SYMBOL(ioremap);
+
+void __iomem *__ioremap(phys_addr_t phys_addr, size_t size, pgprot_t prot)
+{
+       return __ioremap_caller(phys_addr, size, prot,
+                               __builtin_return_address(0));
+}
+EXPORT_SYMBOL(__ioremap);
+
+void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size)
+{
+       return __ioremap_caller(phys_addr, size, PAGE_KERNEL,
+                               __builtin_return_address(0));
+}
+EXPORT_SYMBOL(ioremap_cache);
 
 void iounmap(void __iomem *addr)
 {
@@ -51,10 +61,9 @@ pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
                              unsigned long size, pgprot_t vma_prot)
 {
        if (!pfn_valid(pfn)) {
-               vma_prot.pgprot |= _PAGE_SO;
                return pgprot_noncached(vma_prot);
        } else if (file->f_flags & O_SYNC) {
-               return pgprot_noncached(vma_prot);
+               return pgprot_writecombine(vma_prot);
        }
 
        return vma_prot;
index 6bbd4ae2beb01eab6386dc14f4c38f890558e056..4cf35b09c0ece8424e3954a2fc0bd167b94981ab 100644 (file)
@@ -123,7 +123,7 @@ asmlinkage void __init nios2_boot_init(unsigned r4, unsigned r5, unsigned r6,
                dtb_passed = r6;
 
                if (r7)
-                       strncpy(cmdline_passed, (char *)r7, COMMAND_LINE_SIZE);
+                       strlcpy(cmdline_passed, (char *)r7, COMMAND_LINE_SIZE);
        }
 #endif
 
@@ -131,10 +131,10 @@ asmlinkage void __init nios2_boot_init(unsigned r4, unsigned r5, unsigned r6,
 
 #ifndef CONFIG_CMDLINE_FORCE
        if (cmdline_passed[0])
-               strncpy(boot_command_line, cmdline_passed, COMMAND_LINE_SIZE);
+               strlcpy(boot_command_line, cmdline_passed, COMMAND_LINE_SIZE);
 #ifdef CONFIG_NIOS2_CMDLINE_IGNORE_DTB
        else
-               strncpy(boot_command_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE);
+               strlcpy(boot_command_line, CONFIG_CMDLINE, COMMAND_LINE_SIZE);
 #endif
 #endif
 
index 574eca33f8930d4d52bc2c9cebfd8ed696ee0a20..d97db3ad9aae210972a564178fb7be116d0cb21a 100644 (file)
@@ -254,7 +254,13 @@ extern void radix__pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
 extern pgtable_t radix__pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
 extern pmd_t radix__pmdp_huge_get_and_clear(struct mm_struct *mm,
                                      unsigned long addr, pmd_t *pmdp);
-extern int radix__has_transparent_hugepage(void);
+static inline int radix__has_transparent_hugepage(void)
+{
+       /* For radix 2M at PMD level means thp */
+       if (mmu_psize_defs[MMU_PAGE_2M].shift == PMD_SHIFT)
+               return 1;
+       return 0;
+}
 #endif
 
 extern int __meminit radix__vmemmap_create_mapping(unsigned long start,
index a1ebcbc3931f2afe7dd6667e353d809303b1bfb0..cf00ff0d121def10d7afb75b9d5d6619a32667b7 100644 (file)
@@ -209,8 +209,9 @@ static inline void cpu_feature_keys_init(void) { }
 #define CPU_FTR_POWER9_DD2_1           LONG_ASM_CONST(0x0000080000000000)
 #define CPU_FTR_P9_TM_HV_ASSIST                LONG_ASM_CONST(0x0000100000000000)
 #define CPU_FTR_P9_TM_XER_SO_BUG       LONG_ASM_CONST(0x0000200000000000)
-#define CPU_FTR_P9_TLBIE_BUG           LONG_ASM_CONST(0x0000400000000000)
+#define CPU_FTR_P9_TLBIE_STQ_BUG       LONG_ASM_CONST(0x0000400000000000)
 #define CPU_FTR_P9_TIDR                        LONG_ASM_CONST(0x0000800000000000)
+#define CPU_FTR_P9_TLBIE_ERAT_BUG      LONG_ASM_CONST(0x0001000000000000)
 
 #ifndef __ASSEMBLY__
 
@@ -457,7 +458,7 @@ static inline void cpu_feature_keys_init(void) { }
            CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \
            CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_ARCH_207S | \
            CPU_FTR_TM_COMP | CPU_FTR_ARCH_300 | CPU_FTR_PKEY | \
-           CPU_FTR_P9_TLBIE_BUG | CPU_FTR_P9_TIDR)
+           CPU_FTR_P9_TLBIE_STQ_BUG | CPU_FTR_P9_TLBIE_ERAT_BUG | CPU_FTR_P9_TIDR)
 #define CPU_FTRS_POWER9_DD2_0 CPU_FTRS_POWER9
 #define CPU_FTRS_POWER9_DD2_1 (CPU_FTRS_POWER9 | CPU_FTR_POWER9_DD2_1)
 #define CPU_FTRS_POWER9_DD2_2 (CPU_FTRS_POWER9 | CPU_FTR_POWER9_DD2_1 | \
index 8e8514efb124394813e2a6ef09505f6491e86d76..ee62776e5433cc72316bf323f43d3c5df99d97f2 100644 (file)
@@ -452,9 +452,100 @@ static inline u32 kvmppc_get_xics_latch(void)
        return xirr;
 }
 
-static inline void kvmppc_set_host_ipi(int cpu, u8 host_ipi)
+/*
+ * To avoid the need to unnecessarily exit fully to the host kernel, an IPI to
+ * a CPU thread that's running/napping inside of a guest is by default regarded
+ * as a request to wake the CPU (if needed) and continue execution within the
+ * guest, potentially to process new state like externally-generated
+ * interrupts or IPIs sent from within the guest itself (e.g. H_PROD/H_IPI).
+ *
+ * To force an exit to the host kernel, kvmppc_set_host_ipi() must be called
+ * prior to issuing the IPI to set the corresponding 'host_ipi' flag in the
+ * target CPU's PACA. To avoid unnecessary exits to the host, this flag should
+ * be immediately cleared via kvmppc_clear_host_ipi() by the IPI handler on
+ * the receiving side prior to processing the IPI work.
+ *
+ * NOTE:
+ *
+ * We currently issue an smp_mb() at the beginning of kvmppc_set_host_ipi().
+ * This is to guard against sequences such as the following:
+ *
+ *      CPU
+ *        X: smp_muxed_ipi_set_message():
+ *        X:   smp_mb()
+ *        X:   message[RESCHEDULE] = 1
+ *        X: doorbell_global_ipi(42):
+ *        X:   kvmppc_set_host_ipi(42)
+ *        X:   ppc_msgsnd_sync()/smp_mb()
+ *        X:   ppc_msgsnd() -> 42
+ *       42: doorbell_exception(): // from CPU X
+ *       42:   ppc_msgsync()
+ *      105: smp_muxed_ipi_set_message():
+ *      105:   smb_mb()
+ *           // STORE DEFERRED DUE TO RE-ORDERING
+ *    --105:   message[CALL_FUNCTION] = 1
+ *    | 105: doorbell_global_ipi(42):
+ *    | 105:   kvmppc_set_host_ipi(42)
+ *    |  42:   kvmppc_clear_host_ipi(42)
+ *    |  42: smp_ipi_demux_relaxed()
+ *    |  42: // returns to executing guest
+ *    |      // RE-ORDERED STORE COMPLETES
+ *    ->105:   message[CALL_FUNCTION] = 1
+ *      105:   ppc_msgsnd_sync()/smp_mb()
+ *      105:   ppc_msgsnd() -> 42
+ *       42: local_paca->kvm_hstate.host_ipi == 0 // IPI ignored
+ *      105: // hangs waiting on 42 to process messages/call_single_queue
+ *
+ * We also issue an smp_mb() at the end of kvmppc_clear_host_ipi(). This is
+ * to guard against sequences such as the following (as well as to create
+ * a read-side pairing with the barrier in kvmppc_set_host_ipi()):
+ *
+ *      CPU
+ *        X: smp_muxed_ipi_set_message():
+ *        X:   smp_mb()
+ *        X:   message[RESCHEDULE] = 1
+ *        X: doorbell_global_ipi(42):
+ *        X:   kvmppc_set_host_ipi(42)
+ *        X:   ppc_msgsnd_sync()/smp_mb()
+ *        X:   ppc_msgsnd() -> 42
+ *       42: doorbell_exception(): // from CPU X
+ *       42:   ppc_msgsync()
+ *           // STORE DEFERRED DUE TO RE-ORDERING
+ *    -- 42:   kvmppc_clear_host_ipi(42)
+ *    |  42: smp_ipi_demux_relaxed()
+ *    | 105: smp_muxed_ipi_set_message():
+ *    | 105:   smb_mb()
+ *    | 105:   message[CALL_FUNCTION] = 1
+ *    | 105: doorbell_global_ipi(42):
+ *    | 105:   kvmppc_set_host_ipi(42)
+ *    |      // RE-ORDERED STORE COMPLETES
+ *    -> 42:   kvmppc_clear_host_ipi(42)
+ *       42: // returns to executing guest
+ *      105:   ppc_msgsnd_sync()/smp_mb()
+ *      105:   ppc_msgsnd() -> 42
+ *       42: local_paca->kvm_hstate.host_ipi == 0 // IPI ignored
+ *      105: // hangs waiting on 42 to process messages/call_single_queue
+ */
+static inline void kvmppc_set_host_ipi(int cpu)
 {
-       paca_ptrs[cpu]->kvm_hstate.host_ipi = host_ipi;
+       /*
+        * order stores of IPI messages vs. setting of host_ipi flag
+        *
+        * pairs with the barrier in kvmppc_clear_host_ipi()
+        */
+       smp_mb();
+       paca_ptrs[cpu]->kvm_hstate.host_ipi = 1;
+}
+
+static inline void kvmppc_clear_host_ipi(int cpu)
+{
+       paca_ptrs[cpu]->kvm_hstate.host_ipi = 0;
+       /*
+        * order clearing of host_ipi flag vs. processing of IPI messages
+        *
+        * pairs with the barrier in kvmppc_set_host_ipi()
+        */
+       smp_mb();
 }
 
 static inline void kvmppc_fast_vcpu_kick(struct kvm_vcpu *vcpu)
@@ -486,7 +577,10 @@ static inline u32 kvmppc_get_xics_latch(void)
        return 0;
 }
 
-static inline void kvmppc_set_host_ipi(int cpu, u8 host_ipi)
+static inline void kvmppc_set_host_ipi(int cpu)
+{}
+
+static inline void kvmppc_clear_host_ipi(int cpu)
 {}
 
 static inline void kvmppc_fast_vcpu_kick(struct kvm_vcpu *vcpu)
index ec3714cf0989bfa1684ab4f34fde4aa46e804351..b3cbb1136bce0878148eb967dbd966755936dc76 100644 (file)
 #define   HMER_DEBUG_TRIG      (1ul << (63 - 17)) /* Debug trigger */
 #define        SPRN_HMEER      0x151   /* Hyp maintenance exception enable reg */
 #define SPRN_PCR       0x152   /* Processor compatibility register */
-#define   PCR_VEC_DIS  (1ul << (63-0)) /* Vec. disable (bit NA since POWER8) */
-#define   PCR_VSX_DIS  (1ul << (63-1)) /* VSX disable (bit NA since POWER8) */
-#define   PCR_TM_DIS   (1ul << (63-2)) /* Trans. memory disable (POWER8) */
+#define   PCR_VEC_DIS  (__MASK(63-0))  /* Vec. disable (bit NA since POWER8) */
+#define   PCR_VSX_DIS  (__MASK(63-1))  /* VSX disable (bit NA since POWER8) */
+#define   PCR_TM_DIS   (__MASK(63-2))  /* Trans. memory disable (POWER8) */
+#define   PCR_HIGH_BITS        (PCR_VEC_DIS | PCR_VSX_DIS | PCR_TM_DIS)
 /*
  * These bits are used in the function kvmppc_set_arch_compat() to specify and
  * determine both the compatibility level which we want to emulate and the
 #define   PCR_ARCH_207 0x8             /* Architecture 2.07 */
 #define   PCR_ARCH_206 0x4             /* Architecture 2.06 */
 #define   PCR_ARCH_205 0x2             /* Architecture 2.05 */
+#define   PCR_LOW_BITS (PCR_ARCH_207 | PCR_ARCH_206 | PCR_ARCH_205)
+#define   PCR_MASK     ~(PCR_HIGH_BITS | PCR_LOW_BITS) /* PCR Reserved Bits */
 #define        SPRN_HEIR       0x153   /* Hypervisor Emulated Instruction Register */
 #define SPRN_TLBINDEXR 0x154   /* P7 TLB control register */
 #define SPRN_TLBVPNR   0x155   /* P7 TLB control register */
index 3239a9fe6c1cf90c43033ece68c1e317053c735d..a460298c7ddb473b5a7978b64eb6e8a94701fc27 100644 (file)
@@ -23,6 +23,7 @@ _GLOBAL(__setup_cpu_power7)
        beqlr
        li      r0,0
        mtspr   SPRN_LPID,r0
+       LOAD_REG_IMMEDIATE(r0, PCR_MASK)
        mtspr   SPRN_PCR,r0
        mfspr   r3,SPRN_LPCR
        li      r4,(LPCR_LPES1 >> LPCR_LPES_SH)
@@ -37,6 +38,7 @@ _GLOBAL(__restore_cpu_power7)
        beqlr
        li      r0,0
        mtspr   SPRN_LPID,r0
+       LOAD_REG_IMMEDIATE(r0, PCR_MASK)
        mtspr   SPRN_PCR,r0
        mfspr   r3,SPRN_LPCR
        li      r4,(LPCR_LPES1 >> LPCR_LPES_SH)
@@ -54,6 +56,7 @@ _GLOBAL(__setup_cpu_power8)
        beqlr
        li      r0,0
        mtspr   SPRN_LPID,r0
+       LOAD_REG_IMMEDIATE(r0, PCR_MASK)
        mtspr   SPRN_PCR,r0
        mfspr   r3,SPRN_LPCR
        ori     r3, r3, LPCR_PECEDH
@@ -76,6 +79,7 @@ _GLOBAL(__restore_cpu_power8)
        beqlr
        li      r0,0
        mtspr   SPRN_LPID,r0
+       LOAD_REG_IMMEDIATE(r0, PCR_MASK)
        mtspr   SPRN_PCR,r0
        mfspr   r3,SPRN_LPCR
        ori     r3, r3, LPCR_PECEDH
@@ -98,6 +102,7 @@ _GLOBAL(__setup_cpu_power9)
        mtspr   SPRN_PSSCR,r0
        mtspr   SPRN_LPID,r0
        mtspr   SPRN_PID,r0
+       LOAD_REG_IMMEDIATE(r0, PCR_MASK)
        mtspr   SPRN_PCR,r0
        mfspr   r3,SPRN_LPCR
        LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE  | LPCR_HEIC)
@@ -123,6 +128,7 @@ _GLOBAL(__restore_cpu_power9)
        mtspr   SPRN_PSSCR,r0
        mtspr   SPRN_LPID,r0
        mtspr   SPRN_PID,r0
+       LOAD_REG_IMMEDIATE(r0, PCR_MASK)
        mtspr   SPRN_PCR,r0
        mfspr   r3,SPRN_LPCR
        LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE | LPCR_HEIC)
index 804b1a6196fac7f462c54c602c768d43ded64cdc..f17ff1200eaaefa77b22f9c20f0a1d0559a47e70 100644 (file)
@@ -33,7 +33,7 @@ void doorbell_global_ipi(int cpu)
 {
        u32 tag = get_hard_smp_processor_id(cpu);
 
-       kvmppc_set_host_ipi(cpu, 1);
+       kvmppc_set_host_ipi(cpu);
        /* Order previous accesses vs. msgsnd, which is treated as a store */
        ppc_msgsnd_sync();
        ppc_msgsnd(PPC_DBELL_MSGTYPE, 0, tag);
@@ -48,7 +48,7 @@ void doorbell_core_ipi(int cpu)
 {
        u32 tag = cpu_thread_in_core(cpu);
 
-       kvmppc_set_host_ipi(cpu, 1);
+       kvmppc_set_host_ipi(cpu);
        /* Order previous accesses vs. msgsnd, which is treated as a store */
        ppc_msgsnd_sync();
        ppc_msgsnd(PPC_DBELL_MSGTYPE, 0, tag);
@@ -84,7 +84,7 @@ void doorbell_exception(struct pt_regs *regs)
 
        may_hard_irq_enable();
 
-       kvmppc_set_host_ipi(smp_processor_id(), 0);
+       kvmppc_clear_host_ipi(smp_processor_id());
        __this_cpu_inc(irq_stat.doorbell_irqs);
 
        smp_ipi_demux_relaxed(); /* already performed the barrier */
index bd95318d2202c114e649633d8b06a932617f289e..180b3a5d1001a46af83ea26ca7a8d686baf64f8b 100644 (file)
@@ -101,7 +101,7 @@ static void __restore_cpu_cpufeatures(void)
        if (hv_mode) {
                mtspr(SPRN_LPID, 0);
                mtspr(SPRN_HFSCR, system_registers.hfscr);
-               mtspr(SPRN_PCR, 0);
+               mtspr(SPRN_PCR, PCR_MASK);
        }
        mtspr(SPRN_FSCR, system_registers.fscr);
 
@@ -144,6 +144,7 @@ static void __init cpufeatures_setup_cpu(void)
                mtspr(SPRN_HFSCR, 0);
        }
        mtspr(SPRN_FSCR, 0);
+       mtspr(SPRN_PCR, PCR_MASK);
 
        /*
         * LPCR does not get cleared, to match behaviour with secondaries
@@ -691,9 +692,37 @@ static bool __init cpufeatures_process_feature(struct dt_cpu_feature *f)
        return true;
 }
 
+/*
+ * Handle POWER9 broadcast tlbie invalidation issue using
+ * cpu feature flag.
+ */
+static __init void update_tlbie_feature_flag(unsigned long pvr)
+{
+       if (PVR_VER(pvr) == PVR_POWER9) {
+               /*
+                * Set the tlbie feature flag for anything below
+                * Nimbus DD 2.3 and Cumulus DD 1.3
+                */
+               if ((pvr & 0xe000) == 0) {
+                       /* Nimbus */
+                       if ((pvr & 0xfff) < 0x203)
+                               cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
+               } else if ((pvr & 0xc000) == 0) {
+                       /* Cumulus */
+                       if ((pvr & 0xfff) < 0x103)
+                               cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
+               } else {
+                       WARN_ONCE(1, "Unknown PVR");
+                       cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
+               }
+
+               cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_ERAT_BUG;
+       }
+}
+
 static __init void cpufeatures_cpu_quirks(void)
 {
-       int version = mfspr(SPRN_PVR);
+       unsigned long version = mfspr(SPRN_PVR);
 
        /*
         * Not all quirks can be derived from the cpufeatures device tree.
@@ -712,10 +741,10 @@ static __init void cpufeatures_cpu_quirks(void)
 
        if ((version & 0xffff0000) == 0x004e0000) {
                cur_cpu_spec->cpu_features &= ~(CPU_FTR_DAWR);
-               cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_BUG;
                cur_cpu_spec->cpu_features |= CPU_FTR_P9_TIDR;
        }
 
+       update_tlbie_feature_flag(version);
        /*
         * PKEY was not in the initial base or feature node
         * specification, but it should become optional in the next
index 0a91dee51245fca222973a486cf8b3d0ced19feb..bc8a551013be934065a9246ae55b639f0b15b8c9 100644 (file)
@@ -1960,7 +1960,7 @@ static int eeh_debugfs_break_device(struct pci_dev *pdev)
        pci_err(pdev, "Going to break: %pR\n", bar);
 
        if (pdev->is_virtfn) {
-#ifndef CONFIG_IOV
+#ifndef CONFIG_PCI_IOV
                return -ENXIO;
 #else
                /*
@@ -1980,7 +1980,7 @@ static int eeh_debugfs_break_device(struct pci_dev *pdev)
                pos  = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
                pos += PCI_SRIOV_CTRL;
                bit  = PCI_SRIOV_CTRL_MSE;
-#endif /* !CONFIG_IOV */
+#endif /* !CONFIG_PCI_IOV */
        } else {
                bit = PCI_COMMAND_MEMORY;
                pos = PCI_COMMAND;
index efd8f93bc9dc1272686055f94d1cdbcee8f61d65..709cf1fd4cf466773da3a0021cf03777e4a58ef6 100644 (file)
@@ -401,8 +401,11 @@ static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat)
 
        spin_lock(&vc->lock);
        vc->arch_compat = arch_compat;
-       /* Set all PCR bits for which guest_pcr_bit <= bit < host_pcr_bit */
-       vc->pcr = host_pcr_bit - guest_pcr_bit;
+       /*
+        * Set all PCR bits for which guest_pcr_bit <= bit < host_pcr_bit
+        * Also set all reserved PCR bits
+        */
+       vc->pcr = (host_pcr_bit - guest_pcr_bit) | PCR_MASK;
        spin_unlock(&vc->lock);
 
        return 0;
@@ -3410,7 +3413,7 @@ static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit,
        }
 
        if (vc->pcr)
-               mtspr(SPRN_PCR, vc->pcr);
+               mtspr(SPRN_PCR, vc->pcr | PCR_MASK);
        mtspr(SPRN_DPDES, vc->dpdes);
        mtspr(SPRN_VTB, vc->vtb);
 
@@ -3490,7 +3493,7 @@ static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit,
        vc->vtb = mfspr(SPRN_VTB);
        mtspr(SPRN_DPDES, 0);
        if (vc->pcr)
-               mtspr(SPRN_PCR, 0);
+               mtspr(SPRN_PCR, PCR_MASK);
 
        if (vc->tb_offset_applied) {
                u64 new_tb = mftb() - vc->tb_offset_applied;
index fff90f2c3de2100f67c627f0dfbc39192d501f5d..cdf30c6eaf54268d7258490f8a76d951ad7aa9fe 100644 (file)
@@ -29,7 +29,7 @@ void kvmhv_save_hv_regs(struct kvm_vcpu *vcpu, struct hv_guest_state *hr)
 {
        struct kvmppc_vcore *vc = vcpu->arch.vcore;
 
-       hr->pcr = vc->pcr;
+       hr->pcr = vc->pcr | PCR_MASK;
        hr->dpdes = vc->dpdes;
        hr->hfscr = vcpu->arch.hfscr;
        hr->tb_offset = vc->tb_offset;
@@ -65,7 +65,7 @@ static void byteswap_hv_regs(struct hv_guest_state *hr)
        hr->lpid = swab32(hr->lpid);
        hr->vcpu_token = swab32(hr->vcpu_token);
        hr->lpcr = swab64(hr->lpcr);
-       hr->pcr = swab64(hr->pcr);
+       hr->pcr = swab64(hr->pcr) | PCR_MASK;
        hr->amor = swab64(hr->amor);
        hr->dpdes = swab64(hr->dpdes);
        hr->hfscr = swab64(hr->hfscr);
@@ -148,7 +148,7 @@ static void restore_hv_regs(struct kvm_vcpu *vcpu, struct hv_guest_state *hr)
 {
        struct kvmppc_vcore *vc = vcpu->arch.vcore;
 
-       vc->pcr = hr->pcr;
+       vc->pcr = hr->pcr | PCR_MASK;
        vc->dpdes = hr->dpdes;
        vcpu->arch.hfscr = hr->hfscr;
        vcpu->arch.dawr = hr->dawr0;
index 7186c65c61c9445608ab1e36bd8efde28382fc8b..220305454c23c9e8e8a2b3d975682de53615c93f 100644 (file)
@@ -433,6 +433,37 @@ static inline int is_mmio_hpte(unsigned long v, unsigned long r)
                (HPTE_R_KEY_HI | HPTE_R_KEY_LO));
 }
 
+static inline void fixup_tlbie_lpid(unsigned long rb_value, unsigned long lpid)
+{
+
+       if (cpu_has_feature(CPU_FTR_P9_TLBIE_ERAT_BUG)) {
+               /* Radix flush for a hash guest */
+
+               unsigned long rb,rs,prs,r,ric;
+
+               rb = PPC_BIT(52); /* IS = 2 */
+               rs = 0;  /* lpid = 0 */
+               prs = 0; /* partition scoped */
+               r = 1;   /* radix format */
+               ric = 0; /* RIC_FLSUH_TLB */
+
+               /*
+                * Need the extra ptesync to make sure we don't
+                * re-order the tlbie
+                */
+               asm volatile("ptesync": : :"memory");
+               asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1)
+                            : : "r"(rb), "i"(r), "i"(prs),
+                              "i"(ric), "r"(rs) : "memory");
+       }
+
+       if (cpu_has_feature(CPU_FTR_P9_TLBIE_STQ_BUG)) {
+               asm volatile("ptesync": : :"memory");
+               asm volatile(PPC_TLBIE_5(%0,%1,0,0,0) : :
+                            "r" (rb_value), "r" (lpid));
+       }
+}
+
 static void do_tlbies(struct kvm *kvm, unsigned long *rbvalues,
                      long npages, int global, bool need_sync)
 {
@@ -451,16 +482,7 @@ static void do_tlbies(struct kvm *kvm, unsigned long *rbvalues,
                                     "r" (rbvalues[i]), "r" (kvm->arch.lpid));
                }
 
-               if (cpu_has_feature(CPU_FTR_P9_TLBIE_BUG)) {
-                       /*
-                        * Need the extra ptesync to make sure we don't
-                        * re-order the tlbie
-                        */
-                       asm volatile("ptesync": : :"memory");
-                       asm volatile(PPC_TLBIE_5(%0,%1,0,0,0) : :
-                                    "r" (rbvalues[0]), "r" (kvm->arch.lpid));
-               }
-
+               fixup_tlbie_lpid(rbvalues[i - 1], kvm->arch.lpid);
                asm volatile("eieio; tlbsync; ptesync" : : : "memory");
        } else {
                if (need_sync)
index 4d2ec77d806c3da231619e9888bae1aba56f0b1c..287d5911df0f4998c0234e14a08024add3ccc589 100644 (file)
@@ -58,7 +58,7 @@ static inline void icp_send_hcore_msg(int hcore, struct kvm_vcpu *vcpu)
        hcpu = hcore << threads_shift;
        kvmppc_host_rm_ops_hv->rm_core[hcore].rm_data = vcpu;
        smp_muxed_ipi_set_message(hcpu, PPC_MSG_RM_HOST_ACTION);
-       kvmppc_set_host_ipi(hcpu, 1);
+       kvmppc_set_host_ipi(hcpu);
        smp_mb();
        kvmhv_rm_send_ipi(hcpu);
 }
index 9a05b0d932efa53045444b02c8372573feabcb46..74a9cfe84aeedfb945628aa31ec0bae0348e7eec 100644 (file)
@@ -644,8 +644,10 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_300)
 
        /* Load guest PCR value to select appropriate compat mode */
 37:    ld      r7, VCORE_PCR(r5)
-       cmpdi   r7, 0
+       LOAD_REG_IMMEDIATE(r6, PCR_MASK)
+       cmpld   r7, r6
        beq     38f
+       or      r7, r7, r6
        mtspr   SPRN_PCR, r7
 38:
 
@@ -1913,10 +1915,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
 
        /* Reset PCR */
        ld      r0, VCORE_PCR(r5)
-       cmpdi   r0, 0
+       LOAD_REG_IMMEDIATE(r6, PCR_MASK)
+       cmpld   r0, r6
        beq     18f
-       li      r0, 0
-       mtspr   SPRN_PCR, r0
+       mtspr   SPRN_PCR, r6
 18:
        /* Signal secondary CPUs to continue */
        stb     r0,VCORE_IN_GUEST(r5)
index 90ab4f31e2b3f83ff1f13657f0004e95bd14db59..523e42eb11daa4674d7eab30c86779040fdcefca 100644 (file)
@@ -197,9 +197,32 @@ static inline unsigned long  ___tlbie(unsigned long vpn, int psize,
        return va;
 }
 
-static inline void fixup_tlbie(unsigned long vpn, int psize, int apsize, int ssize)
+static inline void fixup_tlbie_vpn(unsigned long vpn, int psize,
+                                  int apsize, int ssize)
 {
-       if (cpu_has_feature(CPU_FTR_P9_TLBIE_BUG)) {
+       if (cpu_has_feature(CPU_FTR_P9_TLBIE_ERAT_BUG)) {
+               /* Radix flush for a hash guest */
+
+               unsigned long rb,rs,prs,r,ric;
+
+               rb = PPC_BIT(52); /* IS = 2 */
+               rs = 0;  /* lpid = 0 */
+               prs = 0; /* partition scoped */
+               r = 1;   /* radix format */
+               ric = 0; /* RIC_FLSUH_TLB */
+
+               /*
+                * Need the extra ptesync to make sure we don't
+                * re-order the tlbie
+                */
+               asm volatile("ptesync": : :"memory");
+               asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1)
+                            : : "r"(rb), "i"(r), "i"(prs),
+                              "i"(ric), "r"(rs) : "memory");
+       }
+
+
+       if (cpu_has_feature(CPU_FTR_P9_TLBIE_STQ_BUG)) {
                /* Need the extra ptesync to ensure we don't reorder tlbie*/
                asm volatile("ptesync": : :"memory");
                ___tlbie(vpn, psize, apsize, ssize);
@@ -283,7 +306,7 @@ static inline void tlbie(unsigned long vpn, int psize, int apsize,
                asm volatile("ptesync": : :"memory");
        } else {
                __tlbie(vpn, psize, apsize, ssize);
-               fixup_tlbie(vpn, psize, apsize, ssize);
+               fixup_tlbie_vpn(vpn, psize, apsize, ssize);
                asm volatile("eieio; tlbsync; ptesync": : :"memory");
        }
        if (lock_tlbie && !use_local)
@@ -856,7 +879,7 @@ static void native_flush_hash_range(unsigned long number, int local)
                /*
                 * Just do one more with the last used values.
                 */
-               fixup_tlbie(vpn, psize, psize, ssize);
+               fixup_tlbie_vpn(vpn, psize, psize, ssize);
                asm volatile("eieio; tlbsync; ptesync":::"memory");
 
                if (lock_tlbie)
index d1f390ac9cdbffde410f4bff055c67710445d896..64733b9cb20a87ea48e245bf1bbd901d6e8c0f1d 100644 (file)
@@ -406,6 +406,8 @@ int hash__has_transparent_hugepage(void)
 
        return 1;
 }
+EXPORT_SYMBOL_GPL(hash__has_transparent_hugepage);
+
 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 
 #ifdef CONFIG_STRICT_KERNEL_RWX
index 2d0cb5ba9a47e89317a1ebc9a46c3ff7d1a1a423..0ba30b8b935bcf2a0251185b2655555542c053c0 100644 (file)
@@ -256,8 +256,21 @@ void destroy_context(struct mm_struct *mm)
 #ifdef CONFIG_SPAPR_TCE_IOMMU
        WARN_ON_ONCE(!list_empty(&mm->context.iommu_group_mem_list));
 #endif
+       /*
+        * For tasks which were successfully initialized we end up calling
+        * arch_exit_mmap() which clears the process table entry. And
+        * arch_exit_mmap() is called before the required fullmm TLB flush
+        * which does a RIC=2 flush. Hence for an initialized task, we do clear
+        * any cached process table entries.
+        *
+        * The condition below handles the error case during task init. We have
+        * set the process table entry early and if we fail a task
+        * initialization, we need to ensure the process table entry is zeroed.
+        * We need not worry about process table entry caches because the task
+        * never ran with the PID value.
+        */
        if (radix_enabled())
-               WARN_ON(process_tb[mm->context.id].prtb0 != 0);
+               process_tb[mm->context.id].prtb0 = 0;
        else
                subpage_prot_free(mm);
        destroy_contexts(&mm->context);
index 3a1fbf9cb8f86efbb95b94443b55ca6ed2fc1405..6ee17d09649c3764e518fc8c58a0bcf659a89893 100644 (file)
@@ -1027,13 +1027,6 @@ pmd_t radix__pmdp_huge_get_and_clear(struct mm_struct *mm,
        return old_pmd;
 }
 
-int radix__has_transparent_hugepage(void)
-{
-       /* For radix 2M at PMD level means thp */
-       if (mmu_psize_defs[MMU_PAGE_2M].shift == PMD_SHIFT)
-               return 1;
-       return 0;
-}
 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 
 void radix__ptep_set_access_flags(struct vm_area_struct *vma, pte_t *ptep,
index 631be42abd330611db0c8f67a7adc6a56dc0a57d..67af871190c6dcbcdbaaedbf192e34b2c80e7e9f 100644 (file)
@@ -196,22 +196,83 @@ static __always_inline void __tlbie_lpid_va(unsigned long va, unsigned long lpid
        trace_tlbie(lpid, 0, rb, rs, ric, prs, r);
 }
 
-static inline void fixup_tlbie(void)
+
+static inline void fixup_tlbie_va(unsigned long va, unsigned long pid,
+                                 unsigned long ap)
+{
+       if (cpu_has_feature(CPU_FTR_P9_TLBIE_ERAT_BUG)) {
+               asm volatile("ptesync": : :"memory");
+               __tlbie_va(va, 0, ap, RIC_FLUSH_TLB);
+       }
+
+       if (cpu_has_feature(CPU_FTR_P9_TLBIE_STQ_BUG)) {
+               asm volatile("ptesync": : :"memory");
+               __tlbie_va(va, pid, ap, RIC_FLUSH_TLB);
+       }
+}
+
+static inline void fixup_tlbie_va_range(unsigned long va, unsigned long pid,
+                                       unsigned long ap)
+{
+       if (cpu_has_feature(CPU_FTR_P9_TLBIE_ERAT_BUG)) {
+               asm volatile("ptesync": : :"memory");
+               __tlbie_pid(0, RIC_FLUSH_TLB);
+       }
+
+       if (cpu_has_feature(CPU_FTR_P9_TLBIE_STQ_BUG)) {
+               asm volatile("ptesync": : :"memory");
+               __tlbie_va(va, pid, ap, RIC_FLUSH_TLB);
+       }
+}
+
+static inline void fixup_tlbie_pid(unsigned long pid)
 {
-       unsigned long pid = 0;
+       /*
+        * We can use any address for the invalidation, pick one which is
+        * probably unused as an optimisation.
+        */
        unsigned long va = ((1UL << 52) - 1);
 
-       if (cpu_has_feature(CPU_FTR_P9_TLBIE_BUG)) {
+       if (cpu_has_feature(CPU_FTR_P9_TLBIE_ERAT_BUG)) {
+               asm volatile("ptesync": : :"memory");
+               __tlbie_pid(0, RIC_FLUSH_TLB);
+       }
+
+       if (cpu_has_feature(CPU_FTR_P9_TLBIE_STQ_BUG)) {
                asm volatile("ptesync": : :"memory");
                __tlbie_va(va, pid, mmu_get_ap(MMU_PAGE_64K), RIC_FLUSH_TLB);
        }
 }
 
+
+static inline void fixup_tlbie_lpid_va(unsigned long va, unsigned long lpid,
+                                      unsigned long ap)
+{
+       if (cpu_has_feature(CPU_FTR_P9_TLBIE_ERAT_BUG)) {
+               asm volatile("ptesync": : :"memory");
+               __tlbie_lpid_va(va, 0, ap, RIC_FLUSH_TLB);
+       }
+
+       if (cpu_has_feature(CPU_FTR_P9_TLBIE_STQ_BUG)) {
+               asm volatile("ptesync": : :"memory");
+               __tlbie_lpid_va(va, lpid, ap, RIC_FLUSH_TLB);
+       }
+}
+
 static inline void fixup_tlbie_lpid(unsigned long lpid)
 {
+       /*
+        * We can use any address for the invalidation, pick one which is
+        * probably unused as an optimisation.
+        */
        unsigned long va = ((1UL << 52) - 1);
 
-       if (cpu_has_feature(CPU_FTR_P9_TLBIE_BUG)) {
+       if (cpu_has_feature(CPU_FTR_P9_TLBIE_ERAT_BUG)) {
+               asm volatile("ptesync": : :"memory");
+               __tlbie_lpid(0, RIC_FLUSH_TLB);
+       }
+
+       if (cpu_has_feature(CPU_FTR_P9_TLBIE_STQ_BUG)) {
                asm volatile("ptesync": : :"memory");
                __tlbie_lpid_va(va, lpid, mmu_get_ap(MMU_PAGE_64K), RIC_FLUSH_TLB);
        }
@@ -258,6 +319,7 @@ static inline void _tlbie_pid(unsigned long pid, unsigned long ric)
        switch (ric) {
        case RIC_FLUSH_TLB:
                __tlbie_pid(pid, RIC_FLUSH_TLB);
+               fixup_tlbie_pid(pid);
                break;
        case RIC_FLUSH_PWC:
                __tlbie_pid(pid, RIC_FLUSH_PWC);
@@ -265,8 +327,8 @@ static inline void _tlbie_pid(unsigned long pid, unsigned long ric)
        case RIC_FLUSH_ALL:
        default:
                __tlbie_pid(pid, RIC_FLUSH_ALL);
+               fixup_tlbie_pid(pid);
        }
-       fixup_tlbie();
        asm volatile("eieio; tlbsync; ptesync": : :"memory");
 }
 
@@ -315,6 +377,7 @@ static inline void _tlbie_lpid(unsigned long lpid, unsigned long ric)
        switch (ric) {
        case RIC_FLUSH_TLB:
                __tlbie_lpid(lpid, RIC_FLUSH_TLB);
+               fixup_tlbie_lpid(lpid);
                break;
        case RIC_FLUSH_PWC:
                __tlbie_lpid(lpid, RIC_FLUSH_PWC);
@@ -322,8 +385,8 @@ static inline void _tlbie_lpid(unsigned long lpid, unsigned long ric)
        case RIC_FLUSH_ALL:
        default:
                __tlbie_lpid(lpid, RIC_FLUSH_ALL);
+               fixup_tlbie_lpid(lpid);
        }
-       fixup_tlbie_lpid(lpid);
        asm volatile("eieio; tlbsync; ptesync": : :"memory");
 }
 
@@ -390,6 +453,8 @@ static inline void __tlbie_va_range(unsigned long start, unsigned long end,
 
        for (addr = start; addr < end; addr += page_size)
                __tlbie_va(addr, pid, ap, RIC_FLUSH_TLB);
+
+       fixup_tlbie_va_range(addr - page_size, pid, ap);
 }
 
 static __always_inline void _tlbie_va(unsigned long va, unsigned long pid,
@@ -399,7 +464,7 @@ static __always_inline void _tlbie_va(unsigned long va, unsigned long pid,
 
        asm volatile("ptesync": : :"memory");
        __tlbie_va(va, pid, ap, ric);
-       fixup_tlbie();
+       fixup_tlbie_va(va, pid, ap);
        asm volatile("eieio; tlbsync; ptesync": : :"memory");
 }
 
@@ -457,7 +522,7 @@ static __always_inline void _tlbie_lpid_va(unsigned long va, unsigned long lpid,
 
        asm volatile("ptesync": : :"memory");
        __tlbie_lpid_va(va, lpid, ap, ric);
-       fixup_tlbie_lpid(lpid);
+       fixup_tlbie_lpid_va(va, lpid, ap);
        asm volatile("eieio; tlbsync; ptesync": : :"memory");
 }
 
@@ -469,7 +534,6 @@ static inline void _tlbie_va_range(unsigned long start, unsigned long end,
        if (also_pwc)
                __tlbie_pid(pid, RIC_FLUSH_PWC);
        __tlbie_va_range(start, end, pid, page_size, psize);
-       fixup_tlbie();
        asm volatile("eieio; tlbsync; ptesync": : :"memory");
 }
 
@@ -856,7 +920,7 @@ is_local:
                        if (gflush)
                                __tlbie_va_range(gstart, gend, pid,
                                                PUD_SIZE, MMU_PAGE_1G);
-                       fixup_tlbie();
+
                        asm volatile("eieio; tlbsync; ptesync": : :"memory");
                } else {
                        _tlbiel_va_range_multicast(mm,
index a44f6281ca3af729e3ecb512b73ce669729df389..4e08246acd79ad54d81a2acf0c2909475a704e63 100644 (file)
@@ -172,6 +172,21 @@ static __meminit void vmemmap_list_populate(unsigned long phys,
        vmemmap_list = vmem_back;
 }
 
+static bool altmap_cross_boundary(struct vmem_altmap *altmap, unsigned long start,
+                               unsigned long page_size)
+{
+       unsigned long nr_pfn = page_size / sizeof(struct page);
+       unsigned long start_pfn = page_to_pfn((struct page *)start);
+
+       if ((start_pfn + nr_pfn) > altmap->end_pfn)
+               return true;
+
+       if (start_pfn < altmap->base_pfn)
+               return true;
+
+       return false;
+}
+
 int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
                struct vmem_altmap *altmap)
 {
@@ -194,7 +209,7 @@ int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
                 * fail due to alignment issues when using 16MB hugepages, so
                 * fall back to system memory if the altmap allocation fail.
                 */
-               if (altmap) {
+               if (altmap && !altmap_cross_boundary(altmap, start, page_size)) {
                        p = altmap_alloc_block_buf(page_size, altmap);
                        if (!p)
                                pr_debug("altmap block allocation failed, falling back to system memory");
index 802387b231adcd5036a6d72a26bea5f81f730d4c..0e6ed4413eeacb59e6ce3804bc0d5f35cc6bd6ff 100644 (file)
 #include <asm/code-patching.h>
 #include <mm/mmu_decl.h>
 
+static pgprot_t kasan_prot_ro(void)
+{
+       if (early_mmu_has_feature(MMU_FTR_HPTE_TABLE))
+               return PAGE_READONLY;
+
+       return PAGE_KERNEL_RO;
+}
+
 static void kasan_populate_pte(pte_t *ptep, pgprot_t prot)
 {
        unsigned long va = (unsigned long)kasan_early_shadow_page;
@@ -26,6 +34,7 @@ static int __ref kasan_init_shadow_page_tables(unsigned long k_start, unsigned l
 {
        pmd_t *pmd;
        unsigned long k_cur, k_next;
+       pgprot_t prot = slab_is_available() ? kasan_prot_ro() : PAGE_KERNEL;
 
        pmd = pmd_offset(pud_offset(pgd_offset_k(k_start), k_start), k_start);
 
@@ -43,10 +52,7 @@ static int __ref kasan_init_shadow_page_tables(unsigned long k_start, unsigned l
 
                if (!new)
                        return -ENOMEM;
-               if (early_mmu_has_feature(MMU_FTR_HPTE_TABLE))
-                       kasan_populate_pte(new, PAGE_READONLY);
-               else
-                       kasan_populate_pte(new, PAGE_KERNEL_RO);
+               kasan_populate_pte(new, prot);
 
                smp_wmb(); /* See comment in __pte_alloc */
 
@@ -103,11 +109,23 @@ static int __ref kasan_init_region(void *start, size_t size)
 
 static void __init kasan_remap_early_shadow_ro(void)
 {
-       if (early_mmu_has_feature(MMU_FTR_HPTE_TABLE))
-               kasan_populate_pte(kasan_early_shadow_pte, PAGE_READONLY);
-       else
-               kasan_populate_pte(kasan_early_shadow_pte, PAGE_KERNEL_RO);
+       pgprot_t prot = kasan_prot_ro();
+       unsigned long k_start = KASAN_SHADOW_START;
+       unsigned long k_end = KASAN_SHADOW_END;
+       unsigned long k_cur;
+       phys_addr_t pa = __pa(kasan_early_shadow_page);
+
+       kasan_populate_pte(kasan_early_shadow_pte, prot);
+
+       for (k_cur = k_start & PAGE_MASK; k_cur < k_end; k_cur += PAGE_SIZE) {
+               pmd_t *pmd = pmd_offset(pud_offset(pgd_offset_k(k_cur), k_cur), k_cur);
+               pte_t *ptep = pte_offset_kernel(pmd, k_cur);
+
+               if ((pte_val(*ptep) & PTE_RPN_MASK) != pa)
+                       continue;
 
+               __set_pte_at(&init_mm, k_cur, ptep, pfn_pte(PHYS_PFN(pa), prot), 0);
+       }
        flush_tlb_kernel_range(KASAN_SHADOW_START, KASAN_SHADOW_END);
 }
 
index 94cd96b9b7bbc5d9b224bb9c9b9f02b9516ebfeb..fbd6e6b7bbf28c4ac806681e4abd42e488504af8 100644 (file)
@@ -193,7 +193,7 @@ static void pnv_smp_cpu_kill_self(void)
                 * for coming online, which are handled via
                 * generic_check_cpu_restart() calls.
                 */
-               kvmppc_set_host_ipi(cpu, 0);
+               kvmppc_clear_host_ipi(cpu);
 
                srr1 = pnv_cpu_offline(cpu);
 
index 36b846f6e74ee503fc25f23d890ecf0a654c754f..b53359258d9953c551f9f90f694adf80240b1763 100644 (file)
@@ -56,6 +56,22 @@ EXPORT_SYMBOL(plpar_hcall);
 EXPORT_SYMBOL(plpar_hcall9);
 EXPORT_SYMBOL(plpar_hcall_norets);
 
+/*
+ * H_BLOCK_REMOVE supported block size for this page size in segment who's base
+ * page size is that page size.
+ *
+ * The first index is the segment base page size, the second one is the actual
+ * page size.
+ */
+static int hblkrm_size[MMU_PAGE_COUNT][MMU_PAGE_COUNT] __ro_after_init;
+
+/*
+ * Due to the involved complexity, and that the current hypervisor is only
+ * returning this value or 0, we are limiting the support of the H_BLOCK_REMOVE
+ * buffer size to 8 size block.
+ */
+#define HBLKRM_SUPPORTED_BLOCK_SIZE 8
+
 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
 static u8 dtl_mask = DTL_LOG_PREEMPT;
 #else
@@ -984,6 +1000,17 @@ static void pSeries_lpar_hpte_invalidate(unsigned long slot, unsigned long vpn,
 #define HBLKR_CTRL_ERRNOTFOUND 0x8800000000000000UL
 #define HBLKR_CTRL_ERRBUSY     0xa000000000000000UL
 
+/*
+ * Returned true if we are supporting this block size for the specified segment
+ * base page size and actual page size.
+ *
+ * Currently, we only support 8 size block.
+ */
+static inline bool is_supported_hlbkrm(int bpsize, int psize)
+{
+       return (hblkrm_size[bpsize][psize] == HBLKRM_SUPPORTED_BLOCK_SIZE);
+}
+
 /**
  * H_BLOCK_REMOVE caller.
  * @idx should point to the latest @param entry set with a PTEX.
@@ -1143,7 +1170,8 @@ static inline void __pSeries_lpar_hugepage_invalidate(unsigned long *slot,
        if (lock_tlbie)
                spin_lock_irqsave(&pSeries_lpar_tlbie_lock, flags);
 
-       if (firmware_has_feature(FW_FEATURE_BLOCK_REMOVE))
+       /* Assuming THP size is 16M */
+       if (is_supported_hlbkrm(psize, MMU_PAGE_16M))
                hugepage_block_invalidate(slot, vpn, count, psize, ssize);
        else
                hugepage_bulk_invalidate(slot, vpn, count, psize, ssize);
@@ -1311,6 +1339,137 @@ static void do_block_remove(unsigned long number, struct ppc64_tlb_batch *batch,
                (void)call_block_remove(pix, param, true);
 }
 
+/*
+ * TLB Block Invalidate Characteristics
+ *
+ * These characteristics define the size of the block the hcall H_BLOCK_REMOVE
+ * is able to process for each couple segment base page size, actual page size.
+ *
+ * The ibm,get-system-parameter properties is returning a buffer with the
+ * following layout:
+ *
+ * [ 2 bytes size of the RTAS buffer (excluding these 2 bytes) ]
+ * -----------------
+ * TLB Block Invalidate Specifiers:
+ * [ 1 byte LOG base 2 of the TLB invalidate block size being specified ]
+ * [ 1 byte Number of page sizes (N) that are supported for the specified
+ *          TLB invalidate block size ]
+ * [ 1 byte Encoded segment base page size and actual page size
+ *          MSB=0 means 4k segment base page size and actual page size
+ *          MSB=1 the penc value in mmu_psize_def ]
+ * ...
+ * -----------------
+ * Next TLB Block Invalidate Specifiers...
+ * -----------------
+ * [ 0 ]
+ */
+static inline void set_hblkrm_bloc_size(int bpsize, int psize,
+                                       unsigned int block_size)
+{
+       if (block_size > hblkrm_size[bpsize][psize])
+               hblkrm_size[bpsize][psize] = block_size;
+}
+
+/*
+ * Decode the Encoded segment base page size and actual page size.
+ * PAPR specifies:
+ *   - bit 7 is the L bit
+ *   - bits 0-5 are the penc value
+ * If the L bit is 0, this means 4K segment base page size and actual page size
+ * otherwise the penc value should be read.
+ */
+#define HBLKRM_L_MASK          0x80
+#define HBLKRM_PENC_MASK       0x3f
+static inline void __init check_lp_set_hblkrm(unsigned int lp,
+                                             unsigned int block_size)
+{
+       unsigned int bpsize, psize;
+
+       /* First, check the L bit, if not set, this means 4K */
+       if ((lp & HBLKRM_L_MASK) == 0) {
+               set_hblkrm_bloc_size(MMU_PAGE_4K, MMU_PAGE_4K, block_size);
+               return;
+       }
+
+       lp &= HBLKRM_PENC_MASK;
+       for (bpsize = 0; bpsize < MMU_PAGE_COUNT; bpsize++) {
+               struct mmu_psize_def *def = &mmu_psize_defs[bpsize];
+
+               for (psize = 0; psize < MMU_PAGE_COUNT; psize++) {
+                       if (def->penc[psize] == lp) {
+                               set_hblkrm_bloc_size(bpsize, psize, block_size);
+                               return;
+                       }
+               }
+       }
+}
+
+#define SPLPAR_TLB_BIC_TOKEN           50
+
+/*
+ * The size of the TLB Block Invalidate Characteristics is variable. But at the
+ * maximum it will be the number of possible page sizes *2 + 10 bytes.
+ * Currently MMU_PAGE_COUNT is 16, which means 42 bytes. Use a cache line size
+ * (128 bytes) for the buffer to get plenty of space.
+ */
+#define SPLPAR_TLB_BIC_MAXLENGTH       128
+
+void __init pseries_lpar_read_hblkrm_characteristics(void)
+{
+       unsigned char local_buffer[SPLPAR_TLB_BIC_MAXLENGTH];
+       int call_status, len, idx, bpsize;
+
+       spin_lock(&rtas_data_buf_lock);
+       memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE);
+       call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1,
+                               NULL,
+                               SPLPAR_TLB_BIC_TOKEN,
+                               __pa(rtas_data_buf),
+                               RTAS_DATA_BUF_SIZE);
+       memcpy(local_buffer, rtas_data_buf, SPLPAR_TLB_BIC_MAXLENGTH);
+       local_buffer[SPLPAR_TLB_BIC_MAXLENGTH - 1] = '\0';
+       spin_unlock(&rtas_data_buf_lock);
+
+       if (call_status != 0) {
+               pr_warn("%s %s Error calling get-system-parameter (0x%x)\n",
+                       __FILE__, __func__, call_status);
+               return;
+       }
+
+       /*
+        * The first two (2) bytes of the data in the buffer are the length of
+        * the returned data, not counting these first two (2) bytes.
+        */
+       len = be16_to_cpu(*((u16 *)local_buffer)) + 2;
+       if (len > SPLPAR_TLB_BIC_MAXLENGTH) {
+               pr_warn("%s too large returned buffer %d", __func__, len);
+               return;
+       }
+
+       idx = 2;
+       while (idx < len) {
+               u8 block_shift = local_buffer[idx++];
+               u32 block_size;
+               unsigned int npsize;
+
+               if (!block_shift)
+                       break;
+
+               block_size = 1 << block_shift;
+
+               for (npsize = local_buffer[idx++];
+                    npsize > 0 && idx < len; npsize--)
+                       check_lp_set_hblkrm((unsigned int) local_buffer[idx++],
+                                           block_size);
+       }
+
+       for (bpsize = 0; bpsize < MMU_PAGE_COUNT; bpsize++)
+               for (idx = 0; idx < MMU_PAGE_COUNT; idx++)
+                       if (hblkrm_size[bpsize][idx])
+                               pr_info("H_BLOCK_REMOVE supports base psize:%d psize:%d block size:%d",
+                                       bpsize, idx, hblkrm_size[bpsize][idx]);
+}
+
 /*
  * Take a spinlock around flushes to avoid bouncing the hypervisor tlbie
  * lock.
@@ -1330,7 +1489,7 @@ static void pSeries_lpar_flush_hash_range(unsigned long number, int local)
        if (lock_tlbie)
                spin_lock_irqsave(&pSeries_lpar_tlbie_lock, flags);
 
-       if (firmware_has_feature(FW_FEATURE_BLOCK_REMOVE)) {
+       if (is_supported_hlbkrm(batch->psize, batch->psize)) {
                do_block_remove(number, batch, param);
                goto out;
        }
index a5ac371a3f066ecbabb1c2899a4e36468e598a01..61883291defc385a5119b9ce1c5d8d7e059764c5 100644 (file)
@@ -65,29 +65,21 @@ static int drc_pmem_bind(struct papr_scm_priv *p)
                cond_resched();
        } while (rc == H_BUSY);
 
-       if (rc) {
-               /* H_OVERLAP needs a separate error path */
-               if (rc == H_OVERLAP)
-                       return -EBUSY;
-
-               dev_err(&p->pdev->dev, "bind err: %lld\n", rc);
-               return -ENXIO;
-       }
+       if (rc)
+               return rc;
 
        p->bound_addr = saved;
-
-       dev_dbg(&p->pdev->dev, "bound drc %x to %pR\n", p->drc_index, &p->res);
-
-       return 0;
+       dev_dbg(&p->pdev->dev, "bound drc 0x%x to %pR\n", p->drc_index, &p->res);
+       return rc;
 }
 
-static int drc_pmem_unbind(struct papr_scm_priv *p)
+static void drc_pmem_unbind(struct papr_scm_priv *p)
 {
        unsigned long ret[PLPAR_HCALL_BUFSIZE];
        uint64_t token = 0;
        int64_t rc;
 
-       dev_dbg(&p->pdev->dev, "unbind drc %x\n", p->drc_index);
+       dev_dbg(&p->pdev->dev, "unbind drc 0x%x\n", p->drc_index);
 
        /* NB: unbind has the same retry requirements as drc_pmem_bind() */
        do {
@@ -110,12 +102,48 @@ static int drc_pmem_unbind(struct papr_scm_priv *p)
        if (rc)
                dev_err(&p->pdev->dev, "unbind error: %lld\n", rc);
        else
-               dev_dbg(&p->pdev->dev, "unbind drc %x complete\n",
+               dev_dbg(&p->pdev->dev, "unbind drc 0x%x complete\n",
                        p->drc_index);
 
-       return rc == H_SUCCESS ? 0 : -ENXIO;
+       return;
 }
 
+static int drc_pmem_query_n_bind(struct papr_scm_priv *p)
+{
+       unsigned long start_addr;
+       unsigned long end_addr;
+       unsigned long ret[PLPAR_HCALL_BUFSIZE];
+       int64_t rc;
+
+
+       rc = plpar_hcall(H_SCM_QUERY_BLOCK_MEM_BINDING, ret,
+                        p->drc_index, 0);
+       if (rc)
+               goto err_out;
+       start_addr = ret[0];
+
+       /* Make sure the full region is bound. */
+       rc = plpar_hcall(H_SCM_QUERY_BLOCK_MEM_BINDING, ret,
+                        p->drc_index, p->blocks - 1);
+       if (rc)
+               goto err_out;
+       end_addr = ret[0];
+
+       if ((end_addr - start_addr) != ((p->blocks - 1) * p->block_size))
+               goto err_out;
+
+       p->bound_addr = start_addr;
+       dev_dbg(&p->pdev->dev, "bound drc 0x%x to %pR\n", p->drc_index, &p->res);
+       return rc;
+
+err_out:
+       dev_info(&p->pdev->dev,
+                "Failed to query, trying an unbind followed by bind");
+       drc_pmem_unbind(p);
+       return drc_pmem_bind(p);
+}
+
+
 static int papr_scm_meta_get(struct papr_scm_priv *p,
                             struct nd_cmd_get_config_data_hdr *hdr)
 {
@@ -436,14 +464,14 @@ static int papr_scm_probe(struct platform_device *pdev)
        rc = drc_pmem_bind(p);
 
        /* If phyp says drc memory still bound then force unbound and retry */
-       if (rc == -EBUSY) {
-               dev_warn(&pdev->dev, "Retrying bind after unbinding\n");
-               drc_pmem_unbind(p);
-               rc = drc_pmem_bind(p);
-       }
+       if (rc == H_OVERLAP)
+               rc = drc_pmem_query_n_bind(p);
 
-       if (rc)
+       if (rc != H_SUCCESS) {
+               dev_err(&p->pdev->dev, "bind err: %d\n", rc);
+               rc = -ENXIO;
                goto err;
+       }
 
        /* setup the resource for the newly bound range */
        p->res.start = p->bound_addr;
index a6624d4bd9d0d83c8bd5d04b3958d0684787617c..13fa370a87e4eb0d660482060a3b3d424483b559 100644 (file)
@@ -112,5 +112,6 @@ static inline unsigned long cmo_get_page_size(void)
 int dlpar_workqueue_init(void);
 
 void pseries_setup_rfi_flush(void);
+void pseries_lpar_read_hblkrm_characteristics(void);
 
 #endif /* _PSERIES_PSERIES_H */
index f8adcd0e45893d630aab93501213700656d05902..0a40201f315ffd14dd39c9a7b71274c1d3db25a3 100644 (file)
@@ -744,6 +744,7 @@ static void __init pSeries_setup_arch(void)
 
        pseries_setup_rfi_flush();
        setup_stf_barrier();
+       pseries_lpar_read_hblkrm_characteristics();
 
        /* By default, only probe PCI (can be overridden by rtas_pci) */
        pci_add_flags(PCI_PROBE_ONLY);
index 485569ff7ef1df5b0356e410fe89db0ea2b1655e..7d13d2ef5a9054eaf009be6891a7132ff59dade6 100644 (file)
@@ -140,7 +140,7 @@ static unsigned int icp_native_get_irq(void)
 
 static void icp_native_cause_ipi(int cpu)
 {
-       kvmppc_set_host_ipi(cpu, 1);
+       kvmppc_set_host_ipi(cpu);
        icp_native_set_qirr(cpu, IPI_PRIORITY);
 }
 
@@ -179,7 +179,7 @@ void icp_native_flush_interrupt(void)
        if (vec == XICS_IPI) {
                /* Clear pending IPI */
                int cpu = smp_processor_id();
-               kvmppc_set_host_ipi(cpu, 0);
+               kvmppc_clear_host_ipi(cpu);
                icp_native_set_qirr(cpu, 0xff);
        } else {
                pr_err("XICS: hw interrupt 0x%x to offline cpu, disabling\n",
@@ -200,7 +200,7 @@ static irqreturn_t icp_native_ipi_action(int irq, void *dev_id)
 {
        int cpu = smp_processor_id();
 
-       kvmppc_set_host_ipi(cpu, 0);
+       kvmppc_clear_host_ipi(cpu);
        icp_native_set_qirr(cpu, 0xff);
 
        return smp_ipi_demux();
index 8bb8dd7dd6ad626a255a9b2f910ca316d5c41eab..68fd2540b093173288a0190451b80f6eec5a79e3 100644 (file)
@@ -126,7 +126,7 @@ static void icp_opal_cause_ipi(int cpu)
 {
        int hw_cpu = get_hard_smp_processor_id(cpu);
 
-       kvmppc_set_host_ipi(cpu, 1);
+       kvmppc_set_host_ipi(cpu);
        opal_int_set_mfrr(hw_cpu, IPI_PRIORITY);
 }
 
@@ -134,7 +134,7 @@ static irqreturn_t icp_opal_ipi_action(int irq, void *dev_id)
 {
        int cpu = smp_processor_id();
 
-       kvmppc_set_host_ipi(cpu, 0);
+       kvmppc_clear_host_ipi(cpu);
        opal_int_set_mfrr(get_hard_smp_processor_id(cpu), 0xff);
 
        return smp_ipi_demux();
@@ -157,7 +157,7 @@ void icp_opal_flush_interrupt(void)
                if (vec == XICS_IPI) {
                        /* Clear pending IPI */
                        int cpu = smp_processor_id();
-                       kvmppc_set_host_ipi(cpu, 0);
+                       kvmppc_clear_host_ipi(cpu);
                        opal_int_set_mfrr(get_hard_smp_processor_id(cpu), 0xff);
                } else {
                        pr_err("XICS: hw interrupt 0x%x to offline cpu, "
index 42b5ec2231008ede5252f96b506fd50752eef018..afa43c7ea3690db3fceb535759652a9488d22049 100644 (file)
@@ -13,6 +13,7 @@
        aliases {
                serial0 = &uart0;
                serial1 = &uart1;
+               ethernet0 = &eth0;
        };
 
        chosen {
@@ -60,7 +61,6 @@
                        };
                };
                cpu2: cpu@2 {
-                       clock-frequency = <0>;
                        compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
                        d-cache-block-size = <64>;
                        d-cache-sets = <64>;
@@ -84,7 +84,6 @@
                        };
                };
                cpu3: cpu@3 {
-                       clock-frequency = <0>;
                        compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
                        d-cache-block-size = <64>;
                        d-cache-sets = <64>;
                        };
                };
                cpu4: cpu@4 {
-                       clock-frequency = <0>;
                        compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
                        d-cache-block-size = <64>;
                        d-cache-sets = <64>;
                        #size-cells = <0>;
                        status = "disabled";
                };
+               pwm0: pwm@10020000 {
+                       compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
+                       reg = <0x0 0x10020000 0x0 0x1000>;
+                       interrupt-parent = <&plic0>;
+                       interrupts = <42 43 44 45>;
+                       clocks = <&prci PRCI_CLK_TLCLK>;
+                       #pwm-cells = <3>;
+                       status = "disabled";
+               };
+               pwm1: pwm@10021000 {
+                       compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
+                       reg = <0x0 0x10021000 0x0 0x1000>;
+                       interrupt-parent = <&plic0>;
+                       interrupts = <46 47 48 49>;
+                       clocks = <&prci PRCI_CLK_TLCLK>;
+                       #pwm-cells = <3>;
+                       status = "disabled";
+               };
 
        };
 };
index 93d68cbd64fe71ec0026d95e2b845c7c299326cc..104d334511cd6b5d619496226bde06fb982f264a 100644 (file)
                reg = <0>;
        };
 };
+
+&pwm0 {
+       status = "okay";
+};
+
+&pwm1 {
+       status = "okay";
+};
index 3efff552a261e2745bd0fd05dd873125d6877e19..420a0dbef3866e7b63912faad346c57eea404811 100644 (file)
@@ -29,6 +29,8 @@ CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
 CONFIG_IP_PNP_RARP=y
 CONFIG_NETLINK_DIAG=y
+CONFIG_NET_9P=y
+CONFIG_NET_9P_VIRTIO=y
 CONFIG_PCI=y
 CONFIG_PCIEPORTBUS=y
 CONFIG_PCI_HOST_GENERIC=y
@@ -39,6 +41,7 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_VIRTIO_BLK=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_BLK_DEV_SR=y
+CONFIG_SCSI_VIRTIO=y
 CONFIG_ATA=y
 CONFIG_SATA_AHCI=y
 CONFIG_SATA_AHCI_PLATFORM=y
@@ -54,6 +57,7 @@ CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_OF_PLATFORM=y
 CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
 CONFIG_HVC_RISCV_SBI=y
+CONFIG_VIRTIO_CONSOLE=y
 CONFIG_HW_RANDOM=y
 CONFIG_HW_RANDOM_VIRTIO=y
 CONFIG_SPI=y
@@ -61,6 +65,7 @@ CONFIG_SPI_SIFIVE=y
 # CONFIG_PTP_1588_CLOCK is not set
 CONFIG_DRM=y
 CONFIG_DRM_RADEON=y
+CONFIG_DRM_VIRTIO_GPU=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
@@ -73,7 +78,12 @@ CONFIG_USB_STORAGE=y
 CONFIG_USB_UAS=y
 CONFIG_MMC=y
 CONFIG_MMC_SPI=y
+CONFIG_VIRTIO_PCI=y
+CONFIG_VIRTIO_BALLOON=y
+CONFIG_VIRTIO_INPUT=y
 CONFIG_VIRTIO_MMIO=y
+CONFIG_RPMSG_CHAR=y
+CONFIG_RPMSG_VIRTIO=y
 CONFIG_EXT4_FS=y
 CONFIG_EXT4_FS_POSIX_ACL=y
 CONFIG_AUTOFS4_FS=y
@@ -86,6 +96,7 @@ CONFIG_NFS_V4=y
 CONFIG_NFS_V4_1=y
 CONFIG_NFS_V4_2=y
 CONFIG_ROOT_NFS=y
+CONFIG_9P_FS=y
 CONFIG_CRYPTO_USER_API_HASH=y
 CONFIG_CRYPTO_DEV_VIRTIO=y
 CONFIG_PRINTK_TIME=y
index 7da93e494445e10bfbc4e1c715d30a5a387011e2..87ee6e62b64bb002b7678ac8de1c2c787d9a398c 100644 (file)
@@ -29,6 +29,8 @@ CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
 CONFIG_IP_PNP_RARP=y
 CONFIG_NETLINK_DIAG=y
+CONFIG_NET_9P=y
+CONFIG_NET_9P_VIRTIO=y
 CONFIG_PCI=y
 CONFIG_PCIEPORTBUS=y
 CONFIG_PCI_HOST_GENERIC=y
@@ -39,6 +41,7 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_VIRTIO_BLK=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_BLK_DEV_SR=y
+CONFIG_SCSI_VIRTIO=y
 CONFIG_ATA=y
 CONFIG_SATA_AHCI=y
 CONFIG_SATA_AHCI_PLATFORM=y
@@ -54,11 +57,13 @@ CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_OF_PLATFORM=y
 CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
 CONFIG_HVC_RISCV_SBI=y
+CONFIG_VIRTIO_CONSOLE=y
 CONFIG_HW_RANDOM=y
 CONFIG_HW_RANDOM_VIRTIO=y
 # CONFIG_PTP_1588_CLOCK is not set
 CONFIG_DRM=y
 CONFIG_DRM_RADEON=y
+CONFIG_DRM_VIRTIO_GPU=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_USB=y
 CONFIG_USB_XHCI_HCD=y
@@ -69,7 +74,12 @@ CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_HCD_PLATFORM=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_UAS=y
+CONFIG_VIRTIO_PCI=y
+CONFIG_VIRTIO_BALLOON=y
+CONFIG_VIRTIO_INPUT=y
 CONFIG_VIRTIO_MMIO=y
+CONFIG_RPMSG_CHAR=y
+CONFIG_RPMSG_VIRTIO=y
 CONFIG_SIFIVE_PLIC=y
 CONFIG_EXT4_FS=y
 CONFIG_EXT4_FS_POSIX_ACL=y
@@ -83,6 +93,7 @@ CONFIG_NFS_V4=y
 CONFIG_NFS_V4_1=y
 CONFIG_NFS_V4_2=y
 CONFIG_ROOT_NFS=y
+CONFIG_9P_FS=y
 CONFIG_CRYPTO_USER_API_HASH=y
 CONFIG_CRYPTO_DEV_VIRTIO=y
 CONFIG_PRINTK_TIME=y
index c60123f018f500578124d44f5e3fc2b7e7882898..7255f2d8395bb07fdd2ce5b4c002fa1581c7782d 100644 (file)
@@ -83,6 +83,18 @@ extern pgd_t swapper_pg_dir[];
 #define __S110 PAGE_SHARED_EXEC
 #define __S111 PAGE_SHARED_EXEC
 
+#define VMALLOC_SIZE     (KERN_VIRT_SIZE >> 1)
+#define VMALLOC_END      (PAGE_OFFSET - 1)
+#define VMALLOC_START    (PAGE_OFFSET - VMALLOC_SIZE)
+
+#define FIXADDR_TOP      VMALLOC_START
+#ifdef CONFIG_64BIT
+#define FIXADDR_SIZE     PMD_SIZE
+#else
+#define FIXADDR_SIZE     PGDIR_SIZE
+#endif
+#define FIXADDR_START    (FIXADDR_TOP - FIXADDR_SIZE)
+
 /*
  * Roughly size the vmemmap space to be large enough to fit enough
  * struct pages to map half the virtual address space. Then
@@ -424,18 +436,6 @@ extern void *dtb_early_va;
 extern void setup_bootmem(void);
 extern void paging_init(void);
 
-#define VMALLOC_SIZE     (KERN_VIRT_SIZE >> 1)
-#define VMALLOC_END      (PAGE_OFFSET - 1)
-#define VMALLOC_START    (PAGE_OFFSET - VMALLOC_SIZE)
-
-#define FIXADDR_TOP      VMALLOC_START
-#ifdef CONFIG_64BIT
-#define FIXADDR_SIZE     PMD_SIZE
-#else
-#define FIXADDR_SIZE     PGDIR_SIZE
-#endif
-#define FIXADDR_START    (FIXADDR_TOP - FIXADDR_SIZE)
-
 /*
  * Task size is 0x4000000000 for RV64 or 0x9fc00000 for RV32.
  * Note that PGDIR_SIZE must evenly divide TASK_SIZE.
index 74ccfd4640714fff1f462d0ec47c0efb7ff09f95..da7aa88113c2cca00be5902dfff88173067b744b 100644 (file)
@@ -166,9 +166,13 @@ ENTRY(handle_exception)
        move a0, sp /* pt_regs */
        tail do_IRQ
 1:
-       /* Exceptions run with interrupts enabled */
+       /* Exceptions run with interrupts enabled or disabled
+          depending on the state of sstatus.SR_SPIE */
+       andi t0, s1, SR_SPIE
+       beqz t0, 1f
        csrs CSR_SSTATUS, SR_SIE
 
+1:
        /* Handle syscalls */
        li t0, EXC_SYSCALL
        beq s4, t0, handle_syscall
index 15a9189f91ad27f445f96983d56ab1f3186940b4..72f89b7590dd628fa37a5e62821783e3abca2739 100644 (file)
@@ -63,6 +63,11 @@ _start_kernel:
        li t0, SR_FS
        csrc CSR_SSTATUS, t0
 
+#ifdef CONFIG_SMP
+       li t0, CONFIG_NR_CPUS
+       bgeu a0, t0, .Lsecondary_park
+#endif
+
        /* Pick one hart to run the main boot sequence */
        la a3, hart_lottery
        li&