Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
authorLinus Torvalds <torvalds@linux-foundation.org>
Thu, 10 Dec 2009 03:43:33 +0000 (19:43 -0800)
committerLinus Torvalds <torvalds@linux-foundation.org>
Thu, 10 Dec 2009 03:43:33 +0000 (19:43 -0800)
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (42 commits)
  tree-wide: fix misspelling of "definition" in comments
  reiserfs: fix misspelling of "journaled"
  doc: Fix a typo in slub.txt.
  inotify: remove superfluous return code check
  hdlc: spelling fix in find_pvc() comment
  doc: fix regulator docs cut-and-pasteism
  mtd: Fix comment in Kconfig
  doc: Fix IRQ chip docs
  tree-wide: fix assorted typos all over the place
  drivers/ata/libata-sff.c: comment spelling fixes
  fix typos/grammos in Documentation/edac.txt
  sysctl: add missing comments
  fs/debugfs/inode.c: fix comment typos
  sgivwfb: Make use of ARRAY_SIZE.
  sky2: fix sky2_link_down copy/paste comment error
  tree-wide: fix typos "couter" -> "counter"
  tree-wide: fix typos "offest" -> "offset"
  fix kerneldoc for set_irq_msi()
  spidev: fix double "of of" in comment
  comment typo fix: sybsystem -> subsystem
  ...

110 files changed:
1  2 
Documentation/scsi/ChangeLog.megaraid_sas
arch/arm/mach-s3c2410/Kconfig
arch/arm/mach-s3c2440/Kconfig
arch/arm/mach-s5pc100/Kconfig
arch/arm/plat-mxc/include/mach/iomux-mx3.h
arch/arm/plat-omap/dma.c
arch/arm/plat-omap/include/plat/omap16xx.h
arch/arm/plat-s3c/Kconfig
arch/arm/plat-s3c24xx/Kconfig
arch/arm/plat-s5pc1xx/Kconfig
arch/ia64/ia32/ia32_entry.S
arch/ia64/kernel/perfmon.c
arch/x86/kernel/acpi/boot.c
drivers/ata/ata_piix.c
drivers/ata/libata-sff.c
drivers/ata/sata_fsl.c
drivers/block/cciss_cmd.h
drivers/bluetooth/btmrvl_sdio.c
drivers/char/mem.c
drivers/firewire/core-topology.c
drivers/mtd/nand/Kconfig
drivers/net/appletalk/cops.c
drivers/net/atl1c/atl1c_main.c
drivers/net/benet/be_cmds.h
drivers/net/benet/be_main.c
drivers/net/bnx2x_reg.h
drivers/net/bonding/bond_alb.c
drivers/net/cxgb3/sge.c
drivers/net/iseries_veth.c
drivers/net/lib82596.c
drivers/net/ps3_gelic_net.c
drivers/net/qla3xxx.c
drivers/net/sis900.c
drivers/net/sky2.c
drivers/net/smsc911x.c
drivers/net/spider_net.c
drivers/net/tokenring/ibmtr.c
drivers/net/tokenring/smctr.c
drivers/net/ucc_geth.c
drivers/net/wan/hdlc_fr.c
drivers/net/wan/lmc/lmc_main.c
drivers/net/wimax/i2400m/rx.c
drivers/net/wireless/ath/ath5k/base.h
drivers/net/wireless/ath/ath5k/phy.c
drivers/net/wireless/ath/ath9k/rc.c
drivers/net/wireless/b43/main.c
drivers/net/wireless/b43legacy/main.c
drivers/net/wireless/ipw2x00/ipw2100.c
drivers/net/wireless/ipw2x00/ipw2200.c
drivers/net/wireless/ipw2x00/libipw_module.c
drivers/net/wireless/iwmc3200wifi/rx.c
drivers/net/wireless/libertas/if_sdio.c
drivers/net/wireless/rt2x00/rt2400pci.h
drivers/net/wireless/rt2x00/rt2500pci.h
drivers/net/wireless/rt2x00/rt2500usb.h
drivers/net/wireless/rt2x00/rt61pci.h
drivers/net/wireless/rt2x00/rt73usb.h
drivers/net/wireless/zd1211rw/zd_mac.c
drivers/s390/char/fs3270.c
drivers/s390/net/qeth_core_mpc.h
drivers/scsi/3w-9xxx.c
drivers/scsi/3w-xxxx.c
drivers/scsi/53c700.c
drivers/scsi/bfa/include/protocol/ct.h
drivers/scsi/bnx2i/bnx2i_iscsi.c
drivers/scsi/hptiop.c
drivers/scsi/libfc/fc_lport.c
drivers/scsi/lpfc/lpfc_attr.c
drivers/scsi/lpfc/lpfc_els.c
drivers/scsi/lpfc/lpfc_init.c
drivers/scsi/lpfc/lpfc_sli.c
drivers/scsi/megaraid/megaraid_mbox.c
drivers/scsi/mpt2sas/mpt2sas_scsih.c
drivers/scsi/pmcraid.c
drivers/spi/spidev.c
drivers/staging/wavelan/wavelan_cs.c
drivers/video/omap/lcd_ams_delta.c
drivers/video/omap/lcd_mipid.c
fs/bio.c
fs/compat_ioctl.c
fs/notify/inotify/inotify_user.c
fs/reiserfs/fix_node.c
include/linux/in6.h
include/linux/sysctl.h
include/net/sctp/structs.h
include/net/tcp.h
include/net/wimax.h
kernel/time/clocksource.c
lib/Kconfig.debug
net/bluetooth/bnep/core.c
net/ipv4/netfilter/ipt_ECN.c
net/mac80211/mesh_pathtbl.c
net/sched/act_api.c
net/sctp/sm_sideeffect.c
net/sctp/sm_statefuns.c
sound/isa/cs423x/cs4236.c
sound/isa/opti9xx/miro.c
sound/isa/opti9xx/opti92x-ad1848.c
sound/oss/Kconfig
sound/pci/ca0106/ca0106_proc.c
sound/pci/emu10k1/emu10k1x.c
sound/pci/hda/patch_cirrus.c
sound/pci/hda/patch_cmedia.c
sound/pci/hda/patch_realtek.c
sound/pci/ice1712/juli.c
sound/soc/codecs/uda134x.c
sound/soc/codecs/wm8903.c
sound/soc/codecs/wm8993.c
sound/soc/s3c24xx/s3c24xx_simtec.c
sound/soc/s6000/s6000-pcm.c

index 151a7b718b8c135c20533bc429a55d190485685b,84524e0cf9c35d0725bde8abec966e89a45ea7b3..17ffa06077126a96441b867cc77fea8cfd093ed6
@@@ -1,65 -1,3 +1,65 @@@
 +1 Release Date    : Tues.  July 28, 2009 10:12:45 PST 2009 -
 +                      (emaild-id:megaraidlinux@lsi.com)
 +                      Bo Yang
 +
 +2 Current Version : 00.00.04.12
 +3 Older Version   : 00.00.04.10
 +
 +1.    Change the AEN sys PD update from scsi_scan to
 +      scsi_add_device and scsi_remove_device.
 +2.    Takeoff the debug print-out in aen_polling routine.
 +
 +1 Release Date    : Thur.  July 02, 2009 10:12:45 PST 2009 -
 +                      (emaild-id:megaraidlinux@lsi.com)
 +                      Bo Yang
 +
 +2 Current Version : 00.00.04.10
 +3 Older Version   : 00.00.04.08
 +
 +1.    Add the 3 mins timeout during the controller initialize.
 +2.    Add the fix for 64bit sense date errors.
 +
 +1 Release Date    : Tues. May 05, 2009 10:12:45 PST 2009 -
 +                      (emaild-id:megaraidlinux@lsi.com)
 +                      Bo Yang
 +
 +2 Current Version : 00.00.04.08
 +3 Older Version   : 00.00.04.06
 +
 +1.    Add the fix of pending in FW after deleted the logic drives.
 +2.    Add the fix of deallocating memory after get pdlist.
 +
 +1 Release Date    : Tues. March 26, 2009 10:12:45 PST 2009 -
 +                      (emaild-id:megaraidlinux@lsi.com)
 +                      Bo Yang
 +
 +2 Current Version : 00.00.04.06
 +3 Older Version   : 00.00.04.04
 +
 +1.    Add the fix of the driver cmd empty fix of the driver cmd empty.
 +2.    Add the fix of the driver MSM AEN CMD cause the system slow.
 +
 +1 Release Date    : Tues. March 03, 2009 10:12:45 PST 2009 -
 +                      (emaild-id:megaraidlinux@lsi.com)
 +                      Bo Yang
 +
 +2 Current Version : 00.00.04.04
 +3 Older Version   : 00.00.04.01
 +
 +1.    Add the Tape drive fix to the driver: If the command is for
 +      the tape device, set the pthru timeout to the os layer timeout value.
 +
 +2.    Add Poll_wait mechanism to Gen-2 Linux driv.
 +              In the aen handler, driver needs to wakeup poll handler similar to
 +              the way it raises SIGIO.
 +
 +3.    Add new controller new SAS2 support to the driver.
 +
 +4.    Report the unconfigured PD (system PD) to OS.
 +
 +5.    Add the IEEE SGL support to the driver
 +
 +6.    Reasign the Application cmds to SAS2 controller
  
  1 Release Date    : Thur.July. 24 11:41:51 PST 2008 -
                         (emaild-id:megaraidlinux@lsi.com)
@@@ -247,7 -185,7 +247,7 @@@ ii.        FW enables WCE bit in Mode Sense cm
        Disks are exposed with WCE=1. User is advised to enable Write Back
        mode only when the controller has battery backup. At this time
        Synhronize cache is not supported by the FW. Driver will short-cycle
-       the cmd and return sucess without sending down to FW.
+       the cmd and return success without sending down to FW.
  
  1 Release Date    : Sun Jan. 14 11:21:32 PDT 2007 -
                 Sumant Patro <Sumant.Patro@lsil.com>/Bo Yang
index dd1fcc7e67086eb01ac05230bb414a37049bc91c,7fcbdb923d798e1894c576093772df5cca56b054..554731868b07e5c36cc12892c128f4abedefed4d
@@@ -1,5 -1,3 +1,3 @@@
- # arch/arm/mach-s3c2410/Kconfig
- #
  # Copyright 2007 Simtec Electronics
  #
  # Licensed under GPLv2
@@@ -81,14 -79,6 +79,14 @@@ config ARCH_H194
        help
          Say Y here if you are using the HP IPAQ H1940
  
 +config H1940BT
 +        tristate "Control the state of H1940 bluetooth chip"
 +        depends on ARCH_H1940
 +        select RFKILL
 +        help
 +          This is a simple driver that is able to control
 +          the state of built in bluetooth chip on h1940.
 +
  config PM_H1940
        bool
        help
index cf10e14b7b497bf53c6e4564c8457ee3098f5785,ce7bfe4dde2286300b1528b11fa9ef03952e412a..80879358eb2f0c64023b4a58098cc59577f558fe
@@@ -1,5 -1,3 +1,3 @@@
- # arch/arm/mach-s3c2440/Kconfig
- #
  # Copyright 2007 Simtec Electronics
  #
  # Licensed under GPLv2
@@@ -53,19 -51,6 +51,19 @@@ config MACH_OSIRI
          Say Y here if you are using the Simtec IM2440D20 module, also
          known as the Osiris.
  
 +config MACH_OSIRIS_DVS
 +      tristate "Simtec IM2440D20 (OSIRIS) Dynamic Voltage Scaling driver"
 +      depends on MACH_OSIRIS
 +      select TPS65010
 +      help
 +        Say Y/M here if you want to have dynamic voltage scaling support
 +        on the Simtec IM2440D20 (OSIRIS) module via the TPS65011.
 +
 +        The DVS driver alters the voltage supplied to the ARM core
 +        depending on the frequency it is running at. The driver itself
 +        does not do any of the frequency alteration, which is left up
 +        to the cpufreq driver.
 +
  config MACH_RX3715
        bool "HP iPAQ rx3715"
        select CPU_S3C2440
@@@ -122,4 -107,3 +120,3 @@@ config MACH_MINI244
          available via various sources. It can come with a 3.5" or 7" touch LCD.
  
  endmenu
index 0dd2b8c6eabee521f56253c3e1d99c63005973da,0793b9bb1c36b12a6a0abb89e48ca7651220b78b..27ec167d2808eec0e7bfb5f9d8cf73ebe05cf97b
@@@ -1,5 -1,3 +1,3 @@@
- # arch/arm/mach-s5pc100/Kconfig
- #
  # Copyright 2009 Samsung Electronics Co.
  #     Byungho Min <bhmin@samsung.com>
  #
@@@ -14,23 -12,9 +12,23 @@@ config CPU_S5PC10
        help
          Enable S5PC100 CPU support
  
 +config S5PC100_SETUP_SDHCI
 +        bool
 +        select S5PC1XX_SETUP_SDHCI_GPIO
 +        help
 +          Internal helper functions for S5PC100 based SDHCI systems
 +
  config MACH_SMDKC100
        bool "SMDKC100"
        select CPU_S5PC100
 +      select S3C_DEV_FB
 +      select S3C_DEV_I2C1
 +      select S3C_DEV_HSMMC
 +      select S3C_DEV_HSMMC1
 +      select S3C_DEV_HSMMC2
 +      select S5PC1XX_SETUP_I2C0
        select S5PC1XX_SETUP_I2C1
 +      select S5PC1XX_SETUP_FB_24BPP
 +      select S5PC100_SETUP_SDHCI
        help
          Machine support for the Samsung SMDKC100
index eaabd4e96925056dc0994d6a3dfa2dd6681b0f87,0c7802bbeccb957a4f95e9d6c75f8fe34d800c47..e1fc6da1cd100ecc69af5042e8c90fa88f91db17
@@@ -112,7 -112,7 +112,7 @@@ enum iomux_gp_func 
   * setups a single pin:
   *    - reserves the pin so that it is not claimed by another driver
   *    - setups the iomux according to the configuration
-  *    - if the pin is configured as a GPIO, we claim it throug kernel gpiolib
+  *    - if the pin is configured as a GPIO, we claim it through kernel gpiolib
   */
  int mxc_iomux_alloc_pin(const unsigned int pin, const char *label);
  /*
@@@ -524,18 -524,10 +524,18 @@@ enum iomux_pins 
  #define MX31_PIN_RTS1__RTS1           IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_FUNC)
  #define MX31_PIN_TXD1__TXD1           IOMUX_MODE(MX31_PIN_TXD1, IOMUX_CONFIG_FUNC)
  #define MX31_PIN_RXD1__RXD1           IOMUX_MODE(MX31_PIN_RXD1, IOMUX_CONFIG_FUNC)
 +#define MX31_PIN_DCD_DCE1__DCD_DCE1   IOMUX_MODE(MX31_PIN_DCD_DCE1, IOMUX_CONFIG_FUNC)
 +#define MX31_PIN_RI_DCE1__RI_DCE1     IOMUX_MODE(MX31_PIN_RI_DCE1, IOMUX_CONFIG_FUNC)
 +#define MX31_PIN_DSR_DCE1__DSR_DCE1   IOMUX_MODE(MX31_PIN_DSR_DCE1, IOMUX_CONFIG_FUNC)
 +#define MX31_PIN_DTR_DCE1__DTR_DCE1   IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_FUNC)
  #define MX31_PIN_CTS2__CTS2           IOMUX_MODE(MX31_PIN_CTS2, IOMUX_CONFIG_FUNC)
  #define MX31_PIN_RTS2__RTS2           IOMUX_MODE(MX31_PIN_RTS2, IOMUX_CONFIG_FUNC)
  #define MX31_PIN_TXD2__TXD2           IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_FUNC)
  #define MX31_PIN_RXD2__RXD2           IOMUX_MODE(MX31_PIN_RXD2, IOMUX_CONFIG_FUNC)
 +#define MX31_PIN_DCD_DTE1__DCD_DTE2   IOMUX_MODE(MX31_PIN_DCD_DTE1, IOMUX_CONFIG_ALT1)
 +#define MX31_PIN_RI_DTE1__RI_DTE2     IOMUX_MODE(MX31_PIN_RI_DTE1, IOMUX_CONFIG_ALT1)
 +#define MX31_PIN_DSR_DTE1__DSR_DTE2   IOMUX_MODE(MX31_PIN_DSR_DTE1, IOMUX_CONFIG_ALT1)
 +#define MX31_PIN_DTR_DTE1__DTR_DTE2   IOMUX_MODE(MX31_PIN_DTR_DTE1, IOMUX_OCONFIG_ALT3 | IOMUX_ICONFIG_NONE)
  #define MX31_PIN_PC_RST__CTS5         IOMUX_MODE(MX31_PIN_PC_RST, IOMUX_CONFIG_ALT2)
  #define MX31_PIN_PC_VS2__RTS5         IOMUX_MODE(MX31_PIN_PC_VS2, IOMUX_CONFIG_ALT2)
  #define MX31_PIN_PC_BVD2__TXD5                IOMUX_MODE(MX31_PIN_PC_BVD2, IOMUX_CONFIG_ALT2)
  #define MX31_PIN_GPIO3_0__GPIO3_0     IOMUX_MODE(MX31_PIN_GPIO3_0, IOMUX_CONFIG_GPIO)
  #define MX31_PIN_GPIO3_1__GPIO3_1     IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO)
  #define MX31_PIN_TXD2__GPIO1_28               IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_GPIO)
 +#define MX31_PIN_CSI_D4__GPIO3_4      IOMUX_MODE(MX31_PIN_CSI_D4, IOMUX_CONFIG_GPIO)
 +#define MX31_PIN_CSI_D5__GPIO3_5      IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_GPIO)
  #define MX31_PIN_USBOTG_DATA0__USBOTG_DATA0    IOMUX_MODE(MX31_PIN_USBOTG_DATA0, IOMUX_CONFIG_FUNC)
  #define MX31_PIN_USBOTG_DATA1__USBOTG_DATA1    IOMUX_MODE(MX31_PIN_USBOTG_DATA1, IOMUX_CONFIG_FUNC)
  #define MX31_PIN_USBOTG_DATA2__USBOTG_DATA2    IOMUX_MODE(MX31_PIN_USBOTG_DATA2, IOMUX_CONFIG_FUNC)
  #define MX31_PIN_CSPI1_SS2__USBH1_RCV          IOMUX_MODE(MX31_PIN_CSPI1_SS2,  IOMUX_CONFIG_ALT1)
  #define MX31_PIN_CSPI1_SCLK__USBH1_OEB         IOMUX_MODE(MX31_PIN_CSPI1_SCLK, IOMUX_CONFIG_ALT1)
  #define MX31_PIN_CSPI1_SPI_RDY__USBH1_FS       IOMUX_MODE(MX31_PIN_CSPI1_SPI_RDY, IOMUX_CONFIG_ALT1)
 +#define MX31_PIN_SFS6__USBH1_SUSPEND  IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_FUNC)
 +#define MX31_PIN_NFRE_B__GPIO1_11     IOMUX_MODE(MX31_PIN_NFRE_B, IOMUX_CONFIG_GPIO)
 +#define MX31_PIN_NFALE__GPIO1_12      IOMUX_MODE(MX31_PIN_NFALE, IOMUX_CONFIG_GPIO)
  #define MX31_PIN_USBH2_DATA0__USBH2_DATA0      IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC)
  #define MX31_PIN_USBH2_DATA1__USBH2_DATA1      IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC)
 +#define MX31_PIN_STXD3__USBH2_DATA2   IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC)
 +#define MX31_PIN_SRXD3__USBH2_DATA3   IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC)
 +#define MX31_PIN_SCK3__USBH2_DATA4    IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC)
 +#define MX31_PIN_SFS3__USBH2_DATA5    IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC)
 +#define MX31_PIN_STXD6__USBH2_DATA6   IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC)
 +#define MX31_PIN_SRXD6__USBH2_DATA7   IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC)
  #define MX31_PIN_USBH2_CLK__USBH2_CLK          IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC)
  #define MX31_PIN_USBH2_DIR__USBH2_DIR          IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC)
  #define MX31_PIN_USBH2_NXT__USBH2_NXT          IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC)
  #define MX31_PIN_USBH2_STP__USBH2_STP          IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC)
 +#define MX31_PIN_SCK6__GPIO1_25               IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO)
  #define MX31_PIN_USB_OC__GPIO1_30     IOMUX_MODE(MX31_PIN_USB_OC, IOMUX_CONFIG_GPIO)
  #define MX31_PIN_I2C_DAT__I2C1_SDA    IOMUX_MODE(MX31_PIN_I2C_DAT, IOMUX_CONFIG_FUNC)
  #define MX31_PIN_I2C_CLK__I2C1_SCL    IOMUX_MODE(MX31_PIN_I2C_CLK, IOMUX_CONFIG_FUNC)
  #define MX31_PIN_DCD_DCE1__GPIO2_11   IOMUX_MODE(MX31_PIN_DCD_DCE1, IOMUX_CONFIG_GPIO)
  #define MX31_PIN_STXD5__GPIO1_21       IOMUX_MODE(MX31_PIN_STXD5, IOMUX_CONFIG_GPIO)
  #define MX31_PIN_SRXD5__GPIO1_22       IOMUX_MODE(MX31_PIN_SRXD5, IOMUX_CONFIG_GPIO)
 -
 +#define MX31_PIN_GPIO1_3__GPIO1_3     IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO)
 +#define MX31_PIN_CSPI2_SS1__CSPI3_SS1 IOMUX_MODE(MX31_PIN_CSPI2_SS1, IOMUX_CONFIG_ALT1)
 +#define MX31_PIN_RTS1__GPIO2_6                IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_GPIO)
 +#define MX31_PIN_CTS1__GPIO2_7                IOMUX_MODE(MX31_PIN_CTS1, IOMUX_CONFIG_GPIO)
 +#define MX31_PIN_LCS0__GPIO3_23               IOMUX_MODE(MX31_PIN_LCS0, IOMUX_CONFIG_GPIO)
 +#define MX31_PIN_STXD4__STXD4         IOMUX_MODE(MX31_PIN_STXD4, IOMUX_CONFIG_FUNC)
 +#define MX31_PIN_SRXD4__SRXD4         IOMUX_MODE(MX31_PIN_SRXD4, IOMUX_CONFIG_FUNC)
 +#define MX31_PIN_SCK4__SCK4           IOMUX_MODE(MX31_PIN_SCK4, IOMUX_CONFIG_FUNC)
 +#define MX31_PIN_SFS4__SFS4           IOMUX_MODE(MX31_PIN_SFS4, IOMUX_CONFIG_FUNC)
 +#define MX31_PIN_STXD5__STXD5         IOMUX_MODE(MX31_PIN_STXD5, IOMUX_CONFIG_FUNC)
 +#define MX31_PIN_SRXD5__SRXD5         IOMUX_MODE(MX31_PIN_SRXD5, IOMUX_CONFIG_FUNC)
 +#define MX31_PIN_SCK5__SCK5           IOMUX_MODE(MX31_PIN_SCK5, IOMUX_CONFIG_FUNC)
 +#define MX31_PIN_SFS5__SFS5           IOMUX_MODE(MX31_PIN_SFS5, IOMUX_CONFIG_FUNC)
  
  /*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0
   * cspi1_ss1*/
diff --combined arch/arm/plat-omap/dma.c
index be4ce070fb4ce13fd2478543d95d1f422da3cb5a,b5d786d4573b7e4a9fd699887663eb9c6f7d63fa..d17375e06a1e8f956a674b57c2659e991cb5ebaf
@@@ -32,9 -32,9 +32,9 @@@
  
  #include <asm/system.h>
  #include <mach/hardware.h>
 -#include <mach/dma.h>
 +#include <plat/dma.h>
  
 -#include <mach/tc.h>
 +#include <plat/tc.h>
  
  #undef DEBUG
  
@@@ -54,12 -54,6 +54,12 @@@ enum { DMA_CHAIN_STARTED, DMA_CHAIN_NOT
  
  static int enable_1510_mode;
  
 +static struct omap_dma_global_context_registers {
 +      u32 dma_irqenable_l0;
 +      u32 dma_ocp_sysconfig;
 +      u32 dma_gcr;
 +} omap_dma_global_context;
 +
  struct omap_dma_lch {
        int next_lch;
        int dev_id;
@@@ -1252,7 -1246,7 +1252,7 @@@ static void create_dma_lch_chain(int lc
   *                                          OMAP_DMA_DYNAMIC_CHAIN
   * @params - Channel parameters
   *
-  * @return - Succes : 0
+  * @return - Success : 0
   *         Failure: -EINVAL/-ENOMEM
   */
  int omap_request_dma_chain(int dev_id, const char *dev_name,
@@@ -2361,83 -2355,44 +2361,83 @@@ void omap_stop_lcd_dma(void
  }
  EXPORT_SYMBOL(omap_stop_lcd_dma);
  
 +void omap_dma_global_context_save(void)
 +{
 +      omap_dma_global_context.dma_irqenable_l0 =
 +              dma_read(IRQENABLE_L0);
 +      omap_dma_global_context.dma_ocp_sysconfig =
 +              dma_read(OCP_SYSCONFIG);
 +      omap_dma_global_context.dma_gcr = dma_read(GCR);
 +}
 +
 +void omap_dma_global_context_restore(void)
 +{
 +      int ch;
 +
 +      dma_write(omap_dma_global_context.dma_gcr, GCR);
 +      dma_write(omap_dma_global_context.dma_ocp_sysconfig,
 +              OCP_SYSCONFIG);
 +      dma_write(omap_dma_global_context.dma_irqenable_l0,
 +              IRQENABLE_L0);
 +
 +      /*
 +       * A bug in ROM code leaves IRQ status for channels 0 and 1 uncleared
 +       * after secure sram context save and restore. Hence we need to
 +       * manually clear those IRQs to avoid spurious interrupts. This
 +       * affects only secure devices.
 +       */
 +      if (cpu_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
 +              dma_write(0x3 , IRQSTATUS_L0);
 +
 +      for (ch = 0; ch < dma_chan_count; ch++)
 +              if (dma_chan[ch].dev_id != -1)
 +                      omap_clear_dma(ch);
 +}
 +
  /*----------------------------------------------------------------------------*/
  
  static int __init omap_init_dma(void)
  {
 +      unsigned long base;
        int ch, r;
  
        if (cpu_class_is_omap1()) {
 -              omap_dma_base = OMAP1_IO_ADDRESS(OMAP1_DMA_BASE);
 +              base = OMAP1_DMA_BASE;
                dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT;
        } else if (cpu_is_omap24xx()) {
 -              omap_dma_base = OMAP2_IO_ADDRESS(OMAP24XX_DMA4_BASE);
 +              base = OMAP24XX_DMA4_BASE;
                dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
        } else if (cpu_is_omap34xx()) {
 -              omap_dma_base = OMAP2_IO_ADDRESS(OMAP34XX_DMA4_BASE);
 +              base = OMAP34XX_DMA4_BASE;
                dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
        } else if (cpu_is_omap44xx()) {
 -              omap_dma_base = OMAP2_IO_ADDRESS(OMAP44XX_DMA4_BASE);
 +              base = OMAP44XX_DMA4_BASE;
                dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
        } else {
                pr_err("DMA init failed for unsupported omap\n");
                return -ENODEV;
        }
  
 +      omap_dma_base = ioremap(base, SZ_4K);
 +      BUG_ON(!omap_dma_base);
 +
        if (cpu_class_is_omap2() && omap_dma_reserve_channels
                        && (omap_dma_reserve_channels <= dma_lch_count))
                dma_lch_count = omap_dma_reserve_channels;
  
        dma_chan = kzalloc(sizeof(struct omap_dma_lch) * dma_lch_count,
                                GFP_KERNEL);
 -      if (!dma_chan)
 -              return -ENOMEM;
 +      if (!dma_chan) {
 +              r = -ENOMEM;
 +              goto out_unmap;
 +      }
  
        if (cpu_class_is_omap2()) {
                dma_linked_lch = kzalloc(sizeof(struct dma_link_info) *
                                                dma_lch_count, GFP_KERNEL);
                if (!dma_linked_lch) {
 -                      kfree(dma_chan);
 -                      return -ENOMEM;
 +                      r = -ENOMEM;
 +                      goto out_free;
                }
        }
  
                                for (i = 0; i < ch; i++)
                                        free_irq(omap1_dma_irq[i],
                                                 (void *) (i + 1));
 -                              return r;
 +                              goto out_free;
                        }
                }
        }
                setup_irq(irq, &omap24xx_dma_irq);
        }
  
 -      /* Enable smartidle idlemodes and autoidle */
        if (cpu_is_omap34xx()) {
 +              /* Enable smartidle idlemodes and autoidle */
                u32 v = dma_read(OCP_SYSCONFIG);
                v &= ~(DMA_SYSCONFIG_MIDLEMODE_MASK |
                                DMA_SYSCONFIG_SIDLEMODE_MASK |
                        DMA_SYSCONFIG_SIDLEMODE(DMA_IDLEMODE_SMARTIDLE) |
                        DMA_SYSCONFIG_AUTOIDLE);
                dma_write(v , OCP_SYSCONFIG);
 +              /* reserve dma channels 0 and 1 in high security devices */
 +              if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
 +                      printk(KERN_INFO "Reserving DMA channels 0 and 1 for "
 +                                      "HS ROM code\n");
 +                      dma_chan[0].dev_id = 0;
 +                      dma_chan[1].dev_id = 1;
 +              }
        }
  
  
                               "(error %d)\n", r);
                        for (i = 0; i < dma_chan_count; i++)
                                free_irq(omap1_dma_irq[i], (void *) (i + 1));
 -                      return r;
 +                      goto out_free;
                }
        }
  
        return 0;
 +
 +out_free:
 +      kfree(dma_chan);
 +
 +out_unmap:
 +      iounmap(omap_dma_base);
 +
 +      return r;
  }
  
  arch_initcall(omap_init_dma);
index 0e69b504c25fa1231a0fc1bd0f800432b50c57c2,7560b4d583a314a1c7f20b0e223dc0812abe6a06..7560b4d583a314a1c7f20b0e223dc0812abe6a06
  #define TIPB_SWITCH_BASE               (0xfffbc800)
  #define OMAP16XX_MMCSD2_SSW_MPU_CONF  (TIPB_SWITCH_BASE + 0x160)
  
- /* UART3 Registers Maping through MPU bus */
+ /* UART3 Registers Mapping through MPU bus */
  #define UART3_RHR               (OMAP_UART3_BASE + 0)
  #define UART3_THR               (OMAP_UART3_BASE + 0)
  #define UART3_DLL               (OMAP_UART3_BASE + 0)
index e139a72c2149b733b1d9567600a84a2e592bd110,ed2096681450f6e72853fcf00d00c5dfbf767e75..9e9d0286e48f858500e043b90e8ac7e01c08787f
@@@ -1,5 -1,3 +1,3 @@@
- # arch/arm/plat-s3c/Kconfig
- #
  # Copyright 2007 Simtec Electronics
  #
  # Licensed under GPLv2
@@@ -159,12 -157,6 +157,12 @@@ config S3C_GPIO_CFG_S3C64X
          Internal configuration to enable S3C64XX style GPIO configuration
          functions.
  
 +config S5P_GPIO_CFG_S5PC1XX
 +      bool
 +      help
 +        Internal configuration to enable S5PC1XX style GPIO configuration
 +        functions.
 +
  # DMA
  
  config S3C_DMA
@@@ -184,11 -176,6 +182,11 @@@ config S3C_DEV_HSMMC
        help
          Compile in platform device definitions for HSMMC channel 1
  
 +config S3C_DEV_HSMMC2
 +      bool
 +      help
 +        Compile in platform device definitions for HSMMC channel 2
 +
  config S3C_DEV_I2C1
        bool
        help
index 20fbf936bb93e6b11173405781eddf5ccb976793,c057e2df3afdaeb7967ad45119710f186deb6eb1..342647eb91d8d24254a16134c294593e8ca424ea
@@@ -1,5 -1,3 +1,3 @@@
- # arch/arm/plat-s3c24xx/Kconfig
- #
  # Copyright 2007 Simtec Electronics
  #
  # Licensed under GPLv2
@@@ -178,11 -176,4 +176,11 @@@ config MACH_SMD
        help
          Common machine code for SMDK2410 and SMDK2440
  
 +config S3C24XX_SIMTEC_AUDIO
 +      bool
 +      depends on (ARCH_BAST || MACH_VR1000 || MACH_OSIRIS || MACH_ANUBIS)
 +      default y
 +      help
 +        Add audio devices for common Simtec S3C24XX boards
 +
  endif
index 1608e62b0c9d76c8fdfb812f24a5d05e68ee29de,b15f2d25a68ff2a7bd6e5eeca917b7a7a00217c9..b7b9e91c024341f504acd6a85beb009cfeede035
@@@ -1,5 -1,3 +1,3 @@@
- # arch/arm/plat-s5pc1xx/Kconfig
- #
  # Copyright 2009 Samsung Electronics Co.
  #     Byungho Min <bhmin@samsung.com>
  #
@@@ -15,9 -13,6 +13,9 @@@ config PLAT_S5PC1X
        select ARCH_REQUIRE_GPIOLIB
        select S3C_GPIO_TRACK
        select S3C_GPIO_PULL_UPDOWN
 +      select S3C_GPIO_CFG_S3C24XX
 +      select S3C_GPIO_CFG_S3C64XX
 +      select S5P_GPIO_CFG_S5PC1XX
        help
          Base platform code for any Samsung S5PC1XX device
  
@@@ -37,12 -32,7 +35,12 @@@ config CPU_S5PC100_CLOC
  
  # platform specific device setup
  
 -config S5PC100_SETUP_I2C0
 +config S5PC1XX_SETUP_FB_24BPP
 +      bool
 +      help
 +          Common setup code for S5PC1XX with an 24bpp RGB display helper.
 +
 +config S5PC1XX_SETUP_I2C0
        bool
        default y
        help
          Note, currently since i2c0 is always compiled, this setup helper
          is always compiled with it.
  
 -config S5PC100_SETUP_I2C1
 +config S5PC1XX_SETUP_I2C1
        bool
        help
          Common setup code for i2c bus 1.
 +
 +config S5PC1XX_SETUP_SDHCI_GPIO
 +      bool
 +      help
 +        Common setup code for SDHCI gpio.
 +
  endif
index 10c37510f4b4bd46300f8b882d0a636a1d4d3dac,02d1fb7329519e981aa99f0adfdc36a292bfc63a..2fd7479aa2167b1a67c47b81dcc13a47456c6bf1
@@@ -79,7 -79,7 +79,7 @@@ GLOBAL_ENTRY(ia32_ret_from_clone
  (p6)  br.cond.spnt .ia32_strace_check_retval
        ;;                                      // prevent RAW on r8
  END(ia32_ret_from_clone)
-       // fall thrugh
+       // fall through
  GLOBAL_ENTRY(ia32_ret_from_syscall)
        PT_REGS_UNWIND_INFO(0)
  
@@@ -327,7 -327,7 +327,7 @@@ ia32_syscall_table
        data8 compat_sys_writev
        data8 sys_getsid
        data8 sys_fdatasync
 -      data8 sys32_sysctl
 +      data8 compat_sys_sysctl
        data8 sys_mlock           /* 150 */
        data8 sys_munlock
        data8 sys_mlockall
index 402698b6689fc1db1f689fe119a7939daf58828d,b3a1cb3e6b258d346dc079654bc199b0df280b3f..599b233bef7514500a3daf8782a0f339dacce974
@@@ -522,37 -522,42 +522,37 @@@ EXPORT_SYMBOL(pfm_sysctl)
  
  static ctl_table pfm_ctl_table[]={
        {
 -              .ctl_name       = CTL_UNNUMBERED,
                .procname       = "debug",
                .data           = &pfm_sysctl.debug,
                .maxlen         = sizeof(int),
                .mode           = 0666,
 -              .proc_handler   = &proc_dointvec,
 +              .proc_handler   = proc_dointvec,
        },
        {
 -              .ctl_name       = CTL_UNNUMBERED,
                .procname       = "debug_ovfl",
                .data           = &pfm_sysctl.debug_ovfl,
                .maxlen         = sizeof(int),
                .mode           = 0666,
 -              .proc_handler   = &proc_dointvec,
 +              .proc_handler   = proc_dointvec,
        },
        {
 -              .ctl_name       = CTL_UNNUMBERED,
                .procname       = "fastctxsw",
                .data           = &pfm_sysctl.fastctxsw,
                .maxlen         = sizeof(int),
                .mode           = 0600,
 -              .proc_handler   =  &proc_dointvec,
 +              .proc_handler   = proc_dointvec,
        },
        {
 -              .ctl_name       = CTL_UNNUMBERED,
                .procname       = "expert_mode",
                .data           = &pfm_sysctl.expert_mode,
                .maxlen         = sizeof(int),
                .mode           = 0600,
 -              .proc_handler   = &proc_dointvec,
 +              .proc_handler   = proc_dointvec,
        },
        {}
  };
  static ctl_table pfm_sysctl_dir[] = {
        {
 -              .ctl_name       = CTL_UNNUMBERED,
                .procname       = "perfmon",
                .mode           = 0555,
                .child          = pfm_ctl_table,
  };
  static ctl_table pfm_sysctl_root[] = {
        {
 -              .ctl_name       = CTL_KERN,
                .procname       = "kernel",
                .mode           = 0555,
                .child          = pfm_sysctl_dir,
@@@ -3517,7 -3523,7 +3517,7 @@@ pfm_use_debug_registers(struct task_str
   * IA64_THREAD_DBG_VALID set. This indicates a task which was
   * able to use the debug registers for debugging purposes via
   * ptrace(). Therefore we know it was not using them for
-  * perfmormance monitoring, so we only decrement the number
+  * performance monitoring, so we only decrement the number
   * of "ptraced" debug register users to keep the count up to date
   */
  int
index 87eee07da21fc6fdcd3e4f6248f148064f3c5d89,1c2c4838d35c221479a6bf1352f61d9bf59095a2..fb1035cd9a6a9763ddd20fece684228a1239a543
@@@ -624,7 -624,6 +624,7 @@@ static int __init acpi_parse_hpet(struc
        }
  
        hpet_address = hpet_tbl->address.address;
 +      hpet_blockid = hpet_tbl->sequence;
  
        /*
         * Some broken BIOSes advertise HPET at 0x0. We really do not
@@@ -1123,7 -1122,7 +1123,7 @@@ static int __init acpi_parse_madt_ioapi
        if (!acpi_sci_override_gsi)
                acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0);
  
-       /* Fill in identity legacy mapings where no override */
+       /* Fill in identity legacy mappings where no override */
        mp_config_acpi_legacy_irqs();
  
        count =
diff --combined drivers/ata/ata_piix.c
index 0c6155f51173484a66bf80b5e5efe6f1f1fc464c,3aadded05a05233252b61ec7d904a3cbf38cc735..19136a7e10640df2d36826afa6abeabc44e51735
@@@ -599,7 -599,7 +599,7 @@@ static const struct ich_laptop ich_lapt
        { 0x27DF, 0x1028, 0x02b0 },     /* ICH7 on unknown Dell */
        { 0x27DF, 0x1043, 0x1267 },     /* ICH7 on Asus W5F */
        { 0x27DF, 0x103C, 0x30A1 },     /* ICH7 on HP Compaq nc2400 */
-       { 0x27DF, 0x103C, 0x361a },     /* ICH7 on unkown HP  */
+       { 0x27DF, 0x103C, 0x361a },     /* ICH7 on unknown HP  */
        { 0x27DF, 0x1071, 0xD221 },     /* ICH7 on Hercules EC-900 */
        { 0x27DF, 0x152D, 0x0778 },     /* ICH7 on unknown Intel */
        { 0x24CA, 0x1025, 0x0061 },     /* ICH4 on ACER Aspire 2023WLMi */
@@@ -869,10 -869,10 +869,10 @@@ static void do_pata_set_dmamode(struct 
                                (timings[pio][1] << 8);
                }
  
 -              if (ap->udma_mask) {
 +              if (ap->udma_mask)
                        udma_enable &= ~(1 << devid);
 -                      pci_write_config_word(dev, master_port, master_data);
 -              }
 +
 +              pci_write_config_word(dev, master_port, master_data);
        }
        /* Don't scribble on 0x48 if the controller does not support UDMA */
        if (ap->udma_mask)
diff --combined drivers/ata/libata-sff.c
index 51eb1e298601e133b5d4e967845f961f593d20d3,d210ef2d56082e308cdef032f73779042570afe7..efa8773bef5a1add816a5a96a27553a005983248
@@@ -736,7 -736,7 +736,7 @@@ unsigned int ata_sff_data_xfer(struct a
  
                /*
                 * Use io*16_rep() accessors here as well to avoid pointlessly
-                * swapping bytes to and fro on the big endian machines...
+                * swapping bytes to and from on the big endian machines...
                 */
                if (rw == READ) {
                        ioread16_rep(data_addr, pad, 1);
@@@ -776,7 -776,7 +776,7 @@@ unsigned int ata_sff_data_xfer32(struc
        void __iomem *data_addr = ap->ioaddr.data_addr;
        unsigned int words = buflen >> 2;
        int slop = buflen & 3;
-       
        if (!(ap->pflags & ATA_PFLAG_PIO32))
                return ata_sff_data_xfer(dev, buf, buflen, rw);
  
  
                /*
                 * Use io*_rep() accessors here as well to avoid pointlessly
-                * swapping bytes to and fro on the big endian machines...
+                * swapping bytes to and from on the big endian machines...
                 */
                if (rw == READ) {
                        if (slop < 3)
@@@ -2384,7 -2384,7 +2384,7 @@@ void ata_sff_post_internal_cmd(struct a
        ap->hsm_task_state = HSM_ST_IDLE;
  
        if (ap->ioaddr.bmdma_addr)
 -              ata_bmdma_stop(qc);
 +              ap->ops->bmdma_stop(qc);
  
        spin_unlock_irqrestore(ap->lock, flags);
  }
diff --combined drivers/ata/sata_fsl.c
index 8a5d35b759dd114a3715779fc6b49764f34fded9,e295f86b3f7090143adee4de5a6eec4ddd54a53a..ce4136eea08fa5f309855a621dd981a412fd6d9b
@@@ -34,7 -34,7 +34,7 @@@ enum 
  
        SATA_FSL_HOST_FLAGS     = (ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
                                ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA |
 -                              ATA_FLAG_PMP | ATA_FLAG_NCQ),
 +                              ATA_FLAG_PMP | ATA_FLAG_NCQ | ATA_FLAG_AN),
  
        SATA_FSL_MAX_CMDS       = SATA_FSL_QUEUE_DEPTH,
        SATA_FSL_CMD_HDR_SIZE   = 16,   /* 4 DWORDS */
@@@ -43,9 -43,9 +43,9 @@@
        /*
         * SATA-FSL host controller supports a max. of (15+1) direct PRDEs, and
         * chained indirect PRDEs upto a max count of 63.
-        * We are allocating an array of 63 PRDEs contigiously, but PRDE#15 will
+        * We are allocating an array of 63 PRDEs contiguously, but PRDE#15 will
         * be setup as an indirect descriptor, pointing to it's next
-        * (contigious) PRDE. Though chained indirect PRDE arrays are
+        * (contiguous) PRDE. Though chained indirect PRDE arrays are
         * supported,it will be more efficient to use a direct PRDT and
         * a single chain/link to indirect PRDE array/PRDT.
         */
@@@ -132,7 -132,7 +132,7 @@@ enum 
        INT_ON_SINGL_DEVICE_ERR = (1 << 1),
        INT_ON_CMD_COMPLETE = 1,
  
 -      INT_ON_ERROR = INT_ON_FATAL_ERR |
 +      INT_ON_ERROR = INT_ON_FATAL_ERR | INT_ON_SNOTIFY_UPDATE |
            INT_ON_PHYRDY_CHG | INT_ON_SINGL_DEVICE_ERR,
  
        /*
        IE_ON_CMD_COMPLETE = 1,
  
        DEFAULT_PORT_IRQ_ENABLE_MASK = IE_ON_FATAL_ERR | IE_ON_PHYRDY_CHG |
 -          IE_ON_SIGNATURE_UPDATE |
 +          IE_ON_SIGNATURE_UPDATE | IE_ON_SNOTIFY_UPDATE |
            IE_ON_SINGL_DEVICE_ERR | IE_ON_CMD_COMPLETE,
  
        EXT_INDIRECT_SEG_PRD_FLAG = (1 << 31),
@@@ -314,7 -314,7 +314,7 @@@ static unsigned int sata_fsl_fill_sg(st
        u32 ttl_dwords = 0;
  
        /*
-        * NOTE : direct & indirect prdt's are contigiously allocated
+        * NOTE : direct & indirect prdt's are contiguously allocated
         */
        struct prde *prd = (struct prde *)&((struct command_desc *)
                                            cmd_desc)->prdt;
@@@ -992,8 -992,9 +992,8 @@@ static void sata_fsl_error_intr(struct 
         */
  
        sata_fsl_scr_read(&ap->link, SCR_ERROR, &SError);
 -      if (unlikely(SError & 0xFFFF0000)) {
 +      if (unlikely(SError & 0xFFFF0000))
                sata_fsl_scr_write(&ap->link, SCR_ERROR, SError);
 -      }
  
        DPRINTK("error_intr,hStat=0x%x,CE=0x%x,DE =0x%x,SErr=0x%x\n",
                hstatus, cereg, ioread32(hcr_base + DE), SError);
                freeze = 1;
        }
  
 +      /* Handle SDB FIS receive & notify update */
 +      if (hstatus & INT_ON_SNOTIFY_UPDATE)
 +              sata_async_notification(ap);
 +
        /* Handle PHYRDY change notification */
        if (hstatus & INT_ON_PHYRDY_CHG) {
                DPRINTK("SATA FSL: PHYRDY change indication\n");
        }
  
        /* record error info */
 -      if (qc) {
 +      if (qc)
                qc->err_mask |= err_mask;
 -      else
 +      else
                ehi->err_mask |= err_mask;
  
        ehi->action |= action;
@@@ -1106,6 -1103,7 +1106,6 @@@ static void sata_fsl_host_intr(struct a
        if (unlikely(SError & 0xFFFF0000)) {
                DPRINTK("serror @host_intr : 0x%x\n", SError);
                sata_fsl_error_intr(ap);
 -
        }
  
        if (unlikely(hstatus & INT_ON_ERROR)) {
index b50a9b261b8526d95a4d4208ef3e85b8db2f4484,8098fccdbec4bacccb0226f1b0fdf969eb2edca5..6afa700890fffc5d01cf81c83151e487b5c92e1f
@@@ -5,10 -5,9 +5,10 @@@
  //###########################################################################
  #define CISS_VERSION "1.00"
  
- //general boundary defintions
+ //general boundary definitions
  #define SENSEINFOBYTES          32//note that this value may vary between host implementations
 -#define MAXSGENTRIES            31
 +#define MAXSGENTRIES            32
 +#define CCISS_SG_CHAIN          0x80000000
  #define MAXREPLYQS              256
  
  //Command Status value
@@@ -320,10 -319,6 +320,10 @@@ typedef struct _CfgTable_struct 
    BYTE             ServerName[16];
    DWORD            HeartBeat;
    DWORD            SCSI_Prefetch;
 +  DWORD            MaxSGElements;
 +  DWORD            MaxLogicalUnits;
 +  DWORD            MaxPhysicalDrives;
 +  DWORD            MaxPhysicalDrivesPerLogicalUnit;
  } CfgTable_struct;
  #pragma pack()         
  #endif // CCISS_CMD_H
index 1e6eb1aeba2b413d6452223cf74b753115133b39,63bfc5436799ea79bd39983fc4935276d924bb40..f36defa3776482ec291546e454b1676339b9afec
@@@ -535,7 -535,7 +535,7 @@@ static int btmrvl_sdio_card_to_host(str
                break;
  
        default:
-               BT_ERR("Unknow packet type:%d", type);
+               BT_ERR("Unknown packet type:%d", type);
                print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, payload,
                                                blksz * buf_block_len);
  
@@@ -930,8 -930,6 +930,8 @@@ static int btmrvl_sdio_probe(struct sdi
        priv->hw_wakeup_firmware = btmrvl_sdio_wakeup_fw;
  
        btmrvl_send_module_cfg_cmd(priv, MODULE_BRINGUP_REQ);
 +      priv->btmrvl_dev.psmode = 1;
 +      btmrvl_enable_ps(priv);
  
        return 0;
  
@@@ -1003,5 -1001,3 +1003,5 @@@ MODULE_AUTHOR("Marvell International Lt
  MODULE_DESCRIPTION("Marvell BT-over-SDIO driver ver " VERSION);
  MODULE_VERSION(VERSION);
  MODULE_LICENSE("GPL v2");
 +MODULE_FIRMWARE("sd8688_helper.bin");
 +MODULE_FIRMWARE("sd8688.bin");
diff --combined drivers/char/mem.c
index ad82ec92ebd4cbe45ceb77877e916877b20706b9,42e65cf8ab5240f135039024bebdfa422f77d03e..30eff80fed6f93290e41d0b0080b0c95fe89b4db
@@@ -5,7 -5,7 +5,7 @@@
   *
   *  Added devfs support. 
   *    Jan-11-1998, C. Scott Ananian <cananian@alumni.princeton.edu>
-  *  Shared /dev/zero mmaping support, Feb 2000, Kanoj Sarcar <kanoj@sgi.com>
+  *  Shared /dev/zero mmapping support, Feb 2000, Kanoj Sarcar <kanoj@sgi.com>
   */
  
  #include <linux/mm.h>
@@@ -26,6 -26,7 +26,6 @@@
  #include <linux/bootmem.h>
  #include <linux/splice.h>
  #include <linux/pfn.h>
 -#include <linux/smp_lock.h>
  
  #include <asm/uaccess.h>
  #include <asm/io.h>
@@@ -891,23 -892,29 +891,23 @@@ static int memory_open(struct inode *in
  {
        int minor;
        const struct memdev *dev;
 -      int ret = -ENXIO;
 -
 -      lock_kernel();
  
        minor = iminor(inode);
        if (minor >= ARRAY_SIZE(devlist))
 -              goto out;
 +              return -ENXIO;
  
        dev = &devlist[minor];
        if (!dev->fops)
 -              goto out;
 +              return -ENXIO;
  
        filp->f_op = dev->fops;
        if (dev->dev_info)
                filp->f_mapping->backing_dev_info = dev->dev_info;
  
        if (dev->fops->open)
 -              ret = dev->fops->open(inode, filp);
 -      else
 -              ret = 0;
 -out:
 -      unlock_kernel();
 -      return ret;
 +              return dev->fops->open(inode, filp);
 +
 +      return 0;
  }
  
  static const struct file_operations memory_fops = {
index 9a5f38c80b0e4cd5cd18991fb201b429a622c963,d373d17257e9b9b87caf76033f54b01926c99baf..93ec64cdeef74d8f931a7056a9354f17a7415019
@@@ -28,9 -28,9 +28,9 @@@
  #include <linux/module.h>
  #include <linux/slab.h>
  #include <linux/spinlock.h>
 -#include <linux/string.h>
  
  #include <asm/atomic.h>
 +#include <asm/byteorder.h>
  #include <asm/system.h>
  
  #include "core.h"
@@@ -183,7 -183,7 +183,7 @@@ static inline struct fw_node *fw_node(s
   * This function builds the tree representation of the topology given
   * by the self IDs from the latest bus reset.  During the construction
   * of the tree, the function checks that the self IDs are valid and
-  * internally consistent.  On succcess this function returns the
+  * internally consistent.  On success this function returns the
   * fw_node corresponding to the local card otherwise NULL.
   */
  static struct fw_node *build_tree(struct fw_card *card,
@@@ -510,16 -510,13 +510,16 @@@ static void update_tree(struct fw_card 
  static void update_topology_map(struct fw_card *card,
                                u32 *self_ids, int self_id_count)
  {
 -      int node_count;
 +      int node_count = (card->root_node->node_id & 0x3f) + 1;
 +      __be32 *map = card->topology_map;
 +
 +      *map++ = cpu_to_be32((self_id_count + 2) << 16);
 +      *map++ = cpu_to_be32(be32_to_cpu(card->topology_map[1]) + 1);
 +      *map++ = cpu_to_be32((node_count << 16) | self_id_count);
 +
 +      while (self_id_count--)
 +              *map++ = cpu_to_be32p(self_ids++);
  
 -      card->topology_map[1]++;
 -      node_count = (card->root_node->node_id & 0x3f) + 1;
 -      card->topology_map[2] = (node_count << 16) | self_id_count;
 -      card->topology_map[0] = (self_id_count + 2) << 16;
 -      memcpy(&card->topology_map[3], self_ids, self_id_count * 4);
        fw_compute_block_crc(card->topology_map);
  }
  
diff --combined drivers/mtd/nand/Kconfig
index 8f8e87b7ed64abb97acff5968f8c857e2022e3f3,6264bf14494c6d544e38441747b0b8e14fb0742e..0e35e1aefd220f736298ab9a82b0c7a15e5fbd49
@@@ -1,5 -1,3 +1,3 @@@
- # drivers/mtd/nand/Kconfig
  menuconfig MTD_NAND
        tristate "NAND Device Support"
        depends on MTD
@@@ -358,7 -356,7 +356,7 @@@ endchoic
  
  config MTD_NAND_PXA3xx
        tristate "Support for NAND flash devices on PXA3xx"
 -      depends on MTD_NAND && PXA3xx
 +      depends on MTD_NAND && (PXA3xx || ARCH_MMP)
        help
          This enables the driver for the NAND flash device found on
          PXA3xx processors
index 50cecf417471ebe5a52b02092482e947667bff6c,9d828aed968a496b76d15d23240944a3b1da2e74..73b38c204eb91872df4c16e0bbebf2acac3fe052
@@@ -120,7 -120,7 +120,7 @@@ static int irq = 5;                /* Default IRQ *
   *      DAYNA driver mode:
   *              Dayna DL2000/DaynaTalk PC (Half Length), COPS LT-95, 
   *            Farallon PhoneNET PC III, Farallon PhoneNET PC II
-  *    Other cards possibly supported mode unkown though:
+  *    Other cards possibly supported mode unknown though:
   *            Dayna DL2000 (Full length), COPS LT/M (Micro-Channel)
   *
   *    Cards NOT supported by this driver but supported by the ltpc.c
@@@ -328,7 -328,7 +328,7 @@@ static int __init cops_probe1(struct ne
  
        /* Reserve any actual interrupt. */
        if (dev->irq) {
 -              retval = request_irq(dev->irq, &cops_interrupt, 0, dev->name, dev);
 +              retval = request_irq(dev->irq, cops_interrupt, 0, dev->name, dev);
                if (retval)
                        goto err_out;
        }
index 1e2f57d4c36793046ff3a37bb010837660ff2753,96506eacc1319c2240eb322c4d50d9b3d2711b87..6eb9241cee0ae08c361b0533775239c9f1523eb1
@@@ -710,29 -710,6 +710,29 @@@ static int __devinit atl1c_sw_init(stru
        return 0;
  }
  
 +static inline void atl1c_clean_buffer(struct pci_dev *pdev,
 +                              struct atl1c_buffer *buffer_info, int in_irq)
 +{
 +      if (buffer_info->flags & ATL1C_BUFFER_FREE)
 +              return;
 +      if (buffer_info->dma) {
 +              if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
 +                      pci_unmap_single(pdev, buffer_info->dma,
 +                                      buffer_info->length, PCI_DMA_TODEVICE);
 +              else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
 +                      pci_unmap_page(pdev, buffer_info->dma,
 +                                      buffer_info->length, PCI_DMA_TODEVICE);
 +      }
 +      if (buffer_info->skb) {
 +              if (in_irq)
 +                      dev_kfree_skb_irq(buffer_info->skb);
 +              else
 +                      dev_kfree_skb(buffer_info->skb);
 +      }
 +      buffer_info->dma = 0;
 +      buffer_info->skb = NULL;
 +      ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
 +}
  /*
   * atl1c_clean_tx_ring - Free Tx-skb
   * @adapter: board private structure
@@@ -748,12 -725,22 +748,12 @@@ static void atl1c_clean_tx_ring(struct 
        ring_count = tpd_ring->count;
        for (index = 0; index < ring_count; index++) {
                buffer_info = &tpd_ring->buffer_info[index];
 -              if (buffer_info->state == ATL1_BUFFER_FREE)
 -                      continue;
 -              if (buffer_info->dma)
 -                      pci_unmap_single(pdev, buffer_info->dma,
 -                                      buffer_info->length,
 -                                      PCI_DMA_TODEVICE);
 -              if (buffer_info->skb)
 -                      dev_kfree_skb(buffer_info->skb);
 -              buffer_info->dma = 0;
 -              buffer_info->skb = NULL;
 -              buffer_info->state = ATL1_BUFFER_FREE;
 +              atl1c_clean_buffer(pdev, buffer_info, 0);
        }
  
        /* Zero out Tx-buffers */
        memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
 -                              ring_count);
 +              ring_count);
        atomic_set(&tpd_ring->next_to_clean, 0);
        tpd_ring->next_to_use = 0;
  }
@@@ -773,7 -760,16 +773,7 @@@ static void atl1c_clean_rx_ring(struct 
        for (i = 0; i < adapter->num_rx_queues; i++) {
                for (j = 0; j < rfd_ring[i].count; j++) {
                        buffer_info = &rfd_ring[i].buffer_info[j];
 -                      if (buffer_info->state == ATL1_BUFFER_FREE)
 -                              continue;
 -                      if (buffer_info->dma)
 -                              pci_unmap_single(pdev, buffer_info->dma,
 -                                              buffer_info->length,
 -                                              PCI_DMA_FROMDEVICE);
 -                      if (buffer_info->skb)
 -                              dev_kfree_skb(buffer_info->skb);
 -                      buffer_info->state = ATL1_BUFFER_FREE;
 -                      buffer_info->skb = NULL;
 +                      atl1c_clean_buffer(pdev, buffer_info, 0);
                }
                /* zero out the descriptor ring */
                memset(rfd_ring[i].desc, 0, rfd_ring[i].size);
@@@ -800,8 -796,7 +800,8 @@@ static void atl1c_init_ring_ptrs(struc
                atomic_set(&tpd_ring[i].next_to_clean, 0);
                buffer_info = tpd_ring[i].buffer_info;
                for (j = 0; j < tpd_ring->count; j++)
 -                      buffer_info[i].state = ATL1_BUFFER_FREE;
 +                      ATL1C_SET_BUFFER_STATE(&buffer_info[i],
 +                                      ATL1C_BUFFER_FREE);
        }
        for (i = 0; i < adapter->num_rx_queues; i++) {
                rfd_ring[i].next_to_use = 0;
                rrd_ring[i].next_to_clean = 0;
                for (j = 0; j < rfd_ring[i].count; j++) {
                        buffer_info = &rfd_ring[i].buffer_info[j];
 -                      buffer_info->state = ATL1_BUFFER_FREE;
 +                      ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
                }
        }
  }
@@@ -1452,7 -1447,6 +1452,7 @@@ static bool atl1c_clean_tx_irq(struct a
        struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
                                &adapter->tpd_ring[type];
        struct atl1c_buffer *buffer_info;
 +      struct pci_dev *pdev = adapter->pdev;
        u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
        u16 hw_next_to_clean;
        u16 shift;
  
        while (next_to_clean != hw_next_to_clean) {
                buffer_info = &tpd_ring->buffer_info[next_to_clean];
 -              if (buffer_info->state == ATL1_BUFFER_BUSY) {
 -                      pci_unmap_page(adapter->pdev, buffer_info->dma,
 -                                      buffer_info->length, PCI_DMA_TODEVICE);
 -                      buffer_info->dma = 0;
 -                      if (buffer_info->skb) {
 -                              dev_kfree_skb_irq(buffer_info->skb);
 -                              buffer_info->skb = NULL;
 -                      }
 -                      buffer_info->state = ATL1_BUFFER_FREE;
 -              }
 +              atl1c_clean_buffer(pdev, buffer_info, 1);
                if (++next_to_clean == tpd_ring->count)
                        next_to_clean = 0;
                atomic_set(&tpd_ring->next_to_clean, next_to_clean);
@@@ -1540,7 -1543,7 +1540,7 @@@ static irqreturn_t atl1c_intr(int irq, 
                if (status & ISR_OVER)
                        if (netif_msg_intr(adapter))
                                dev_warn(&pdev->dev,
-                                       "TX/RX over flow (status = 0x%x)\n",
+                                       "TX/RX overflow (status = 0x%x)\n",
                                        status & ISR_OVER);
  
                /* link event */
@@@ -1584,7 -1587,7 +1584,7 @@@ static int atl1c_alloc_rx_buffer(struc
        buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
        next_info = &rfd_ring->buffer_info[next_next];
  
 -      while (next_info->state == ATL1_BUFFER_FREE) {
 +      while (next_info->flags & ATL1C_BUFFER_FREE) {
                rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
  
                skb = dev_alloc_skb(adapter->rx_buffer_len);
                 * the 14 byte MAC header is removed
                 */
                vir_addr = skb->data;
 -              buffer_info->state = ATL1_BUFFER_BUSY;
 +              ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
                buffer_info->skb = skb;
                buffer_info->length = adapter->rx_buffer_len;
                buffer_info->dma = pci_map_single(pdev, vir_addr,
                                                buffer_info->length,
                                                PCI_DMA_FROMDEVICE);
 +              ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE);
                rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
                rfd_next_to_use = next_next;
                if (++next_next == rfd_ring->count)
@@@ -1651,8 -1653,7 +1651,8 @@@ static void atl1c_clean_rfd(struct atl1
                        RRS_RX_RFD_INDEX_MASK;
        for (i = 0; i < num; i++) {
                buffer_info[rfd_index].skb = NULL;
 -              buffer_info[rfd_index].state = ATL1_BUFFER_FREE;
 +              ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
 +                                      ATL1C_BUFFER_FREE);
                if (++rfd_index == rfd_ring->count)
                        rfd_index = 0;
        }
@@@ -1966,8 -1967,7 +1966,8 @@@ static void atl1c_tx_map(struct atl1c_a
                buffer_info->length = map_len;
                buffer_info->dma = pci_map_single(adapter->pdev,
                                        skb->data, hdr_len, PCI_DMA_TODEVICE);
 -              buffer_info->state = ATL1_BUFFER_BUSY;
 +              ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
 +              ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE);
                mapped_len += map_len;
                use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
                use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
                else {
                        use_tpd = atl1c_get_tpd(adapter, type);
                        memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
 -                      use_tpd = atl1c_get_tpd(adapter, type);
 -                      memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
                }
                buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
                buffer_info->length = buf_len - mapped_len;
                buffer_info->dma =
                        pci_map_single(adapter->pdev, skb->data + mapped_len,
                                        buffer_info->length, PCI_DMA_TODEVICE);
 -              buffer_info->state = ATL1_BUFFER_BUSY;
 -
 +              ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
 +              ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE);
                use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
                use_tpd->buffer_len  = cpu_to_le16(buffer_info->length);
        }
                                        frag->page_offset,
                                        buffer_info->length,
                                        PCI_DMA_TODEVICE);
 -              buffer_info->state = ATL1_BUFFER_BUSY;
 -
 +              ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
 +              ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE);
                use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
                use_tpd->buffer_len  = cpu_to_le16(buffer_info->length);
        }
@@@ -2135,7 -2137,7 +2135,7 @@@ static int atl1c_request_irq(struct atl
  
        if (!adapter->have_msi)
                flags |= IRQF_SHARED;
 -      err = request_irq(adapter->pdev->irq, &atl1c_intr, flags,
 +      err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
                        netdev->name, netdev);
        if (err) {
                if (netif_msg_ifup(adapter))
index e7323be507d0b9937ebb1813e4c6b597b5964fac,21f40779f52e0e2b941b27766f28a156882799fd..92b87ef156ed912f8ff998cb3c7db7135aa8b6af
@@@ -112,14 -112,12 +112,14 @@@ struct be_mcc_mailbox 
  
  #define CMD_SUBSYSTEM_COMMON  0x1
  #define CMD_SUBSYSTEM_ETH     0x3
 +#define CMD_SUBSYSTEM_LOWLEVEL  0xb
  
  #define OPCODE_COMMON_NTWK_MAC_QUERY                  1
  #define OPCODE_COMMON_NTWK_MAC_SET                    2
  #define OPCODE_COMMON_NTWK_MULTICAST_SET              3
  #define OPCODE_COMMON_NTWK_VLAN_CONFIG                4
  #define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY          5
 +#define OPCODE_COMMON_READ_FLASHROM                   6
  #define OPCODE_COMMON_WRITE_FLASHROM                  7
  #define OPCODE_COMMON_CQ_CREATE                               12
  #define OPCODE_COMMON_EQ_CREATE                               13
  #define OPCODE_COMMON_NTWK_PMAC_ADD                   59
  #define OPCODE_COMMON_NTWK_PMAC_DEL                   60
  #define OPCODE_COMMON_FUNCTION_RESET                  61
 +#define OPCODE_COMMON_ENABLE_DISABLE_BEACON           69
 +#define OPCODE_COMMON_GET_BEACON_STATE                        70
 +#define OPCODE_COMMON_READ_TRANSRECV_DATA             73
  
  #define OPCODE_ETH_ACPI_CONFIG                                2
  #define OPCODE_ETH_PROMISCUOUS                                3
  #define OPCODE_ETH_RX_CREATE                          8
  #define OPCODE_ETH_TX_DESTROY                         9
  #define OPCODE_ETH_RX_DESTROY                         10
 +#define OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG              12
 +
 +#define OPCODE_LOWLEVEL_HOST_DDR_DMA                    17
 +#define OPCODE_LOWLEVEL_LOOPBACK_TEST                   18
  
  struct be_cmd_req_hdr {
        u8 opcode;              /* dword 0 */
@@@ -444,7 -435,7 +444,7 @@@ enum be_if_flags 
   * filtering capabilities. */
  struct be_cmd_req_if_create {
        struct be_cmd_req_hdr hdr;
-       u32 version;            /* ignore currntly */
+       u32 version;            /* ignore currently */
        u32 capability_flags;
        u32 enable_flags;
        u8 mac_addr[ETH_ALEN];
@@@ -596,8 -587,6 +596,8 @@@ struct be_cmd_req_promiscuous_config 
        u16 rsvd0;
  } __packed;
  
 +/******************** Multicast MAC Config *******************/
 +#define BE_MAX_MC             64 /* set mcast promisc if > 64 */
  struct macaddr {
        u8 byte[ETH_ALEN];
  };
@@@ -607,7 -596,7 +607,7 @@@ struct be_cmd_req_mcast_mac_config 
        u16 num_mac;
        u8 promiscuous;
        u8 interface_id;
 -      struct macaddr mac[32];
 +      struct macaddr mac[BE_MAX_MC];
  } __packed;
  
  static inline struct be_hw_stats *
@@@ -644,47 -633,9 +644,47 @@@ struct be_cmd_resp_link_status 
        u8 mac_fault;
        u8 mgmt_mac_duplex;
        u8 mgmt_mac_speed;
 -      u16 rsvd0;
 +      u16 link_speed;
 +      u32 rsvd0;
  } __packed;
  
 +/******************** Port Identification ***************************/
 +/*    Identifies the type of port attached to NIC     */
 +struct be_cmd_req_port_type {
 +      struct be_cmd_req_hdr hdr;
 +      u32 page_num;
 +      u32 port;
 +};
 +
 +enum {
 +      TR_PAGE_A0 = 0xa0,
 +      TR_PAGE_A2 = 0xa2
 +};
 +
 +struct be_cmd_resp_port_type {
 +      struct be_cmd_resp_hdr hdr;
 +      u32 page_num;
 +      u32 port;
 +      struct data {
 +              u8 identifier;
 +              u8 identifier_ext;
 +              u8 connector;
 +              u8 transceiver[8];
 +              u8 rsvd0[3];
 +              u8 length_km;
 +              u8 length_hm;
 +              u8 length_om1;
 +              u8 length_om2;
 +              u8 length_cu;
 +              u8 length_cu_m;
 +              u8 vendor_name[16];
 +              u8 rsvd;
 +              u8 vendor_oui[3];
 +              u8 vendor_pn[16];
 +              u8 vendor_rev[4];
 +      } data;
 +};
 +
  /******************** Get FW Version *******************/
  struct be_cmd_req_get_fw_version {
        struct be_cmd_req_hdr hdr;
@@@ -748,37 -699,6 +748,37 @@@ struct be_cmd_resp_query_fw_cfg 
        u32 rsvd[26];
  };
  
 +/******************** Port Beacon ***************************/
 +
 +#define BEACON_STATE_ENABLED          0x1
 +#define BEACON_STATE_DISABLED         0x0
 +
 +struct be_cmd_req_enable_disable_beacon {
 +      struct be_cmd_req_hdr hdr;
 +      u8  port_num;
 +      u8  beacon_state;
 +      u8  beacon_duration;
 +      u8  status_duration;
 +} __packed;
 +
 +struct be_cmd_resp_enable_disable_beacon {
 +      struct be_cmd_resp_hdr resp_hdr;
 +      u32 rsvd0;
 +} __packed;
 +
 +struct be_cmd_req_get_beacon_state {
 +      struct be_cmd_req_hdr hdr;
 +      u8  port_num;
 +      u8  rsvd0;
 +      u16 rsvd1;
 +} __packed;
 +
 +struct be_cmd_resp_get_beacon_state {
 +      struct be_cmd_resp_hdr resp_hdr;
 +      u8 beacon_state;
 +      u8 rsvd0[3];
 +} __packed;
 +
  /****************** Firmware Flash ******************/
  struct flashrom_params {
        u32 op_code;
@@@ -793,53 -713,6 +793,53 @@@ struct be_cmd_write_flashrom 
        struct flashrom_params params;
  };
  
 +/************************ WOL *******************************/
 +struct be_cmd_req_acpi_wol_magic_config{
 +      struct be_cmd_req_hdr hdr;
 +      u32 rsvd0[145];
 +      u8 magic_mac[6];
 +      u8 rsvd2[2];
 +} __packed;
 +
 +/********************** LoopBack test *********************/
 +struct be_cmd_req_loopback_test {
 +      struct be_cmd_req_hdr hdr;
 +      u32 loopback_type;
 +      u32 num_pkts;
 +      u64 pattern;
 +      u32 src_port;
 +      u32 dest_port;
 +      u32 pkt_size;
 +};
 +
 +struct be_cmd_resp_loopback_test {
 +      struct be_cmd_resp_hdr resp_hdr;
 +      u32    status;
 +      u32    num_txfer;
 +      u32    num_rx;
 +      u32    miscomp_off;
 +      u32    ticks_compl;
 +};
 +
 +/********************** DDR DMA test *********************/
 +struct be_cmd_req_ddrdma_test {
 +      struct be_cmd_req_hdr hdr;
 +      u64 pattern;
 +      u32 byte_count;
 +      u32 rsvd0;
 +      u8  snd_buff[4096];
 +      u8  rsvd1[4096];
 +};
 +
 +struct be_cmd_resp_ddrdma_test {
 +      struct be_cmd_resp_hdr hdr;
 +      u64 pattern;
 +      u32 byte_cnt;
 +      u32 snd_err;
 +      u8  rsvd0[4096];
 +      u8  rcv_buff[4096];
 +};
 +
  extern int be_pci_fnum_get(struct be_adapter *adapter);
  extern int be_cmd_POST(struct be_adapter *adapter);
  extern int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
@@@ -870,7 -743,7 +870,7 @@@ extern int be_cmd_rxq_create(struct be_
  extern int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
                        int type);
  extern int be_cmd_link_status_query(struct be_adapter *adapter,
 -                      bool *link_up);
 +                      bool *link_up, u8 *mac_speed, u16 *link_speed);
  extern int be_cmd_reset(struct be_adapter *adapter);
  extern int be_cmd_get_stats(struct be_adapter *adapter,
                        struct be_dma_mem *nonemb_cmd);
@@@ -883,8 -756,7 +883,8 @@@ extern int be_cmd_vlan_config(struct be
  extern int be_cmd_promiscuous_config(struct be_adapter *adapter,
                        u8 port_num, bool en);
  extern int be_cmd_multicast_set(struct be_adapter *adapter, u32 if_id,
 -                      struct dev_mc_list *mc_list, u32 mc_count);
 +                      struct dev_mc_list *mc_list, u32 mc_count,
 +                      struct be_dma_mem *mem);
  extern int be_cmd_set_flow_control(struct be_adapter *adapter,
                        u32 tx_fc, u32 rx_fc);
  extern int be_cmd_get_flow_control(struct be_adapter *adapter,
@@@ -893,22 -765,6 +893,22 @@@ extern int be_cmd_query_fw_cfg(struct b
                        u32 *port_num, u32 *cap);
  extern int be_cmd_reset_function(struct be_adapter *adapter);
  extern int be_process_mcc(struct be_adapter *adapter);
 +extern int be_cmd_set_beacon_state(struct be_adapter *adapter,
 +                      u8 port_num, u8 beacon, u8 status, u8 state);
 +extern int be_cmd_get_beacon_state(struct be_adapter *adapter,
 +                      u8 port_num, u32 *state);
 +extern int be_cmd_read_port_type(struct be_adapter *adapter, u32 port,
 +                                      u8 *connector);
  extern int be_cmd_write_flashrom(struct be_adapter *adapter,
                        struct be_dma_mem *cmd, u32 flash_oper,
                        u32 flash_opcode, u32 buf_size);
 +extern int be_cmd_get_flash_crc(struct be_adapter *adapter, u8 *flashed_crc);
 +extern int be_cmd_enable_magic_wol(struct be_adapter *adapter, u8 *mac,
 +                              struct be_dma_mem *nonemb_cmd);
 +extern int be_cmd_fw_init(struct be_adapter *adapter);
 +extern int be_cmd_fw_clean(struct be_adapter *adapter);
 +extern int be_cmd_loopback_test(struct be_adapter *adapter, u32 port_num,
 +                              u32 loopback_type, u32 pkt_size,
 +                              u32 num_pkts, u64 pattern);
 +extern int be_cmd_ddr_dma_test(struct be_adapter *adapter, u64 pattern,
 +                      u32 byte_cnt, struct be_dma_mem *cmd);
index 957a0f7f276447e40ad0562f1435a80a2ba8eae8,c3a7db326c9fe7146ae7c2de8eead7893d86b7f3..24c7d9900baab5c053ac274255af4d5ae1fe166b
@@@ -31,10 -31,8 +31,10 @@@ MODULE_PARM_DESC(rx_frag_size, "Size o
  
  static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
        { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
 +      { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
        { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
        { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
 +      { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
        { 0 }
  };
  MODULE_DEVICE_TABLE(pci, be_dev_ids);
@@@ -125,9 -123,6 +125,9 @@@ static int be_mac_addr_set(struct net_d
        struct sockaddr *addr = p;
        int status = 0;
  
 +      if (!is_valid_ether_addr(addr->sa_data))
 +              return -EADDRNOTAVAIL;
 +
        status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
        if (status)
                return status;
@@@ -146,7 -141,7 +146,7 @@@ void netdev_stats_update(struct be_adap
        struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
        struct be_port_rxf_stats *port_stats =
                        &rxf_stats->port[adapter->port_num];
 -      struct net_device_stats *dev_stats = &adapter->stats.net_stats;
 +      struct net_device_stats *dev_stats = &adapter->netdev->stats;
        struct be_erx_stats *erx_stats = &hw_stats->erx;
  
        dev_stats->rx_packets = port_stats->rx_total_frames;
                port_stats->rx_udp_checksum_errs;
  
        /*  no space in linux buffers: best possible approximation */
 -      dev_stats->rx_dropped = erx_stats->rx_drops_no_fragments[0];
 +      dev_stats->rx_dropped =
 +              erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id];
  
        /* detailed rx errors */
        dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
@@@ -220,7 -214,6 +220,7 @@@ void be_link_status_update(struct be_ad
  
        /* If link came up or went down */
        if (adapter->link_up != link_up) {
 +              adapter->link_speed = -1;
                if (link_up) {
                        netif_start_queue(netdev);
                        netif_carrier_on(netdev);
@@@ -276,7 -269,9 +276,7 @@@ static void be_rx_eqd_update(struct be_
  
  static struct net_device_stats *be_get_stats(struct net_device *dev)
  {
 -      struct be_adapter *adapter = netdev_priv(dev);
 -
 -      return &adapter->stats.net_stats;
 +      return &dev->stats;
  }
  
  static u32 be_calc_rate(u64 bytes, unsigned long ticks)
@@@ -394,11 -389,15 +394,11 @@@ static int make_tx_wrbs(struct be_adapt
        atomic_add(wrb_cnt, &txq->used);
        queue_head_inc(txq);
  
 -      if (skb_dma_map(&pdev->dev, skb, DMA_TO_DEVICE)) {
 -              dev_err(&pdev->dev, "TX DMA mapping failed\n");
 -              return 0;
 -      }
 -
        if (skb->len > skb->data_len) {
                int len = skb->len - skb->data_len;
 +              busaddr = pci_map_single(pdev, skb->data, len,
 +                                       PCI_DMA_TODEVICE);
                wrb = queue_head_node(txq);
 -              busaddr = skb_shinfo(skb)->dma_head;
                wrb_fill(wrb, busaddr, len);
                be_dws_cpu_to_le(wrb, sizeof(*wrb));
                queue_head_inc(txq);
        for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
                struct skb_frag_struct *frag =
                        &skb_shinfo(skb)->frags[i];
 -
 -              busaddr = skb_shinfo(skb)->dma_maps[i];
 +              busaddr = pci_map_page(pdev, frag->page,
 +                                     frag->page_offset,
 +                                     frag->size, PCI_DMA_TODEVICE);
                wrb = queue_head_node(txq);
                wrb_fill(wrb, busaddr, frag->size);
                be_dws_cpu_to_le(wrb, sizeof(*wrb));
@@@ -564,15 -562,13 +564,15 @@@ static void be_set_multicast_list(struc
                be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
        }
  
 -      if (netdev->flags & IFF_ALLMULTI) {
 -              be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0);
 +      /* Enable multicast promisc if num configured exceeds what we support */
 +      if (netdev->flags & IFF_ALLMULTI || netdev->mc_count > BE_MAX_MC) {
 +              be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0,
 +                              &adapter->mc_cmd_mem);
                goto done;
        }
  
        be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list,
 -              netdev->mc_count);
 +              netdev->mc_count, &adapter->mc_cmd_mem);
  done:
        return;
  }
@@@ -762,7 -758,7 +762,7 @@@ static void be_rx_compl_process(struct 
        if ((adapter->cap == 0x400) && !vtm)
                vlanf = 0;
  
 -      skb = netdev_alloc_skb(adapter->netdev, BE_HDR_LEN + NET_IP_ALIGN);
 +      skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
        if (!skb) {
                if (net_ratelimit())
                        dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
                return;
        }
  
 -      skb_reserve(skb, NET_IP_ALIGN);
 -
        skb_fill_rx_data(adapter, skb, rxcp);
  
        if (do_pkt_csum(rxcp, adapter->rx_csum))
@@@ -983,41 -981,23 +983,41 @@@ static struct be_eth_tx_compl *be_tx_co
  static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
  {
        struct be_queue_info *txq = &adapter->tx_obj.q;
 +      struct be_eth_wrb *wrb;
        struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
        struct sk_buff *sent_skb;
 +      u64 busaddr;
        u16 cur_index, num_wrbs = 0;
  
        cur_index = txq->tail;
        sent_skb = sent_skbs[cur_index];
        BUG_ON(!sent_skb);
        sent_skbs[cur_index] = NULL;
 +      wrb = queue_tail_node(txq);
 +      be_dws_le_to_cpu(wrb, sizeof(*wrb));
 +      busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
 +      if (busaddr != 0) {
 +              pci_unmap_single(adapter->pdev, busaddr,
 +                               wrb->frag_len, PCI_DMA_TODEVICE);
 +      }
 +      num_wrbs++;
 +      queue_tail_inc(txq);
  
 -      do {
 +      while (cur_index != last_index) {
                cur_index = txq->tail;
 +              wrb = queue_tail_node(txq);
 +              be_dws_le_to_cpu(wrb, sizeof(*wrb));
 +              busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
 +              if (busaddr != 0) {
 +                      pci_unmap_page(adapter->pdev, busaddr,
 +                                     wrb->frag_len, PCI_DMA_TODEVICE);
 +              }
                num_wrbs++;
                queue_tail_inc(txq);
 -      } while (cur_index != last_index);
 +      }
  
        atomic_sub(num_wrbs, &txq->used);
 -      skb_dma_unmap(&adapter->pdev->dev, sent_skb, DMA_TO_DEVICE);
 +
        kfree_skb(sent_skb);
  }
  
@@@ -1397,7 -1377,6 +1397,7 @@@ int be_poll_rx(struct napi_struct *napi
        struct be_eth_rx_compl *rxcp;
        u32 work_done;
  
 +      adapter->stats.drvr_stats.be_rx_polls++;
        for (work_done = 0; work_done < budget; work_done++) {
                rxcp = be_rx_compl_get(adapter);
                if (!rxcp)
@@@ -1496,14 -1475,6 +1496,14 @@@ static void be_worker(struct work_struc
        schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
  }
  
 +static void be_msix_disable(struct be_adapter *adapter)
 +{
 +      if (adapter->msix_enabled) {
 +              pci_disable_msix(adapter->pdev);
 +              adapter->msix_enabled = false;
 +      }
 +}
 +
  static void be_msix_enable(struct be_adapter *adapter)
  {
        int i, status;
@@@ -1619,8 -1590,6 +1619,8 @@@ static int be_open(struct net_device *n
        struct be_eq_obj *tx_eq = &adapter->tx_eq;
        bool link_up;
        int status;
 +      u8 mac_speed;
 +      u16 link_speed;
  
        /* First time posting */
        be_post_rx_frags(adapter);
        /* Rx compl queue may be in unarmed state; rearm it */
        be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
  
 -      status = be_cmd_link_status_query(adapter, &link_up);
 +      status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
 +                      &link_speed);
        if (status)
                goto ret_sts;
        be_link_status_update(adapter, link_up);
@@@ -1659,44 -1627,6 +1659,44 @@@ ret_sts
        return status;
  }
  
 +static int be_setup_wol(struct be_adapter *adapter, bool enable)
 +{
 +      struct be_dma_mem cmd;
 +      int status = 0;
 +      u8 mac[ETH_ALEN];
 +
 +      memset(mac, 0, ETH_ALEN);
 +
 +      cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
 +      cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
 +      if (cmd.va == NULL)
 +              return -1;
 +      memset(cmd.va, 0, cmd.size);
 +
 +      if (enable) {
 +              status = pci_write_config_dword(adapter->pdev,
 +                      PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
 +              if (status) {
 +                      dev_err(&adapter->pdev->dev,
 +                              "Could not enable Wake-on-lan \n");
 +                      pci_free_consistent(adapter->pdev, cmd.size, cmd.va,
 +                                      cmd.dma);
 +                      return status;
 +              }
 +              status = be_cmd_enable_magic_wol(adapter,
 +                              adapter->netdev->dev_addr, &cmd);
 +              pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
 +              pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
 +      } else {
 +              status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
 +              pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
 +              pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
 +      }
 +
 +      pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
 +      return status;
 +}
 +
  static int be_setup(struct be_adapter *adapter)
  {
        struct net_device *netdev = adapter->netdev;
        if (status != 0)
                goto rx_qs_destroy;
  
 +      adapter->link_speed = -1;
 +
        return 0;
  
  rx_qs_destroy:
@@@ -1750,8 -1678,6 +1750,8 @@@ static int be_clear(struct be_adapter *
  
        be_cmd_if_destroy(adapter, adapter->if_handle);
  
 +      /* tell fw we're done with firing cmds */
 +      be_cmd_fw_clean(adapter);
        return 0;
  }
  
@@@ -1794,31 -1720,6 +1794,31 @@@ static int be_close(struct net_device *
  #define FW_FILE_HDR_SIGN      "ServerEngines Corp. "
  char flash_cookie[2][16] =    {"*** SE FLAS",
                                "H DIRECTORY *** "};
 +
 +static bool be_flash_redboot(struct be_adapter *adapter,
 +                      const u8 *p)
 +{
 +      u32 crc_offset;
 +      u8 flashed_crc[4];
 +      int status;
 +      crc_offset = FLASH_REDBOOT_START + FLASH_REDBOOT_IMAGE_MAX_SIZE - 4
 +                      + sizeof(struct flash_file_hdr) - 32*1024;
 +      p += crc_offset;
 +      status = be_cmd_get_flash_crc(adapter, flashed_crc);
 +      if (status) {
 +              dev_err(&adapter->pdev->dev,
 +              "could not get crc from flash, not flashing redboot\n");
 +              return false;
 +      }
 +
 +      /*update redboot only if crc does not match*/
 +      if (!memcmp(flashed_crc, p, 4))
 +              return false;
 +      else
 +              return true;
 +
 +}
 +
  static int be_flash_image(struct be_adapter *adapter,
                        const struct firmware *fw,
                        struct be_dma_mem *flash_cmd, u32 flash_type)
                image_offset = FLASH_PXE_BIOS_START;
                image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
                break;
 +      case FLASHROM_TYPE_REDBOOT:
 +              if (!be_flash_redboot(adapter, fw->data))
 +                      return 0;
 +              image_offset = FLASH_REDBOOT_ISM_START;
 +              image_size = FLASH_REDBOOT_IMAGE_MAX_SIZE;
 +              break;
        default:
                return 0;
        }
@@@ -1982,7 -1877,7 +1982,7 @@@ int be_load_fw(struct be_adapter *adapt
                goto fw_exit;
        }
  
-       dev_info(&adapter->pdev->dev, "Firmware flashed succesfully\n");
+       dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
  
  fw_exit:
        release_firmware(fw);
@@@ -2011,8 -1906,6 +2011,8 @@@ static void be_netdev_init(struct net_d
                NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
                NETIF_F_GRO;
  
 +      netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
 +
        netdev->flags |= IFF_MULTICAST;
  
        adapter->rx_csum = true;
@@@ -2084,61 -1977,34 +2084,61 @@@ static void be_ctrl_cleanup(struct be_a
        if (mem->va)
                pci_free_consistent(adapter->pdev, mem->size,
                        mem->va, mem->dma);
 +
 +      mem = &adapter->mc_cmd_mem;
 +      if (mem->va)
 +              pci_free_consistent(adapter->pdev, mem->size,
 +                      mem->va, mem->dma);
  }
  
  static int be_ctrl_init(struct be_adapter *adapter)
  {
        struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
        struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
 +      struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
        int status;
  
        status = be_map_pci_bars(adapter);
        if (status)
 -              return status;
 +              goto done;
  
        mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
        mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
                                mbox_mem_alloc->size, &mbox_mem_alloc->dma);
        if (!mbox_mem_alloc->va) {
 -              be_unmap_pci_bars(adapter);
 -              return -1;
 +              status = -ENOMEM;
 +              goto unmap_pci_bars;
        }
 +
        mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
        mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
        mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
        memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
 +
 +      mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
 +      mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
 +                      &mc_cmd_mem->dma);
 +      if (mc_cmd_mem->va == NULL) {
 +              status = -ENOMEM;
 +              goto free_mbox;
 +      }
 +      memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
 +
        spin_lock_init(&adapter->mbox_lock);
        spin_lock_init(&adapter->mcc_lock);
        spin_lock_init(&adapter->mcc_cq_lock);
  
        return 0;
 +
 +free_mbox:
 +      pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
 +              mbox_mem_alloc->va, mbox_mem_alloc->dma);
 +
 +unmap_pci_bars:
 +      be_unmap_pci_bars(adapter);
 +
 +done:
 +      return status;
  }
  
  static void be_stats_cleanup(struct be_adapter *adapter)
@@@ -2166,7 -2032,6 +2166,7 @@@ static int be_stats_init(struct be_adap
  static void __devexit be_remove(struct pci_dev *pdev)
  {
        struct be_adapter *adapter = pci_get_drvdata(pdev);
 +
        if (!adapter)
                return;
  
  
        be_ctrl_cleanup(adapter);
  
 -      if (adapter->msix_enabled) {
 -              pci_disable_msix(adapter->pdev);
 -              adapter->msix_enabled = false;
 -      }
 +      be_msix_disable(adapter);
  
        pci_set_drvdata(pdev, NULL);
        pci_release_regions(pdev);
        free_netdev(adapter->netdev);
  }
  
 -static int be_hw_up(struct be_adapter *adapter)
 +static int be_get_config(struct be_adapter *adapter)
  {
        int status;
 +      u8 mac[ETH_ALEN];
  
 -      status = be_cmd_POST(adapter);
 +      status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
        if (status)
                return status;
  
 -      status = be_cmd_reset_function(adapter);
 +      status = be_cmd_query_fw_cfg(adapter,
 +                              &adapter->port_num, &adapter->cap);
        if (status)
                return status;
  
 -      status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
 +      memset(mac, 0, ETH_ALEN);
 +      status = be_cmd_mac_addr_query(adapter, mac,
 +                      MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
        if (status)
                return status;
  
 -      status = be_cmd_query_fw_cfg(adapter,
 -                              &adapter->port_num, &adapter->cap);
 -      return status;
 +      if (!is_valid_ether_addr(mac))
 +              return -EADDRNOTAVAIL;
 +
 +      memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
 +      memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
 +
 +      return 0;
  }
  
  static int __devinit be_probe(struct pci_dev *pdev,
        int status = 0;
        struct be_adapter *adapter;
        struct net_device *netdev;
 -      u8 mac[ETH_ALEN];
  
        status = pci_enable_device(pdev);
        if (status)
        adapter->pdev = pdev;
        pci_set_drvdata(pdev, adapter);
        adapter->netdev = netdev;
 +      be_netdev_init(netdev);
 +      SET_NETDEV_DEV(netdev, &pdev->dev);
  
        be_msix_enable(adapter);
  
        if (status)
                goto free_netdev;
  
 -      status = be_stats_init(adapter);
 +      /* sync up with fw's ready state */
 +      status = be_cmd_POST(adapter);
        if (status)
                goto ctrl_clean;
  
 -      status = be_hw_up(adapter);
 +      /* tell fw we're ready to fire cmds */
 +      status = be_cmd_fw_init(adapter);
        if (status)
 -              goto stats_clean;
 +              goto ctrl_clean;
  
 -      status = be_cmd_mac_addr_query(adapter, mac, MAC_ADDRESS_TYPE_NETWORK,
 -                      true /* permanent */, 0);
 +      status = be_cmd_reset_function(adapter);
 +      if (status)
 +              goto ctrl_clean;
 +
 +      status = be_stats_init(adapter);
 +      if (status)
 +              goto ctrl_clean;
 +
 +      status = be_get_config(adapter);
        if (status)
                goto stats_clean;
 -      memcpy(netdev->dev_addr, mac, ETH_ALEN);
  
        INIT_DELAYED_WORK(&adapter->work, be_worker);
 -      be_netdev_init(netdev);
 -      SET_NETDEV_DEV(netdev, &adapter->pdev->dev);
  
        status = be_setup(adapter);
        if (status)
                goto stats_clean;
 +
        status = register_netdev(netdev);
        if (status != 0)
                goto unsetup;
@@@ -2303,9 -2155,7 +2303,9 @@@ stats_clean
  ctrl_clean:
        be_ctrl_cleanup(adapter);
  free_netdev:
 +      be_msix_disable(adapter);
        free_netdev(adapter->netdev);
 +      pci_set_drvdata(pdev, NULL);
  rel_reg:
        pci_release_regions(pdev);
  disable_dev:
@@@ -2320,9 -2170,6 +2320,9 @@@ static int be_suspend(struct pci_dev *p
        struct be_adapter *adapter = pci_get_drvdata(pdev);
        struct net_device *netdev =  adapter->netdev;
  
 +      if (adapter->wol)
 +              be_setup_wol(adapter, true);
 +
        netif_device_detach(netdev);
        if (netif_running(netdev)) {
                rtnl_lock();
@@@ -2353,11 -2200,6 +2353,11 @@@ static int be_resume(struct pci_dev *pd
        pci_set_power_state(pdev, 0);
        pci_restore_state(pdev);
  
 +      /* tell fw we're ready to fire cmds */
 +      status = be_cmd_fw_init(adapter);
 +      if (status)
 +              return status;
 +
        be_setup(adapter);
        if (netif_running(netdev)) {
                rtnl_lock();
                rtnl_unlock();
        }
        netif_device_attach(netdev);
 +
 +      if (adapter->wol)
 +              be_setup_wol(adapter, false);
        return 0;
  }
  
@@@ -2382,8 -2221,8 +2382,8 @@@ static struct pci_driver be_driver = 
  
  static int __init be_init_module(void)
  {
 -      if (rx_frag_size != 8192 && rx_frag_size != 4096
 -              && rx_frag_size != 2048) {
 +      if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
 +          rx_frag_size != 2048) {
                printk(KERN_WARNING DRV_NAME
                        " : Module param rx_frag_size must be 2048/4096/8192."
                        " Using 2048\n");
diff --combined drivers/net/bnx2x_reg.h
index b668173ffcb497747d8b6a5ef94a66dbee7c8665,732eafdeb0f2bf5e8372cbba30d8b9f88f6f8e7a..944964e78c8140e09802e19dfb2977bc6771335c
  /* [RC 1] A flag to indicate that overflow error occurred in one of the
     queues. */
  #define QM_REG_OVFERROR                                        0x16805c
- /* [RC 7] the Q were the qverflow occurs */
+ /* [RC 7] the Q where the overflow occurs */
  #define QM_REG_OVFQNUM                                                 0x168058
  /* [R 16] Pause state for physical queues 15-0 */
  #define QM_REG_PAUSESTATE0                                     0x168410
  #define PCI_ID_VAL2                                   0x438
  
  
 -#define MDIO_REG_BANK_CL73_IEEEB0                     0x0
 -#define MDIO_CL73_IEEEB0_CL73_AN_CONTROL              0x0
 +#define MDIO_REG_BANK_CL73_IEEEB0     0x0
 +#define MDIO_CL73_IEEEB0_CL73_AN_CONTROL      0x0
  #define MDIO_CL73_IEEEB0_CL73_AN_CONTROL_RESTART_AN   0x0200
  #define MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN                0x1000
  #define MDIO_CL73_IEEEB0_CL73_AN_CONTROL_MAIN_RST     0x8000
  
 -#define MDIO_REG_BANK_CL73_IEEEB1                     0x10
 -#define MDIO_CL73_IEEEB1_AN_ADV2                              0x01
 +#define MDIO_REG_BANK_CL73_IEEEB1     0x10
 +#define MDIO_CL73_IEEEB1_AN_ADV1              0x00
 +#define MDIO_CL73_IEEEB1_AN_ADV1_PAUSE                        0x0400
 +#define MDIO_CL73_IEEEB1_AN_ADV1_ASYMMETRIC           0x0800
 +#define MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_BOTH           0x0C00
 +#define MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_MASK           0x0C00
 +#define MDIO_CL73_IEEEB1_AN_ADV2              0x01
  #define MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M           0x0000
  #define MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX                0x0020
  #define MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4         0x0040
  #define MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KR          0x0080
 +#define MDIO_CL73_IEEEB1_AN_LP_ADV1           0x03
 +#define MDIO_CL73_IEEEB1_AN_LP_ADV1_PAUSE             0x0400
 +#define MDIO_CL73_IEEEB1_AN_LP_ADV1_ASYMMETRIC                0x0800
 +#define MDIO_CL73_IEEEB1_AN_LP_ADV1_PAUSE_BOTH                0x0C00
 +#define MDIO_CL73_IEEEB1_AN_LP_ADV1_PAUSE_MASK                0x0C00
  
  #define MDIO_REG_BANK_RX0                             0x80b0
  #define MDIO_RX0_RX_STATUS                            0x10
  
  
  #define MDIO_REG_BANK_10G_PARALLEL_DETECT             0x8130
 +#define MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_STATUS           0x10
 +#define MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_STATUS_PD_LINK           0x8000
  #define MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL          0x11
  #define MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL_PARDET10G_EN     0x1
  #define MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_LINK             0x13
  #define MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_1G                  0x0010
  #define MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_100M                        0x0008
  #define MDIO_SERDES_DIGITAL_A_1000X_STATUS1_SPEED_10M                 0x0000
 +#define MDIO_SERDES_DIGITAL_A_1000X_STATUS2                   0x15
 +#define MDIO_SERDES_DIGITAL_A_1000X_STATUS2_AN_DISABLED               0x0002
  #define MDIO_SERDES_DIGITAL_MISC1                             0x18
  #define MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_MASK                     0xE000
  #define MDIO_SERDES_DIGITAL_MISC1_REFCLK_SEL_25M                      0x0000
@@@ -5129,7 -5115,6 +5129,7 @@@ Theotherbitsarereservedandshouldbezero*
  #define MDIO_PMA_REG_8481_LED1_MASK   0xa82c
  #define MDIO_PMA_REG_8481_LED2_MASK   0xa82f
  #define MDIO_PMA_REG_8481_LED3_MASK   0xa832
 +#define MDIO_PMA_REG_8481_LED3_BLINK  0xa834
  #define MDIO_PMA_REG_8481_SIGNAL_MASK 0xa835
  #define MDIO_PMA_REG_8481_LINK_SIGNAL 0xa83b
  
index 0d30d1e5e53f00f45af65936d7182dffa929465b,a1e7eb92bbf1e98a3b752944a25ff07dbb62adc5..00ab51ef3129c835523bc2aefebbb076f7a89aa9
@@@ -355,6 -355,9 +355,6 @@@ static int rlb_arp_recv(struct sk_buff 
        struct arp_pkt *arp = (struct arp_pkt *)skb->data;
        int res = NET_RX_DROP;
  
 -      if (dev_net(bond_dev) != &init_net)
 -              goto out;
 -
        while (bond_dev->priv_flags & IFF_802_1Q_VLAN)
                bond_dev = vlan_dev_real_dev(bond_dev);
  
@@@ -556,7 -559,7 +556,7 @@@ static void rlb_update_rx_clients(struc
                }
        }
  
-       /* do not update the entries again untill this counter is zero so that
+       /* do not update the entries again until this counter is zero so that
         * not to confuse the clients.
         */
        bond_info->rlb_update_delay_counter = RLB_UPDATE_DELAY;
diff --combined drivers/net/cxgb3/sge.c
index 49f3de79118ce397ddb37025e156791ca4e3b8bb,b8d92c6f3dd2116429bf55abf744b56521df9a7b..bdbd14727e4b232987632fb19f114510e6068837
@@@ -1260,7 -1260,7 +1260,7 @@@ netdev_tx_t t3_eth_xmit(struct sk_buff 
                if (should_restart_tx(q) &&
                    test_and_clear_bit(TXQ_ETH, &qs->txq_stopped)) {
                        q->restarts++;
 -                      netif_tx_wake_queue(txq);
 +                      netif_tx_start_queue(txq);
                }
        }
  
  
        /*
         * We do not use Tx completion interrupts to free DMAd Tx packets.
-        * This is good for performamce but means that we rely on new Tx
+        * This is good for performance but means that we rely on new Tx
         * packets arriving to run the destructors of completed packets,
         * which open up space in their sockets' send queues.  Sometimes
         * we do not get such new packets causing Tx to stall.  A single
@@@ -1946,9 -1946,10 +1946,9 @@@ static void restart_tx(struct sge_qset 
   *    Check if the ARP request is probing the private IP address
   *    dedicated to iSCSI, generate an ARP reply if so.
   */
 -static void cxgb3_arp_process(struct adapter *adapter, struct sk_buff *skb)
 +static void cxgb3_arp_process(struct port_info *pi, struct sk_buff *skb)
  {
        struct net_device *dev = skb->dev;
 -      struct port_info *pi;
        struct arphdr *arp;
        unsigned char *arp_ptr;
        unsigned char *sha;
        arp_ptr += dev->addr_len;
        memcpy(&tip, arp_ptr, sizeof(tip));
  
 -      pi = netdev_priv(dev);
        if (tip != pi->iscsi_ipv4addr)
                return;
  
        arp_send(ARPOP_REPLY, ETH_P_ARP, sip, dev, tip, sha,
 -               dev->dev_addr, sha);
 +               pi->iscsic.mac_addr, sha);
  
  }
  
@@@ -1984,19 -1986,6 +1984,19 @@@ static inline int is_arp(struct sk_buf
        return skb->protocol == htons(ETH_P_ARP);
  }
  
 +static void cxgb3_process_iscsi_prov_pack(struct port_info *pi,
 +                                      struct sk_buff *skb)
 +{
 +      if (is_arp(skb)) {
 +              cxgb3_arp_process(pi, skb);
 +              return;
 +      }
 +
 +      if (pi->iscsic.recv)
 +              pi->iscsic.recv(pi, skb);
 +
 +}
 +
  /**
   *    rx_eth - process an ingress ethernet packet
   *    @adap: the adapter
@@@ -2035,12 -2024,13 +2035,12 @@@ static void rx_eth(struct adapter *adap
                                vlan_gro_receive(&qs->napi, grp,
                                                 ntohs(p->vlan), skb);
                        else {
 -                              if (unlikely(pi->iscsi_ipv4addr &&
 -                                  is_arp(skb))) {
 +                              if (unlikely(pi->iscsic.flags)) {
                                        unsigned short vtag = ntohs(p->vlan) &
                                                                VLAN_VID_MASK;
                                        skb->dev = vlan_group_get_device(grp,
                                                                         vtag);
 -                                      cxgb3_arp_process(adap, skb);
 +                                      cxgb3_process_iscsi_prov_pack(pi, skb);
                                }
                                __vlan_hwaccel_rx(skb, grp, ntohs(p->vlan),
                                                  rq->polling);
                if (lro)
                        napi_gro_receive(&qs->napi, skb);
                else {
 -                      if (unlikely(pi->iscsi_ipv4addr && is_arp(skb)))
 -                              cxgb3_arp_process(adap, skb);
 +                      if (unlikely(pi->iscsic.flags))
 +                              cxgb3_process_iscsi_prov_pack(pi, skb);
                        netif_receive_skb(skb);
                }
        } else
@@@ -2135,7 -2125,6 +2135,7 @@@ static void lro_add_page(struct adapte
        if (!complete)
                return;
  
 +      skb_record_rx_queue(skb, qs - &adap->sge.qs[0]);
        skb->ip_summed = CHECKSUM_UNNECESSARY;
        cpl = qs->lro_va;
  
index 49997194bdd056e0bcf1bca1d7d23b71f0c4e003,8739ba850f82371c24515030a4fd7d850b3387b8..16c91910d6c1327136e59c38674704fcb03056c8
@@@ -604,10 -604,10 +604,10 @@@ static int veth_process_caps(struct vet
        /* Convert timer to jiffies */
        cnx->ack_timeout = remote_caps->ack_timeout * HZ / 1000000;
  
 -      if ( (remote_caps->num_buffers == 0)
 -           || (remote_caps->ack_threshold > VETH_MAX_ACKS_PER_MSG)
 -           || (remote_caps->ack_threshold == 0)
 -           || (cnx->ack_timeout == 0) ) {
 +      if ( (remote_caps->num_buffers == 0) ||
 +           (remote_caps->ack_threshold > VETH_MAX_ACKS_PER_MSG) ||
 +           (remote_caps->ack_threshold == 0) ||
 +           (cnx->ack_timeout == 0) ) {
                veth_error("Received incompatible capabilities from LPAR %d.\n",
                                cnx->remote_lp);
                return HvLpEvent_Rc_InvalidSubtypeData;
@@@ -714,8 -714,8 +714,8 @@@ static void veth_statemachine(struct wo
                cnx->state |= VETH_STATE_OPEN;
        }
  
 -      if ( (cnx->state & VETH_STATE_OPEN)
 -           && !(cnx->state & VETH_STATE_SENTMON) ) {
 +      if ( (cnx->state & VETH_STATE_OPEN) &&
 +           !(cnx->state & VETH_STATE_SENTMON) ) {
                rc = veth_signalevent(cnx, VETH_EVENT_MONITOR,
                                      HvLpEvent_AckInd_DoAck,
                                      HvLpEvent_AckType_DeferredAck,
                if (rc == HvLpEvent_Rc_Good) {
                        cnx->state |= VETH_STATE_SENTMON;
                } else {
 -                      if ( (rc != HvLpEvent_Rc_PartitionDead)
 -                           && (rc != HvLpEvent_Rc_PathClosed) )
 +                      if ( (rc != HvLpEvent_Rc_PartitionDead) &&
 +                           (rc != HvLpEvent_Rc_PathClosed) )
                                veth_error("Error sending monitor to LPAR %d, "
                                                "rc = %d\n", rlp, rc);
  
                }
        }
  
 -      if ( (cnx->state & VETH_STATE_OPEN)
 -           && !(cnx->state & VETH_STATE_SENTCAPS)) {
 +      if ( (cnx->state & VETH_STATE_OPEN) &&
 +           !(cnx->state & VETH_STATE_SENTCAPS)) {
                u64 *rawcap = (u64 *)&cnx->local_caps;
  
                rc = veth_signalevent(cnx, VETH_EVENT_CAP,
                if (rc == HvLpEvent_Rc_Good) {
                        cnx->state |= VETH_STATE_SENTCAPS;
                } else {
 -                      if ( (rc != HvLpEvent_Rc_PartitionDead)
 -                           && (rc != HvLpEvent_Rc_PathClosed) )
 +                      if ( (rc != HvLpEvent_Rc_PartitionDead) &&
 +                           (rc != HvLpEvent_Rc_PathClosed) )
                                veth_error("Error sending caps to LPAR %d, "
                                                "rc = %d\n", rlp, rc);
  
                }
        }
  
 -      if ((cnx->state & VETH_STATE_GOTCAPS)
 -          && !(cnx->state & VETH_STATE_SENTCAPACK)) {
 +      if ((cnx->state & VETH_STATE_GOTCAPS) &&
 +          !(cnx->state & VETH_STATE_SENTCAPACK)) {
                struct veth_cap_data *remote_caps = &cnx->remote_caps;
  
                memcpy(remote_caps, &cnx->cap_event.u.caps_data,
                        goto cant_cope;
        }
  
 -      if ((cnx->state & VETH_STATE_GOTCAPACK)
 -          && (cnx->state & VETH_STATE_GOTCAPS)
 -          && !(cnx->state & VETH_STATE_READY)) {
 +      if ((cnx->state & VETH_STATE_GOTCAPACK) &&
 +          (cnx->state & VETH_STATE_GOTCAPS) &&
 +          !(cnx->state & VETH_STATE_READY)) {
                if (cnx->cap_ack_event.base_event.xRc == HvLpEvent_Rc_Good) {
                        /* Start the ACK timer */
                        cnx->ack_timer.expires = jiffies + cnx->ack_timeout;
@@@ -818,8 -818,8 +818,8 @@@ static int veth_init_connection(u8 rlp
        struct veth_msg *msgs;
        int i;
  
 -      if ( (rlp == this_lp)
 -           || ! HvLpConfig_doLpsCommunicateOnVirtualLan(this_lp, rlp) )
 +      if ( (rlp == this_lp) ||
 +           ! HvLpConfig_doLpsCommunicateOnVirtualLan(this_lp, rlp) )
                return 0;
  
        cnx = kzalloc(sizeof(*cnx), GFP_KERNEL);
@@@ -1384,7 -1384,7 +1384,7 @@@ static inline void veth_build_dma_list(
        unsigned long done;
        int i = 1;
  
-       /* FIXME: skbs are continguous in real addresses.  Do we
+       /* FIXME: skbs are contiguous in real addresses.  Do we
         * really need to break it into PAGE_SIZE chunks, or can we do
         * it just at the granularity of iSeries real->absolute
         * mapping?  Indeed, given the way the allocator works, can we
@@@ -1538,8 -1538,8 +1538,8 @@@ static void veth_receive(struct veth_lp
        cnx->pending_acks[cnx->num_pending_acks++] =
                event->base_event.xCorrelationToken;
  
 -      if ( (cnx->num_pending_acks >= cnx->remote_caps.ack_threshold)
 -           || (cnx->num_pending_acks >= VETH_MAX_ACKS_PER_MSG) )
 +      if ( (cnx->num_pending_acks >= cnx->remote_caps.ack_threshold) ||
 +           (cnx->num_pending_acks >= VETH_MAX_ACKS_PER_MSG) )
                veth_flush_acks(cnx);
  
        spin_unlock_irqrestore(&cnx->lock, flags);
diff --combined drivers/net/lib82596.c
index 7a07430206e3fa91e63846fa4a5d34952f6e88c1,c0dbfc185b53076807bac8a508743160f5ebcebb..b117f7f8b194ad1cfb43045726cbd8d84bb9f785
@@@ -47,7 -47,7 +47,7 @@@
     TBD:
     * look at deferring rx frames rather than discarding (as per tulip)
     * handle tx ring full as per tulip
-    * performace test to tune rx_copybreak
+    * performance test to tune rx_copybreak
  
     Most of my modifications relate to the braindead big-endian
     implementation by Intel.  When the i596 is operating in
@@@ -470,11 -470,11 +470,11 @@@ static inline int init_rx_bufs(struct n
  
        for (i = 0, rbd = dma->rbds; i < rx_ring_size; i++, rbd++) {
                dma_addr_t dma_addr;
 -              struct sk_buff *skb = netdev_alloc_skb(dev, PKT_BUF_SZ + 4);
 +              struct sk_buff *skb;
  
 +              skb = netdev_alloc_skb_ip_align(dev, PKT_BUF_SZ);
                if (skb == NULL)
                        return -1;
 -              skb_reserve(skb, 2);
                dma_addr = dma_map_single(dev->dev.parent, skb->data,
                                          PKT_BUF_SZ, DMA_FROM_DEVICE);
                rbd->v_next = rbd+1;
@@@ -588,7 -588,7 +588,7 @@@ static int init_i596_mem(struct net_dev
                             "%s: i82596 initialization successful\n",
                             dev->name));
  
 -      if (request_irq(dev->irq, &i596_interrupt, 0, "i82596", dev)) {
 +      if (request_irq(dev->irq, i596_interrupt, 0, "i82596", dev)) {
                printk(KERN_ERR "%s: IRQ %d not free\n", dev->name, dev->irq);
                goto failed;
        }
@@@ -697,12 -697,12 +697,12 @@@ static inline int i596_rx(struct net_de
                                                 (dma_addr_t)SWAP32(rbd->b_data),
                                                 PKT_BUF_SZ, DMA_FROM_DEVICE);
                                /* Get fresh skbuff to replace filled one. */
 -                              newskb = netdev_alloc_skb(dev, PKT_BUF_SZ + 4);
 +                              newskb = netdev_alloc_skb_ip_align(dev,
 +                                                                 PKT_BUF_SZ);
                                if (newskb == NULL) {
                                        skb = NULL;     /* drop pkt */
                                        goto memory_squeeze;
                                }
 -                              skb_reserve(newskb, 2);
  
                                /* Pass up the skb already on the Rx ring. */
                                skb_put(skb, pkt_len);
                                rbd->b_data = SWAP32(dma_addr);
                                DMA_WBACK_INV(dev, rbd, sizeof(struct i596_rbd));
                        } else
 -                              skb = netdev_alloc_skb(dev, pkt_len + 2);
 +                              skb = netdev_alloc_skb_ip_align(dev, pkt_len);
  memory_squeeze:
                        if (skb == NULL) {
                                /* XXX tulip.c can defer packets here!! */
                                        dma_sync_single_for_cpu(dev->dev.parent,
                                                                (dma_addr_t)SWAP32(rbd->b_data),
                                                                PKT_BUF_SZ, DMA_FROM_DEVICE);
 -                                      skb_reserve(skb, 2);
                                        memcpy(skb_put(skb, pkt_len), rbd->v_data, pkt_len);
                                        dma_sync_single_for_device(dev->dev.parent,
                                                                   (dma_addr_t)SWAP32(rbd->b_data),
index 89c4948300a52dafc0fd7110ae1fbb0fd3ac0e3e,86fde1a90a5aa38623b507d443d8e500c3a0849c..0c768593aad00aa24708f949ab16cceecdce40ac
@@@ -95,11 -95,11 +95,11 @@@ static void gelic_card_get_ether_port_s
  
        lv1_net_control(bus_id(card), dev_id(card),
                        GELIC_LV1_GET_ETH_PORT_STATUS,
 -                      GELIC_LV1_VLAN_TX_ETHERNET, 0, 0,
 +                      GELIC_LV1_VLAN_TX_ETHERNET_0, 0, 0,
                        &card->ether_port_status, &v2);
  
        if (inform) {
 -              ether_netdev = card->netdev[GELIC_PORT_ETHERNET];
 +              ether_netdev = card->netdev[GELIC_PORT_ETHERNET_0];
                if (card->ether_port_status & GELIC_LV1_ETHER_LINK_UP)
                        netif_carrier_on(ether_netdev);
                else
        }
  }
  
 +static int gelic_card_set_link_mode(struct gelic_card *card, int mode)
 +{
 +      int status;
 +      u64 v1, v2;
 +
 +      status = lv1_net_control(bus_id(card), dev_id(card),
 +                               GELIC_LV1_SET_NEGOTIATION_MODE,
 +                               GELIC_LV1_PHY_ETHERNET_0, mode, 0, &v1, &v2);
 +      if (status) {
 +              pr_info("%s: failed setting negotiation mode %d\n", __func__,
 +                      status);
 +              return -EBUSY;
 +      }
 +
 +      card->link_mode = mode;
 +      return 0;
 +}
 +
  void gelic_card_up(struct gelic_card *card)
  {
        pr_debug("%s: called\n", __func__);
@@@ -314,7 -296,7 +314,7 @@@ static void gelic_card_reset_chain(stru
   * @card: card structure
   * @descr: descriptor to re-init
   *
-  * return 0 on succes, <0 on failure
+  * return 0 on success, <0 on failure
   *
   * allocates a new rx skb, iommu-maps it and attaches it to the descriptor.
   * Activate the descriptor state-wise
@@@ -469,14 -451,14 +469,14 @@@ static void gelic_descr_release_tx(stru
  
  static void gelic_card_stop_queues(struct gelic_card *card)
  {
 -      netif_stop_queue(card->netdev[GELIC_PORT_ETHERNET]);
 +      netif_stop_queue(card->netdev[GELIC_PORT_ETHERNET_0]);
  
        if (card->netdev[GELIC_PORT_WIRELESS])
                netif_stop_queue(card->netdev[GELIC_PORT_WIRELESS]);
  }
  static void gelic_card_wake_queues(struct gelic_card *card)
  {
 -      netif_wake_queue(card->netdev[GELIC_PORT_ETHERNET]);
 +      netif_wake_queue(card->netdev[GELIC_PORT_ETHERNET_0]);
  
        if (card->netdev[GELIC_PORT_WIRELESS])
                netif_wake_queue(card->netdev[GELIC_PORT_WIRELESS]);
@@@ -1017,7 -999,7 +1017,7 @@@ static int gelic_card_decode_one_descr(
                        goto refill;
                }
        } else
 -              netdev = card->netdev[GELIC_PORT_ETHERNET];
 +              netdev = card->netdev[GELIC_PORT_ETHERNET_0];
  
        if ((status == GELIC_DESCR_DMA_RESPONSE_ERROR) ||
            (status == GELIC_DESCR_DMA_PROTECTION_ERROR) ||
@@@ -1262,58 -1244,14 +1262,58 @@@ static int gelic_ether_get_settings(str
        cmd->supported = SUPPORTED_TP | SUPPORTED_Autoneg |
                        SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
                        SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
 -                      SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full;
 +                      SUPPORTED_1000baseT_Full;
        cmd->advertising = cmd->supported;
 -      cmd->autoneg = AUTONEG_ENABLE; /* always enabled */
 +      if (card->link_mode & GELIC_LV1_ETHER_AUTO_NEG) {
 +              cmd->autoneg = AUTONEG_ENABLE;
 +      } else {
 +              cmd->autoneg = AUTONEG_DISABLE;
 +              cmd->advertising &= ~ADVERTISED_Autoneg;
 +      }
        cmd->port = PORT_TP;
  
        return 0;
  }
  
 +static int gelic_ether_set_settings(struct net_device *netdev,
 +                                  struct ethtool_cmd *cmd)
 +{
 +      struct gelic_card *card = netdev_card(netdev);
 +      u64 mode;
 +      int ret;
 +
 +      if (cmd->autoneg == AUTONEG_ENABLE) {
 +              mode = GELIC_LV1_ETHER_AUTO_NEG;
 +      } else {
 +              switch (cmd->speed) {
 +              case SPEED_10:
 +                      mode = GELIC_LV1_ETHER_SPEED_10;
 +                      break;
 +              case SPEED_100:
 +                      mode = GELIC_LV1_ETHER_SPEED_100;
 +                      break;
 +              case SPEED_1000:
 +                      mode = GELIC_LV1_ETHER_SPEED_1000;
 +                      break;
 +              default:
 +                      return -EINVAL;
 +              }
 +              if (cmd->duplex == DUPLEX_FULL)
 +                      mode |= GELIC_LV1_ETHER_FULL_DUPLEX;
 +              else if (cmd->speed == SPEED_1000) {
 +                      pr_info("1000 half duplex is not supported.\n");
 +                      return -EINVAL;
 +              }
 +      }
 +
 +      ret = gelic_card_set_link_mode(card, mode);
 +
 +      if (ret)
 +              return ret;
 +
 +      return 0;
 +}
 +
  u32 gelic_net_get_rx_csum(struct net_device *netdev)
  {
        struct gelic_card *card = netdev_card(netdev);
@@@ -1411,7 -1349,6 +1411,7 @@@ done
  static const struct ethtool_ops gelic_ether_ethtool_ops = {
        .get_drvinfo    = gelic_net_get_drvinfo,
        .get_settings   = gelic_ether_get_settings,
 +      .set_settings   = gelic_ether_set_settings,
        .get_link       = ethtool_op_get_link,
        .get_tx_csum    = ethtool_op_get_tx_csum,
        .set_tx_csum    = ethtool_op_set_tx_csum,
@@@ -1432,7 -1369,7 +1432,7 @@@ static void gelic_net_tx_timeout_task(s
  {
        struct gelic_card *card =
                container_of(work, struct gelic_card, tx_timeout_task);
 -      struct net_device *netdev = card->netdev[GELIC_PORT_ETHERNET];
 +      struct net_device *netdev = card->netdev[GELIC_PORT_ETHERNET_0];
  
        dev_info(ctodev(card), "%s:Timed out. Restarting... \n", __func__);
  
@@@ -1594,10 -1531,10 +1594,10 @@@ static struct gelic_card * __devinit ge
        /* gelic_port */
        port->netdev = *netdev;
        port->card = card;
 -      port->type = GELIC_PORT_ETHERNET;
 +      port->type = GELIC_PORT_ETHERNET_0;
  
        /* gelic_card */
 -      card->netdev[GELIC_PORT_ETHERNET] = *netdev;
 +      card->netdev[GELIC_PORT_ETHERNET_0] = *netdev;
  
        INIT_WORK(&card->tx_timeout_task, gelic_net_tx_timeout_task);
        init_waitqueue_head(&card->waitq);
@@@ -1617,9 -1554,9 +1617,9 @@@ static void __devinit gelic_card_get_vl
                int tx;
                int rx;
        } vlan_id_ix[2] = {
 -              [GELIC_PORT_ETHERNET] = {
 -                      .tx = GELIC_LV1_VLAN_TX_ETHERNET,
 -                      .rx = GELIC_LV1_VLAN_RX_ETHERNET
 +              [GELIC_PORT_ETHERNET_0] = {
 +                      .tx = GELIC_LV1_VLAN_TX_ETHERNET_0,
 +                      .rx = GELIC_LV1_VLAN_RX_ETHERNET_0
                },
                [GELIC_PORT_WIRELESS] = {
                        .tx = GELIC_LV1_VLAN_TX_WIRELESS,
                        i, card->vlan[i].tx, card->vlan[i].rx);
        }
  
 -      if (card->vlan[GELIC_PORT_ETHERNET].tx) {
 +      if (card->vlan[GELIC_PORT_ETHERNET_0].tx) {
                BUG_ON(!card->vlan[GELIC_PORT_WIRELESS].tx);
                card->vlan_required = 1;
        } else
@@@ -1720,8 -1657,6 +1720,8 @@@ static int __devinit ps3_gelic_driver_p
        /* get internal vlan info */
        gelic_card_get_vlan_info(card);
  
 +      card->link_mode = GELIC_LV1_ETHER_AUTO_NEG;
 +
        /* setup interrupt */
        result = lv1_net_set_interrupt_status_indicator(bus_id(card),
                                                        dev_id(card),
@@@ -1838,9 -1773,6 +1838,9 @@@ static int ps3_gelic_driver_remove(stru
        struct net_device *netdev0;
        pr_debug("%s: called\n", __func__);
  
 +      /* set auto-negotiation */
 +      gelic_card_set_link_mode(card, GELIC_LV1_ETHER_AUTO_NEG);
 +
  #ifdef CONFIG_GELIC_WIRELESS
        gelic_wl_driver_remove(card);
  #endif
        gelic_card_free_chain(card, card->tx_top);
        gelic_card_free_chain(card, card->rx_top);
  
 -      netdev0 = card->netdev[GELIC_PORT_ETHERNET];
 +      netdev0 = card->netdev[GELIC_PORT_ETHERNET_0];
        /* disconnect event port */
        free_irq(card->irq, card);
        netdev0->irq = NO_IRQ;
diff --combined drivers/net/qla3xxx.c
index e3e6bc917c870e89a153bb8cde00a416ee6c32f4,f72643313bab9d9ca488f9df4b065d10039a5ba9..dd35066a7f8d17d8f131253b906e2501dfa86244
@@@ -1969,8 -1969,8 +1969,8 @@@ static void ql_update_lrg_bufq_prod_ind
        struct ql_rcv_buf_cb *lrg_buf_cb;
        struct ql3xxx_port_registers __iomem *port_regs = qdev->mem_map_registers;
  
 -      if ((qdev->lrg_buf_free_count >= 8)
 -          && (qdev->lrg_buf_release_cnt >= 16)) {
 +      if ((qdev->lrg_buf_free_count >= 8) &&
 +          (qdev->lrg_buf_release_cnt >= 16)) {
  
                if (qdev->lrg_buf_skb_check)
                        if (!ql_populate_free_queue(qdev))
  
                lrg_buf_q_ele = qdev->lrg_buf_next_free;
  
 -              while ((qdev->lrg_buf_release_cnt >= 16)
 -                     && (qdev->lrg_buf_free_count >= 8)) {
 +              while ((qdev->lrg_buf_release_cnt >= 16) &&
 +                     (qdev->lrg_buf_free_count >= 8)) {
  
                        for (i = 0; i < 8; i++) {
                                lrg_buf_cb =
@@@ -3651,7 -3651,7 +3651,7 @@@ static int ql_adapter_up(struct ql3_ada
                ql_sem_unlock(qdev, QL_DRVR_SEM_MASK);
        } else {
                printk(KERN_ERR PFX
-                      "%s: Could not aquire driver lock.\n",
+                      "%s: Could not acquire driver lock.\n",
                       ndev->name);
                goto err_lock;
        }
diff --combined drivers/net/sis900.c
index 9a12d88ac2d9cfb9750be65e64ac6ba298ccb4c5,9d94a141555c7bc8062d8f0112daaa399f3b9d80..7360d4bbf75e9c537bdc6838627961787921c823
@@@ -1016,7 -1016,7 +1016,7 @@@ sis900_open(struct net_device *net_dev
        /* Equalizer workaround Rule */
        sis630_set_eq(net_dev, sis_priv->chipset_rev);
  
 -      ret = request_irq(net_dev->irq, &sis900_interrupt, IRQF_SHARED,
 +      ret = request_irq(net_dev->irq, sis900_interrupt, IRQF_SHARED,
                                                net_dev->name, net_dev);
        if (ret)
                return ret;
@@@ -1760,7 -1760,7 +1760,7 @@@ static int sis900_rx(struct net_device 
                                sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
                                PCI_DMA_FROMDEVICE);
  
-                       /* refill the Rx buffer, what if there is not enought
+                       /* refill the Rx buffer, what if there is not enough
                         * memory for new socket buffer ?? */
                        if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
                                /*
                        }
  
                        /* This situation should never happen, but due to
-                          some unknow bugs, it is possible that
+                          some unknown bugs, it is possible that
                           we are working on NULL sk_buff :-( */
                        if (sis_priv->rx_skbuff[entry] == NULL) {
                                if (netif_msg_rx_err(sis_priv))
diff --combined drivers/net/sky2.c
index 3943d89afb2b05fb67e3b66ecc1ff3ceaa070acd,a76cd66c2282f34e748d3ac111f3276839fa70ed..044e6817986f8abb9046e4515168e971bf2094b6
@@@ -50,7 -50,7 +50,7 @@@
  #include "sky2.h"
  
  #define DRV_NAME              "sky2"
 -#define DRV_VERSION           "1.25"
 +#define DRV_VERSION           "1.26"
  #define PFX                   DRV_NAME " "
  
  /*
@@@ -102,7 -102,6 +102,7 @@@ MODULE_PARM_DESC(disable_msi, "Disable 
  static DEFINE_PCI_DEVICE_TABLE(sky2_id_table) = {
        { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
        { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
 +      { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E01) }, /* SK-9E21M */
        { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) },    /* DGE-560T */
        { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) },    /* DGE-550SX */
        { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B02) },    /* DGE-560SX */
        { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436D) }, /* 88E8055 */
        { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4370) }, /* 88E8075 */
        { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4380) }, /* 88E8057 */
 +      { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4381) }, /* 88E8059 */
        { 0 }
  };
  
@@@ -374,8 -372,8 +374,8 @@@ static void sky2_phy_init(struct sky2_h
                        ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO);
  
                        /* downshift on PHY 88E1112 and 88E1149 is changed */
 -                      if ( (sky2->flags & SKY2_FLAG_AUTO_SPEED)
 -                          && (hw->flags & SKY2_HW_NEWER_PHY)) {
 +                      if ( (sky2->flags & SKY2_FLAG_AUTO_SPEED) &&
 +                           (hw->flags & SKY2_HW_NEWER_PHY)) {
                                /* set downshift counter to 3x and enable downshift */
                                ctrl &= ~PHY_M_PC_DSC_MSK;
                                ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA;
                /* apply workaround for integrated resistors calibration */
                gm_phy_write(hw, port, PHY_MARV_PAGE_ADDR, 17);
                gm_phy_write(hw, port, PHY_MARV_PAGE_DATA, 0x3f60);
 +      } else if (hw->chip_id == CHIP_ID_YUKON_OPT && hw->chip_rev == 0) {
 +              /* apply fixes in PHY AFE */
 +              gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00ff);
 +
 +              /* apply RDAC termination workaround */
 +              gm_phy_write(hw, port, 24, 0x2800);
 +              gm_phy_write(hw, port, 23, 0x2001);
 +
 +              /* set page register back to 0 */
 +              gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
        } else if (hw->chip_id != CHIP_ID_YUKON_EX &&
                   hw->chip_id < CHIP_ID_YUKON_SUPR) {
                /* no effect on Yukon-XL */
                gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
  
 -              if ( !(sky2->flags & SKY2_FLAG_AUTO_SPEED)
 -                   || sky2->speed == SPEED_100) {
 +              if (!(sky2->flags & SKY2_FLAG_AUTO_SPEED) ||
 +                  sky2->speed == SPEED_100) {
                        /* turn on 100 Mbps LED (LED_LINK100) */
                        ledover |= PHY_M_LED_MO_100(MO_LED_ON);
                }
@@@ -798,7 -786,8 +798,7 @@@ static void sky2_set_tx_stfwd(struct sk
  
        if ( (hw->chip_id == CHIP_ID_YUKON_EX &&
              hw->chip_rev != CHIP_REV_YU_EX_A0) ||
 -           hw->chip_id == CHIP_ID_YUKON_FE_P ||
 -           hw->chip_id == CHIP_ID_YUKON_SUPR) {
 +           hw->chip_id >= CHIP_ID_YUKON_FE_P) {
                /* Yukon-Extreme B0 and further Extreme devices */
                /* enable Store & Forward mode for TX */
  
@@@ -936,14 -925,8 +936,14 @@@ static void sky2_mac_init(struct sky2_h
  
        /* On chips without ram buffer, pause is controled by MAC level */
        if (!(hw->flags & SKY2_HW_RAM_BUFFER)) {
 -              sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8);
 -              sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8);
 +              /* Pause threshold is scaled by 8 in bytes */
 +              if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
 +                  hw->chip_rev == CHIP_REV_YU_FE2_A0)
 +                      reg = 1568 / 8;
 +              else
 +                      reg = 1024 / 8;
 +              sky2_write16(hw, SK_REG(port, RX_GMF_UP_THR), reg);
 +              sky2_write16(hw, SK_REG(port, RX_GMF_LP_THR), 768 / 8);
  
                sky2_set_tx_stfwd(hw, port);
        }
@@@ -1353,8 -1336,8 +1353,8 @@@ static int sky2_rx_start(struct sky2_po
        /* These chips have no ram buffer?
         * MAC Rx RAM Read is controlled by hardware */
        if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
 -          (hw->chip_rev == CHIP_REV_YU_EC_U_A1
 -           || hw->chip_rev == CHIP_REV_YU_EC_U_B0))
 +          (hw->chip_rev == CHIP_REV_YU_EC_U_A1 ||
 +           hw->chip_rev == CHIP_REV_YU_EC_U_B0))
                sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS);
  
        sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1);
  
        /* Tell chip about available buffers */
        sky2_rx_update(sky2, rxq);
 +
 +      if (hw->chip_id == CHIP_ID_YUKON_EX ||
 +          hw->chip_id == CHIP_ID_YUKON_SUPR) {
 +              /*
 +               * Disable flushing of non ASF packets;
 +               * must be done after initializing the BMUs;
 +               * drivers without ASF support should do this too, otherwise
 +               * it may happen that they cannot run on ASF devices;
 +               * remember that the MAC FIFO isn't reset during initialization.
 +               */
 +              sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_MACSEC_FLUSH_OFF);
 +      }
 +
 +      if (hw->chip_id >= CHIP_ID_YUKON_SUPR) {
 +              /* Enable RX Home Address & Routing Header checksum fix */
 +              sky2_write16(hw, SK_REG(sky2->port, RX_GMF_FL_CTRL),
 +                           RX_IPV6_SA_MOB_ENA | RX_IPV6_DA_MOB_ENA);
 +
 +              /* Enable TX Home Address & Routing Header checksum fix */
 +              sky2_write32(hw, Q_ADDR(txqaddr[sky2->port], Q_TEST),
 +                           TBMU_TEST_HOME_ADD_FIX_EN | TBMU_TEST_ROUTING_ADD_FIX_EN);
 +      }
 +
 +
 +
        return 0;
  nomem:
        sky2_rx_clean(sky2);
@@@ -1560,8 -1518,8 +1560,8 @@@ static int sky2_up(struct net_device *d
                sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF);
  
        /* Set almost empty threshold */
 -      if (hw->chip_id == CHIP_ID_YUKON_EC_U
 -          && hw->chip_rev == CHIP_REV_YU_EC_U_A0)
 +      if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
 +          hw->chip_rev == CHIP_REV_YU_EC_U_A0)
                sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV);
  
        sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map,
@@@ -1907,8 -1865,8 +1907,8 @@@ static int sky2_down(struct net_device 
        sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
  
        /* Workaround shared GMAC reset */
 -      if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0
 -            && port == 0 && hw->dev[1] && netif_running(hw->dev[1])))
 +      if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 &&
 +            port == 0 && hw->dev[1] && netif_running(hw->dev[1])))
                sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET);
  
        sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
@@@ -2017,7 -1975,7 +2017,7 @@@ static void sky2_link_down(struct sky2_
  
        netif_carrier_off(sky2->netdev);
  
-       /* Turn on link LED */
+       /* Turn off link LED */
        sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF);
  
        if (netif_msg_link(sky2))
@@@ -2085,8 -2043,8 +2085,8 @@@ static int sky2_autoneg_done(struct sky
                        sky2->flow_status = FC_TX;
        }
  
 -      if (sky2->duplex == DUPLEX_HALF && sky2->speed < SPEED_1000
 -          && !(hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX))
 +      if (sky2->duplex == DUPLEX_HALF && sky2->speed < SPEED_1000 &&
 +          !(hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX))
                sky2->flow_status = FC_NONE;
  
        if (sky2->flow_status & FC_TX)
        spin_unlock(&sky2->phy_lock);
  }
  
 +/* Special quick link interrupt (Yukon-2 Optima only) */
 +static void sky2_qlink_intr(struct sky2_hw *hw)
 +{
 +      struct sky2_port *sky2 = netdev_priv(hw->dev[0]);
 +      u32 imask;
 +      u16 phy;
 +
 +      /* disable irq */
 +      imask = sky2_read32(hw, B0_IMSK);
 +      imask &= ~Y2_IS_PHY_QLNK;
 +      sky2_write32(hw, B0_IMSK, imask);
 +
 +      /* reset PHY Link Detect */
 +      phy = sky2_pci_read16(hw, PSM_CONFIG_REG4);
 +      sky2_pci_write16(hw, PSM_CONFIG_REG4, phy | 1);
 +
 +      sky2_link_up(sky2);
 +}
 +
  /* Transmit timeout is only called if we are running, carrier is up
   * and tx queue is full (stopped).
   */
@@@ -2252,8 -2191,9 +2252,8 @@@ static struct sk_buff *receive_copy(str
  {
        struct sk_buff *skb;
  
 -      skb = netdev_alloc_skb(sky2->netdev, length + 2);
 +      skb = netdev_alloc_skb_ip_align(sky2->netdev, length);
        if (likely(skb)) {
 -              skb_reserve(skb, 2);
                pci_dma_sync_single_for_cpu(sky2->hw->pdev, re->data_addr,
                                            length, PCI_DMA_FROMDEVICE);
                skb_copy_from_linear_data(re->skb, skb->data, length);
@@@ -2826,9 -2766,6 +2826,9 @@@ static int sky2_poll(struct napi_struc
        if (status & Y2_IS_IRQ_PHY2)
                sky2_phy_intr(hw, 1);
  
 +      if (status & Y2_IS_PHY_QLNK)
 +              sky2_qlink_intr(hw);
 +
        while ((idx = sky2_read16(hw, STAT_PUT_IDX)) != hw->st_idx) {
                work_done += sky2_status_intr(hw, work_limit - work_done, idx);
  
@@@ -2878,7 -2815,6 +2878,7 @@@ static u32 sky2_mhz(const struct sky2_h
        case CHIP_ID_YUKON_EX:
        case CHIP_ID_YUKON_SUPR:
        case CHIP_ID_YUKON_UL_2:
 +      case CHIP_ID_YUKON_OPT:
                return 125;
  
        case CHIP_ID_YUKON_FE:
@@@ -2968,7 -2904,6 +2968,7 @@@ static int __devinit sky2_init(struct s
                break;
  
        case CHIP_ID_YUKON_UL_2:
 +      case CHIP_ID_YUKON_OPT:
                hw->flags = SKY2_HW_GIGABIT
                        | SKY2_HW_ADV_POWER_CTL;
                break;
@@@ -3051,52 -2986,6 +3051,52 @@@ static void sky2_reset(struct sky2_hw *
                        sky2_write16(hw, SK_REG(i, GMAC_CTRL),
                                     GMC_BYP_MACSECRX_ON | GMC_BYP_MACSECTX_ON
                                     | GMC_BYP_RETR_ON);
 +
 +      }
 +
 +      if (hw->chip_id == CHIP_ID_YUKON_SUPR && hw->chip_rev > CHIP_REV_YU_SU_B0) {
 +              /* enable MACSec clock gating */
 +              sky2_pci_write32(hw, PCI_DEV_REG3, P_CLK_MACSEC_DIS);
 +      }
 +
 +      if (hw->chip_id == CHIP_ID_YUKON_OPT) {
 +              u16 reg;
 +              u32 msk;
 +
 +              if (hw->chip_rev == 0) {
 +                      /* disable PCI-E PHY power down (set PHY reg 0x80, bit 7 */
 +                      sky2_write32(hw, Y2_PEX_PHY_DATA, (0x80UL << 16) | (1 << 7));
 +
 +                      /* set PHY Link Detect Timer to 1.1 second (11x 100ms) */
 +                      reg = 10;
 +              } else {
 +                      /* set PHY Link Detect Timer to 0.4 second (4x 100ms) */
 +                      reg = 3;
 +              }
 +
 +              reg <<= PSM_CONFIG_REG4_TIMER_PHY_LINK_DETECT_BASE;
 +
 +              /* reset PHY Link Detect */
 +              sky2_pci_write16(hw, PSM_CONFIG_REG4,
 +                               reg | PSM_CONFIG_REG4_RST_PHY_LINK_DETECT);
 +              sky2_pci_write16(hw, PSM_CONFIG_REG4, reg);
 +
 +
 +              /* enable PHY Quick Link */
 +              msk = sky2_read32(hw, B0_IMSK);
 +              msk |= Y2_IS_PHY_QLNK;
 +              sky2_write32(hw, B0_IMSK, msk);
 +
 +              /* check if PSMv2 was running before */
 +              reg = sky2_pci_read16(hw, PSM_CONFIG_REG3);
 +              if (reg & PCI_EXP_LNKCTL_ASPMC) {
 +                      int cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
 +                      /* restore the PCIe Link Control register */
 +                      sky2_pci_write16(hw, cap + PCI_EXP_LNKCTL, reg);
 +              }
 +
 +              /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */
 +              sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16));
        }
  
        /* Clear I2C IRQ noise */
@@@ -3244,8 -3133,8 +3244,8 @@@ static int sky2_set_wol(struct net_devi
        struct sky2_port *sky2 = netdev_priv(dev);
        struct sky2_hw *hw = sky2->hw;
  
 -      if ((wol->wolopts & ~sky2_wol_supported(sky2->hw))
 -          || !device_can_wakeup(&hw->pdev->dev))
 +      if ((wol->wolopts & ~sky2_wol_supported(sky2->hw)) ||
 +          !device_can_wakeup(&hw->pdev->dev))
                return -EOPNOTSUPP;
  
        sky2->wol = wol->wolopts;
@@@ -4517,11 -4406,9 +4517,11 @@@ static const char *sky2_name(u8 chipid
                "FE+",          /* 0xb8 */
                "Supreme",      /* 0xb9 */
                "UL 2",         /* 0xba */
 +              "Unknown",      /* 0xbb */
 +              "Optima",       /* 0xbc */
        };
  
 -      if (chipid >= CHIP_ID_YUKON_XL && chipid < CHIP_ID_YUKON_UL_2)
 +      if (chipid >= CHIP_ID_YUKON_XL && chipid < CHIP_ID_YUKON_OPT)
                strncpy(buf, name[chipid - CHIP_ID_YUKON_XL], sz);
        else
                snprintf(buf, sz, "(chip %#x)", chipid);
diff --combined drivers/net/smsc911x.c
index 4d0d5c56bed8d265fe21b2f0c10d0666689a365f,24954fecf3dcfa1bf49e4c6561fddcbcdd212365..20d6095cf4118911b6586cbf13dd85bdaaae931e
@@@ -748,8 -748,8 +748,8 @@@ static void smsc911x_phy_adjust_link(st
                         * usage is 10/100 indicator */
                        pdata->gpio_setting = smsc911x_reg_read(pdata,
                                GPIO_CFG);
 -                      if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_)
 -                          && (!pdata->using_extphy)) {
 +                      if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
 +                          (!pdata->using_extphy)) {
                                /* Force 10/100 LED off, after saving
                                 * orginal GPIO configuration */
                                pdata->gpio_orig_setting = pdata->gpio_setting;
@@@ -816,7 -816,7 +816,7 @@@ static int smsc911x_mii_probe(struct ne
        SMSC_TRACE(HW, "Passed Loop Back Test");
  #endif                                /* USE_PHY_WORK_AROUND */
  
-       SMSC_TRACE(HW, "phy initialised succesfully");
+       SMSC_TRACE(HW, "phy initialised successfully");
        return 0;
  }
  
@@@ -2071,9 -2071,6 +2071,9 @@@ static int __devinit smsc911x_drv_probe
        if (is_valid_ether_addr(dev->dev_addr)) {
                smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
                SMSC_TRACE(PROBE, "MAC Address is specified by configuration");
 +      } else if (is_valid_ether_addr(pdata->config.mac)) {
 +              memcpy(dev->dev_addr, pdata->config.mac, 6);
 +              SMSC_TRACE(PROBE, "MAC Address specified by platform data");
        } else {
                /* Try reading mac address from device. if EEPROM is present
                 * it will already have been set */
diff --combined drivers/net/spider_net.c
index 782910cf220f0c1a0a108c372616059eda104091,40b51e6bc77bb24c5fb03f9726ecb6c298e7deb7..218524857bfc9d01b4b1ef7c132712c6e5bebdb6
@@@ -57,7 -57,6 +57,7 @@@ MODULE_AUTHOR("Utz Bacher <utz.bacher@d
  MODULE_DESCRIPTION("Spider Southbridge Gigabit Ethernet driver");
  MODULE_LICENSE("GPL");
  MODULE_VERSION(VERSION);
 +MODULE_FIRMWARE(SPIDER_NET_FIRMWARE_NAME);
  
  static int rx_descriptors = SPIDER_NET_RX_DESCRIPTORS_DEFAULT;
  static int tx_descriptors = SPIDER_NET_TX_DESCRIPTORS_DEFAULT;
@@@ -410,7 -409,7 +410,7 @@@ spider_net_free_rx_chain_contents(struc
   * @card: card structure
   * @descr: descriptor to re-init
   *
-  * Return 0 on succes, <0 on failure.
+  * Return 0 on success, <0 on failure.
   *
   * Allocates a new rx skb, iommu-maps it and attaches it to the
   * descriptor. Mark the descriptor as activated, ready-to-use.
index 5db0270957ac910e0eac68280f28c71d43c89471,685cc3a4d2a7147e2ea8f5c1ca00ffbe665a6b79..66272f2a075875d229c0a241121f8e47c6943f3b
@@@ -96,7 -96,7 +96,7 @@@
   *
   *      Change by Mike Sullivan et al.:
   *      + added turbo card support. No need to use lanaid to configure
-  *      the adapter into isa compatiblity mode.
+  *      the adapter into isa compatibility mode.
   *
   *      Changes by Burt Silverman to allow the computer to behave nicely when
   *    a cable is pulled or not in place, or a PCMCIA card is removed hot.
@@@ -680,7 -680,7 +680,7 @@@ static int __devinit ibmtr_probe1(struc
  
        /* The PCMCIA has already got the interrupt line and the io port, 
           so no chance of anybody else getting it - MLP */
 -      if (request_irq(dev->irq = irq, &tok_interrupt, 0, "ibmtr", dev) != 0) {
 +      if (request_irq(dev->irq = irq, tok_interrupt, 0, "ibmtr", dev) != 0) {
                DPRINTK("Could not grab irq %d.  Halting Token Ring driver.\n",
                                        irq);
                iounmap(t_mmio);
index 427a8970b6fe850567fd6b41c201ada1b3371b20,78e12b5e3ac7391caac34393651dc18056e31bbf..5401d86a7be413199f1fbd3e3058e4f920202395
@@@ -426,7 -426,7 +426,7 @@@ static int smctr_alloc_shared_memory(st
          smctr_malloc(dev, 1L);
  
          /* Allocate Non-MAC receive data buffers.
-          * To guarantee a minimum of 256 contigous memory to
+          * To guarantee a minimum of 256 contiguous memory to
           * UM_Receive_Packet's lookahead pointer, before a page
           * change or ring end is encountered, place each rx buffer on
           * a 256 byte boundary.
@@@ -2309,9 -2309,9 +2309,9 @@@ static irqreturn_t smctr_interrupt(int 
                                  else
                                  {
                                          if((tp->acb_head->cmd
 -                                                == ACB_CMD_READ_TRC_STATUS)
 -                                                && (tp->acb_head->subcmd
 -                                                == RW_TRC_STATUS_BLOCK))
 +                                          == ACB_CMD_READ_TRC_STATUS) &&
 +                                         (tp->acb_head->subcmd
 +                                          == RW_TRC_STATUS_BLOCK))
                                          {
                                                  if(tp->ptr_bcn_type)
                                                  {
                                                          smctr_disable_16bit(dev);
                                                          err = smctr_ring_status_chg(dev);
                                                          smctr_enable_16bit(dev);
 -                                                        if((tp->ring_status & REMOVE_RECEIVED)
 -                                                                && (tp->config_word0 & NO_AUTOREMOVE))
 +                                                        if((tp->ring_status & REMOVE_RECEIVED) &&
 +                                                         (tp->config_word0 & NO_AUTOREMOVE))
                                                          {
                                                                  smctr_issue_remove_cmd(dev);
                                                          }
@@@ -2511,9 -2511,9 +2511,9 @@@ static int smctr_issue_init_timers_cmd(
          tp->config_word0 = THDREN | DMA_TRIGGER | USETPT | NO_AUTOREMOVE;
          tp->config_word1 = 0;
  
 -        if((tp->media_type == MEDIA_STP_16)
 -                || (tp->media_type == MEDIA_UTP_16)
 -                || (tp->media_type == MEDIA_STP_16_UTP_16))
 +        if((tp->media_type == MEDIA_STP_16) ||
 +         (tp->media_type == MEDIA_UTP_16) ||
 +         (tp->media_type == MEDIA_STP_16_UTP_16))
          {
                  tp->config_word0 |= FREQ_16MB_BIT;
          }
                          tp->config_word1 &= ~SOURCE_ROUTING_SPANNING_BITS;
          }
  
 -        if((tp->media_type == MEDIA_STP_16)
 -                || (tp->media_type == MEDIA_UTP_16)
 -                || (tp->media_type == MEDIA_STP_16_UTP_16))
 +        if((tp->media_type == MEDIA_STP_16) ||
 +         (tp->media_type == MEDIA_UTP_16) ||
 +         (tp->media_type == MEDIA_STP_16_UTP_16))
          {
                  tp->config_word1 |= INTERFRAME_SPACING_16;
          }
          *pTimer_Struc++ = tp->config_word0;
          *pTimer_Struc++ = tp->config_word1;
  
 -        if((tp->media_type == MEDIA_STP_4)
 -                || (tp->media_type == MEDIA_UTP_4)
 -                || (tp->media_type == MEDIA_STP_4_UTP_4))
 +        if((tp->media_type == MEDIA_STP_4) ||
 +         (tp->media_type == MEDIA_UTP_4) ||
 +         (tp->media_type == MEDIA_STP_4_UTP_4))
          {
                  *pTimer_Struc++ = 0x00FA;       /* prescale */
                  *pTimer_Struc++ = 0x2710;       /* TPT_limit */
@@@ -2990,8 -2990,8 +2990,8 @@@ static int smctr_load_firmware(struct n
        }
  
          /* Verify the firmware exists and is there in the right amount. */
 -        if (!fw->data
 -                || (*(fw->data + UCODE_VERSION_OFFSET) < UCODE_VERSION))
 +        if (!fw->data ||
 +          (*(fw->data + UCODE_VERSION_OFFSET) < UCODE_VERSION))
          {
                  err = (UCODE_NOT_PRESENT);
                goto out;
          smctr_enable_16bit(dev);
          smctr_set_page(dev, (__u8 *)tp->ram_access);
  
 -        if((smctr_checksum_firmware(dev))
 -                || (*(fw->data + UCODE_VERSION_OFFSET)
 -                > tp->microcode_version))
 +        if((smctr_checksum_firmware(dev)) ||
 +         (*(fw->data + UCODE_VERSION_OFFSET) > tp->microcode_version))
          {
                  smctr_enable_adapter_ctrl_store(dev);
  
@@@ -3116,9 -3117,9 +3116,9 @@@ static int smctr_lobe_media_test(struc
          }
  
          /* Check if any frames received during test. */
 -        if((tp->rx_fcb_curr[MAC_QUEUE]->frame_status)
 -                || (tp->rx_fcb_curr[NON_MAC_QUEUE]->frame_status))
 -                      goto err;
 +        if((tp->rx_fcb_curr[MAC_QUEUE]->frame_status) ||
 +         (tp->rx_fcb_curr[NON_MAC_QUEUE]->frame_status))
 +              goto err;
  
          /* Set receive mask to "Promisc" mode. */
          tp->receive_mask = saved_rcv_mask;
@@@ -3302,8 -3303,8 +3302,8 @@@ static int smctr_make_group_addr(struc
          /* Set Group Address Sub-vector to all zeros if only the
           * Group Address/Functional Address Indicator is set.
           */
 -        if(tsv->svv[0] == 0x80 && tsv->svv[1] == 0x00
 -              && tsv->svv[2] == 0x00 && tsv->svv[3] == 0x00)
 +        if(tsv->svv[0] == 0x80 && tsv->svv[1] == 0x00 &&
 +         tsv->svv[2] == 0x00 && tsv->svv[3] == 0x00)
                  tsv->svv[0] = 0x00;
  
          return (0);
@@@ -3875,10 -3876,10 +3875,10 @@@ static int smctr_process_rx_packet(MAC_
          /* NOTE: UNKNOWN MAC frames will NOT be passed up unless
           * ACCEPT_ATT_MAC_FRAMES is set.
           */
 -        if(((tp->receive_mask & ACCEPT_ATT_MAC_FRAMES)
 -                && (xframe == (__u8)0))
 -                || ((tp->receive_mask & ACCEPT_EXT_MAC_FRAMES)
 -                && (xframe == (__u8)1)))
 +        if(((tp->receive_mask & ACCEPT_ATT_MAC_FRAMES) &&
 +          (xframe == (__u8)0)) ||
 +         ((tp->receive_mask & ACCEPT_EXT_MAC_FRAMES) &&
 +          (xframe == (__u8)1)))
          {
                  rmf->vl = SWAP_BYTES(rmf->vl);
  
@@@ -3933,8 -3934,8 +3933,8 @@@ static int smctr_ram_memory_test(struc
  
                  word_pattern = start_pattern;
  
 -                for(j = 1; j < (__u32)(tp->ram_usable * 1024) - 1
 -                        && (~err); j += 2, word_pattern++)
 +                for(j = 1; j < (__u32)(tp->ram_usable * 1024) - 1 && (~err);
 +                  j += 2, word_pattern++)
                  {
                          word_read = *(__u16 *)(pword + j);
                          if(word_read != word_pattern)
                  for(j = 0; j < (__u32)tp->ram_usable * 1024; j +=2)
                          *(__u16 *)(pword + j) = word_pattern;
  
 -                for(j =0; j < (__u32)tp->ram_usable * 1024
 -                        && (~err); j += 2)
 +                for(j =0; j < (__u32)tp->ram_usable * 1024 && (~err); j += 2)
                  {
                          word_read = *(__u16 *)(pword + j);
                          if(word_read != word_pattern)
@@@ -4323,8 -4325,8 +4323,8 @@@ static int smctr_restart_tx_chain(struc
          if(smctr_debug > 10)
                  printk(KERN_DEBUG "%s: smctr_restart_tx_chain\n", dev->name);
  
 -        if(tp->num_tx_fcbs_used[queue] != 0
 -                && tp->tx_queue_status[queue] == NOT_TRANSMITING)
 +        if(tp->num_tx_fcbs_used[queue] != 0 &&
 +         tp->tx_queue_status[queue] == NOT_TRANSMITING)
          {
                  tp->tx_queue_status[queue] = TRANSMITING;
                  err = smctr_issue_resume_tx_fcb_cmd(dev, queue);
@@@ -4347,8 -4349,8 +4347,8 @@@ static int smctr_ring_status_chg(struc
           */
          if(tp->ring_status_flags == MONITOR_STATE_CHANGED)
          {
 -                if((tp->monitor_state == MS_ACTIVE_MONITOR_STATE)
 -                        || (tp->monitor_state == MS_STANDBY_MONITOR_STATE))
 +                if((tp->monitor_state == MS_ACTIVE_MONITOR_STATE) ||
 +                 (tp->monitor_state == MS_STANDBY_MONITOR_STATE))
                  {
                          tp->monitor_state_ready = 1;
                  }
                          tp->monitor_state_ready = 0;
  
                        /* Ring speed problem, switching to auto mode. */
 -                      if(tp->monitor_state == MS_MONITOR_FSM_INACTIVE
 -                              && !tp->cleanup)
 +                      if(tp->monitor_state == MS_MONITOR_FSM_INACTIVE &&
 +                         !tp->cleanup)
                        {
                                printk(KERN_INFO "%s: Incorrect ring speed switching.\n",
                                        dev->name);
@@@ -4440,8 -4442,8 +4440,8 @@@ static int smctr_rx_frame(struct net_de
          {
                  err = HARDWARE_FAILED;
  
 -                if(((status & 0x007f) == 0)
 -                        || ((tp->receive_mask & ACCEPT_ERR_PACKETS) != 0))
 +                if(((status & 0x007f) == 0) ||
 +                 ((tp->receive_mask & ACCEPT_ERR_PACKETS) != 0))
                  {
                          /* frame length less the CRC (4 bytes) + FS (1 byte) */
                          rx_size = tp->rx_fcb_curr[queue]->frame_length - 5;
@@@ -4536,8 -4538,8 +4536,8 @@@ static int smctr_send_dat(struct net_de
          }
  
          /* Check if GOOD frame Tx'ed. */
 -        if(!(fcb->frame_status &  FCB_COMMAND_DONE)
 -                || fcb->frame_status & (FCB_TX_STATUS_E | FCB_TX_AC_BITS))
 +        if(!(fcb->frame_status &  FCB_COMMAND_DONE) ||
 +         fcb->frame_status & (FCB_TX_STATUS_E | FCB_TX_AC_BITS))
          {
                  return (INITIALIZE_FAILED);
          }
@@@ -4651,8 -4653,8 +4651,8 @@@ static int smctr_send_lobe_media_test(s
          }
  
          /* Check if GOOD frame Tx'ed */
 -        if(!(fcb->frame_status & FCB_COMMAND_DONE)
 -                || fcb->frame_status & (FCB_TX_STATUS_E | FCB_TX_AC_BITS))
 +        if(!(fcb->frame_status & FCB_COMMAND_DONE) ||
 +         fcb->frame_status & (FCB_TX_STATUS_E | FCB_TX_AC_BITS))
          {
                  return (LOBE_MEDIA_TEST_FAILED);
          }
diff --combined drivers/net/ucc_geth.c
index 9f44c99777a8146b20e6bb35b1a813af3eed5808,5e9adbaf6745fa9b6810bde6cf43d00dcdd8393b..afaf088b72eaab23d1a6847f0e91abcae49ee2d6
@@@ -1306,8 -1306,8 +1306,8 @@@ static int init_max_rx_buff_len(u16 max
                                u16 __iomem *mrblr_register)
  {
        /* max_rx_buf_len value must be a multiple of 128 */
 -      if ((max_rx_buf_len == 0)
 -          || (max_rx_buf_len % UCC_GETH_MRBLR_ALIGNMENT))
 +      if ((max_rx_buf_len == 0) ||
 +          (max_rx_buf_len % UCC_GETH_MRBLR_ALIGNMENT))
                return -EINVAL;
  
        out_be16(mrblr_register, max_rx_buf_len);
@@@ -2159,8 -2159,8 +2159,8 @@@ static int ucc_struct_init(struct ucc_g
        }
  
        if ((ug_info->numStationAddresses !=
 -           UCC_GETH_NUM_OF_STATION_ADDRESSES_1)
 -          && ug_info->rxExtendedFiltering) {
 +           UCC_GETH_NUM_OF_STATION_ADDRESSES_1) &&
 +          ug_info->rxExtendedFiltering) {
                if (netif_msg_probe(ugeth))
                        ugeth_err("%s: Number of station addresses greater than 1 "
                                  "not allowed in extended parsing mode.",
@@@ -2284,9 -2284,9 +2284,9 @@@ static int ucc_geth_startup(struct ucc_
             UCC_GETH_NUM_OF_STATION_ADDRESSES_1);
  
        ugeth->rx_extended_features = ugeth->rx_non_dynamic_extended_features ||
 -          (ug_info->vlanOperationTagged != UCC_GETH_VLAN_OPERATION_TAGGED_NOP)
 -          || (ug_info->vlanOperationNonTagged !=
 -              UCC_GETH_VLAN_OPERATION_NON_TAGGED_NOP);
 +              (ug_info->vlanOperationTagged != UCC_GETH_VLAN_OPERATION_TAGGED_NOP) ||
 +              (ug_info->vlanOperationNonTagged !=
 +               UCC_GETH_VLAN_OPERATION_NON_TAGGED_NOP);
  
        init_default_reg_vals(&uf_regs->upsmr,
                              &ug_regs->maccfg1, &ug_regs->maccfg2);
        ugeth->p_init_enet_param_shadow->rgftgfrxglobal |=
            ugeth->rx_glbl_pram_offset | ug_info->riscRx;
        if ((ug_info->largestexternallookupkeysize !=
 -           QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_NONE)
 -          && (ug_info->largestexternallookupkeysize !=
 -              QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_8_BYTES)
 -          && (ug_info->largestexternallookupkeysize !=
 -              QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_16_BYTES)) {
 +           QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_NONE) &&
 +          (ug_info->largestexternallookupkeysize !=
 +           QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_8_BYTES) &&
 +          (ug_info->largestexternallookupkeysize !=
 +           QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_16_BYTES)) {
                if (netif_msg_ifup(ugeth))
                        ugeth_err("%s: Invalid largest External Lookup Key Size.",
                                  __func__);
@@@ -3798,7 -3798,7 +3798,7 @@@ static int ucc_geth_probe(struct of_dev
                prop = of_get_property(np, "tx-clock", NULL);
                if (!prop) {
                        printk(KERN_ERR
-                               "ucc_geth: mising tx-clock-name property\n");
+                               "ucc_geth: missing tx-clock-name property\n");
                        return -EINVAL;
                }
                if ((*prop < QE_CLK_NONE) || (*prop > QE_CLK24)) {
index a7d4fc1a03a213460a6165e9163f4e037dd701dc,4d4c543c146405457d0e59517f9da166c1216fb4..0e52993e20798ff763dceb3d5a34fccdba111e5c
@@@ -182,7 -182,7 +182,7 @@@ static inline pvc_device* find_pvc(hdlc
                if (pvc->dlci == dlci)
                        return pvc;
                if (pvc->dlci > dlci)
-                       return NULL; /* the listed is sorted */
+                       return NULL; /* the list is sorted */
                pvc = pvc->next;
        }
  
@@@ -1214,10 -1214,10 +1214,10 @@@ static int fr_ioctl(struct net_device *
                return 0;
  
        case IF_PROTO_FR:
 -              if(!capable(CAP_NET_ADMIN))
 +              if (!capable(CAP_NET_ADMIN))
                        return -EPERM;
  
 -              if(dev->flags & IFF_UP)
 +              if (dev->flags & IFF_UP)
                        return -EBUSY;
  
                if (copy_from_user(&new_settings, fr_s, size))
                if (dev_to_hdlc(dev)->proto != &proto) /* Different proto */
                        return -EINVAL;
  
 -              if(!capable(CAP_NET_ADMIN))
 +              if (!capable(CAP_NET_ADMIN))
                        return -EPERM;
  
                if (copy_from_user(&pvc, ifr->ifr_settings.ifs_ifsu.fr_pvc,
index 2ebe935d10585ef4b3d792c78c98c2f6329248d9,ee784e091f67d6c1cc28a06915d1fcf591d7ad72..4b6f27e7c820fa0cb4655d67f71fd65a2b757129
@@@ -927,7 -927,7 +927,7 @@@ static int __devinit lmc_init_one(struc
          sc->lmc_media = &lmc_t1_media;
          break;
      default:
-       printk(KERN_WARNING "%s: LMC UNKOWN CARD!\n", dev->name);
+       printk(KERN_WARNING "%s: LMC UNKNOWN CARD!\n", dev->name);
          break;
      }
  
@@@ -1028,7 -1028,7 +1028,7 @@@ static int lmc_open(struct net_device *
      lmc_softreset (sc);
  
      /* Since we have to use PCI bus, this should work on x86,alpha,ppc */
 -    if (request_irq (dev->irq, &lmc_interrupt, IRQF_SHARED, dev->name, dev)){
 +    if (request_irq (dev->irq, lmc_interrupt, IRQF_SHARED, dev->name, dev)){
          printk(KERN_WARNING "%s: could not get irq: %d\n", dev->name, dev->irq);
          lmc_trace(dev, "lmc_open irq failed out");
          return -EAGAIN;
index e3d2a9de023c564891d7f4fbcd8daba8b192b0cd,99d27473ba3f34a6a745c56e8d64cd046620d53f..7ddb173fd4a7b4f2470adfce618e6612375fa534
@@@ -158,104 -158,30 +158,104 @@@ struct i2400m_report_hook_args 
        struct sk_buff *skb_rx;
        const struct i2400m_l3l4_hdr *l3l4_hdr;
        size_t size;
 +      struct list_head list_node;
  };
  
  
  /*
   * Execute i2400m_report_hook in a workqueue
   *
 - * Unpacks arguments from the deferred call, executes it and then
 - * drops the references.
 + * Goes over the list of queued reports in i2400m->rx_reports and
 + * processes them.
   *
 - * Obvious NOTE: References are needed because we are a separate
 - *     thread; otherwise the buffer changes under us because it is
 - *     released by the original caller.
 + * NOTE: refcounts on i2400m are not needed because we flush the
 + *     workqueue this runs on (i2400m->work_queue) before destroying
 + *     i2400m.
   */
 -static
  void i2400m_report_hook_work(struct work_struct *ws)
  {
 -      struct i2400m_work *iw =
 -              container_of(ws, struct i2400m_work, ws);
 -      struct i2400m_report_hook_args *args = (void *) iw->pl;
 -      if (iw->i2400m->ready)
 -              i2400m_report_hook(iw->i2400m, args->l3l4_hdr, args->size);
 -      kfree_skb(args->skb_rx);
 -      i2400m_put(iw->i2400m);
 -      kfree(iw);
 +      struct i2400m *i2400m = container_of(ws, struct i2400m, rx_report_ws);
 +      struct device *dev = i2400m_dev(i2400m);
 +      struct i2400m_report_hook_args *args, *args_next;
 +      LIST_HEAD(list);
 +      unsigned long flags;
 +
 +      while (1) {
 +              spin_lock_irqsave(&i2400m->rx_lock, flags);
 +              list_splice_init(&i2400m->rx_reports, &list);
 +              spin_unlock_irqrestore(&i2400m->rx_lock, flags);
 +              if (list_empty(&list))
 +                      break;
 +              else
 +                      d_printf(1, dev, "processing queued reports\n");
 +              list_for_each_entry_safe(args, args_next, &list, list_node) {
 +                      d_printf(2, dev, "processing queued report %p\n", args);
 +                      i2400m_report_hook(i2400m, args->l3l4_hdr, args->size);
 +                      kfree_skb(args->skb_rx);
 +                      list_del(&args->list_node);
 +                      kfree(args);
 +              }
 +      }
 +}
 +
 +
 +/*
 + * Flush the list of queued reports
 + */
 +static
 +void i2400m_report_hook_flush(struct i2400m *i2400m)
 +{
 +      struct device *dev = i2400m_dev(i2400m);
 +      struct i2400m_report_hook_args *args, *args_next;
 +      LIST_HEAD(list);
 +      unsigned long flags;
 +
 +      d_printf(1, dev, "flushing queued reports\n");
 +      spin_lock_irqsave(&i2400m->rx_lock, flags);
 +      list_splice_init(&i2400m->rx_reports, &list);
 +      spin_unlock_irqrestore(&i2400m->rx_lock, flags);
 +      list_for_each_entry_safe(args, args_next, &list, list_node) {
 +              d_printf(2, dev, "flushing queued report %p\n", args);
 +              kfree_skb(args->skb_rx);
 +              list_del(&args->list_node);
 +              kfree(args);
 +      }
 +}
 +
 +
 +/*
 + * Queue a report for later processing
 + *
 + * @i2400m: device descriptor
 + * @skb_rx: skb that contains the payload (for reference counting)
 + * @l3l4_hdr: pointer to the control
 + * @size: size of the message
 + */
 +static
 +void i2400m_report_hook_queue(struct i2400m *i2400m, struct sk_buff *skb_rx,
 +                            const void *l3l4_hdr, size_t size)
 +{
 +      struct device *dev = i2400m_dev(i2400m);
 +      unsigned long flags;
 +      struct i2400m_report_hook_args *args;
 +
 +      args = kzalloc(sizeof(*args), GFP_NOIO);
 +      if (args) {
 +              args->skb_rx = skb_get(skb_rx);
 +              args->l3l4_hdr = l3l4_hdr;
 +              args->size = size;
 +              spin_lock_irqsave(&i2400m->rx_lock, flags);
 +              list_add_tail(&args->list_node, &i2400m->rx_reports);
 +              spin_unlock_irqrestore(&i2400m->rx_lock, flags);
 +              d_printf(2, dev, "queued report %p\n", args);
 +              rmb();          /* see i2400m->ready's documentation  */
 +              if (likely(i2400m->ready))      /* only send if up */
 +                      queue_work(i2400m->work_queue, &i2400m->rx_report_ws);
 +      } else  {
 +              if (printk_ratelimit())
 +                      dev_err(dev, "%s:%u: Can't allocate %zu B\n",
 +                              __func__, __LINE__, sizeof(*args));
 +      }
  }
  
  
@@@ -369,29 -295,21 +369,29 @@@ void i2400m_rx_ctl(struct i2400m *i2400
                 msg_type, size);
        d_dump(2, dev, l3l4_hdr, size);
        if (msg_type & I2400M_MT_REPORT_MASK) {
 -              /* These hooks have to be ran serialized; as well, the
 -               * handling might force the execution of commands, and
 -               * that might cause reentrancy issues with
 -               * bus-specific subdrivers and workqueues. So we run
 -               * it in a separate workqueue. */
 -              struct i2400m_report_hook_args args = {
 -                      .skb_rx = skb_rx,
 -                      .l3l4_hdr = l3l4_hdr,
 -                      .size = size
 -              };
 -              if (unlikely(i2400m->ready == 0))       /* only send if up */
 -                      return;
 -              skb_get(skb_rx);
 -              i2400m_queue_work(i2400m, i2400m_report_hook_work,
 -                                GFP_KERNEL, &args, sizeof(args));
 +              /*
 +               * Process each report
 +               *
 +               * - has to be ran serialized as well
 +               *
 +               * - the handling might force the execution of
 +               *   commands. That might cause reentrancy issues with
 +               *   bus-specific subdrivers and workqueues, so the we
 +               *   run it in a separate workqueue.
 +               *
 +               * - when the driver is not yet ready to handle them,
 +               *   they are queued and at some point the queue is
 +               *   restarted [NOTE: we can't queue SKBs directly, as
 +               *   this might be a piece of a SKB, not the whole
 +               *   thing, and this is cheaper than cloning the
 +               *   SKB].
 +               *
 +               * Note we don't do refcounting for the device
 +               * structure; this is because before destroying
 +               * 'i2400m', we make sure to flush the
 +               * i2400m->work_queue, so there are no issues.
 +               */
 +              i2400m_report_hook_queue(i2400m, skb_rx, l3l4_hdr, size);
                if (unlikely(i2400m->trace_msg_from_user))
                        wimax_msg(&i2400m->wimax_dev, "echo",
                                  l3l4_hdr, size, GFP_KERNEL);
@@@ -445,6 -363,8 +445,6 @@@ void i2400m_rx_trace(struct i2400m *i24
                 msg_type & I2400M_MT_REPORT_MASK ? "REPORT" : "CMD/SET/GET",
                 msg_type, size);
        d_dump(2, dev, l3l4_hdr, size);
 -      if (unlikely(i2400m->ready == 0))       /* only send if up */
 -              return;
        result = wimax_msg(wimax_dev, "trace", l3l4_hdr, size, GFP_KERNEL);
        if (result < 0)
                dev_err(dev, "error sending trace to userspace: %d\n",
@@@ -828,7 -748,7 +828,7 @@@ void i2400m_roq_queue(struct i2400m *i2
                dev_err(dev, "SW BUG? queue nsn %d (lbn %u ws %u)\n",
                        nsn, lbn, roq->ws);
                i2400m_roq_log_dump(i2400m, roq);
 -              i2400m->bus_reset(i2400m, I2400M_RT_WARM);
 +              i2400m_reset(i2400m, I2400M_RT_WARM);
        } else {
                __i2400m_roq_queue(i2400m, roq, skb, lbn, nsn);
                i2400m_roq_log_add(i2400m, roq, I2400M_RO_TYPE_PACKET,
@@@ -894,7 -814,7 +894,7 @@@ void i2400m_roq_queue_update_ws(struct 
                dev_err(dev, "SW BUG? queue_update_ws nsn %u (sn %u ws %u)\n",
                        nsn, sn, roq->ws);
                i2400m_roq_log_dump(i2400m, roq);
 -              i2400m->bus_reset(i2400m, I2400M_RT_WARM);
 +              i2400m_reset(i2400m, I2400M_RT_WARM);
        } else {
                /* if the queue is empty, don't bother as we'd queue
                 * it and inmediately unqueue it -- just deliver it */
@@@ -1194,7 -1114,7 +1194,7 @@@ error
   * device. See the file header for the format. Run all checks on the
   * buffer header, then run over each payload's descriptors, verify
   * their consistency and act on each payload's contents.  If
-  * everything is succesful, update the device's statistics.
+  * everything is successful, update the device's statistics.
   *
   * Note: You need to set the skb to contain only the length of the
   * received buffer; for that, use skb_trim(skb, RECEIVED_SIZE).
@@@ -1274,28 -1194,6 +1274,28 @@@ error_msg_hdr_check
  EXPORT_SYMBOL_GPL(i2400m_rx);
  
  
 +void i2400m_unknown_barker(struct i2400m *i2400m,
 +                         const void *buf, size_t size)
 +{
 +      struct device *dev = i2400m_dev(i2400m);
 +      char prefix[64];
 +      const __le32 *barker = buf;
 +      dev_err(dev, "RX: HW BUG? unknown barker %08x, "
 +              "dropping %zu bytes\n", le32_to_cpu(*barker), size);
 +      snprintf(prefix, sizeof(prefix), "%s %s: ",
 +               dev_driver_string(dev), dev_name(dev));
 +      if (size > 64) {
 +              print_hex_dump(KERN_ERR, prefix, DUMP_PREFIX_OFFSET,
 +                             8, 4, buf, 64, 0);
 +              printk(KERN_ERR "%s... (only first 64 bytes "
 +                     "dumped)\n", prefix);
 +      } else
 +              print_hex_dump(KERN_ERR, prefix, DUMP_PREFIX_OFFSET,
 +                             8, 4, buf, size, 0);
 +}
 +EXPORT_SYMBOL(i2400m_unknown_barker);
 +
 +
  /*
   * Initialize the RX queue and infrastructure
   *
@@@ -1363,6 -1261,4 +1363,6 @@@ void i2400m_rx_release(struct i2400m *i
                kfree(i2400m->rx_roq[0].log);
                kfree(i2400m->rx_roq);
        }
 +      /* at this point, nothing can be received... */
 +      i2400m_report_hook_flush(i2400m);
  }
index b72338c9bde79041b718afe34041ae2310718308,4da0294104671d2ffe264653ad837a6144dc0e2d..952b3a21bbc30daff228bd93d921e0e062d0b4de
@@@ -36,7 -36,7 +36,7 @@@
   */
  
  /*
-  * Defintions for the Atheros Wireless LAN controller driver.
+  * Definitions for the Atheros Wireless LAN controller driver.
   */
  #ifndef _DEV_ATH_ATHVAR_H
  #define _DEV_ATH_ATHVAR_H
@@@ -115,6 -115,7 +115,6 @@@ struct ath5k_rfkill 
   * associated with an instance of a device */
  struct ath5k_softc {
        struct pci_dev          *pdev;          /* for dma mapping */
 -      struct ath_common       common;
        void __iomem            *iobase;        /* address of the device */
        struct mutex            lock;           /* dev-level lock */
        struct ieee80211_tx_queue_stats tx_stats[AR5K_NUM_TX_QUEUES];
  
        enum ath5k_int          imask;          /* interrupt mask copy */
  
 -      DECLARE_BITMAP(keymap, AR5K_KEYCACHE_SIZE); /* key use bit map */
 -
        u8                      bssidmask[ETH_ALEN];
  
        unsigned int            led_pin,        /* GPIO pin for driving LED */
        struct ath5k_txq        *cabq;          /* content after beacon */
  
        int                     power_level;    /* Requested tx power in dbm */
-       bool                    assoc;          /* assocate state */
+       bool                    assoc;          /* associate state */
        bool                    enable_beacon;  /* true if beacons are on */
  };
  
  #define ath5k_hw_hasveol(_ah) \
        (ath5k_hw_get_capability(_ah, AR5K_CAP_VEOL, 0, NULL) == 0)
  
 -static inline struct ath_common *ath5k_hw_common(struct ath5k_hw *ah)
 -{
 -      return &ah->ah_sc->common;
 -}
 -
 -static inline struct ath_regulatory *ath5k_hw_regulatory(struct ath5k_hw *ah)
 -{
 -      return &(ath5k_hw_common(ah)->regulatory);
 -
 -}
 -
  #endif
index bbfdcd5e7cb1c452fcdfebb875dd0c5de5578267,6f04cc758dcc577a5eba3b5485c99d855812da4c..72474c0ccaff7eb303281f023a9d25e0ecc03654
@@@ -117,7 -117,7 +117,7 @@@ static unsigned int ath5k_hw_rfb_op(str
  
  /*
   * This code is used to optimize rf gain on different environments
-  * (temprature mostly) based on feedback from a power detector.
+  * (temperature mostly) based on feedback from a power detector.
   *
   * It's only used on RF5111 and RF5112, later RF chips seem to have
   * auto adjustment on hw -notice they have a much smaller BANK 7 and
@@@ -1124,148 -1124,77 +1124,148 @@@ ath5k_hw_calibration_poll(struct ath5k_
                ah->ah_swi_mask = AR5K_SWI_FULL_CALIBRATION;
                AR5K_REG_ENABLE_BITS(ah, AR5K_CR, AR5K_CR_SWI);
        }
 +}
  
 +static int sign_extend(int val, const int nbits)
 +{
 +      int order = BIT(nbits-1);
 +      return (val ^ order) - order;
  }
  
 -/**
 - * ath5k_hw_noise_floor_calibration - perform PHY noise floor calibration
 - *
 - * @ah: struct ath5k_hw pointer we are operating on
 - * @freq: the channel frequency, just used for error logging
 - *
 - * This function performs a noise floor calibration of the PHY and waits for
 - * it to complete. Then the noise floor value is compared to some maximum
 - * noise floor we consider valid.
 - *
 - * Note that this is different from what the madwifi HAL does: it reads the
 - * noise floor and afterwards initiates the calibration. Since the noise floor
 - * calibration can take some time to finish, depending on the current channel
 - * use, that avoids the occasional timeout warnings we are seeing now.
 - *
 - * See the following link for an Atheros patent on noise floor calibration:
 - * http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL \
 - * &p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7245893.PN.&OS=PN/7
 +static s32 ath5k_hw_read_measured_noise_floor(struct ath5k_hw *ah)
 +{
 +      s32 val;
 +
 +      val = ath5k_hw_reg_read(ah, AR5K_PHY_NF);
 +      return sign_extend(AR5K_REG_MS(val, AR5K_PHY_NF_MINCCA_PWR), 9);
 +}
 +
 +void ath5k_hw_init_nfcal_hist(struct ath5k_hw *ah)
 +{
 +      int i;
 +
 +      ah->ah_nfcal_hist.index = 0;
 +      for (i = 0; i < ATH5K_NF_CAL_HIST_MAX; i++)
 +              ah->ah_nfcal_hist.nfval[i] = AR5K_TUNE_CCA_MAX_GOOD_VALUE;
 +}
 +
 +static void ath5k_hw_update_nfcal_hist(struct ath5k_hw *ah, s16 noise_floor)
 +{
 +      struct ath5k_nfcal_hist *hist = &ah->ah_nfcal_hist;
 +      hist->index = (hist->index + 1) & (ATH5K_NF_CAL_HIST_MAX-1);
 +      hist->nfval[hist->index] = noise_floor;
 +}
 +
 +static s16 ath5k_hw_get_median_noise_floor(struct ath5k_hw *ah)
 +{
 +      s16 sort[ATH5K_NF_CAL_HIST_MAX];
 +      s16 tmp;
 +      int i, j;
 +
 +      memcpy(sort, ah->ah_nfcal_hist.nfval, sizeof(sort));
 +      for (i = 0; i < ATH5K_NF_CAL_HIST_MAX - 1; i++) {
 +              for (j = 1; j < ATH5K_NF_CAL_HIST_MAX - i; j++) {
 +                      if (sort[j] > sort[j-1]) {
 +                              tmp = sort[j];
 +                              sort[j] = sort[j-1];
 +                              sort[j-1] = tmp;
 +                      }
 +              }
 +      }
 +      for (i = 0; i < ATH5K_NF_CAL_HIST_MAX; i++) {
 +              ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE,
 +                      "cal %d:%d\n", i, sort[i]);
 +      }
 +      return sort[(ATH5K_NF_CAL_HIST_MAX-1) / 2];
 +}
 +
 +/*
 + * When we tell the hardware to perform a noise floor calibration
 + * by setting the AR5K_PHY_AGCCTL_NF bit, it will periodically
 + * sample-and-hold the minimum noise level seen at the antennas.
 + * This value is then stored in a ring buffer of recently measured
 + * noise floor values so we have a moving window of the last few
 + * samples.
   *
 - * XXX: Since during noise floor calibration antennas are detached according to
 - * the patent, we should stop tx queues here.
 + * The median of the values in the history is then loaded into the
 + * hardware for its own use for RSSI and CCA measurements.
   */
 -int
 -ath5k_hw_noise_floor_calibration(struct ath5k_hw *ah, short freq)
 +void ath5k_hw_update_noise_floor(struct ath5k_hw *ah)
  {
 -      int ret;
 -      unsigned int i;
 -      s32 noise_floor;
 +      struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
 +      u32 val;
 +      s16 nf, threshold;
 +      u8 ee_mode;
  
 -      /*
 -       * Enable noise floor calibration
 -       */
 -      AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,
 -                              AR5K_PHY_AGCCTL_NF);
 +      /* keep last value if calibration hasn't completed */
 +      if (ath5k_hw_reg_read(ah, AR5K_PHY_AGCCTL) & AR5K_PHY_AGCCTL_NF) {
 +              ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE,
 +                      "NF did not complete in calibration window\n");
  
 -      ret = ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL,
 -                      AR5K_PHY_AGCCTL_NF, 0, false);
 -      if (ret) {
 -              ATH5K_ERR(ah->ah_sc,
 -                      "noise floor calibration timeout (%uMHz)\n", freq);
 -              return -EAGAIN;
 +              return;
        }
  
 -      /* Wait until the noise floor is calibrated and read the value */
 -      for (i = 20; i > 0; i--) {
 -              mdelay(1);
 -              noise_floor = ath5k_hw_reg_read(ah, AR5K_PHY_NF);
 -              noise_floor = AR5K_PHY_NF_RVAL(noise_floor);
 -              if (noise_floor & AR5K_PHY_NF_ACTIVE) {
 -                      noise_floor = AR5K_PHY_NF_AVAL(noise_floor);
 -
 -                      if (noise_floor <= AR5K_TUNE_NOISE_FLOOR)
 -                              break;
 -              }
 +      switch (ah->ah_current_channel->hw_value & CHANNEL_MODES) {
 +      case CHANNEL_A:
 +      case CHANNEL_T:
 +      case CHANNEL_XR:
 +              ee_mode = AR5K_EEPROM_MODE_11A;
 +              break;
 +      case CHANNEL_G:
 +      case CHANNEL_TG:
 +              ee_mode = AR5K_EEPROM_MODE_11G;
 +              break;
 +      default:
 +      case CHANNEL_B:
 +              ee_mode = AR5K_EEPROM_MODE_11B;
 +              break;
        }
  
 -      ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_CALIBRATE,
 -              "noise floor %d\n", noise_floor);
  
 -      if (noise_floor > AR5K_TUNE_NOISE_FLOOR) {
 -              ATH5K_ERR(ah->ah_sc,
 -                      "noise floor calibration failed (%uMHz)\n", freq);
 -              return -EAGAIN;
 +      /* completed NF calibration, test threshold */
 +      nf = ath5k_hw_read_measured_noise_floor(ah);
 +      threshold = ee->ee_noise_floor_thr[ee_mode];
 +
 +      if (nf > threshold) {
 +              ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE,
 +                      "noise floor failure detected; "
 +                      "read %d, threshold %d\n",
 +                      nf, threshold);
 +
 +              nf = AR5K_TUNE_CCA_MAX_GOOD_VALUE;
        }
  
 -      ah->ah_noise_floor = noise_floor;
 +      ath5k_hw_update_nfcal_hist(ah, nf);
 +      nf = ath5k_hw_get_median_noise_floor(ah);
  
 -      return 0;
 +      /* load noise floor (in .5 dBm) so the hardware will use it */
 +      val = ath5k_hw_reg_read(ah, AR5K_PHY_NF) & ~AR5K_PHY_NF_M;
 +      val |= (nf * 2) & AR5K_PHY_NF_M;
 +      ath5k_hw_reg_write(ah, val, AR5K_PHY_NF);
 +
 +      AR5K_REG_MASKED_BITS(ah, AR5K_PHY_AGCCTL, AR5K_PHY_AGCCTL_NF,
 +              ~(AR5K_PHY_AGCCTL_NF_EN | AR5K_PHY_AGCCTL_NF_NOUPDATE));
 +
 +      ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL, AR5K_PHY_AGCCTL_NF,
 +              0, false);
 +
 +      /*
 +       * Load a high max CCA Power value (-50 dBm in .5 dBm units)
 +       * so that we're not capped by the median we just loaded.
 +       * This will be used as the initial value for the next noise
 +       * floor calibration.
 +       */
 +      val = (val & ~AR5K_PHY_NF_M) | ((-50 * 2) & AR5K_PHY_NF_M);
 +      ath5k_hw_reg_write(ah, val, AR5K_PHY_NF);
 +      AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,
 +              AR5K_PHY_AGCCTL_NF_EN |
 +              AR5K_PHY_AGCCTL_NF_NOUPDATE |
 +              AR5K_PHY_AGCCTL_NF);
 +
 +      ah->ah_noise_floor = nf;
 +
 +      ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE,
 +              "noise floor calibrated: %d\n", nf);
  }
  
  /*
@@@ -1358,7 -1287,7 +1358,7 @@@ static int ath5k_hw_rf5110_calibrate(st
                return ret;
        }
  
 -      ath5k_hw_noise_floor_calibration(ah, channel->center_freq);
 +      ath5k_hw_update_noise_floor(ah);
  
        /*
         * Re-enable RX/TX and beacons
@@@ -1399,7 -1328,7 +1399,7 @@@ static int ath5k_hw_rf511x_calibrate(st
        if (i_coffd == 0 || q_coffd == 0)
                goto done;
  
 -      i_coff = ((-iq_corr) / i_coffd) & 0x3f;
 +      i_coff = ((-iq_corr) / i_coffd);
  
        /* Boundary check */
        if (i_coff > 31)
        if (i_coff < -32)
                i_coff = -32;
  
 -      q_coff = (((s32)i_pwr / q_coffd) - 128) & 0x1f;
 +      q_coff = (((s32)i_pwr / q_coffd) - 128);
  
        /* Boundary check */
        if (q_coff > 15)
@@@ -1431,7 -1360,7 +1431,7 @@@ done
         * since noise floor calibration interrupts rx path while I/Q
         * calibration doesn't. We don't need to run noise floor calibration
         * as often as I/Q calibration.*/
 -      ath5k_hw_noise_floor_calibration(ah, channel->center_freq);
 +      ath5k_hw_update_noise_floor(ah);
  
        /* Initiate a gain_F calibration */
        ath5k_hw_request_rfgain_probe(ah);
@@@ -2746,7 -2675,7 +2746,7 @@@ ath5k_setup_channel_powertable(struct a
                /* Fill curves in reverse order
                 * from lower power (max gain)
                 * to higher power. Use curve -> idx
-                * backmaping we did on eeprom init */
+                * backmapping we did on eeprom init */
                u8 idx = pdg_curve_to_idx[pdg];
  
                /* Grab the needed curves by index */
        /* Now we have a set of curves for this
         * channel on tmpL (x range is table_max - table_min
         * and y values are tmpL[pdg][]) sorted in the same
-        * order as EEPROM (because we've used the backmaping).
+        * order as EEPROM (because we've used the backmapping).
         * So for RF5112 it's from higher power to lower power
         * and for RF2413 it's from lower power to higher power.
         * For RF5111 we only have one curve. */
@@@ -3025,6 -2954,8 +3025,6 @@@ ath5k_hw_txpower(struct ath5k_hw *ah, s
                ATH5K_ERR(ah->ah_sc, "invalid tx power: %u\n", txpower);
                return -EINVAL;
        }
 -      if (txpower == 0)
 -              txpower = AR5K_TUNE_DEFAULT_TXPOWER;
  
        /* Reset TX power values */
        memset(&ah->ah_txpower, 0, sizeof(ah->ah_txpower));
index c915954d4d5bff58d686a947492bba9b5ce96cec,0a35ee62a02a5f668e03ce4596a1a7c68b3f7e49..70fdb9d8db82579193b8ed7e393ef9cc0a30cd7a
  
  static const struct ath_rate_table ar5416_11na_ratetable = {
        42,
 +      8, /* MCS start */
        {
                { VALID, VALID, WLAN_RC_PHY_OFDM, 6000, /* 6 Mb */
 -                      5400, 0x0b, 0x00, 12,
 -                      0, 0, 0, 0, 0, 0 },
 +                      5400, 0, 12, 0, 0, 0, 0, 0 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 9000, /* 9 Mb */
 -                      7800,  0x0f, 0x00, 18,
 -                      0, 1, 1, 1, 1, 0 },
 +                      7800,  1, 18, 0, 1, 1, 1, 1 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 12000, /* 12 Mb */
 -                      10000, 0x0a, 0x00, 24,
 -                      2, 2, 2, 2, 2, 0 },
 +                      10000, 2, 24, 2, 2, 2, 2, 2 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 18000, /* 18 Mb */
 -                      13900, 0x0e, 0x00, 36,
 -                      2,  3, 3, 3, 3, 0 },
 +                      13900, 3, 36, 2, 3, 3, 3, 3 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 24000, /* 24 Mb */
 -                      17300, 0x09, 0x00, 48,
 -                      4,  4, 4, 4, 4, 0 },
 +                      17300, 4, 48, 4, 4, 4, 4, 4 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 36000, /* 36 Mb */
 -                      23000, 0x0d, 0x00, 72,
 -                      4,  5, 5, 5, 5, 0 },
 +                      23000, 5, 72, 4, 5, 5, 5, 5 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 48000, /* 48 Mb */
 -                      27400, 0x08, 0x00, 96,
 -                      4,  6, 6, 6, 6, 0 },
 +                      27400, 6, 96, 4, 6, 6, 6, 6 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 54000, /* 54 Mb */
 -                      29300, 0x0c, 0x00, 108,
 -                      4,  7, 7, 7, 7, 0 },
 +                      29300, 7, 108, 4, 7, 7, 7, 7 },
                { VALID_2040, VALID_2040, WLAN_RC_PHY_HT_20_SS, 6500, /* 6.5 Mb */
 -                      6400, 0x80, 0x00, 0,
 -                      0, 8, 24, 8, 24, 3216 },
 +                      6400, 0, 0, 0, 8, 24, 8, 24 },
                { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 13000, /* 13 Mb */
 -                      12700, 0x81, 0x00, 1,
 -                      2, 9, 25, 9, 25, 6434 },
 +                      12700, 1, 1, 2, 9, 25, 9, 25 },
                { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 19500, /* 19.5 Mb */
 -                      18800, 0x82, 0x00, 2,
 -                      2, 10, 26, 10, 26, 9650 },
 +                      18800, 2, 2, 2, 10, 26, 10, 26 },
                { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 26000, /* 26 Mb */
 -                      25000, 0x83, 0x00, 3,
 -                      4,  11, 27, 11, 27, 12868 },
 +                      25000, 3, 3, 4, 11, 27, 11, 27 },
                { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 39000, /* 39 Mb */
 -                      36700, 0x84, 0x00, 4,
 -                      4,  12, 28, 12, 28, 19304 },
 +                      36700, 4, 4, 4, 12, 28, 12, 28 },
                { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 52000, /* 52 Mb */
 -                      48100, 0x85, 0x00, 5,
 -                      4,  13, 29, 13, 29, 25740 },
 +                      48100, 5, 5, 4, 13, 29, 13, 29 },
                { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 58500, /* 58.5 Mb */
 -                      53500, 0x86, 0x00, 6,
 -                      4,  14, 30, 14, 30,  28956 },
 +                      53500, 6, 6, 4, 14, 30, 14, 30 },
                { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 65000, /* 65 Mb */
 -                      59000, 0x87, 0x00, 7,
 -                      4,  15, 31, 15, 32, 32180 },
 +                      59000, 7, 7, 4, 15, 31, 15, 32 },
                { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 13000, /* 13 Mb */
 -                      12700, 0x88, 0x00,
 -                      8, 3, 16, 33, 16, 33, 6430 },
 +                      12700, 8, 8, 3, 16, 33, 16, 33 },
                { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 26000, /* 26 Mb */
 -                      24800, 0x89, 0x00, 9,
 -                      2, 17, 34, 17, 34, 12860 },
 +                      24800, 9, 9, 2, 17, 34, 17, 34 },
                { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 39000, /* 39 Mb */
 -                      36600, 0x8a, 0x00, 10,
 -                      2, 18, 35, 18, 35, 19300 },
 +                      36600, 10, 10, 2, 18, 35, 18, 35 },
                { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 52000, /* 52 Mb */
 -                      48100, 0x8b, 0x00, 11,
 -                      4,  19, 36, 19, 36, 25736 },
 +                      48100, 11, 11, 4, 19, 36, 19, 36 },
                { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 78000, /* 78 Mb */
 -                      69500, 0x8c, 0x00, 12,
 -                      4,  20, 37, 20, 37, 38600 },
 +                      69500, 12, 12, 4, 20, 37, 20, 37 },
                { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 104000, /* 104 Mb */
 -                      89500, 0x8d, 0x00, 13,
 -                      4,  21, 38, 21, 38, 51472 },
 +                      89500, 13, 13, 4, 21, 38, 21, 38 },
                { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 117000, /* 117 Mb */
 -                      98900, 0x8e, 0x00, 14,
 -                      4,  22, 39, 22, 39, 57890 },
 +                      98900, 14, 14, 4, 22, 39, 22, 39 },
                { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 130000, /* 130 Mb */
 -                      108300, 0x8f, 0x00, 15,
 -                      4,  23, 40, 23, 41, 64320 },
 +                      108300, 15, 15, 4, 23, 40, 23, 41 },
                { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 13500, /* 13.5 Mb */
 -                      13200, 0x80, 0x00, 0,
 -                      0, 8, 24, 24, 24, 6684 },
 +                      13200, 0, 0, 0, 8, 24, 24, 24 },
                { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 27500, /* 27.0 Mb */
 -                      25900, 0x81, 0x00, 1,
 -                      2, 9, 25, 25, 25, 13368 },
 +                      25900, 1, 1, 2, 9, 25, 25, 25 },
                { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 40500, /* 40.5 Mb */
 -                      38600, 0x82, 0x00, 2,
 -                      2, 10, 26, 26, 26, 20052 },
 +                      38600, 2, 2, 2, 10, 26, 26, 26 },
                { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 54000, /* 54 Mb */
 -                      49800, 0x83, 0x00, 3,
 -                      4,  11, 27, 27, 27, 26738 },
 +                      49800, 3, 3, 4, 11, 27, 27, 27 },
                { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 81500, /* 81 Mb */
 -                      72200, 0x84, 0x00, 4,
 -                      4,  12, 28, 28, 28, 40104 },
 +                      72200, 4, 4, 4, 12, 28, 28, 28 },
                { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 108000, /* 108 Mb */
 -                      92900, 0x85, 0x00, 5,
 -                      4,  13, 29, 29, 29, 53476 },
 +                      92900, 5, 5, 4, 13, 29, 29, 29 },
                { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 121500, /* 121.5 Mb */
 -                      102700, 0x86, 0x00, 6,
 -                      4,  14, 30, 30, 30, 60156 },
 +                      102700, 6, 6, 4, 14, 30, 30, 30 },
                { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 135000, /* 135 Mb */
 -                      112000, 0x87, 0x00, 7,
 -                      4,  15, 31, 32, 32, 66840 },
 +                      112000, 7, 7, 4, 15, 31, 32, 32 },
                { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS_HGI, 150000, /* 150 Mb */
 -                      122000, 0x87, 0x00, 7,
 -                      4,  15, 31, 32, 32, 74200 },
 +                      122000, 7, 7, 4, 15, 31, 32, 32 },
                { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 27000, /* 27 Mb */
 -                      25800, 0x88, 0x00, 8,
 -                      0, 16, 33, 33, 33, 13360 },
 +                      25800, 8, 8, 0, 16, 33, 33, 33 },
                { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 54000, /* 54 Mb */
 -                      49800, 0x89, 0x00, 9,
 -                      2, 17, 34, 34, 34, 26720 },
 +                      49800, 9, 9, 2, 17, 34, 34, 34 },
                { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 81000, /* 81 Mb */
 -                      71900, 0x8a, 0x00, 10,
 -                      2, 18, 35, 35, 35, 40080 },
 +                      71900, 10, 10, 2, 18, 35, 35, 35 },
                { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 108000, /* 108 Mb */
 -                      92500, 0x8b, 0x00, 11,
 -                      4,  19, 36, 36, 36, 53440 },
 +                      92500, 11, 11, 4, 19, 36, 36, 36 },
                { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 162000, /* 162 Mb */
 -                      130300, 0x8c, 0x00, 12,
 -                      4,  20, 37, 37, 37, 80160 },
 +                      130300, 12, 12, 4, 20, 37, 37, 37 },
                { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 216000, /* 216 Mb */
 -                      162800, 0x8d, 0x00, 13,
 -                      4,  21, 38, 38, 38, 106880 },
 +                      162800, 13, 13, 4, 21, 38, 38, 38 },
                { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 243000, /* 243 Mb */
 -                      178200, 0x8e, 0x00, 14,
 -                      4,  22, 39, 39, 39, 120240 },
 +                      178200, 14, 14, 4, 22, 39, 39, 39 },
                { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 270000, /* 270 Mb */
 -                      192100, 0x8f, 0x00, 15,
 -                      4,  23, 40, 41, 41, 133600 },
 +                      192100, 15, 15, 4, 23, 40, 41, 41 },
                { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS_HGI, 300000, /* 300 Mb */
 -                      207000, 0x8f, 0x00, 15,
 -                      4,  23, 40, 41, 41, 148400 },
 +                      207000, 15, 15, 4, 23, 40, 41, 41 },
        },
        50,  /* probe interval */
        WLAN_RC_HT_FLAG,  /* Phy rates allowed initially */
  
  static const struct ath_rate_table ar5416_11ng_ratetable = {
        46,
 +      12, /* MCS start */
        {
                { VALID_ALL, VALID_ALL, WLAN_RC_PHY_CCK, 1000, /* 1 Mb */
 -                      900, 0x1b, 0x00, 2,
 -                      0, 0, 0, 0, 0, 0 },
 +                      900, 0, 2, 0, 0, 0, 0, 0 },
                { VALID_ALL, VALID_ALL, WLAN_RC_PHY_CCK, 2000, /* 2 Mb */
 -                      1900, 0x1a, 0x04, 4,
 -                      1, 1, 1, 1, 1, 0 },
 +                      1900, 1, 4, 1, 1, 1, 1, 1 },
                { VALID_ALL, VALID_ALL, WLAN_RC_PHY_CCK, 5500, /* 5.5 Mb */
 -                      4900, 0x19, 0x04, 11,
 -                      2, 2, 2, 2, 2, 0 },
 +                      4900, 2, 11, 2, 2, 2, 2, 2 },
                { VALID_ALL, VALID_ALL, WLAN_RC_PHY_CCK, 11000, /* 11 Mb */
 -                      8100, 0x18, 0x04, 22,
 -                      3, 3, 3, 3, 3, 0 },
 +                      8100, 3, 22, 3, 3, 3, 3, 3 },
                { INVALID, INVALID, WLAN_RC_PHY_OFDM, 6000, /* 6 Mb */
 -                      5400, 0x0b, 0x00, 12,
 -                      4, 4, 4, 4, 4, 0 },
 +                      5400, 4, 12, 4, 4, 4, 4, 4 },
                { INVALID, INVALID, WLAN_RC_PHY_OFDM, 9000, /* 9 Mb */
 -                      7800, 0x0f, 0x00, 18,
 -                      4, 5, 5, 5, 5, 0 },
 +                      7800, 5, 18, 4, 5, 5, 5, 5 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 12000, /* 12 Mb */
 -                      10100, 0x0a, 0x00, 24,
 -                      6, 6, 6, 6, 6, 0 },
 +                      10100, 6, 24, 6, 6, 6, 6, 6 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 18000, /* 18 Mb */
 -                      14100,  0x0e, 0x00, 36,
 -                      6, 7, 7, 7, 7, 0 },
 +                      14100, 7, 36, 6, 7, 7, 7, 7 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 24000, /* 24 Mb */
 -                      17700, 0x09, 0x00, 48,
 -                      8,  8, 8, 8, 8, 0 },
 +                      17700, 8, 48, 8, 8, 8, 8, 8 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 36000, /* 36 Mb */
 -                      23700, 0x0d, 0x00, 72,
 -                      8,  9, 9, 9, 9, 0 },
 +                      23700, 9, 72, 8, 9, 9, 9, 9 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 48000, /* 48 Mb */
 -                      27400, 0x08, 0x00, 96,
 -                      8,  10, 10, 10, 10, 0 },
 +                      27400, 10, 96, 8, 10, 10, 10, 10 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 54000, /* 54 Mb */
 -                      30900, 0x0c, 0x00, 108,
 -                      8,  11, 11, 11, 11, 0 },
 +                      30900, 11, 108, 8, 11, 11, 11, 11 },
                { INVALID, INVALID, WLAN_RC_PHY_HT_20_SS, 6500, /* 6.5 Mb */
 -                      6400, 0x80, 0x00, 0,
 -                      4, 12, 28, 12, 28, 3216 },
 +                      6400, 0, 0, 4, 12, 28, 12, 28 },
                { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 13000, /* 13 Mb */
 -                      12700, 0x81, 0x00, 1,
 -                      6, 13, 29, 13, 29, 6434 },
 +                      12700, 1, 1, 6, 13, 29, 13, 29 },
                { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 19500, /* 19.5 Mb */
 -                      18800, 0x82, 0x00, 2,
 -                      6, 14, 30, 14, 30, 9650 },
 +                      18800, 2, 2, 6, 14, 30, 14, 30 },
                { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 26000, /* 26 Mb */
 -                      25000, 0x83, 0x00, 3,
 -                      8,  15, 31, 15, 31, 12868 },
 +                      25000, 3, 3, 8, 15, 31, 15, 31 },
                { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 39000, /* 39 Mb */
 -                      36700, 0x84, 0x00, 4,
 -                      8,  16, 32, 16, 32, 19304 },
 +                      36700, 4, 4, 8, 16, 32, 16, 32 },
                { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 52000, /* 52 Mb */
 -                      48100, 0x85, 0x00, 5,
 -                      8,  17, 33, 17, 33, 25740 },
 +                      48100, 5, 5, 8, 17, 33, 17, 33 },
                { INVALID,  VALID_20, WLAN_RC_PHY_HT_20_SS, 58500, /* 58.5 Mb */
 -                      53500, 0x86, 0x00, 6,
 -                      8,  18, 34, 18, 34, 28956 },
 +                      53500, 6, 6, 8, 18, 34, 18, 34 },
                { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 65000, /* 65 Mb */
 -                      59000, 0x87, 0x00, 7,
 -                      8,  19, 35, 19, 36, 32180 },
 +                      59000, 7, 7, 8, 19, 35, 19, 36 },
                { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 13000, /* 13 Mb */
 -                      12700, 0x88, 0x00, 8,
 -                      4, 20, 37, 20, 37, 6430 },
 +                      12700, 8, 8, 4, 20, 37, 20, 37 },
                { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 26000, /* 26 Mb */
 -                      24800, 0x89, 0x00, 9,
 -                      6, 21, 38, 21, 38, 12860 },
 +                      24800, 9, 9, 6, 21, 38, 21, 38 },
                { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 39000, /* 39 Mb */
 -                      36600, 0x8a, 0x00, 10,
 -                      6, 22, 39, 22, 39, 19300 },
 +                      36600, 10, 10, 6, 22, 39, 22, 39 },
                { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 52000, /* 52 Mb */
 -                      48100, 0x8b, 0x00, 11,
 -                      8,  23, 40, 23, 40, 25736 },
 +                      48100, 11, 11, 8, 23, 40, 23, 40 },
                { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 78000, /* 78 Mb */
 -                      69500, 0x8c, 0x00, 12,
 -                      8,  24, 41, 24, 41, 38600 },
 +                      69500, 12, 12, 8, 24, 41, 24, 41 },
                { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 104000, /* 104 Mb */
 -                      89500, 0x8d, 0x00, 13,
 -                      8,  25, 42, 25, 42, 51472 },
 +                      89500, 13, 13, 8, 25, 42, 25, 42 },
                { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 117000, /* 117 Mb */
 -                      98900, 0x8e, 0x00, 14,
 -                      8,  26, 43, 26, 44, 57890 },
 +                      98900, 14, 14, 8, 26, 43, 26, 44 },
                { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 130000, /* 130 Mb */
 -                      108300, 0x8f, 0x00, 15,
 -                      8,  27, 44, 27, 45, 64320 },
 +                      108300, 15, 15, 8, 27, 44, 27, 45 },
                { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 13500, /* 13.5 Mb */
 -                      13200, 0x80, 0x00, 0,
 -                      8, 12, 28, 28, 28, 6684 },
 +                      13200, 0, 0, 8, 12, 28, 28, 28 },
                { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 27500, /* 27.0 Mb */
 -                      25900, 0x81, 0x00, 1,
 -                      8, 13, 29, 29, 29, 13368 },
 +                      25900, 1, 1, 8, 13, 29, 29, 29 },
                { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 40500, /* 40.5 Mb */
 -                      38600, 0x82, 0x00, 2,
 -                      8, 14, 30, 30, 30, 20052 },
 +                      38600, 2, 2, 8, 14, 30, 30, 30 },
                { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 54000, /* 54 Mb */
 -                      49800, 0x83, 0x00, 3,
 -                      8,  15, 31, 31, 31, 26738 },
 +                      49800, 3, 3, 8,  15, 31, 31, 31 },
                { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 81500, /* 81 Mb */
 -                      72200, 0x84, 0x00, 4,
 -                      8,  16, 32, 32, 32, 40104 },
 +                      72200, 4, 4, 8, 16, 32, 32, 32 },
                { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 108000, /* 108 Mb */
 -                      92900, 0x85, 0x00, 5,
 -                      8,  17, 33, 33, 33, 53476 },
 +                      92900, 5, 5, 8, 17, 33, 33, 33 },
                { INVALID,  VALID_40, WLAN_RC_PHY_HT_40_SS, 121500, /* 121.5 Mb */
 -                      102700, 0x86, 0x00, 6,
 -                      8,  18, 34, 34, 34, 60156 },
 +                      102700, 6, 6, 8, 18, 34, 34, 34 },
                { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 135000, /* 135 Mb */
 -                      112000, 0x87, 0x00, 7,
 -                      8,  19, 35, 36, 36, 66840 },
 +                      112000, 7, 7, 8, 19, 35, 36, 36 },
                { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS_HGI, 150000, /* 150 Mb */
 -                      122000, 0x87, 0x00, 7,
 -                      8,  19, 35, 36, 36, 74200 },
 +                      122000, 7, 7, 8, 19, 35, 36, 36 },
                { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 27000, /* 27 Mb */
 -                      25800, 0x88, 0x00, 8,
 -                      8, 20, 37, 37, 37, 13360 },
 +                      25800, 8, 8, 8, 20, 37, 37, 37 },
                { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 54000, /* 54 Mb */
 -                      49800, 0x89, 0x00, 9,
 -                      8, 21, 38, 38, 38, 26720 },
 +                      49800, 9, 9, 8, 21, 38, 38, 38 },
                { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 81000, /* 81 Mb */
 -                      71900, 0x8a, 0x00, 10,
 -                      8, 22, 39, 39, 39, 40080 },
 +                      71900, 10, 10, 8, 22, 39, 39, 39 },
                { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 108000, /* 108 Mb */
 -                      92500, 0x8b, 0x00, 11,
 -                      8,  23, 40, 40, 40, 53440 },
 +                      92500, 11, 11, 8, 23, 40, 40, 40 },
                { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 162000, /* 162 Mb */
 -                      130300, 0x8c, 0x00, 12,
 -                      8,  24, 41, 41, 41, 80160 },
 +                      130300, 12, 12, 8, 24, 41, 41, 41 },
                { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 216000, /* 216 Mb */
 -                      162800, 0x8d, 0x00, 13,
 -                      8,  25, 42, 42, 42, 106880 },
 +                      162800, 13, 13, 8, 25, 42, 42, 42 },
                { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 243000, /* 243 Mb */
 -                      178200, 0x8e, 0x00, 14,
 -                      8,  26, 43, 43, 43, 120240 },
 +                      178200, 14, 14, 8, 26, 43, 43, 43 },
                { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 270000, /* 270 Mb */
 -                      192100, 0x8f, 0x00, 15,
 -                      8,  27, 44, 45, 45, 133600 },
 +                      192100, 15, 15, 8, 27, 44, 45, 45 },
                { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS_HGI, 300000, /* 300 Mb */
 -                      207000, 0x8f, 0x00, 15,
 -                      8,  27, 44, 45, 45, 148400 },
 -              },
 +                      207000, 15, 15, 8, 27, 44, 45, 45 },
 +      },
        50,  /* probe interval */
        WLAN_RC_HT_FLAG,  /* Phy rates allowed initially */
  };
  
  static const struct ath_rate_table ar5416_11a_ratetable = {
        8,
 +      0,
        {
                { VALID, VALID, WLAN_RC_PHY_OFDM, 6000, /* 6 Mb */
 -                      5400, 0x0b, 0x00, (0x80|12),
 -                      0, 0, 0 },
 +                      5400, 0, 12, 0, 0, 0 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 9000, /* 9 Mb */
 -                      7800, 0x0f, 0x00, 18,
 -                      0, 1, 0 },
 +                      7800,  1, 18, 0, 1, 0 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 12000, /* 12 Mb */
 -                      10000, 0x0a, 0x00, (0x80|24),
 -                      2, 2, 0 },
 +                      10000, 2, 24, 2, 2, 0 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 18000, /* 18 Mb */
 -                      13900, 0x0e, 0x00, 36,
 -                      2, 3, 0 },
 +                      13900, 3, 36, 2, 3, 0 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 24000, /* 24 Mb */
 -                      17300, 0x09, 0x00, (0x80|48),
 -                      4,  4, 0 },
 +                      17300, 4, 48, 4, 4, 0 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 36000, /* 36 Mb */
 -                      23000, 0x0d, 0x00, 72,
 -                      4,  5, 0 },
 +                      23000, 5, 72, 4, 5, 0 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 48000, /* 48 Mb */
 -                      27400, 0x08, 0x00, 96,
 -                      4,  6, 0 },
 +                      27400, 6, 96, 4, 6, 0 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 54000, /* 54 Mb */
 -                      29300, 0x0c, 0x00, 108,
 -                      4,  7, 0 },
 +                      29300, 7, 108, 4, 7, 0 },
        },
        50,  /* probe interval */
        0,   /* Phy rates allowed initially */
  
  static const struct ath_rate_table ar5416_11g_ratetable = {
        12,
 +      0,
        {
                { VALID, VALID, WLAN_RC_PHY_CCK, 1000, /* 1 Mb */
 -                      900, 0x1b, 0x00, 2,
 -                      0, 0, 0 },
 +                      900, 0, 2, 0, 0, 0 },
                { VALID, VALID, WLAN_RC_PHY_CCK, 2000, /* 2 Mb */
 -                      1900, 0x1a, 0x04, 4,
 -                      1, 1, 0 },
 +                      1900, 1, 4, 1, 1, 0 },
                { VALID, VALID, WLAN_RC_PHY_CCK, 5500, /* 5.5 Mb */
 -                      4900, 0x19, 0x04, 11,
 -                      2, 2, 0 },
 +                      4900, 2, 11, 2, 2, 0 },
                { VALID, VALID, WLAN_RC_PHY_CCK, 11000, /* 11 Mb */
 -                      8100, 0x18, 0x04, 22,
 -                      3, 3, 0 },
 +                      8100, 3, 22, 3, 3, 0 },
                { INVALID, INVALID, WLAN_RC_PHY_OFDM, 6000, /* 6 Mb */
 -                      5400, 0x0b, 0x00, 12,
 -                      4, 4, 0 },
 +                      5400, 4, 12, 4, 4, 0 },
                { INVALID, INVALID, WLAN_RC_PHY_OFDM, 9000, /* 9 Mb */
 -                      7800, 0x0f, 0x00, 18,
 -                      4, 5, 0 },
 +                      7800, 5, 18, 4, 5, 0 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 12000, /* 12 Mb */
 -                      10000, 0x0a, 0x00, 24,
 -                      6, 6, 0 },
 +                      10000, 6, 24, 6, 6, 0 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 18000, /* 18 Mb */
 -                      13900, 0x0e, 0x00, 36,
 -                      6, 7, 0 },
 +                      13900, 7, 36, 6, 7, 0 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 24000, /* 24 Mb */
 -                      17300, 0x09, 0x00, 48,
 -                      8,  8, 0 },
 +                      17300, 8, 48, 8, 8, 0 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 36000, /* 36 Mb */
 -                      23000, 0x0d, 0x00, 72,
 -                      8,  9, 0 },
 +                      23000, 9, 72, 8, 9, 0 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 48000, /* 48 Mb */
 -                      27400, 0x08, 0x00, 96,
 -                      8,  10, 0 },
 +                      27400, 10, 96, 8, 10, 0 },
                { VALID, VALID, WLAN_RC_PHY_OFDM, 54000, /* 54 Mb */
 -                      29300, 0x0c, 0x00, 108,
 -                      8,  11, 0 },
 +                      29300, 11, 108, 8, 11, 0 },
        },
        50,  /* probe interval */
        0,   /* Phy rates allowed initially */
  };
  
 +static const struct ath_rate_table *hw_rate_table[ATH9K_MODE_MAX] = {
 +      [ATH9K_MODE_11A] = &ar5416_11a_ratetable,
 +      [ATH9K_MODE_11G] = &ar5416_11g_ratetable,
 +      [ATH9K_MODE_11NA_HT20] = &ar5416_11na_ratetable,
 +      [ATH9K_MODE_11NG_HT20] = &ar5416_11ng_ratetable,
 +      [ATH9K_MODE_11NA_HT40PLUS] = &ar5416_11na_ratetable,
 +      [ATH9K_MODE_11NA_HT40MINUS] = &ar5416_11na_ratetable,
 +      [ATH9K_MODE_11NG_HT40PLUS] = &ar5416_11ng_ratetable,
 +      [ATH9K_MODE_11NG_HT40MINUS] = &ar5416_11ng_ratetable,
 +};
 +
 +static int ath_rc_get_rateindex(const struct ath_rate_table *rate_table,
 +                              struct ieee80211_tx_rate *rate);
 +
  static inline int8_t median(int8_t a, int8_t b, int8_t c)
  {
        if (a >= b) {
@@@ -335,7 -425,7 +335,7 @@@ static void ath_rc_init_valid_txmask(st
  static inline void ath_rc_set_valid_txmask(struct ath_rate_priv *ath_rc_priv,
                                           u8 index, int valid_tx_rate)
  {
 -      ASSERT(index <= ath_rc_priv->rate_table_size);
 +      BUG_ON(index > ath_rc_priv->rate_table_size);
        ath_rc_priv->valid_rate_index[index] = valid_tx_rate ? 1 : 0;
  }
  
@@@ -444,7 -534,7 +444,7 @@@ static u8 ath_rc_setvalid_rates(struct 
                         * capflag matches one of the validity
                         * (VALID/VALID_20/VALID_40) flags */
  
 -                      if (((rate & 0x7F) == (dot11rate & 0x7F)) &&
 +                      if ((rate == dot11rate) &&
                            ((valid & WLAN_RC_CAP_MODE(capflag)) ==
                             WLAN_RC_CAP_MODE(capflag)) &&
                            !WLAN_RC_PHY_HT(phy)) {
@@@ -486,7 -576,8 +486,7 @@@ static u8 ath_rc_setvalid_htrates(struc
                        u8 rate = rateset->rs_rates[i];
                        u8 dot11rate = rate_table->info[j].dot11rate;
  
 -                      if (((rate & 0x7F) != (dot11rate & 0x7F)) ||
 -                          !WLAN_RC_PHY_HT(phy) ||
 +                      if ((rate != dot11rate) || !WLAN_RC_PHY_HT(phy) ||
                            !WLAN_RC_PHY_HT_VALID(valid, capflag))
                                continue;
  
@@@ -605,20 -696,18 +605,20 @@@ static void ath_rc_rate_set_series(cons
                                   u8 tries, u8 rix, int rtsctsenable)
  {
        rate->count = tries;
 -      rate->idx = rix;
 +      rate->idx = rate_table->info[rix].ratecode;
  
        if (txrc->short_preamble)
                rate->flags |= IEEE80211_TX_RC_USE_SHORT_PREAMBLE;
        if (txrc->rts || rtsctsenable)
                rate->flags |= IEEE80211_TX_RC_USE_RTS_CTS;
 -      if (WLAN_RC_PHY_40(rate_table->info[rix].phy))
 -              rate->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
 -      if (WLAN_RC_PHY_SGI(rate_table->info[rix].phy))
 -              rate->flags |= IEEE80211_TX_RC_SHORT_GI;
 -      if (WLAN_RC_PHY_HT(rate_table->info[rix].phy))
 +
 +      if (WLAN_RC_PHY_HT(rate_table->info[rix].phy)) {
                rate->flags |= IEEE80211_TX_RC_MCS;
 +              if (WLAN_RC_PHY_40(rate_table->info[rix].phy))
 +                      rate->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
 +              if (WLAN_RC_PHY_SGI(rate_table->info[rix].phy))
 +                      rate->flags |= IEEE80211_TX_RC_SHORT_GI;
<