Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
authorDavid Woodhouse <dwmw2@infradead.org>
Mon, 5 Feb 2007 13:25:21 +0000 (13:25 +0000)
committerDavid Woodhouse <dwmw2@infradead.org>
Mon, 5 Feb 2007 13:25:21 +0000 (13:25 +0000)
1  2 
drivers/mtd/nand/cafe.c

diff --combined drivers/mtd/nand/cafe.c
index e1ee62a17fe03f35b77f8e5115a0a1a65d679624,65f9bd3ceebfb6d707d2d7301568fe3786bacb0f..1e877cbe775743e30ccdd57512e2271d102088a4
@@@ -14,6 -14,7 +14,7 @@@
  #include <linux/pci.h>
  #include <linux/delay.h>
  #include <linux/interrupt.h>
+ #include <linux/dma-mapping.h>
  #include <asm/io.h>
  
  #define CAFE_NAND_CTRL1               0x00
@@@ -77,9 -78,8 +78,9 @@@ module_param(regdebug, int, 0644)
  static int checkecc = 1;
  module_param(checkecc, int, 0644);
  
 -static int slowtiming = 0;
 -module_param(slowtiming, int, 0644);
 +static int numtimings;
 +static int timing[3];
 +module_param_array(timing, int, &numtimings, 0644);
  
  /* Hrm. Why isn't this already conditional on something in the struct device? */
  #define cafe_dev_dbg(dev, args...) do { if (debug) dev_dbg(dev, ##args); } while(0)
@@@ -529,7 -529,6 +530,7 @@@ static int __devinit cafe_nand_probe(st
  {
        struct mtd_info *mtd;
        struct cafe_priv *cafe;
 +      uint32_t timing1, timing2, timing3;
        uint32_t ctrl;
        int err = 0;
  
                cafe->nand.block_bad = cafe_nand_block_bad;
        }
  
 +      if (numtimings && numtimings != 3) {
 +              dev_warn(&cafe->pdev->dev, "%d timing register values ignored; precisely three are required\n", numtimings);
 +      }
 +
 +      if (numtimings == 3) {
 +              timing1 = timing[0];
 +              timing2 = timing[1];
 +              timing3 = timing[2];
 +              cafe_dev_dbg(&cafe->pdev->dev, "Using provided timings (%08x %08x %08x)\n",
 +                           timing1, timing2, timing3);
 +      } else {
 +              timing1 = cafe_readl(cafe, NAND_TIMING1);
 +              timing2 = cafe_readl(cafe, NAND_TIMING2);
 +              timing3 = cafe_readl(cafe, NAND_TIMING3);
 +
 +              if (timing1 | timing2 | timing3) {
 +                      cafe_dev_dbg(&cafe->pdev->dev, "Timing registers already set (%08x %08x %08x)\n", timing1, timing2, timing3);
 +              } else {
 +                      dev_warn(&cafe->pdev->dev, "Timing registers unset; using most conservative defaults\n");
 +                      timing1 = timing2 = timing3 = 0xffffffff;
 +              }
 +      }
 +
        /* Start off by resetting the NAND controller completely */
        cafe_writel(cafe, 1, NAND_RESET);
        cafe_writel(cafe, 0, NAND_RESET);
  
 -      cafe_writel(cafe, 0xffffffff, NAND_IRQ_MASK);
 +      cafe_writel(cafe, timing1, NAND_TIMING1);
 +      cafe_writel(cafe, timing2, NAND_TIMING2);
 +      cafe_writel(cafe, timing3, NAND_TIMING3);
  
 -      /* Timings from Marvell's test code (not verified or calculated by us) */
 -      if (!slowtiming) {
 -              cafe_writel(cafe, 0x01010a0a, NAND_TIMING1);
 -              cafe_writel(cafe, 0x24121212, NAND_TIMING2);
 -              cafe_writel(cafe, 0x11000000, NAND_TIMING3);
 -      } else {
 -              cafe_writel(cafe, 0xffffffff, NAND_TIMING1);
 -              cafe_writel(cafe, 0xffffffff, NAND_TIMING2);
 -              cafe_writel(cafe, 0xffffffff, NAND_TIMING3);
 -      }
        cafe_writel(cafe, 0xffffffff, NAND_IRQ_MASK);
        err = request_irq(pdev->irq, &cafe_nand_interrupt, SA_SHIRQ, "CAFE NAND", mtd);
        if (err) {
                dev_warn(&pdev->dev, "Could not register IRQ %d\n", pdev->irq);
 -
                goto out_free_dma;
        }
 -#if 1
 +
        /* Disable master reset, enable NAND clock */
        ctrl = cafe_readl(cafe, GLOBAL_CTRL);
        ctrl &= 0xffffeff0;
        cafe_writel(cafe, 0x80000007, GLOBAL_IRQ_MASK);
        cafe_dev_dbg(&cafe->pdev->dev, "Control %x, IRQ mask %x\n",
                cafe_readl(cafe, GLOBAL_CTRL), cafe_readl(cafe, GLOBAL_IRQ_MASK));
 -#endif
 -#if 1
 -      mtd->writesize=2048;
 -      mtd->oobsize = 0x40;
 -      memset(cafe->dmabuf, 0x5a, 2112);
 -      cafe->nand.cmdfunc(mtd, NAND_CMD_READID, 0, -1);
 -      cafe->nand.read_byte(mtd);
 -      cafe->nand.read_byte(mtd);
 -      cafe->nand.read_byte(mtd);
 -      cafe->nand.read_byte(mtd);
 -      cafe->nand.read_byte(mtd);
 -#endif
 -#if 0
 -      cafe->nand.cmdfunc(mtd, NAND_CMD_READ0, 0, 0);
 -      //      nand_wait_ready(mtd);
 -      cafe->nand.read_byte(mtd);
 -      cafe->nand.read_byte(mtd);
 -      cafe->nand.read_byte(mtd);
 -      cafe->nand.read_byte(mtd);
 -#endif
 -#if 0
 -      writel(0x84600070, cafe->mmio);
 -      udelay(10);
 -      cafe_dev_dbg(&cafe->pdev->dev, "Status %x\n", cafe_readl(cafe, NAND_NONMEM));
 -#endif
 -      /* Scan to find existance of the device */
 +
 +      /* Scan to find existence of the device */
        if (nand_scan_ident(mtd, 1)) {
                err = -ENXIO;
                goto out_irq;
@@@ -750,4 -759,13 +751,4 @@@ module_exit(cafe_nand_exit)
  
  MODULE_LICENSE("GPL");
  MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
 -MODULE_DESCRIPTION("NAND flash driver for OLPC CAFE chip");
 -
 -/* Correct ECC for 2048 bytes of 0xff:
 -   41 a0 71 65 54 27 f3 93 ec a9 be ed 0b a1 */
 -
 -/* dwmw2's B-test board, in case of completely screwing it:
 -Bad eraseblock 2394 at 0x12b40000
 -Bad eraseblock 2627 at 0x14860000
 -Bad eraseblock 3349 at 0x1a2a0000
 -*/
 +MODULE_DESCRIPTION("NAND flash driver for OLPC CAFÉ chip");