regulator: Fix default constraints for fixed voltage regulators

Default voltage constraints were being provided for fixed voltage
regulator where board constraints were not provided but these constraints
used INT_MIN as the default minimum voltage which is not a valid value
since it is less than zero. Use 1uV instead.

Also set the default values we set in the constraints themselves since
otherwise the max_uV constraint we determine will not be stored in the
actual constraint strucutre and will therefore not be used.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>

diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
index 2f14c16f58c33cecda068ba0d912ac1863797b91..98c3a74e994943f1041818896ae23961781ed041 100644 (file)
--- a/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
@@ -703,10 +703,13 @@ static int set_machine_constraints(struct regulator_dev *rdev,
                int     cmin = constraints->min_uV;
                int     cmax = constraints->max_uV;
 
-               /* it's safe to autoconfigure fixed-voltage supplies */
+               /* it's safe to autoconfigure fixed-voltage supplies
+                  and the constraints are used by list_voltage. */
                if (count == 1 && !cmin) {
-                       cmin = INT_MIN;
+                       cmin = 1;
                        cmax = INT_MAX;
+                       constraints->min_uV = cmin;
+                       constraints->max_uV = cmax;
                }
 
                /* voltage constraints are optional */